1 /**************************************************************************
3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_kms.h"
31 /* Might need a hrtimer here? */
32 #define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
37 * Clip @num_rects number of @rects against @clip storing the
38 * results in @out_rects and the number of passed rects in @out_num.
40 void vmw_clip_cliprects(struct drm_clip_rect *rects,
42 struct vmw_clip_rect clip,
43 SVGASignedRect *out_rects,
48 for (i = 0, k = 0; i < num_rects; i++) {
49 int x1 = max_t(int, clip.x1, rects[i].x1);
50 int y1 = max_t(int, clip.y1, rects[i].y1);
51 int x2 = min_t(int, clip.x2, rects[i].x2);
52 int y2 = min_t(int, clip.y2, rects[i].y2);
59 out_rects[k].left = x1;
60 out_rects[k].top = y1;
61 out_rects[k].right = x2;
62 out_rects[k].bottom = y2;
69 void vmw_du_cleanup(struct vmw_display_unit *du)
71 if (du->cursor_surface)
72 vmw_surface_unreference(&du->cursor_surface);
73 if (du->cursor_dmabuf)
74 vmw_dmabuf_unreference(&du->cursor_dmabuf);
75 drm_connector_unregister(&du->connector);
76 drm_crtc_cleanup(&du->crtc);
77 drm_encoder_cleanup(&du->encoder);
78 drm_connector_cleanup(&du->connector);
82 * Display Unit Cursor functions
85 int vmw_cursor_update_image(struct vmw_private *dev_priv,
86 u32 *image, u32 width, u32 height,
87 u32 hotspotX, u32 hotspotY)
91 SVGAFifoCmdDefineAlphaCursor cursor;
93 u32 image_size = width * height * 4;
94 u32 cmd_size = sizeof(*cmd) + image_size;
99 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
100 if (unlikely(cmd == NULL)) {
101 DRM_ERROR("Fifo reserve failed.\n");
105 memset(cmd, 0, sizeof(*cmd));
107 memcpy(&cmd[1], image, image_size);
109 cmd->cmd = cpu_to_le32(SVGA_CMD_DEFINE_ALPHA_CURSOR);
110 cmd->cursor.id = cpu_to_le32(0);
111 cmd->cursor.width = cpu_to_le32(width);
112 cmd->cursor.height = cpu_to_le32(height);
113 cmd->cursor.hotspotX = cpu_to_le32(hotspotX);
114 cmd->cursor.hotspotY = cpu_to_le32(hotspotY);
116 vmw_fifo_commit(dev_priv, cmd_size);
121 int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
122 struct vmw_dma_buffer *dmabuf,
123 u32 width, u32 height,
124 u32 hotspotX, u32 hotspotY)
126 struct ttm_bo_kmap_obj map;
127 unsigned long kmap_offset;
128 unsigned long kmap_num;
134 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
136 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
137 if (unlikely(ret != 0)) {
138 DRM_ERROR("reserve failed\n");
142 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
143 if (unlikely(ret != 0))
146 virtual = ttm_kmap_obj_virtual(&map, &dummy);
147 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
152 ttm_bo_unreserve(&dmabuf->base);
158 void vmw_cursor_update_position(struct vmw_private *dev_priv,
159 bool show, int x, int y)
161 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
164 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
165 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
166 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
167 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
168 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
171 int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
172 uint32_t handle, uint32_t width, uint32_t height)
174 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
175 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
176 struct vmw_surface *surface = NULL;
177 struct vmw_dma_buffer *dmabuf = NULL;
181 * FIXME: Unclear whether there's any global state touched by the
182 * cursor_set function, especially vmw_cursor_update_position looks
183 * suspicious. For now take the easy route and reacquire all locks. We
184 * can do this since the caller in the drm core doesn't check anything
185 * which is protected by any looks.
187 drm_modeset_unlock_crtc(crtc);
188 drm_modeset_lock_all(dev_priv->dev);
190 /* A lot of the code assumes this */
191 if (handle && (width != 64 || height != 64)) {
197 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
199 ret = vmw_user_lookup_handle(dev_priv, tfile,
200 handle, &surface, &dmabuf);
202 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
208 /* need to do this before taking down old image */
209 if (surface && !surface->snooper.image) {
210 DRM_ERROR("surface not suitable for cursor\n");
211 vmw_surface_unreference(&surface);
216 /* takedown old cursor */
217 if (du->cursor_surface) {
218 du->cursor_surface->snooper.crtc = NULL;
219 vmw_surface_unreference(&du->cursor_surface);
221 if (du->cursor_dmabuf)
222 vmw_dmabuf_unreference(&du->cursor_dmabuf);
224 /* setup new image */
226 /* vmw_user_surface_lookup takes one reference */
227 du->cursor_surface = surface;
229 du->cursor_surface->snooper.crtc = crtc;
230 du->cursor_age = du->cursor_surface->snooper.age;
231 vmw_cursor_update_image(dev_priv, surface->snooper.image,
232 64, 64, du->hotspot_x, du->hotspot_y);
234 /* vmw_user_surface_lookup takes one reference */
235 du->cursor_dmabuf = dmabuf;
237 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
238 du->hotspot_x, du->hotspot_y);
240 vmw_cursor_update_position(dev_priv, false, 0, 0);
245 vmw_cursor_update_position(dev_priv, true,
246 du->cursor_x + du->hotspot_x,
247 du->cursor_y + du->hotspot_y);
251 drm_modeset_unlock_all(dev_priv->dev);
252 drm_modeset_lock_crtc(crtc, crtc->cursor);
257 int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
259 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
260 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
261 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
263 du->cursor_x = x + crtc->x;
264 du->cursor_y = y + crtc->y;
267 * FIXME: Unclear whether there's any global state touched by the
268 * cursor_set function, especially vmw_cursor_update_position looks
269 * suspicious. For now take the easy route and reacquire all locks. We
270 * can do this since the caller in the drm core doesn't check anything
271 * which is protected by any looks.
273 drm_modeset_unlock_crtc(crtc);
274 drm_modeset_lock_all(dev_priv->dev);
276 vmw_cursor_update_position(dev_priv, shown,
277 du->cursor_x + du->hotspot_x,
278 du->cursor_y + du->hotspot_y);
280 drm_modeset_unlock_all(dev_priv->dev);
281 drm_modeset_lock_crtc(crtc, crtc->cursor);
286 void vmw_kms_cursor_snoop(struct vmw_surface *srf,
287 struct ttm_object_file *tfile,
288 struct ttm_buffer_object *bo,
289 SVGA3dCmdHeader *header)
291 struct ttm_bo_kmap_obj map;
292 unsigned long kmap_offset;
293 unsigned long kmap_num;
299 SVGA3dCmdHeader header;
300 SVGA3dCmdSurfaceDMA dma;
304 cmd = container_of(header, struct vmw_dma_cmd, header);
306 /* No snooper installed */
307 if (!srf->snooper.image)
310 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
311 DRM_ERROR("face and mipmap for cursors should never != 0\n");
315 if (cmd->header.size < 64) {
316 DRM_ERROR("at least one full copy box must be given\n");
320 box = (SVGA3dCopyBox *)&cmd[1];
321 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
322 sizeof(SVGA3dCopyBox);
324 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
325 box->x != 0 || box->y != 0 || box->z != 0 ||
326 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
327 box->d != 1 || box_count != 1) {
328 /* TODO handle none page aligned offsets */
329 /* TODO handle more dst & src != 0 */
330 /* TODO handle more then one copy */
331 DRM_ERROR("Cant snoop dma request for cursor!\n");
332 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
333 box->srcx, box->srcy, box->srcz,
334 box->x, box->y, box->z,
335 box->w, box->h, box->d, box_count,
336 cmd->dma.guest.ptr.offset);
340 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
341 kmap_num = (64*64*4) >> PAGE_SHIFT;
343 ret = ttm_bo_reserve(bo, true, false, false, NULL);
344 if (unlikely(ret != 0)) {
345 DRM_ERROR("reserve failed\n");
349 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
350 if (unlikely(ret != 0))
353 virtual = ttm_kmap_obj_virtual(&map, &dummy);
355 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
356 memcpy(srf->snooper.image, virtual, 64*64*4);
358 /* Image is unsigned pointer. */
359 for (i = 0; i < box->h; i++)
360 memcpy(srf->snooper.image + i * 64,
361 virtual + i * cmd->dma.guest.pitch,
369 ttm_bo_unreserve(bo);
372 void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
374 struct drm_device *dev = dev_priv->dev;
375 struct vmw_display_unit *du;
376 struct drm_crtc *crtc;
378 mutex_lock(&dev->mode_config.mutex);
380 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
381 du = vmw_crtc_to_du(crtc);
382 if (!du->cursor_surface ||
383 du->cursor_age == du->cursor_surface->snooper.age)
386 du->cursor_age = du->cursor_surface->snooper.age;
387 vmw_cursor_update_image(dev_priv,
388 du->cursor_surface->snooper.image,
389 64, 64, du->hotspot_x, du->hotspot_y);
392 mutex_unlock(&dev->mode_config.mutex);
396 * Generic framebuffer code
400 * Surface framebuffer code
403 static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
405 struct vmw_framebuffer_surface *vfbs =
406 vmw_framebuffer_to_vfbs(framebuffer);
407 struct vmw_master *vmaster = vmw_master(vfbs->master);
410 mutex_lock(&vmaster->fb_surf_mutex);
411 list_del(&vfbs->head);
412 mutex_unlock(&vmaster->fb_surf_mutex);
414 drm_master_put(&vfbs->master);
415 drm_framebuffer_cleanup(framebuffer);
416 vmw_surface_unreference(&vfbs->surface);
417 ttm_base_object_unref(&vfbs->base.user_obj);
422 static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
423 struct drm_file *file_priv,
424 unsigned flags, unsigned color,
425 struct drm_clip_rect *clips,
428 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
429 struct vmw_framebuffer_surface *vfbs =
430 vmw_framebuffer_to_vfbs(framebuffer);
431 struct drm_clip_rect norect;
434 if (unlikely(vfbs->master != file_priv->master))
437 /* Legacy Display Unit does not support 3D */
438 if (dev_priv->active_display_unit == vmw_du_legacy)
441 drm_modeset_lock_all(dev_priv->dev);
443 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
444 if (unlikely(ret != 0)) {
445 drm_modeset_unlock_all(dev_priv->dev);
452 norect.x1 = norect.y1 = 0;
453 norect.x2 = framebuffer->width;
454 norect.y2 = framebuffer->height;
455 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
457 inc = 2; /* skip source rects */
460 if (dev_priv->active_display_unit == vmw_du_screen_object)
461 ret = vmw_kms_sou_do_surface_dirty(dev_priv, file_priv,
467 ret = vmw_kms_stdu_do_surface_dirty(dev_priv, file_priv,
472 vmw_fifo_flush(dev_priv, false);
473 ttm_read_unlock(&dev_priv->reservation_sem);
475 drm_modeset_unlock_all(dev_priv->dev);
480 static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
481 .destroy = vmw_framebuffer_surface_destroy,
482 .dirty = vmw_framebuffer_surface_dirty,
485 static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
486 struct drm_file *file_priv,
487 struct vmw_surface *surface,
488 struct vmw_framebuffer **out,
489 const struct drm_mode_fb_cmd
491 bool is_dmabuf_proxy)
494 struct drm_device *dev = dev_priv->dev;
495 struct vmw_framebuffer_surface *vfbs;
496 enum SVGA3dSurfaceFormat format;
497 struct vmw_master *vmaster = vmw_master(file_priv->master);
500 /* 3D is only supported on HWv8 and newer hosts */
501 if (dev_priv->active_display_unit == vmw_du_legacy)
508 /* Surface must be marked as a scanout. */
509 if (unlikely(!surface->scanout))
512 if (unlikely(surface->mip_levels[0] != 1 ||
513 surface->num_sizes != 1 ||
514 surface->base_size.width < mode_cmd->width ||
515 surface->base_size.height < mode_cmd->height ||
516 surface->base_size.depth != 1)) {
517 DRM_ERROR("Incompatible surface dimensions "
518 "for requested mode.\n");
522 switch (mode_cmd->depth) {
524 format = SVGA3D_A8R8G8B8;
527 format = SVGA3D_X8R8G8B8;
530 format = SVGA3D_R5G6B5;
533 format = SVGA3D_A1R5G5B5;
536 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
540 if (unlikely(format != surface->format)) {
541 DRM_ERROR("Invalid surface format for requested mode.\n");
545 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
551 if (!vmw_surface_reference(surface)) {
552 DRM_ERROR("failed to reference surface %p\n", surface);
557 /* XXX get the first 3 from the surface info */
558 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
559 vfbs->base.base.pitches[0] = mode_cmd->pitch;
560 vfbs->base.base.depth = mode_cmd->depth;
561 vfbs->base.base.width = mode_cmd->width;
562 vfbs->base.base.height = mode_cmd->height;
563 vfbs->surface = surface;
564 vfbs->base.user_handle = mode_cmd->handle;
565 vfbs->master = drm_master_get(file_priv->master);
566 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
568 mutex_lock(&vmaster->fb_surf_mutex);
569 list_add_tail(&vfbs->head, &vmaster->fb_surf);
570 mutex_unlock(&vmaster->fb_surf_mutex);
574 ret = drm_framebuffer_init(dev, &vfbs->base.base,
575 &vmw_framebuffer_surface_funcs);
582 vmw_surface_unreference(&surface);
590 * Dmabuf framebuffer code
593 static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
595 struct vmw_framebuffer_dmabuf *vfbd =
596 vmw_framebuffer_to_vfbd(framebuffer);
598 drm_framebuffer_cleanup(framebuffer);
599 vmw_dmabuf_unreference(&vfbd->buffer);
600 ttm_base_object_unref(&vfbd->base.user_obj);
605 static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
606 struct drm_file *file_priv,
607 unsigned flags, unsigned color,
608 struct drm_clip_rect *clips,
611 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
612 struct vmw_framebuffer_dmabuf *vfbd =
613 vmw_framebuffer_to_vfbd(framebuffer);
614 struct drm_clip_rect norect;
615 int ret, increment = 1;
617 drm_modeset_lock_all(dev_priv->dev);
619 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
620 if (unlikely(ret != 0)) {
621 drm_modeset_unlock_all(dev_priv->dev);
628 norect.x1 = norect.y1 = 0;
629 norect.x2 = framebuffer->width;
630 norect.y2 = framebuffer->height;
631 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
636 if (dev_priv->ldu_priv) {
637 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base,
639 clips, num_clips, increment);
640 } else if (dev_priv->active_display_unit == vmw_du_screen_object) {
641 ret = vmw_kms_sou_do_dmabuf_dirty(file_priv, dev_priv,
644 clips, num_clips, increment,
647 ret = vmw_kms_stdu_do_surface_dirty(dev_priv, file_priv,
653 vmw_fifo_flush(dev_priv, false);
654 ttm_read_unlock(&dev_priv->reservation_sem);
656 drm_modeset_unlock_all(dev_priv->dev);
661 static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
662 .destroy = vmw_framebuffer_dmabuf_destroy,
663 .dirty = vmw_framebuffer_dmabuf_dirty,
667 * Pin the dmabuffer to the start of vram.
669 static int vmw_framebuffer_dmabuf_pin(struct vmw_framebuffer *vfb)
671 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
672 struct vmw_framebuffer_dmabuf *vfbd =
673 vmw_framebuffer_to_vfbd(&vfb->base);
676 /* This code should only be used with Legacy Display Unit */
677 BUG_ON(dev_priv->active_display_unit != vmw_du_legacy);
679 vmw_overlay_pause_all(dev_priv);
681 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, vfbd->buffer, false);
683 vmw_overlay_resume_all(dev_priv);
690 static int vmw_framebuffer_dmabuf_unpin(struct vmw_framebuffer *vfb)
692 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
693 struct vmw_framebuffer_dmabuf *vfbd =
694 vmw_framebuffer_to_vfbd(&vfb->base);
697 WARN_ON(!vfbd->buffer);
701 return vmw_dmabuf_unpin(dev_priv, vfbd->buffer, false);
705 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
708 * @mode_cmd: parameters for the new surface
709 * @dmabuf_mob: MOB backing the DMA buf
710 * @srf_out: newly created surface
712 * When the content FB is a DMA buf, we create a surface as a proxy to the
713 * same buffer. This way we can do a surface copy rather than a surface DMA.
714 * This is a more efficient approach
717 * 0 on success, error code otherwise
719 static int vmw_create_dmabuf_proxy(struct drm_device *dev,
720 struct drm_mode_fb_cmd *mode_cmd,
721 struct vmw_dma_buffer *dmabuf_mob,
722 struct vmw_surface **srf_out)
725 struct drm_vmw_size content_base_size;
729 switch (mode_cmd->depth) {
732 format = SVGA3D_X8R8G8B8;
737 format = SVGA3D_R5G6B5;
745 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
749 content_base_size.width = mode_cmd->width;
750 content_base_size.height = mode_cmd->height;
751 content_base_size.depth = 1;
753 ret = vmw_surface_gb_priv_define(dev,
754 0, /* kernel visible only */
757 true, /* can be a scanout buffer */
758 1, /* num of mip levels */
763 DRM_ERROR("Failed to allocate proxy content buffer\n");
767 /* Use the same MOB backing for surface */
768 vmw_dmabuf_reference(dmabuf_mob);
770 (*srf_out)->res.backup = dmabuf_mob;
772 /* FIXME: Waiting for fbdev rework to do a proper reserve/pin */
773 ret = vmw_resource_validate(&(*srf_out)->res);
780 static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
781 struct vmw_dma_buffer *dmabuf,
782 struct vmw_framebuffer **out,
783 const struct drm_mode_fb_cmd
787 struct drm_device *dev = dev_priv->dev;
788 struct vmw_framebuffer_dmabuf *vfbd;
789 unsigned int requested_size;
792 requested_size = mode_cmd->height * mode_cmd->pitch;
793 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
794 DRM_ERROR("Screen buffer object size is too small "
795 "for requested mode.\n");
799 /* Limited framebuffer color depth support for screen objects */
800 if (dev_priv->active_display_unit == vmw_du_screen_object) {
801 switch (mode_cmd->depth) {
804 /* Only support 32 bpp for 32 and 24 depth fbs */
805 if (mode_cmd->bpp == 32)
808 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
809 mode_cmd->depth, mode_cmd->bpp);
813 /* Only support 16 bpp for 16 and 15 depth fbs */
814 if (mode_cmd->bpp == 16)
817 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
818 mode_cmd->depth, mode_cmd->bpp);
821 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
826 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
832 if (!vmw_dmabuf_reference(dmabuf)) {
833 DRM_ERROR("failed to reference dmabuf %p\n", dmabuf);
838 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
839 vfbd->base.base.pitches[0] = mode_cmd->pitch;
840 vfbd->base.base.depth = mode_cmd->depth;
841 vfbd->base.base.width = mode_cmd->width;
842 vfbd->base.base.height = mode_cmd->height;
843 if (dev_priv->active_display_unit == vmw_du_legacy) {
844 vfbd->base.pin = vmw_framebuffer_dmabuf_pin;
845 vfbd->base.unpin = vmw_framebuffer_dmabuf_unpin;
847 vfbd->base.dmabuf = true;
848 vfbd->buffer = dmabuf;
849 vfbd->base.user_handle = mode_cmd->handle;
852 ret = drm_framebuffer_init(dev, &vfbd->base.base,
853 &vmw_framebuffer_dmabuf_funcs);
860 vmw_dmabuf_unreference(&dmabuf);
868 * Generic Kernel modesetting functions
871 static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
872 struct drm_file *file_priv,
873 struct drm_mode_fb_cmd2 *mode_cmd2)
875 struct vmw_private *dev_priv = vmw_priv(dev);
876 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
877 struct vmw_framebuffer *vfb = NULL;
878 struct vmw_surface *surface = NULL;
879 struct vmw_dma_buffer *bo = NULL;
880 struct ttm_base_object *user_obj;
881 struct drm_mode_fb_cmd mode_cmd;
882 bool is_dmabuf_proxy = false;
885 mode_cmd.width = mode_cmd2->width;
886 mode_cmd.height = mode_cmd2->height;
887 mode_cmd.pitch = mode_cmd2->pitches[0];
888 mode_cmd.handle = mode_cmd2->handles[0];
889 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
893 * This code should be conditioned on Screen Objects not being used.
894 * If screen objects are used, we can allocate a GMR to hold the
895 * requested framebuffer.
898 if (!vmw_kms_validate_mode_vram(dev_priv,
901 DRM_ERROR("Requested mode exceed bounding box limit.\n");
902 return ERR_PTR(-ENOMEM);
906 * Take a reference on the user object of the resource
907 * backing the kms fb. This ensures that user-space handle
908 * lookups on that resource will always work as long as
909 * it's registered with a kms framebuffer. This is important,
910 * since vmw_execbuf_process identifies resources in the
911 * command stream using user-space handles.
914 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
915 if (unlikely(user_obj == NULL)) {
916 DRM_ERROR("Could not locate requested kms frame buffer.\n");
917 return ERR_PTR(-ENOENT);
921 * End conditioned code.
924 /* returns either a dmabuf or surface */
925 ret = vmw_user_lookup_handle(dev_priv, tfile,
932 * We cannot use the SurfaceDMA command in an non-accelerated VM,
933 * therefore, wrap the DMA buf in a surface so we can use the
934 * SurfaceCopy command.
936 if (bo && !(dev_priv->capabilities & SVGA_CAP_3D) &&
937 dev_priv->active_display_unit == vmw_du_screen_target) {
938 ret = vmw_create_dmabuf_proxy(dev_priv->dev, &mode_cmd, bo,
943 is_dmabuf_proxy = true;
946 /* Create the new framebuffer depending one what we have */
948 ret = vmw_kms_new_framebuffer_surface(dev_priv, file_priv,
949 surface, &vfb, &mode_cmd,
952 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, bo, &vfb,
958 /* vmw_user_lookup_handle takes one ref so does new_fb */
960 vmw_dmabuf_unreference(&bo);
962 vmw_surface_unreference(&surface);
965 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
966 ttm_base_object_unref(&user_obj);
969 vfb->user_obj = user_obj;
974 static const struct drm_mode_config_funcs vmw_kms_funcs = {
975 .fb_create = vmw_kms_fb_create,
978 int vmw_kms_generic_present(struct vmw_private *dev_priv,
979 struct drm_file *file_priv,
980 struct vmw_framebuffer *vfb,
981 struct vmw_surface *surface,
983 int32_t destX, int32_t destY,
984 struct drm_vmw_rect *clips,
987 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
988 struct drm_clip_rect *tmp;
989 struct drm_crtc *crtc;
992 int ret = 0; /* silence warning */
993 int left, right, top, bottom;
996 SVGA3dCmdHeader header;
997 SVGA3dCmdBlitSurfaceToScreen body;
999 SVGASignedRect *blits;
1002 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1003 if (crtc->primary->fb != &vfb->base)
1005 units[num_units++] = vmw_crtc_to_du(crtc);
1008 BUG_ON(surface == NULL);
1009 BUG_ON(!clips || !num_clips);
1011 tmp = kzalloc(sizeof(*tmp) * num_clips, GFP_KERNEL);
1012 if (unlikely(tmp == NULL)) {
1013 DRM_ERROR("Temporary cliprect memory alloc failed.\n");
1017 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num_clips;
1018 cmd = kmalloc(fifo_size, GFP_KERNEL);
1019 if (unlikely(cmd == NULL)) {
1020 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1026 right = clips->x + clips->w;
1028 bottom = clips->y + clips->h;
1030 for (i = 1; i < num_clips; i++) {
1031 left = min_t(int, left, (int)clips[i].x);
1032 right = max_t(int, right, (int)clips[i].x + clips[i].w);
1033 top = min_t(int, top, (int)clips[i].y);
1034 bottom = max_t(int, bottom, (int)clips[i].y + clips[i].h);
1037 /* only need to do this once */
1038 memset(cmd, 0, fifo_size);
1039 cmd->header.id = cpu_to_le32(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN);
1041 blits = (SVGASignedRect *)&cmd[1];
1043 cmd->body.srcRect.left = left;
1044 cmd->body.srcRect.right = right;
1045 cmd->body.srcRect.top = top;
1046 cmd->body.srcRect.bottom = bottom;
1048 for (i = 0; i < num_clips; i++) {
1049 tmp[i].x1 = clips[i].x - left;
1050 tmp[i].x2 = clips[i].x + clips[i].w - left;
1051 tmp[i].y1 = clips[i].y - top;
1052 tmp[i].y2 = clips[i].y + clips[i].h - top;
1055 for (k = 0; k < num_units; k++) {
1056 struct vmw_display_unit *unit = units[k];
1057 struct vmw_clip_rect clip;
1060 clip.x1 = left + destX - unit->crtc.x;
1061 clip.y1 = top + destY - unit->crtc.y;
1062 clip.x2 = right + destX - unit->crtc.x;
1063 clip.y2 = bottom + destY - unit->crtc.y;
1065 /* skip any crtcs that misses the clip region */
1066 if (clip.x1 >= unit->crtc.mode.hdisplay ||
1067 clip.y1 >= unit->crtc.mode.vdisplay ||
1068 clip.x2 <= 0 || clip.y2 <= 0)
1072 * In order for the clip rects to be correctly scaled
1073 * the src and dest rects needs to be the same size.
1075 cmd->body.destRect.left = clip.x1;
1076 cmd->body.destRect.right = clip.x2;
1077 cmd->body.destRect.top = clip.y1;
1078 cmd->body.destRect.bottom = clip.y2;
1080 /* create a clip rect of the crtc in dest coords */
1081 clip.x2 = unit->crtc.mode.hdisplay - clip.x1;
1082 clip.y2 = unit->crtc.mode.vdisplay - clip.y1;
1083 clip.x1 = 0 - clip.x1;
1084 clip.y1 = 0 - clip.y1;
1086 /* need to reset sid as it is changed by execbuf */
1087 cmd->body.srcImage.sid = sid;
1088 cmd->body.destScreenId = unit->unit;
1090 /* clip and write blits to cmd stream */
1091 vmw_clip_cliprects(tmp, num_clips, clip, blits, &num);
1093 /* if no cliprects hit skip this */
1097 /* recalculate package length */
1098 fifo_size = sizeof(*cmd) + sizeof(SVGASignedRect) * num;
1099 cmd->header.size = cpu_to_le32(fifo_size - sizeof(cmd->header));
1100 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd,
1101 fifo_size, 0, 0, NULL, NULL);
1103 if (unlikely(ret != 0))
1114 int vmw_kms_present(struct vmw_private *dev_priv,
1115 struct drm_file *file_priv,
1116 struct vmw_framebuffer *vfb,
1117 struct vmw_surface *surface,
1119 int32_t destX, int32_t destY,
1120 struct drm_vmw_rect *clips,
1125 if (dev_priv->active_display_unit == vmw_du_screen_target)
1126 ret = vmw_kms_stdu_present(dev_priv, file_priv, vfb, sid,
1127 destX, destY, clips, num_clips);
1129 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb,
1130 surface, sid, destX, destY,
1135 vmw_fifo_flush(dev_priv, false);
1140 int vmw_kms_readback(struct vmw_private *dev_priv,
1141 struct drm_file *file_priv,
1142 struct vmw_framebuffer *vfb,
1143 struct drm_vmw_fence_rep __user *user_fence_rep,
1144 struct drm_vmw_rect *clips,
1147 struct vmw_framebuffer_dmabuf *vfbd =
1148 vmw_framebuffer_to_vfbd(&vfb->base);
1149 struct vmw_dma_buffer *dmabuf = vfbd->buffer;
1150 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1151 struct drm_crtc *crtc;
1153 int i, k, ret, num_units, blits_pos;
1157 SVGAFifoCmdDefineGMRFB body;
1161 SVGAFifoCmdBlitScreenToGMRFB body;
1165 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1166 if (crtc->primary->fb != &vfb->base)
1168 units[num_units++] = vmw_crtc_to_du(crtc);
1171 BUG_ON(dmabuf == NULL);
1172 BUG_ON(!clips || !num_clips);
1174 /* take a safe guess at fifo size */
1175 fifo_size = sizeof(*cmd) + sizeof(*blits) * num_clips * num_units;
1176 cmd = kmalloc(fifo_size, GFP_KERNEL);
1177 if (unlikely(cmd == NULL)) {
1178 DRM_ERROR("Failed to allocate temporary fifo memory.\n");
1182 memset(cmd, 0, fifo_size);
1183 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1184 cmd->body.format.bitsPerPixel = vfb->base.bits_per_pixel;
1185 cmd->body.format.colorDepth = vfb->base.depth;
1186 cmd->body.format.reserved = 0;
1187 cmd->body.bytesPerLine = vfb->base.pitches[0];
1188 cmd->body.ptr.gmrId = vfb->user_handle;
1189 cmd->body.ptr.offset = 0;
1191 blits = (void *)&cmd[1];
1193 for (i = 0; i < num_units; i++) {
1194 struct drm_vmw_rect *c = clips;
1195 for (k = 0; k < num_clips; k++, c++) {
1196 /* transform clip coords to crtc origin based coords */
1197 int clip_x1 = c->x - units[i]->crtc.x;
1198 int clip_x2 = c->x - units[i]->crtc.x + c->w;
1199 int clip_y1 = c->y - units[i]->crtc.y;
1200 int clip_y2 = c->y - units[i]->crtc.y + c->h;
1204 /* compensate for clipping, we negate
1205 * a negative number and add that.
1213 clip_x1 = max(clip_x1, 0);
1214 clip_y1 = max(clip_y1, 0);
1215 clip_x2 = min(clip_x2, units[i]->crtc.mode.hdisplay);
1216 clip_y2 = min(clip_y2, units[i]->crtc.mode.vdisplay);
1218 /* and cull any rects that misses the crtc */
1219 if (clip_x1 >= units[i]->crtc.mode.hdisplay ||
1220 clip_y1 >= units[i]->crtc.mode.vdisplay ||
1221 clip_x2 <= 0 || clip_y2 <= 0)
1224 blits[blits_pos].header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1225 blits[blits_pos].body.srcScreenId = units[i]->unit;
1226 blits[blits_pos].body.destOrigin.x = dest_x;
1227 blits[blits_pos].body.destOrigin.y = dest_y;
1229 blits[blits_pos].body.srcRect.left = clip_x1;
1230 blits[blits_pos].body.srcRect.top = clip_y1;
1231 blits[blits_pos].body.srcRect.right = clip_x2;
1232 blits[blits_pos].body.srcRect.bottom = clip_y2;
1236 /* reset size here and use calculated exact size from loops */
1237 fifo_size = sizeof(*cmd) + sizeof(*blits) * blits_pos;
1239 ret = vmw_execbuf_process(file_priv, dev_priv, NULL, cmd, fifo_size,
1240 0, 0, user_fence_rep, NULL);
1247 int vmw_kms_init(struct vmw_private *dev_priv)
1249 struct drm_device *dev = dev_priv->dev;
1252 drm_mode_config_init(dev);
1253 dev->mode_config.funcs = &vmw_kms_funcs;
1254 dev->mode_config.min_width = 1;
1255 dev->mode_config.min_height = 1;
1256 /* assumed largest fb size */
1257 dev->mode_config.max_width = 8192;
1258 dev->mode_config.max_height = 8192;
1260 ret = vmw_kms_stdu_init_display(dev_priv);
1262 ret = vmw_kms_sou_init_display(dev_priv);
1263 if (ret) /* Fallback */
1264 ret = vmw_kms_ldu_init_display(dev_priv);
1270 int vmw_kms_close(struct vmw_private *dev_priv)
1275 * Docs says we should take the lock before calling this function
1276 * but since it destroys encoders and our destructor calls
1277 * drm_encoder_cleanup which takes the lock we deadlock.
1279 drm_mode_config_cleanup(dev_priv->dev);
1280 if (dev_priv->active_display_unit == vmw_du_screen_object)
1281 ret = vmw_kms_sou_close_display(dev_priv);
1282 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1283 ret = vmw_kms_stdu_close_display(dev_priv);
1285 ret = vmw_kms_ldu_close_display(dev_priv);
1290 int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1291 struct drm_file *file_priv)
1293 struct drm_vmw_cursor_bypass_arg *arg = data;
1294 struct vmw_display_unit *du;
1295 struct drm_crtc *crtc;
1299 mutex_lock(&dev->mode_config.mutex);
1300 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1302 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1303 du = vmw_crtc_to_du(crtc);
1304 du->hotspot_x = arg->xhot;
1305 du->hotspot_y = arg->yhot;
1308 mutex_unlock(&dev->mode_config.mutex);
1312 crtc = drm_crtc_find(dev, arg->crtc_id);
1318 du = vmw_crtc_to_du(crtc);
1320 du->hotspot_x = arg->xhot;
1321 du->hotspot_y = arg->yhot;
1324 mutex_unlock(&dev->mode_config.mutex);
1329 int vmw_kms_write_svga(struct vmw_private *vmw_priv,
1330 unsigned width, unsigned height, unsigned pitch,
1331 unsigned bpp, unsigned depth)
1333 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1334 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1335 else if (vmw_fifo_have_pitchlock(vmw_priv))
1336 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1337 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1338 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
1339 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
1341 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1342 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1343 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1350 int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1352 struct vmw_vga_topology_state *save;
1355 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1356 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
1357 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
1358 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1359 vmw_priv->vga_pitchlock =
1360 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
1361 else if (vmw_fifo_have_pitchlock(vmw_priv))
1362 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
1363 SVGA_FIFO_PITCHLOCK);
1365 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1368 vmw_priv->num_displays = vmw_read(vmw_priv,
1369 SVGA_REG_NUM_GUEST_DISPLAYS);
1371 if (vmw_priv->num_displays == 0)
1372 vmw_priv->num_displays = 1;
1374 for (i = 0; i < vmw_priv->num_displays; ++i) {
1375 save = &vmw_priv->vga_save[i];
1376 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1377 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1378 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1379 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1380 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1381 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1382 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1383 if (i == 0 && vmw_priv->num_displays == 1 &&
1384 save->width == 0 && save->height == 0) {
1387 * It should be fairly safe to assume that these
1388 * values are uninitialized.
1391 save->width = vmw_priv->vga_width - save->pos_x;
1392 save->height = vmw_priv->vga_height - save->pos_y;
1399 int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1401 struct vmw_vga_topology_state *save;
1404 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1405 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
1406 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
1407 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1408 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1409 vmw_priv->vga_pitchlock);
1410 else if (vmw_fifo_have_pitchlock(vmw_priv))
1411 iowrite32(vmw_priv->vga_pitchlock,
1412 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1414 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1417 for (i = 0; i < vmw_priv->num_displays; ++i) {
1418 save = &vmw_priv->vga_save[i];
1419 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1420 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1421 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1422 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1423 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1424 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1425 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1431 bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1435 return ((u64) pitch * (u64) height) < (u64)
1436 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1437 dev_priv->prim_bb_mem : dev_priv->vram_size);
1442 * Function called by DRM code called with vbl_lock held.
1444 u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1450 * Function called by DRM code called with vbl_lock held.
1452 int vmw_enable_vblank(struct drm_device *dev, int crtc)
1458 * Function called by DRM code called with vbl_lock held.
1460 void vmw_disable_vblank(struct drm_device *dev, int crtc)
1466 * Small shared kms functions.
1469 static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
1470 struct drm_vmw_rect *rects)
1472 struct drm_device *dev = dev_priv->dev;
1473 struct vmw_display_unit *du;
1474 struct drm_connector *con;
1476 mutex_lock(&dev->mode_config.mutex);
1482 DRM_INFO("%s: new layout ", __func__);
1483 for (i = 0; i < num; i++)
1484 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1485 rects[i].w, rects[i].h);
1490 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1491 du = vmw_connector_to_du(con);
1492 if (num > du->unit) {
1493 du->pref_width = rects[du->unit].w;
1494 du->pref_height = rects[du->unit].h;
1495 du->pref_active = true;
1496 du->gui_x = rects[du->unit].x;
1497 du->gui_y = rects[du->unit].y;
1499 du->pref_width = 800;
1500 du->pref_height = 600;
1501 du->pref_active = false;
1503 con->status = vmw_du_connector_detect(con, true);
1506 mutex_unlock(&dev->mode_config.mutex);
1511 void vmw_du_crtc_save(struct drm_crtc *crtc)
1515 void vmw_du_crtc_restore(struct drm_crtc *crtc)
1519 void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1520 u16 *r, u16 *g, u16 *b,
1521 uint32_t start, uint32_t size)
1523 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1526 for (i = 0; i < size; i++) {
1527 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1529 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1530 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1531 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1535 void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1539 void vmw_du_connector_save(struct drm_connector *connector)
1543 void vmw_du_connector_restore(struct drm_connector *connector)
1547 enum drm_connector_status
1548 vmw_du_connector_detect(struct drm_connector *connector, bool force)
1550 uint32_t num_displays;
1551 struct drm_device *dev = connector->dev;
1552 struct vmw_private *dev_priv = vmw_priv(dev);
1553 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1555 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
1557 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1559 connector_status_connected : connector_status_disconnected);
1562 static struct drm_display_mode vmw_kms_connector_builtin[] = {
1564 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1565 752, 800, 0, 480, 489, 492, 525, 0,
1566 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1568 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1569 968, 1056, 0, 600, 601, 605, 628, 0,
1570 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1572 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1573 1184, 1344, 0, 768, 771, 777, 806, 0,
1574 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1576 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1577 1344, 1600, 0, 864, 865, 868, 900, 0,
1578 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1580 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1581 1472, 1664, 0, 768, 771, 778, 798, 0,
1582 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1584 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1585 1480, 1680, 0, 800, 803, 809, 831, 0,
1586 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1588 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1589 1488, 1800, 0, 960, 961, 964, 1000, 0,
1590 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1591 /* 1280x1024@60Hz */
1592 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1593 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1594 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1596 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1597 1536, 1792, 0, 768, 771, 777, 795, 0,
1598 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1599 /* 1440x1050@60Hz */
1600 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1601 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1602 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1604 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1605 1672, 1904, 0, 900, 903, 909, 934, 0,
1606 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1607 /* 1600x1200@60Hz */
1608 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1609 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1610 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1611 /* 1680x1050@60Hz */
1612 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1613 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1614 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1615 /* 1792x1344@60Hz */
1616 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1617 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1618 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1619 /* 1853x1392@60Hz */
1620 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1621 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1622 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1623 /* 1920x1200@60Hz */
1624 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1625 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1626 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1627 /* 1920x1440@60Hz */
1628 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1629 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1630 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1631 /* 2560x1600@60Hz */
1632 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1633 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1634 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1636 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1640 * vmw_guess_mode_timing - Provide fake timings for a
1641 * 60Hz vrefresh mode.
1643 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1644 * members filled in.
1646 static void vmw_guess_mode_timing(struct drm_display_mode *mode)
1648 mode->hsync_start = mode->hdisplay + 50;
1649 mode->hsync_end = mode->hsync_start + 50;
1650 mode->htotal = mode->hsync_end + 50;
1652 mode->vsync_start = mode->vdisplay + 50;
1653 mode->vsync_end = mode->vsync_start + 50;
1654 mode->vtotal = mode->vsync_end + 50;
1656 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1657 mode->vrefresh = drm_mode_vrefresh(mode);
1661 int vmw_du_connector_fill_modes(struct drm_connector *connector,
1662 uint32_t max_width, uint32_t max_height)
1664 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1665 struct drm_device *dev = connector->dev;
1666 struct vmw_private *dev_priv = vmw_priv(dev);
1667 struct drm_display_mode *mode = NULL;
1668 struct drm_display_mode *bmode;
1669 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1670 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1671 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1672 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1675 u32 assumed_bpp = 2;
1678 * If using screen objects, then assume 32-bpp because that's what the
1679 * SVGA device is assuming
1681 if (dev_priv->active_display_unit == vmw_du_screen_object)
1684 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1685 max_width = min(max_width, dev_priv->stdu_max_width);
1686 max_height = min(max_height, dev_priv->stdu_max_height);
1689 /* Add preferred mode */
1690 mode = drm_mode_duplicate(dev, &prefmode);
1693 mode->hdisplay = du->pref_width;
1694 mode->vdisplay = du->pref_height;
1695 vmw_guess_mode_timing(mode);
1697 if (vmw_kms_validate_mode_vram(dev_priv,
1698 mode->hdisplay * assumed_bpp,
1700 drm_mode_probed_add(connector, mode);
1702 drm_mode_destroy(dev, mode);
1706 if (du->pref_mode) {
1707 list_del_init(&du->pref_mode->head);
1708 drm_mode_destroy(dev, du->pref_mode);
1711 /* mode might be null here, this is intended */
1712 du->pref_mode = mode;
1714 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1715 bmode = &vmw_kms_connector_builtin[i];
1716 if (bmode->hdisplay > max_width ||
1717 bmode->vdisplay > max_height)
1720 if (!vmw_kms_validate_mode_vram(dev_priv,
1721 bmode->hdisplay * assumed_bpp,
1725 mode = drm_mode_duplicate(dev, bmode);
1728 mode->vrefresh = drm_mode_vrefresh(mode);
1730 drm_mode_probed_add(connector, mode);
1733 /* Move the prefered mode first, help apps pick the right mode. */
1735 list_move(&du->pref_mode->head, &connector->probed_modes);
1737 drm_mode_connector_list_update(connector, true);
1742 int vmw_du_connector_set_property(struct drm_connector *connector,
1743 struct drm_property *property,
1750 int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1751 struct drm_file *file_priv)
1753 struct vmw_private *dev_priv = vmw_priv(dev);
1754 struct drm_vmw_update_layout_arg *arg =
1755 (struct drm_vmw_update_layout_arg *)data;
1756 void __user *user_rects;
1757 struct drm_vmw_rect *rects;
1758 unsigned rects_size;
1761 struct drm_mode_config *mode_config = &dev->mode_config;
1762 struct drm_vmw_rect bounding_box = {0};
1764 if (!arg->num_outputs) {
1765 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1766 vmw_du_update_layout(dev_priv, 1, &def_rect);
1770 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
1771 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1773 if (unlikely(!rects))
1776 user_rects = (void __user *)(unsigned long)arg->rects;
1777 ret = copy_from_user(rects, user_rects, rects_size);
1778 if (unlikely(ret != 0)) {
1779 DRM_ERROR("Failed to get rects.\n");
1784 for (i = 0; i < arg->num_outputs; ++i) {
1785 if (rects[i].x < 0 ||
1787 rects[i].x + rects[i].w > mode_config->max_width ||
1788 rects[i].y + rects[i].h > mode_config->max_height) {
1789 DRM_ERROR("Invalid GUI layout.\n");
1795 * bounding_box.w and bunding_box.h are used as
1796 * lower-right coordinates
1798 if (rects[i].x + rects[i].w > bounding_box.w)
1799 bounding_box.w = rects[i].x + rects[i].w;
1801 if (rects[i].y + rects[i].h > bounding_box.h)
1802 bounding_box.h = rects[i].y + rects[i].h;
1806 * For Screen Target Display Unit, all the displays must fit
1807 * inside of maximum texture size.
1809 if (dev_priv->active_display_unit == vmw_du_screen_target)
1810 if (bounding_box.w > dev_priv->texture_max_width ||
1811 bounding_box.h > dev_priv->texture_max_height) {
1812 DRM_ERROR("Layout exceeds maximum texture size\n");
1818 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);