1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
28 #include "vmwgfx_drv.h"
29 #include "vmwgfx_reg.h"
30 #include <drm/ttm/ttm_bo_api.h>
31 #include <drm/ttm/ttm_placement.h>
33 #define VMW_RES_HT_ORDER 12
36 * struct vmw_resource_relocation - Relocation info for resources
38 * @head: List head for the software context's relocation list.
39 * @res: Non-ref-counted pointer to the resource.
40 * @offset: Offset of 4 byte entries into the command buffer where the
41 * id that needs fixup is located.
43 struct vmw_resource_relocation {
44 struct list_head head;
45 const struct vmw_resource *res;
50 * struct vmw_resource_val_node - Validation info for resources
52 * @head: List head for the software context's resource list.
53 * @hash: Hash entry for quick resouce to val_node lookup.
54 * @res: Ref-counted pointer to the resource.
55 * @switch_backup: Boolean whether to switch backup buffer on unreserve.
56 * @new_backup: Refcounted pointer to the new backup buffer.
57 * @staged_bindings: If @res is a context, tracks bindings set up during
58 * the command batch. Otherwise NULL.
59 * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
60 * @first_usage: Set to true the first time the resource is referenced in
62 * @no_buffer_needed: Resources do not need to allocate buffer backup on
63 * reservation. The command stream will provide one.
65 struct vmw_resource_val_node {
66 struct list_head head;
67 struct drm_hash_item hash;
68 struct vmw_resource *res;
69 struct vmw_dma_buffer *new_backup;
70 struct vmw_ctx_binding_state *staged_bindings;
71 unsigned long new_backup_offset;
73 bool no_buffer_needed;
77 * struct vmw_cmd_entry - Describe a command for the verifier
79 * @user_allow: Whether allowed from the execbuf ioctl.
80 * @gb_disable: Whether disabled if guest-backed objects are available.
81 * @gb_enable: Whether enabled iff guest-backed objects are available.
83 struct vmw_cmd_entry {
84 int (*func) (struct vmw_private *, struct vmw_sw_context *,
91 #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
92 [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
93 (_gb_disable), (_gb_enable)}
96 * vmw_resource_unreserve - unreserve resources previously reserved for
99 * @list_head: list of resources to unreserve.
100 * @backoff: Whether command submission failed.
102 static void vmw_resource_list_unreserve(struct list_head *list,
105 struct vmw_resource_val_node *val;
107 list_for_each_entry(val, list, head) {
108 struct vmw_resource *res = val->res;
109 struct vmw_dma_buffer *new_backup =
110 backoff ? NULL : val->new_backup;
113 * Transfer staged context bindings to the
114 * persistent context binding tracker.
116 if (unlikely(val->staged_bindings)) {
118 vmw_context_binding_state_transfer
119 (val->res, val->staged_bindings);
121 kfree(val->staged_bindings);
122 val->staged_bindings = NULL;
124 vmw_resource_unreserve(res, new_backup,
125 val->new_backup_offset);
126 vmw_dmabuf_unreference(&val->new_backup);
132 * vmw_resource_val_add - Add a resource to the software context's
133 * resource list if it's not already on it.
135 * @sw_context: Pointer to the software context.
136 * @res: Pointer to the resource.
137 * @p_node On successful return points to a valid pointer to a
138 * struct vmw_resource_val_node, if non-NULL on entry.
140 static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
141 struct vmw_resource *res,
142 struct vmw_resource_val_node **p_node)
144 struct vmw_resource_val_node *node;
145 struct drm_hash_item *hash;
148 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
150 node = container_of(hash, struct vmw_resource_val_node, hash);
151 node->first_usage = false;
152 if (unlikely(p_node != NULL))
157 node = kzalloc(sizeof(*node), GFP_KERNEL);
158 if (unlikely(node == NULL)) {
159 DRM_ERROR("Failed to allocate a resource validation "
164 node->hash.key = (unsigned long) res;
165 ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
166 if (unlikely(ret != 0)) {
167 DRM_ERROR("Failed to initialize a resource validation "
172 list_add_tail(&node->head, &sw_context->resource_list);
173 node->res = vmw_resource_reference(res);
174 node->first_usage = true;
176 if (unlikely(p_node != NULL))
183 * vmw_resource_context_res_add - Put resources previously bound to a context on
184 * the validation list
186 * @dev_priv: Pointer to a device private structure
187 * @sw_context: Pointer to a software context used for this command submission
188 * @ctx: Pointer to the context resource
190 * This function puts all resources that were previously bound to @ctx on
191 * the resource validation list. This is part of the context state reemission
193 static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
194 struct vmw_sw_context *sw_context,
195 struct vmw_resource *ctx)
197 struct list_head *binding_list;
198 struct vmw_ctx_binding *entry;
200 struct vmw_resource *res;
202 mutex_lock(&dev_priv->binding_mutex);
203 binding_list = vmw_context_binding_list(ctx);
205 list_for_each_entry(entry, binding_list, ctx_list) {
206 res = vmw_resource_reference_unless_doomed(entry->bi.res);
207 if (unlikely(res == NULL))
210 ret = vmw_resource_val_add(sw_context, entry->bi.res, NULL);
211 vmw_resource_unreference(&res);
212 if (unlikely(ret != 0))
216 mutex_unlock(&dev_priv->binding_mutex);
221 * vmw_resource_relocation_add - Add a relocation to the relocation list
223 * @list: Pointer to head of relocation list.
224 * @res: The resource.
225 * @offset: Offset into the command buffer currently being parsed where the
226 * id that needs fixup is located. Granularity is 4 bytes.
228 static int vmw_resource_relocation_add(struct list_head *list,
229 const struct vmw_resource *res,
230 unsigned long offset)
232 struct vmw_resource_relocation *rel;
234 rel = kmalloc(sizeof(*rel), GFP_KERNEL);
235 if (unlikely(rel == NULL)) {
236 DRM_ERROR("Failed to allocate a resource relocation.\n");
241 rel->offset = offset;
242 list_add_tail(&rel->head, list);
248 * vmw_resource_relocations_free - Free all relocations on a list
250 * @list: Pointer to the head of the relocation list.
252 static void vmw_resource_relocations_free(struct list_head *list)
254 struct vmw_resource_relocation *rel, *n;
256 list_for_each_entry_safe(rel, n, list, head) {
257 list_del(&rel->head);
263 * vmw_resource_relocations_apply - Apply all relocations on a list
265 * @cb: Pointer to the start of the command buffer bein patch. This need
266 * not be the same buffer as the one being parsed when the relocation
267 * list was built, but the contents must be the same modulo the
269 * @list: Pointer to the head of the relocation list.
271 static void vmw_resource_relocations_apply(uint32_t *cb,
272 struct list_head *list)
274 struct vmw_resource_relocation *rel;
276 list_for_each_entry(rel, list, head) {
277 if (likely(rel->res != NULL))
278 cb[rel->offset] = rel->res->id;
280 cb[rel->offset] = SVGA_3D_CMD_NOP;
284 static int vmw_cmd_invalid(struct vmw_private *dev_priv,
285 struct vmw_sw_context *sw_context,
286 SVGA3dCmdHeader *header)
288 return capable(CAP_SYS_ADMIN) ? : -EINVAL;
291 static int vmw_cmd_ok(struct vmw_private *dev_priv,
292 struct vmw_sw_context *sw_context,
293 SVGA3dCmdHeader *header)
299 * vmw_bo_to_validate_list - add a bo to a validate list
301 * @sw_context: The software context used for this command submission batch.
302 * @bo: The buffer object to add.
303 * @validate_as_mob: Validate this buffer as a MOB.
304 * @p_val_node: If non-NULL Will be updated with the validate node number
307 * Returns -EINVAL if the limit of number of buffer objects per command
308 * submission is reached.
310 static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
311 struct ttm_buffer_object *bo,
312 bool validate_as_mob,
313 uint32_t *p_val_node)
316 struct vmw_validate_buffer *vval_buf;
317 struct ttm_validate_buffer *val_buf;
318 struct drm_hash_item *hash;
321 if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
323 vval_buf = container_of(hash, struct vmw_validate_buffer,
325 if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
326 DRM_ERROR("Inconsistent buffer usage.\n");
329 val_buf = &vval_buf->base;
330 val_node = vval_buf - sw_context->val_bufs;
332 val_node = sw_context->cur_val_buf;
333 if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
334 DRM_ERROR("Max number of DMA buffers per submission "
338 vval_buf = &sw_context->val_bufs[val_node];
339 vval_buf->hash.key = (unsigned long) bo;
340 ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
341 if (unlikely(ret != 0)) {
342 DRM_ERROR("Failed to initialize a buffer validation "
346 ++sw_context->cur_val_buf;
347 val_buf = &vval_buf->base;
348 val_buf->bo = ttm_bo_reference(bo);
349 val_buf->shared = false;
350 list_add_tail(&val_buf->head, &sw_context->validate_nodes);
351 vval_buf->validate_as_mob = validate_as_mob;
355 *p_val_node = val_node;
361 * vmw_resources_reserve - Reserve all resources on the sw_context's
364 * @sw_context: Pointer to the software context.
366 * Note that since vmware's command submission currently is protected by
367 * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
368 * since only a single thread at once will attempt this.
370 static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
372 struct vmw_resource_val_node *val;
375 list_for_each_entry(val, &sw_context->resource_list, head) {
376 struct vmw_resource *res = val->res;
378 ret = vmw_resource_reserve(res, val->no_buffer_needed);
379 if (unlikely(ret != 0))
383 struct ttm_buffer_object *bo = &res->backup->base;
385 ret = vmw_bo_to_validate_list
387 vmw_resource_needs_backup(res), NULL);
389 if (unlikely(ret != 0))
397 * vmw_resources_validate - Validate all resources on the sw_context's
400 * @sw_context: Pointer to the software context.
402 * Before this function is called, all resource backup buffers must have
405 static int vmw_resources_validate(struct vmw_sw_context *sw_context)
407 struct vmw_resource_val_node *val;
410 list_for_each_entry(val, &sw_context->resource_list, head) {
411 struct vmw_resource *res = val->res;
413 ret = vmw_resource_validate(res);
414 if (unlikely(ret != 0)) {
415 if (ret != -ERESTARTSYS)
416 DRM_ERROR("Failed to validate resource.\n");
425 * vmw_cmd_res_reloc_add - Add a resource to a software context's
426 * relocation- and validation lists.
428 * @dev_priv: Pointer to a struct vmw_private identifying the device.
429 * @sw_context: Pointer to the software context.
430 * @res_type: Resource type.
431 * @id_loc: Pointer to where the id that needs translation is located.
432 * @res: Valid pointer to a struct vmw_resource.
433 * @p_val: If non null, a pointer to the struct vmw_resource_validate_node
434 * used for this resource is returned here.
436 static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv,
437 struct vmw_sw_context *sw_context,
438 enum vmw_res_type res_type,
440 struct vmw_resource *res,
441 struct vmw_resource_val_node **p_val)
444 struct vmw_resource_val_node *node;
447 ret = vmw_resource_relocation_add(&sw_context->res_relocations,
449 id_loc - sw_context->buf_start);
450 if (unlikely(ret != 0))
453 ret = vmw_resource_val_add(sw_context, res, &node);
454 if (unlikely(ret != 0))
457 if (res_type == vmw_res_context && dev_priv->has_mob &&
461 * Put contexts first on the list to be able to exit
462 * list traversal for contexts early.
464 list_del(&node->head);
465 list_add(&node->head, &sw_context->resource_list);
467 ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
468 if (unlikely(ret != 0))
470 node->staged_bindings =
471 kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL);
472 if (node->staged_bindings == NULL) {
473 DRM_ERROR("Failed to allocate context binding "
477 INIT_LIST_HEAD(&node->staged_bindings->list);
488 * vmw_cmd_res_check - Check that a resource is present and if so, put it
489 * on the resource validate list unless it's already there.
491 * @dev_priv: Pointer to a device private structure.
492 * @sw_context: Pointer to the software context.
493 * @res_type: Resource type.
494 * @converter: User-space visisble type specific information.
495 * @id_loc: Pointer to the location in the command buffer currently being
496 * parsed from where the user-space resource id handle is located.
497 * @p_val: Pointer to pointer to resource validalidation node. Populated
501 vmw_cmd_res_check(struct vmw_private *dev_priv,
502 struct vmw_sw_context *sw_context,
503 enum vmw_res_type res_type,
504 const struct vmw_user_resource_conv *converter,
506 struct vmw_resource_val_node **p_val)
508 struct vmw_res_cache_entry *rcache =
509 &sw_context->res_cache[res_type];
510 struct vmw_resource *res;
511 struct vmw_resource_val_node *node;
514 if (*id_loc == SVGA3D_INVALID_ID) {
517 if (res_type == vmw_res_context) {
518 DRM_ERROR("Illegal context invalid id.\n");
525 * Fastpath in case of repeated commands referencing the same
529 if (likely(rcache->valid && *id_loc == rcache->handle)) {
530 const struct vmw_resource *res = rcache->res;
532 rcache->node->first_usage = false;
534 *p_val = rcache->node;
536 return vmw_resource_relocation_add
537 (&sw_context->res_relocations, res,
538 id_loc - sw_context->buf_start);
541 ret = vmw_user_resource_lookup_handle(dev_priv,
542 sw_context->fp->tfile,
546 if (unlikely(ret != 0)) {
547 DRM_ERROR("Could not find or use resource 0x%08x.\n",
553 rcache->valid = true;
555 rcache->handle = *id_loc;
557 ret = vmw_cmd_res_reloc_add(dev_priv, sw_context, res_type, id_loc,
559 if (unlikely(ret != 0))
565 vmw_resource_unreference(&res);
569 BUG_ON(sw_context->error_resource != NULL);
570 sw_context->error_resource = res;
576 * vmw_rebind_contexts - Rebind all resources previously bound to
577 * referenced contexts.
579 * @sw_context: Pointer to the software context.
581 * Rebind context binding points that have been scrubbed because of eviction.
583 static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
585 struct vmw_resource_val_node *val;
588 list_for_each_entry(val, &sw_context->resource_list, head) {
589 if (unlikely(!val->staged_bindings))
592 ret = vmw_context_rebind_all(val->res);
593 if (unlikely(ret != 0)) {
594 if (ret != -ERESTARTSYS)
595 DRM_ERROR("Failed to rebind context.\n");
604 * vmw_cmd_cid_check - Check a command header for valid context information.
606 * @dev_priv: Pointer to a device private structure.
607 * @sw_context: Pointer to the software context.
608 * @header: A command header with an embedded user-space context handle.
610 * Convenience function: Call vmw_cmd_res_check with the user-space context
611 * handle embedded in @header.
613 static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
614 struct vmw_sw_context *sw_context,
615 SVGA3dCmdHeader *header)
618 SVGA3dCmdHeader header;
622 cmd = container_of(header, struct vmw_cid_cmd, header);
623 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
624 user_context_converter, &cmd->cid, NULL);
627 static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
628 struct vmw_sw_context *sw_context,
629 SVGA3dCmdHeader *header)
632 SVGA3dCmdHeader header;
633 SVGA3dCmdSetRenderTarget body;
635 struct vmw_resource_val_node *ctx_node;
636 struct vmw_resource_val_node *res_node;
639 cmd = container_of(header, struct vmw_sid_cmd, header);
641 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
642 user_context_converter, &cmd->body.cid,
644 if (unlikely(ret != 0))
647 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
648 user_surface_converter,
649 &cmd->body.target.sid, &res_node);
650 if (unlikely(ret != 0))
653 if (dev_priv->has_mob) {
654 struct vmw_ctx_bindinfo bi;
656 bi.ctx = ctx_node->res;
657 bi.res = res_node ? res_node->res : NULL;
658 bi.bt = vmw_ctx_binding_rt;
659 bi.i1.rt_type = cmd->body.type;
660 return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
666 static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
667 struct vmw_sw_context *sw_context,
668 SVGA3dCmdHeader *header)
671 SVGA3dCmdHeader header;
672 SVGA3dCmdSurfaceCopy body;
676 cmd = container_of(header, struct vmw_sid_cmd, header);
677 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
678 user_surface_converter,
679 &cmd->body.src.sid, NULL);
680 if (unlikely(ret != 0))
683 if (sw_context->quirks & VMW_QUIRK_SCREENTARGET)
686 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
687 user_surface_converter,
688 &cmd->body.dest.sid, NULL);
691 static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
692 struct vmw_sw_context *sw_context,
693 SVGA3dCmdHeader *header)
696 SVGA3dCmdHeader header;
697 SVGA3dCmdSurfaceStretchBlt body;
701 cmd = container_of(header, struct vmw_sid_cmd, header);
702 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
703 user_surface_converter,
704 &cmd->body.src.sid, NULL);
705 if (unlikely(ret != 0))
707 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
708 user_surface_converter,
709 &cmd->body.dest.sid, NULL);
712 static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
713 struct vmw_sw_context *sw_context,
714 SVGA3dCmdHeader *header)
717 SVGA3dCmdHeader header;
718 SVGA3dCmdBlitSurfaceToScreen body;
721 cmd = container_of(header, struct vmw_sid_cmd, header);
723 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
724 user_surface_converter,
725 &cmd->body.srcImage.sid, NULL);
728 static int vmw_cmd_present_check(struct vmw_private *dev_priv,
729 struct vmw_sw_context *sw_context,
730 SVGA3dCmdHeader *header)
733 SVGA3dCmdHeader header;
734 SVGA3dCmdPresent body;
738 cmd = container_of(header, struct vmw_sid_cmd, header);
740 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
741 user_surface_converter, &cmd->body.sid,
746 * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
748 * @dev_priv: The device private structure.
749 * @new_query_bo: The new buffer holding query results.
750 * @sw_context: The software context used for this command submission.
752 * This function checks whether @new_query_bo is suitable for holding
753 * query results, and if another buffer currently is pinned for query
754 * results. If so, the function prepares the state of @sw_context for
755 * switching pinned buffers after successful submission of the current
758 static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
759 struct ttm_buffer_object *new_query_bo,
760 struct vmw_sw_context *sw_context)
762 struct vmw_res_cache_entry *ctx_entry =
763 &sw_context->res_cache[vmw_res_context];
766 BUG_ON(!ctx_entry->valid);
767 sw_context->last_query_ctx = ctx_entry->res;
769 if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
771 if (unlikely(new_query_bo->num_pages > 4)) {
772 DRM_ERROR("Query buffer too large.\n");
776 if (unlikely(sw_context->cur_query_bo != NULL)) {
777 sw_context->needs_post_query_barrier = true;
778 ret = vmw_bo_to_validate_list(sw_context,
779 sw_context->cur_query_bo,
780 dev_priv->has_mob, NULL);
781 if (unlikely(ret != 0))
784 sw_context->cur_query_bo = new_query_bo;
786 ret = vmw_bo_to_validate_list(sw_context,
787 dev_priv->dummy_query_bo,
788 dev_priv->has_mob, NULL);
789 if (unlikely(ret != 0))
799 * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
801 * @dev_priv: The device private structure.
802 * @sw_context: The software context used for this command submission batch.
804 * This function will check if we're switching query buffers, and will then,
805 * issue a dummy occlusion query wait used as a query barrier. When the fence
806 * object following that query wait has signaled, we are sure that all
807 * preceding queries have finished, and the old query buffer can be unpinned.
808 * However, since both the new query buffer and the old one are fenced with
809 * that fence, we can do an asynchronus unpin now, and be sure that the
810 * old query buffer won't be moved until the fence has signaled.
812 * As mentioned above, both the new - and old query buffers need to be fenced
813 * using a sequence emitted *after* calling this function.
815 static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
816 struct vmw_sw_context *sw_context)
819 * The validate list should still hold references to all
823 if (sw_context->needs_post_query_barrier) {
824 struct vmw_res_cache_entry *ctx_entry =
825 &sw_context->res_cache[vmw_res_context];
826 struct vmw_resource *ctx;
829 BUG_ON(!ctx_entry->valid);
830 ctx = ctx_entry->res;
832 ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
834 if (unlikely(ret != 0))
835 DRM_ERROR("Out of fifo space for dummy query.\n");
838 if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
839 if (dev_priv->pinned_bo) {
840 vmw_bo_pin(dev_priv->pinned_bo, false);
841 ttm_bo_unref(&dev_priv->pinned_bo);
844 if (!sw_context->needs_post_query_barrier) {
845 vmw_bo_pin(sw_context->cur_query_bo, true);
848 * We pin also the dummy_query_bo buffer so that we
849 * don't need to validate it when emitting
850 * dummy queries in context destroy paths.
853 vmw_bo_pin(dev_priv->dummy_query_bo, true);
854 dev_priv->dummy_query_bo_pinned = true;
856 BUG_ON(sw_context->last_query_ctx == NULL);
857 dev_priv->query_cid = sw_context->last_query_ctx->id;
858 dev_priv->query_cid_valid = true;
859 dev_priv->pinned_bo =
860 ttm_bo_reference(sw_context->cur_query_bo);
866 * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
867 * handle to a MOB id.
869 * @dev_priv: Pointer to a device private structure.
870 * @sw_context: The software context used for this command batch validation.
871 * @id: Pointer to the user-space handle to be translated.
872 * @vmw_bo_p: Points to a location that, on successful return will carry
873 * a reference-counted pointer to the DMA buffer identified by the
874 * user-space handle in @id.
876 * This function saves information needed to translate a user-space buffer
877 * handle to a MOB id. The translation does not take place immediately, but
878 * during a call to vmw_apply_relocations(). This function builds a relocation
879 * list and a list of buffers to validate. The former needs to be freed using
880 * either vmw_apply_relocations() or vmw_free_relocations(). The latter
881 * needs to be freed using vmw_clear_validations.
883 static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
884 struct vmw_sw_context *sw_context,
886 struct vmw_dma_buffer **vmw_bo_p)
888 struct vmw_dma_buffer *vmw_bo = NULL;
889 struct ttm_buffer_object *bo;
890 uint32_t handle = *id;
891 struct vmw_relocation *reloc;
894 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
895 if (unlikely(ret != 0)) {
896 DRM_ERROR("Could not find or use MOB buffer.\n");
902 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
903 DRM_ERROR("Max number relocations per submission"
909 reloc = &sw_context->relocs[sw_context->cur_reloc++];
911 reloc->location = NULL;
913 ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
914 if (unlikely(ret != 0))
921 vmw_dmabuf_unreference(&vmw_bo);
927 * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
928 * handle to a valid SVGAGuestPtr
930 * @dev_priv: Pointer to a device private structure.
931 * @sw_context: The software context used for this command batch validation.
932 * @ptr: Pointer to the user-space handle to be translated.
933 * @vmw_bo_p: Points to a location that, on successful return will carry
934 * a reference-counted pointer to the DMA buffer identified by the
935 * user-space handle in @id.
937 * This function saves information needed to translate a user-space buffer
938 * handle to a valid SVGAGuestPtr. The translation does not take place
939 * immediately, but during a call to vmw_apply_relocations().
940 * This function builds a relocation list and a list of buffers to validate.
941 * The former needs to be freed using either vmw_apply_relocations() or
942 * vmw_free_relocations(). The latter needs to be freed using
943 * vmw_clear_validations.
945 static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
946 struct vmw_sw_context *sw_context,
948 struct vmw_dma_buffer **vmw_bo_p)
950 struct vmw_dma_buffer *vmw_bo = NULL;
951 struct ttm_buffer_object *bo;
952 uint32_t handle = ptr->gmrId;
953 struct vmw_relocation *reloc;
956 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
957 if (unlikely(ret != 0)) {
958 DRM_ERROR("Could not find or use GMR region.\n");
964 if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
965 DRM_ERROR("Max number relocations per submission"
971 reloc = &sw_context->relocs[sw_context->cur_reloc++];
972 reloc->location = ptr;
974 ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
975 if (unlikely(ret != 0))
982 vmw_dmabuf_unreference(&vmw_bo);
988 * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
990 * @dev_priv: Pointer to a device private struct.
991 * @sw_context: The software context used for this command submission.
992 * @header: Pointer to the command header in the command stream.
994 static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
995 struct vmw_sw_context *sw_context,
996 SVGA3dCmdHeader *header)
998 struct vmw_begin_gb_query_cmd {
999 SVGA3dCmdHeader header;
1000 SVGA3dCmdBeginGBQuery q;
1003 cmd = container_of(header, struct vmw_begin_gb_query_cmd,
1006 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1007 user_context_converter, &cmd->q.cid,
1012 * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
1014 * @dev_priv: Pointer to a device private struct.
1015 * @sw_context: The software context used for this command submission.
1016 * @header: Pointer to the command header in the command stream.
1018 static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
1019 struct vmw_sw_context *sw_context,
1020 SVGA3dCmdHeader *header)
1022 struct vmw_begin_query_cmd {
1023 SVGA3dCmdHeader header;
1024 SVGA3dCmdBeginQuery q;
1027 cmd = container_of(header, struct vmw_begin_query_cmd,
1030 if (unlikely(dev_priv->has_mob)) {
1032 SVGA3dCmdHeader header;
1033 SVGA3dCmdBeginGBQuery q;
1036 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1038 gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
1039 gb_cmd.header.size = cmd->header.size;
1040 gb_cmd.q.cid = cmd->q.cid;
1041 gb_cmd.q.type = cmd->q.type;
1043 memcpy(cmd, &gb_cmd, sizeof(*cmd));
1044 return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
1047 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1048 user_context_converter, &cmd->q.cid,
1053 * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
1055 * @dev_priv: Pointer to a device private struct.
1056 * @sw_context: The software context used for this command submission.
1057 * @header: Pointer to the command header in the command stream.
1059 static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
1060 struct vmw_sw_context *sw_context,
1061 SVGA3dCmdHeader *header)
1063 struct vmw_dma_buffer *vmw_bo;
1064 struct vmw_query_cmd {
1065 SVGA3dCmdHeader header;
1066 SVGA3dCmdEndGBQuery q;
1070 cmd = container_of(header, struct vmw_query_cmd, header);
1071 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1072 if (unlikely(ret != 0))
1075 ret = vmw_translate_mob_ptr(dev_priv, sw_context,
1078 if (unlikely(ret != 0))
1081 ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
1083 vmw_dmabuf_unreference(&vmw_bo);
1088 * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
1090 * @dev_priv: Pointer to a device private struct.
1091 * @sw_context: The software context used for this command submission.
1092 * @header: Pointer to the command header in the command stream.
1094 static int vmw_cmd_end_query(struct vmw_private *dev_priv,
1095 struct vmw_sw_context *sw_context,
1096 SVGA3dCmdHeader *header)
1098 struct vmw_dma_buffer *vmw_bo;
1099 struct vmw_query_cmd {
1100 SVGA3dCmdHeader header;
1101 SVGA3dCmdEndQuery q;
1105 cmd = container_of(header, struct vmw_query_cmd, header);
1106 if (dev_priv->has_mob) {
1108 SVGA3dCmdHeader header;
1109 SVGA3dCmdEndGBQuery q;
1112 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1114 gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
1115 gb_cmd.header.size = cmd->header.size;
1116 gb_cmd.q.cid = cmd->q.cid;
1117 gb_cmd.q.type = cmd->q.type;
1118 gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
1119 gb_cmd.q.offset = cmd->q.guestResult.offset;
1121 memcpy(cmd, &gb_cmd, sizeof(*cmd));
1122 return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
1125 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1126 if (unlikely(ret != 0))
1129 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1130 &cmd->q.guestResult,
1132 if (unlikely(ret != 0))
1135 ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
1137 vmw_dmabuf_unreference(&vmw_bo);
1142 * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
1144 * @dev_priv: Pointer to a device private struct.
1145 * @sw_context: The software context used for this command submission.
1146 * @header: Pointer to the command header in the command stream.
1148 static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
1149 struct vmw_sw_context *sw_context,
1150 SVGA3dCmdHeader *header)
1152 struct vmw_dma_buffer *vmw_bo;
1153 struct vmw_query_cmd {
1154 SVGA3dCmdHeader header;
1155 SVGA3dCmdWaitForGBQuery q;
1159 cmd = container_of(header, struct vmw_query_cmd, header);
1160 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1161 if (unlikely(ret != 0))
1164 ret = vmw_translate_mob_ptr(dev_priv, sw_context,
1167 if (unlikely(ret != 0))
1170 vmw_dmabuf_unreference(&vmw_bo);
1175 * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
1177 * @dev_priv: Pointer to a device private struct.
1178 * @sw_context: The software context used for this command submission.
1179 * @header: Pointer to the command header in the command stream.
1181 static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
1182 struct vmw_sw_context *sw_context,
1183 SVGA3dCmdHeader *header)
1185 struct vmw_dma_buffer *vmw_bo;
1186 struct vmw_query_cmd {
1187 SVGA3dCmdHeader header;
1188 SVGA3dCmdWaitForQuery q;
1192 cmd = container_of(header, struct vmw_query_cmd, header);
1193 if (dev_priv->has_mob) {
1195 SVGA3dCmdHeader header;
1196 SVGA3dCmdWaitForGBQuery q;
1199 BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
1201 gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
1202 gb_cmd.header.size = cmd->header.size;
1203 gb_cmd.q.cid = cmd->q.cid;
1204 gb_cmd.q.type = cmd->q.type;
1205 gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
1206 gb_cmd.q.offset = cmd->q.guestResult.offset;
1208 memcpy(cmd, &gb_cmd, sizeof(*cmd));
1209 return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
1212 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1213 if (unlikely(ret != 0))
1216 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1217 &cmd->q.guestResult,
1219 if (unlikely(ret != 0))
1222 vmw_dmabuf_unreference(&vmw_bo);
1226 static int vmw_cmd_dma(struct vmw_private *dev_priv,
1227 struct vmw_sw_context *sw_context,
1228 SVGA3dCmdHeader *header)
1230 struct vmw_dma_buffer *vmw_bo = NULL;
1231 struct vmw_surface *srf = NULL;
1232 struct vmw_dma_cmd {
1233 SVGA3dCmdHeader header;
1234 SVGA3dCmdSurfaceDMA dma;
1237 SVGA3dCmdSurfaceDMASuffix *suffix;
1240 cmd = container_of(header, struct vmw_dma_cmd, header);
1241 suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
1242 header->size - sizeof(*suffix));
1244 /* Make sure device and verifier stays in sync. */
1245 if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
1246 DRM_ERROR("Invalid DMA suffix size.\n");
1250 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1251 &cmd->dma.guest.ptr,
1253 if (unlikely(ret != 0))
1256 /* Make sure DMA doesn't cross BO boundaries. */
1257 bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
1258 if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
1259 DRM_ERROR("Invalid DMA offset.\n");
1263 bo_size -= cmd->dma.guest.ptr.offset;
1264 if (unlikely(suffix->maximumOffset > bo_size))
1265 suffix->maximumOffset = bo_size;
1267 if (sw_context->quirks & VMW_QUIRK_SCREENTARGET)
1268 goto out_no_surface;
1270 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1271 user_surface_converter, &cmd->dma.host.sid,
1273 if (unlikely(ret != 0)) {
1274 if (unlikely(ret != -ERESTARTSYS))
1275 DRM_ERROR("could not find surface for DMA.\n");
1276 goto out_no_surface;
1279 srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
1281 vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base,
1285 vmw_dmabuf_unreference(&vmw_bo);
1289 static int vmw_cmd_draw(struct vmw_private *dev_priv,
1290 struct vmw_sw_context *sw_context,
1291 SVGA3dCmdHeader *header)
1293 struct vmw_draw_cmd {
1294 SVGA3dCmdHeader header;
1295 SVGA3dCmdDrawPrimitives body;
1297 SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
1298 (unsigned long)header + sizeof(*cmd));
1299 SVGA3dPrimitiveRange *range;
1304 ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
1305 if (unlikely(ret != 0))
1308 cmd = container_of(header, struct vmw_draw_cmd, header);
1309 maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
1311 if (unlikely(cmd->body.numVertexDecls > maxnum)) {
1312 DRM_ERROR("Illegal number of vertex declarations.\n");
1316 for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
1317 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1318 user_surface_converter,
1319 &decl->array.surfaceId, NULL);
1320 if (unlikely(ret != 0))
1324 maxnum = (header->size - sizeof(cmd->body) -
1325 cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
1326 if (unlikely(cmd->body.numRanges > maxnum)) {
1327 DRM_ERROR("Illegal number of index ranges.\n");
1331 range = (SVGA3dPrimitiveRange *) decl;
1332 for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
1333 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1334 user_surface_converter,
1335 &range->indexArray.surfaceId, NULL);
1336 if (unlikely(ret != 0))
1343 static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
1344 struct vmw_sw_context *sw_context,
1345 SVGA3dCmdHeader *header)
1347 struct vmw_tex_state_cmd {
1348 SVGA3dCmdHeader header;
1349 SVGA3dCmdSetTextureState state;
1352 SVGA3dTextureState *last_state = (SVGA3dTextureState *)
1353 ((unsigned long) header + header->size + sizeof(header));
1354 SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
1355 ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
1356 struct vmw_resource_val_node *ctx_node;
1357 struct vmw_resource_val_node *res_node;
1360 cmd = container_of(header, struct vmw_tex_state_cmd,
1363 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1364 user_context_converter, &cmd->state.cid,
1366 if (unlikely(ret != 0))
1369 for (; cur_state < last_state; ++cur_state) {
1370 if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
1373 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1374 user_surface_converter,
1375 &cur_state->value, &res_node);
1376 if (unlikely(ret != 0))
1379 if (dev_priv->has_mob) {
1380 struct vmw_ctx_bindinfo bi;
1382 bi.ctx = ctx_node->res;
1383 bi.res = res_node ? res_node->res : NULL;
1384 bi.bt = vmw_ctx_binding_tex;
1385 bi.i1.texture_stage = cur_state->stage;
1386 vmw_context_binding_add(ctx_node->staged_bindings,
1394 static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
1395 struct vmw_sw_context *sw_context,
1398 struct vmw_dma_buffer *vmw_bo;
1403 SVGAFifoCmdDefineGMRFB body;
1406 ret = vmw_translate_guest_ptr(dev_priv, sw_context,
1409 if (unlikely(ret != 0))
1412 vmw_dmabuf_unreference(&vmw_bo);
1418 * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
1420 * @dev_priv: Pointer to a device private struct.
1421 * @sw_context: The software context being used for this batch.
1422 * @res_type: The resource type.
1423 * @converter: Information about user-space binding for this resource type.
1424 * @res_id: Pointer to the user-space resource handle in the command stream.
1425 * @buf_id: Pointer to the user-space backup buffer handle in the command
1427 * @backup_offset: Offset of backup into MOB.
1429 * This function prepares for registering a switch of backup buffers
1430 * in the resource metadata just prior to unreserving.
1432 static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
1433 struct vmw_sw_context *sw_context,
1434 enum vmw_res_type res_type,
1435 const struct vmw_user_resource_conv
1439 unsigned long backup_offset)
1442 struct vmw_dma_buffer *dma_buf;
1443 struct vmw_resource_val_node *val_node;
1445 ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
1446 converter, res_id, &val_node);
1447 if (unlikely(ret != 0))
1450 ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &dma_buf);
1451 if (unlikely(ret != 0))
1454 if (val_node->first_usage)
1455 val_node->no_buffer_needed = true;
1457 vmw_dmabuf_unreference(&val_node->new_backup);
1458 val_node->new_backup = dma_buf;
1459 val_node->new_backup_offset = backup_offset;
1465 * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
1468 * @dev_priv: Pointer to a device private struct.
1469 * @sw_context: The software context being used for this batch.
1470 * @header: Pointer to the command header in the command stream.
1472 static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
1473 struct vmw_sw_context *sw_context,
1474 SVGA3dCmdHeader *header)
1476 struct vmw_bind_gb_surface_cmd {
1477 SVGA3dCmdHeader header;
1478 SVGA3dCmdBindGBSurface body;
1481 cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
1483 return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
1484 user_surface_converter,
1485 &cmd->body.sid, &cmd->body.mobid,
1490 * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
1493 * @dev_priv: Pointer to a device private struct.
1494 * @sw_context: The software context being used for this batch.
1495 * @header: Pointer to the command header in the command stream.
1497 static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
1498 struct vmw_sw_context *sw_context,
1499 SVGA3dCmdHeader *header)
1501 struct vmw_gb_surface_cmd {
1502 SVGA3dCmdHeader header;
1503 SVGA3dCmdUpdateGBImage body;
1506 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1508 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1509 user_surface_converter,
1510 &cmd->body.image.sid, NULL);
1514 * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
1517 * @dev_priv: Pointer to a device private struct.
1518 * @sw_context: The software context being used for this batch.
1519 * @header: Pointer to the command header in the command stream.
1521 static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
1522 struct vmw_sw_context *sw_context,
1523 SVGA3dCmdHeader *header)
1525 struct vmw_gb_surface_cmd {
1526 SVGA3dCmdHeader header;
1527 SVGA3dCmdUpdateGBSurface body;
1530 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1532 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1533 user_surface_converter,
1534 &cmd->body.sid, NULL);
1538 * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
1541 * @dev_priv: Pointer to a device private struct.
1542 * @sw_context: The software context being used for this batch.
1543 * @header: Pointer to the command header in the command stream.
1545 static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
1546 struct vmw_sw_context *sw_context,
1547 SVGA3dCmdHeader *header)
1549 struct vmw_gb_surface_cmd {
1550 SVGA3dCmdHeader header;
1551 SVGA3dCmdReadbackGBImage body;
1554 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1556 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1557 user_surface_converter,
1558 &cmd->body.image.sid, NULL);
1562 * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
1565 * @dev_priv: Pointer to a device private struct.
1566 * @sw_context: The software context being used for this batch.
1567 * @header: Pointer to the command header in the command stream.
1569 static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
1570 struct vmw_sw_context *sw_context,
1571 SVGA3dCmdHeader *header)
1573 struct vmw_gb_surface_cmd {
1574 SVGA3dCmdHeader header;
1575 SVGA3dCmdReadbackGBSurface body;
1578 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1580 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1581 user_surface_converter,
1582 &cmd->body.sid, NULL);
1586 * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
1589 * @dev_priv: Pointer to a device private struct.
1590 * @sw_context: The software context being used for this batch.
1591 * @header: Pointer to the command header in the command stream.
1593 static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
1594 struct vmw_sw_context *sw_context,
1595 SVGA3dCmdHeader *header)
1597 struct vmw_gb_surface_cmd {
1598 SVGA3dCmdHeader header;
1599 SVGA3dCmdInvalidateGBImage body;
1602 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1604 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1605 user_surface_converter,
1606 &cmd->body.image.sid, NULL);
1610 * vmw_cmd_invalidate_gb_surface - Validate an
1611 * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
1613 * @dev_priv: Pointer to a device private struct.
1614 * @sw_context: The software context being used for this batch.
1615 * @header: Pointer to the command header in the command stream.
1617 static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
1618 struct vmw_sw_context *sw_context,
1619 SVGA3dCmdHeader *header)
1621 struct vmw_gb_surface_cmd {
1622 SVGA3dCmdHeader header;
1623 SVGA3dCmdInvalidateGBSurface body;
1626 cmd = container_of(header, struct vmw_gb_surface_cmd, header);
1628 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
1629 user_surface_converter,
1630 &cmd->body.sid, NULL);
1635 * vmw_cmd_shader_define - Validate an SVGA_3D_CMD_SHADER_DEFINE
1638 * @dev_priv: Pointer to a device private struct.
1639 * @sw_context: The software context being used for this batch.
1640 * @header: Pointer to the command header in the command stream.
1642 static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
1643 struct vmw_sw_context *sw_context,
1644 SVGA3dCmdHeader *header)
1646 struct vmw_shader_define_cmd {
1647 SVGA3dCmdHeader header;
1648 SVGA3dCmdDefineShader body;
1652 struct vmw_resource_val_node *val;
1654 cmd = container_of(header, struct vmw_shader_define_cmd,
1657 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1658 user_context_converter, &cmd->body.cid,
1660 if (unlikely(ret != 0))
1663 if (unlikely(!dev_priv->has_mob))
1666 size = cmd->header.size - sizeof(cmd->body);
1667 ret = vmw_compat_shader_add(dev_priv,
1668 vmw_context_res_man(val->res),
1669 cmd->body.shid, cmd + 1,
1670 cmd->body.type, size,
1671 &sw_context->staged_cmd_res);
1672 if (unlikely(ret != 0))
1675 return vmw_resource_relocation_add(&sw_context->res_relocations,
1676 NULL, &cmd->header.id -
1677 sw_context->buf_start);
1683 * vmw_cmd_shader_destroy - Validate an SVGA_3D_CMD_SHADER_DESTROY
1686 * @dev_priv: Pointer to a device private struct.
1687 * @sw_context: The software context being used for this batch.
1688 * @header: Pointer to the command header in the command stream.
1690 static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
1691 struct vmw_sw_context *sw_context,
1692 SVGA3dCmdHeader *header)
1694 struct vmw_shader_destroy_cmd {
1695 SVGA3dCmdHeader header;
1696 SVGA3dCmdDestroyShader body;
1699 struct vmw_resource_val_node *val;
1701 cmd = container_of(header, struct vmw_shader_destroy_cmd,
1704 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1705 user_context_converter, &cmd->body.cid,
1707 if (unlikely(ret != 0))
1710 if (unlikely(!dev_priv->has_mob))
1713 ret = vmw_compat_shader_remove(vmw_context_res_man(val->res),
1716 &sw_context->staged_cmd_res);
1717 if (unlikely(ret != 0))
1720 return vmw_resource_relocation_add(&sw_context->res_relocations,
1721 NULL, &cmd->header.id -
1722 sw_context->buf_start);
1728 * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
1731 * @dev_priv: Pointer to a device private struct.
1732 * @sw_context: The software context being used for this batch.
1733 * @header: Pointer to the command header in the command stream.
1735 static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
1736 struct vmw_sw_context *sw_context,
1737 SVGA3dCmdHeader *header)
1739 struct vmw_set_shader_cmd {
1740 SVGA3dCmdHeader header;
1741 SVGA3dCmdSetShader body;
1743 struct vmw_resource_val_node *ctx_node, *res_node = NULL;
1744 struct vmw_ctx_bindinfo bi;
1745 struct vmw_resource *res = NULL;
1748 cmd = container_of(header, struct vmw_set_shader_cmd,
1751 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1752 user_context_converter, &cmd->body.cid,
1754 if (unlikely(ret != 0))
1757 if (!dev_priv->has_mob)
1760 if (cmd->body.shid != SVGA3D_INVALID_ID) {
1761 res = vmw_compat_shader_lookup
1762 (vmw_context_res_man(ctx_node->res),
1767 ret = vmw_cmd_res_reloc_add(dev_priv, sw_context,
1769 &cmd->body.shid, res,
1771 vmw_resource_unreference(&res);
1772 if (unlikely(ret != 0))
1778 ret = vmw_cmd_res_check(dev_priv, sw_context,
1780 user_shader_converter,
1781 &cmd->body.shid, &res_node);
1782 if (unlikely(ret != 0))
1786 bi.ctx = ctx_node->res;
1787 bi.res = res_node ? res_node->res : NULL;
1788 bi.bt = vmw_ctx_binding_shader;
1789 bi.i1.shader_type = cmd->body.type;
1790 return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
1794 * vmw_cmd_set_shader_const - Validate an SVGA_3D_CMD_SET_SHADER_CONST
1797 * @dev_priv: Pointer to a device private struct.
1798 * @sw_context: The software context being used for this batch.
1799 * @header: Pointer to the command header in the command stream.
1801 static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
1802 struct vmw_sw_context *sw_context,
1803 SVGA3dCmdHeader *header)
1805 struct vmw_set_shader_const_cmd {
1806 SVGA3dCmdHeader header;
1807 SVGA3dCmdSetShaderConst body;
1811 cmd = container_of(header, struct vmw_set_shader_const_cmd,
1814 ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
1815 user_context_converter, &cmd->body.cid,
1817 if (unlikely(ret != 0))
1820 if (dev_priv->has_mob)
1821 header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
1827 * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
1830 * @dev_priv: Pointer to a device private struct.
1831 * @sw_context: The software context being used for this batch.
1832 * @header: Pointer to the command header in the command stream.
1834 static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
1835 struct vmw_sw_context *sw_context,
1836 SVGA3dCmdHeader *header)
1838 struct vmw_bind_gb_shader_cmd {
1839 SVGA3dCmdHeader header;
1840 SVGA3dCmdBindGBShader body;
1843 cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
1846 return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
1847 user_shader_converter,
1848 &cmd->body.shid, &cmd->body.mobid,
1849 cmd->body.offsetInBytes);
1852 static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
1853 struct vmw_sw_context *sw_context,
1854 void *buf, uint32_t *size)
1856 uint32_t size_remaining = *size;
1859 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1861 case SVGA_CMD_UPDATE:
1862 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
1864 case SVGA_CMD_DEFINE_GMRFB:
1865 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
1867 case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
1868 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1870 case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
1871 *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
1874 DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
1878 if (*size > size_remaining) {
1879 DRM_ERROR("Invalid SVGA command (size mismatch):"
1884 if (unlikely(!sw_context->kernel)) {
1885 DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
1889 if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
1890 return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
1895 static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
1896 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
1897 false, false, false),
1898 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
1899 false, false, false),
1900 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
1901 true, false, false),
1902 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
1903 true, false, false),
1904 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
1905 true, false, false),
1906 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
1907 false, false, false),
1908 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
1909 false, false, false),
1910 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
1911 true, false, false),
1912 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
1913 true, false, false),
1914 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
1915 true, false, false),
1916 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
1917 &vmw_cmd_set_render_target_check, true, false, false),
1918 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
1919 true, false, false),
1920 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
1921 true, false, false),
1922 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
1923 true, false, false),
1924 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
1925 true, false, false),
1926 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
1927 true, false, false),
1928 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
1929 true, false, false),
1930 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
1931 true, false, false),
1932 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
1933 false, false, false),
1934 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
1935 true, false, false),
1936 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
1937 true, false, false),
1938 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
1939 true, false, false),
1940 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
1941 true, false, false),
1942 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
1943 true, false, false),
1944 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
1945 true, false, false),
1946 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
1947 true, false, false),
1948 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
1949 true, false, false),
1950 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
1951 true, false, false),
1952 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
1953 true, false, false),
1954 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
1955 &vmw_cmd_blt_surf_screen_check, false, false, false),
1956 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
1957 false, false, false),
1958 VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
1959 false, false, false),
1960 VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
1961 false, false, false),
1962 VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
1963 false, false, false),
1964 VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
1965 false, false, false),
1966 VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
1967 false, false, false),
1968 VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
1969 false, false, false),
1970 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
1971 false, false, false),
1972 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
1973 false, false, false),
1974 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
1975 false, false, false),
1976 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
1977 false, false, false),
1978 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
1979 false, false, false),
1980 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
1981 false, false, false),
1982 VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
1983 false, false, true),
1984 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
1985 false, false, true),
1986 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
1987 false, false, true),
1988 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
1989 false, false, true),
1990 VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
1991 false, false, true),
1992 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
1993 false, false, true),
1994 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
1995 false, false, true),
1996 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
1997 false, false, true),
1998 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
2000 VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
2001 false, false, true),
2002 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
2004 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
2005 &vmw_cmd_update_gb_surface, true, false, true),
2006 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
2007 &vmw_cmd_readback_gb_image, true, false, true),
2008 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
2009 &vmw_cmd_readback_gb_surface, true, false, true),
2010 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
2011 &vmw_cmd_invalidate_gb_image, true, false, true),
2012 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
2013 &vmw_cmd_invalidate_gb_surface, true, false, true),
2014 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
2015 false, false, true),
2016 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
2017 false, false, true),
2018 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
2019 false, false, true),
2020 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
2021 false, false, true),
2022 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
2023 false, false, true),
2024 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
2025 false, false, true),
2026 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
2028 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
2029 false, false, true),
2030 VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
2031 false, false, false),
2032 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
2034 VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
2036 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
2038 VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
2040 VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
2041 false, false, true),
2042 VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
2043 false, false, true),
2044 VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
2045 false, false, true),
2046 VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
2047 false, false, true),
2048 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
2049 false, false, true),
2050 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
2051 false, false, true),
2052 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
2053 false, false, true),
2054 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
2055 false, false, true),
2056 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
2057 false, false, true),
2058 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
2059 false, false, true),
2060 VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
2064 static int vmw_cmd_check(struct vmw_private *dev_priv,
2065 struct vmw_sw_context *sw_context,
2066 void *buf, uint32_t *size)
2069 uint32_t size_remaining = *size;
2070 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
2072 const struct vmw_cmd_entry *entry;
2073 bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
2075 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
2076 /* Handle any none 3D commands */
2077 if (unlikely(cmd_id < SVGA_CMD_MAX))
2078 return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
2081 cmd_id = le32_to_cpu(header->id);
2082 *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
2084 cmd_id -= SVGA_3D_CMD_BASE;
2085 if (unlikely(*size > size_remaining))
2088 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
2091 entry = &vmw_cmd_entries[cmd_id];
2092 if (unlikely(!entry->func))
2095 if (unlikely(!entry->user_allow && !sw_context->kernel))
2096 goto out_privileged;
2098 if (unlikely(entry->gb_disable && gb))
2101 if (unlikely(entry->gb_enable && !gb))
2104 ret = entry->func(dev_priv, sw_context, header);
2105 if (unlikely(ret != 0))
2110 DRM_ERROR("Invalid SVGA3D command: %d\n",
2111 cmd_id + SVGA_3D_CMD_BASE);
2114 DRM_ERROR("Privileged SVGA3D command: %d\n",
2115 cmd_id + SVGA_3D_CMD_BASE);
2118 DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
2119 cmd_id + SVGA_3D_CMD_BASE);
2122 DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
2123 cmd_id + SVGA_3D_CMD_BASE);
2127 static int vmw_cmd_check_all(struct vmw_private *dev_priv,
2128 struct vmw_sw_context *sw_context,
2132 int32_t cur_size = size;
2135 sw_context->buf_start = buf;
2137 while (cur_size > 0) {
2139 ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
2140 if (unlikely(ret != 0))
2142 buf = (void *)((unsigned long) buf + size);
2146 if (unlikely(cur_size != 0)) {
2147 DRM_ERROR("Command verifier out of sync.\n");
2154 static void vmw_free_relocations(struct vmw_sw_context *sw_context)
2156 sw_context->cur_reloc = 0;
2159 static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
2162 struct vmw_relocation *reloc;
2163 struct ttm_validate_buffer *validate;
2164 struct ttm_buffer_object *bo;
2166 for (i = 0; i < sw_context->cur_reloc; ++i) {
2167 reloc = &sw_context->relocs[i];
2168 validate = &sw_context->val_bufs[reloc->index].base;
2170 switch (bo->mem.mem_type) {
2172 reloc->location->offset += bo->offset;
2173 reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
2176 reloc->location->gmrId = bo->mem.start;
2179 *reloc->mob_loc = bo->mem.start;
2185 vmw_free_relocations(sw_context);
2189 * vmw_resource_list_unrefererence - Free up a resource list and unreference
2190 * all resources referenced by it.
2192 * @list: The resource list.
2194 static void vmw_resource_list_unreference(struct list_head *list)
2196 struct vmw_resource_val_node *val, *val_next;
2199 * Drop references to resources held during command submission.
2202 list_for_each_entry_safe(val, val_next, list, head) {
2203 list_del_init(&val->head);
2204 vmw_resource_unreference(&val->res);
2205 if (unlikely(val->staged_bindings))
2206 kfree(val->staged_bindings);
2211 static void vmw_clear_validations(struct vmw_sw_context *sw_context)
2213 struct vmw_validate_buffer *entry, *next;
2214 struct vmw_resource_val_node *val;
2217 * Drop references to DMA buffers held during command submission.
2219 list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
2221 list_del(&entry->base.head);
2222 ttm_bo_unref(&entry->base.bo);
2223 (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
2224 sw_context->cur_val_buf--;
2226 BUG_ON(sw_context->cur_val_buf != 0);
2228 list_for_each_entry(val, &sw_context->resource_list, head)
2229 (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
2232 static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
2233 struct ttm_buffer_object *bo,
2234 bool validate_as_mob)
2240 * Don't validate pinned buffers.
2243 if (bo == dev_priv->pinned_bo ||
2244 (bo == dev_priv->dummy_query_bo &&
2245 dev_priv->dummy_query_bo_pinned))
2248 if (validate_as_mob)
2249 return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
2252 * Put BO in VRAM if there is space, otherwise as a GMR.
2253 * If there is no space in VRAM and GMR ids are all used up,
2254 * start evicting GMRs to make room. If the DMA buffer can't be
2255 * used as a GMR, this will return -ENOMEM.
2258 ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
2259 if (likely(ret == 0 || ret == -ERESTARTSYS))
2263 * If that failed, try VRAM again, this time evicting
2264 * previous contents.
2267 DRM_INFO("Falling through to VRAM.\n");
2268 ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
2272 static int vmw_validate_buffers(struct vmw_private *dev_priv,
2273 struct vmw_sw_context *sw_context)
2275 struct vmw_validate_buffer *entry;
2278 list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
2279 ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
2280 entry->validate_as_mob);
2281 if (unlikely(ret != 0))
2287 static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
2290 if (likely(sw_context->cmd_bounce_size >= size))
2293 if (sw_context->cmd_bounce_size == 0)
2294 sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
2296 while (sw_context->cmd_bounce_size < size) {
2297 sw_context->cmd_bounce_size =
2298 PAGE_ALIGN(sw_context->cmd_bounce_size +
2299 (sw_context->cmd_bounce_size >> 1));
2302 if (sw_context->cmd_bounce != NULL)
2303 vfree(sw_context->cmd_bounce);
2305 sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
2307 if (sw_context->cmd_bounce == NULL) {
2308 DRM_ERROR("Failed to allocate command bounce buffer.\n");
2309 sw_context->cmd_bounce_size = 0;
2317 * vmw_execbuf_fence_commands - create and submit a command stream fence
2319 * Creates a fence object and submits a command stream marker.
2320 * If this fails for some reason, We sync the fifo and return NULL.
2321 * It is then safe to fence buffers with a NULL pointer.
2323 * If @p_handle is not NULL @file_priv must also not be NULL. Creates
2324 * a userspace handle if @p_handle is not NULL, otherwise not.
2327 int vmw_execbuf_fence_commands(struct drm_file *file_priv,
2328 struct vmw_private *dev_priv,
2329 struct vmw_fence_obj **p_fence,
2334 bool synced = false;
2336 /* p_handle implies file_priv. */
2337 BUG_ON(p_handle != NULL && file_priv == NULL);
2339 ret = vmw_fifo_send_fence(dev_priv, &sequence);
2340 if (unlikely(ret != 0)) {
2341 DRM_ERROR("Fence submission error. Syncing.\n");
2345 if (p_handle != NULL)
2346 ret = vmw_user_fence_create(file_priv, dev_priv->fman,
2347 sequence, p_fence, p_handle);
2349 ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
2351 if (unlikely(ret != 0 && !synced)) {
2352 (void) vmw_fallback_wait(dev_priv, false, false,
2354 VMW_FENCE_WAIT_TIMEOUT);
2362 * vmw_execbuf_copy_fence_user - copy fence object information to
2365 * @dev_priv: Pointer to a vmw_private struct.
2366 * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
2367 * @ret: Return value from fence object creation.
2368 * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
2369 * which the information should be copied.
2370 * @fence: Pointer to the fenc object.
2371 * @fence_handle: User-space fence handle.
2373 * This function copies fence information to user-space. If copying fails,
2374 * The user-space struct drm_vmw_fence_rep::error member is hopefully
2375 * left untouched, and if it's preloaded with an -EFAULT by user-space,
2376 * the error will hopefully be detected.
2377 * Also if copying fails, user-space will be unable to signal the fence
2378 * object so we wait for it immediately, and then unreference the
2379 * user-space reference.
2382 vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
2383 struct vmw_fpriv *vmw_fp,
2385 struct drm_vmw_fence_rep __user *user_fence_rep,
2386 struct vmw_fence_obj *fence,
2387 uint32_t fence_handle)
2389 struct drm_vmw_fence_rep fence_rep;
2391 if (user_fence_rep == NULL)
2394 memset(&fence_rep, 0, sizeof(fence_rep));
2396 fence_rep.error = ret;
2398 BUG_ON(fence == NULL);
2400 fence_rep.handle = fence_handle;
2401 fence_rep.seqno = fence->base.seqno;
2402 vmw_update_seqno(dev_priv, &dev_priv->fifo);
2403 fence_rep.passed_seqno = dev_priv->last_read_seqno;
2407 * copy_to_user errors will be detected by user space not
2408 * seeing fence_rep::error filled in. Typically
2409 * user-space would have pre-set that member to -EFAULT.
2411 ret = copy_to_user(user_fence_rep, &fence_rep,
2415 * User-space lost the fence object. We need to sync
2416 * and unreference the handle.
2418 if (unlikely(ret != 0) && (fence_rep.error == 0)) {
2419 ttm_ref_object_base_unref(vmw_fp->tfile,
2420 fence_handle, TTM_REF_USAGE);
2421 DRM_ERROR("Fence copy error. Syncing.\n");
2422 (void) vmw_fence_obj_wait(fence, false, false,
2423 VMW_FENCE_WAIT_TIMEOUT);
2428 * vmw_execbuf_submit_fifo - Patch a command batch and submit it using
2431 * @dev_priv: Pointer to a device private structure.
2432 * @kernel_commands: Pointer to the unpatched command batch.
2433 * @command_size: Size of the unpatched command batch.
2434 * @sw_context: Structure holding the relocation lists.
2436 * Side effects: If this function returns 0, then the command batch
2437 * pointed to by @kernel_commands will have been modified.
2439 static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv,
2440 void *kernel_commands,
2442 struct vmw_sw_context *sw_context)
2444 void *cmd = vmw_fifo_reserve(dev_priv, command_size);
2447 DRM_ERROR("Failed reserving fifo space for commands.\n");
2451 vmw_apply_relocations(sw_context);
2452 memcpy(cmd, kernel_commands, command_size);
2453 vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
2454 vmw_resource_relocations_free(&sw_context->res_relocations);
2455 vmw_fifo_commit(dev_priv, command_size);
2461 * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using
2462 * the command buffer manager.
2464 * @dev_priv: Pointer to a device private structure.
2465 * @header: Opaque handle to the command buffer allocation.
2466 * @command_size: Size of the unpatched command batch.
2467 * @sw_context: Structure holding the relocation lists.
2469 * Side effects: If this function returns 0, then the command buffer
2470 * represented by @header will have been modified.
2472 static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv,
2473 struct vmw_cmdbuf_header *header,
2475 struct vmw_sw_context *sw_context)
2477 void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size,
2478 SVGA3D_INVALID_ID, false, header);
2480 vmw_apply_relocations(sw_context);
2481 vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
2482 vmw_resource_relocations_free(&sw_context->res_relocations);
2483 vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false);
2489 * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for
2490 * submission using a command buffer.
2492 * @dev_priv: Pointer to a device private structure.
2493 * @user_commands: User-space pointer to the commands to be submitted.
2494 * @command_size: Size of the unpatched command batch.
2495 * @header: Out parameter returning the opaque pointer to the command buffer.
2497 * This function checks whether we can use the command buffer manager for
2498 * submission and if so, creates a command buffer of suitable size and
2499 * copies the user data into that buffer.
2501 * On successful return, the function returns a pointer to the data in the
2502 * command buffer and *@header is set to non-NULL.
2503 * If command buffers could not be used, the function will return the value
2504 * of @kernel_commands on function call. That value may be NULL. In that case,
2505 * the value of *@header will be set to NULL.
2506 * If an error is encountered, the function will return a pointer error value.
2507 * If the function is interrupted by a signal while sleeping, it will return
2508 * -ERESTARTSYS casted to a pointer error value.
2510 void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
2511 void __user *user_commands,
2512 void *kernel_commands,
2514 struct vmw_cmdbuf_header **header)
2520 if (!dev_priv->cman || kernel_commands)
2521 return kernel_commands;
2523 if (command_size > SVGA_CB_MAX_SIZE) {
2524 DRM_ERROR("Command buffer is too large.\n");
2525 return ERR_PTR(-EINVAL);
2528 /* If possible, add a little space for fencing. */
2529 cmdbuf_size = command_size + 512;
2530 cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
2531 kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size,
2533 if (IS_ERR(kernel_commands))
2534 return kernel_commands;
2536 ret = copy_from_user(kernel_commands, user_commands,
2539 DRM_ERROR("Failed copying commands.\n");
2540 vmw_cmdbuf_header_free(*header);
2542 return ERR_PTR(-EFAULT);
2545 return kernel_commands;
2548 int vmw_execbuf_process(struct drm_file *file_priv,
2549 struct vmw_private *dev_priv,
2550 void __user *user_commands,
2551 void *kernel_commands,
2552 uint32_t command_size,
2553 uint64_t throttle_us,
2555 struct drm_vmw_fence_rep __user *user_fence_rep,
2556 struct vmw_fence_obj **out_fence)
2558 struct vmw_sw_context *sw_context = &dev_priv->ctx;
2559 struct vmw_fence_obj *fence = NULL;
2560 struct vmw_resource *error_resource;
2561 struct list_head resource_list;
2562 struct vmw_cmdbuf_header *header;
2563 struct ww_acquire_ctx ticket;
2568 ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
2575 kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands,
2576 kernel_commands, command_size,
2578 if (IS_ERR(kernel_commands))
2579 return PTR_ERR(kernel_commands);
2581 ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
2584 goto out_free_header;
2587 sw_context->kernel = false;
2588 if (kernel_commands == NULL) {
2589 ret = vmw_resize_cmd_bounce(sw_context, command_size);
2590 if (unlikely(ret != 0))
2594 ret = copy_from_user(sw_context->cmd_bounce,
2595 user_commands, command_size);
2597 if (unlikely(ret != 0)) {
2599 DRM_ERROR("Failed copying commands.\n");
2602 kernel_commands = sw_context->cmd_bounce;
2604 sw_context->kernel = true;
2606 sw_context->fp = vmw_fpriv(file_priv);
2607 sw_context->cur_reloc = 0;
2608 sw_context->cur_val_buf = 0;
2609 sw_context->quirks = quirks;
2610 INIT_LIST_HEAD(&sw_context->resource_list);
2611 sw_context->cur_query_bo = dev_priv->pinned_bo;
2612 sw_context->last_query_ctx = NULL;
2613 sw_context->needs_post_query_barrier = false;
2614 memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
2615 INIT_LIST_HEAD(&sw_context->validate_nodes);
2616 INIT_LIST_HEAD(&sw_context->res_relocations);
2617 if (!sw_context->res_ht_initialized) {
2618 ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
2619 if (unlikely(ret != 0))
2621 sw_context->res_ht_initialized = true;
2623 INIT_LIST_HEAD(&sw_context->staged_cmd_res);
2624 INIT_LIST_HEAD(&resource_list);
2625 ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
2627 if (unlikely(ret != 0))
2630 ret = vmw_resources_reserve(sw_context);
2631 if (unlikely(ret != 0))
2634 ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes,
2636 if (unlikely(ret != 0))
2639 ret = vmw_validate_buffers(dev_priv, sw_context);
2640 if (unlikely(ret != 0))
2643 ret = vmw_resources_validate(sw_context);
2644 if (unlikely(ret != 0))
2647 ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
2648 if (unlikely(ret != 0)) {
2653 if (dev_priv->has_mob) {
2654 ret = vmw_rebind_contexts(sw_context);
2655 if (unlikely(ret != 0))
2656 goto out_unlock_binding;
2660 ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands,
2661 command_size, sw_context);
2663 ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size,
2668 goto out_unlock_binding;
2670 vmw_query_bo_switch_commit(dev_priv, sw_context);
2671 ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
2673 (user_fence_rep) ? &handle : NULL);
2675 * This error is harmless, because if fence submission fails,
2676 * vmw_fifo_send_fence will sync. The error will be propagated to
2677 * user-space in @fence_rep
2681 DRM_ERROR("Fence submission error. Syncing.\n");
2683 vmw_resource_list_unreserve(&sw_context->resource_list, false);
2684 mutex_unlock(&dev_priv->binding_mutex);
2686 ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
2689 if (unlikely(dev_priv->pinned_bo != NULL &&
2690 !dev_priv->query_cid_valid))
2691 __vmw_execbuf_release_pinned_bo(dev_priv, fence);
2693 vmw_clear_validations(sw_context);
2694 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
2695 user_fence_rep, fence, handle);
2697 /* Don't unreference when handing fence out */
2698 if (unlikely(out_fence != NULL)) {
2701 } else if (likely(fence != NULL)) {
2702 vmw_fence_obj_unreference(&fence);
2705 list_splice_init(&sw_context->resource_list, &resource_list);
2706 vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
2707 mutex_unlock(&dev_priv->cmdbuf_mutex);
2710 * Unreference resources outside of the cmdbuf_mutex to
2711 * avoid deadlocks in resource destruction paths.
2713 vmw_resource_list_unreference(&resource_list);
2718 mutex_unlock(&dev_priv->binding_mutex);
2720 ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
2722 vmw_resource_list_unreserve(&sw_context->resource_list, true);
2723 vmw_resource_relocations_free(&sw_context->res_relocations);
2724 vmw_free_relocations(sw_context);
2725 vmw_clear_validations(sw_context);
2726 if (unlikely(dev_priv->pinned_bo != NULL &&
2727 !dev_priv->query_cid_valid))
2728 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
2730 list_splice_init(&sw_context->resource_list, &resource_list);
2731 error_resource = sw_context->error_resource;
2732 sw_context->error_resource = NULL;
2733 vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
2734 mutex_unlock(&dev_priv->cmdbuf_mutex);
2737 * Unreference resources outside of the cmdbuf_mutex to
2738 * avoid deadlocks in resource destruction paths.
2740 vmw_resource_list_unreference(&resource_list);
2741 if (unlikely(error_resource != NULL))
2742 vmw_resource_unreference(&error_resource);
2745 vmw_cmdbuf_header_free(header);
2751 * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
2753 * @dev_priv: The device private structure.
2755 * This function is called to idle the fifo and unpin the query buffer
2756 * if the normal way to do this hits an error, which should typically be
2759 static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
2761 DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
2763 (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
2764 vmw_bo_pin(dev_priv->pinned_bo, false);
2765 vmw_bo_pin(dev_priv->dummy_query_bo, false);
2766 dev_priv->dummy_query_bo_pinned = false;
2771 * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
2774 * @dev_priv: The device private structure.
2775 * @fence: If non-NULL should point to a struct vmw_fence_obj issued
2776 * _after_ a query barrier that flushes all queries touching the current
2777 * buffer pointed to by @dev_priv->pinned_bo
2779 * This function should be used to unpin the pinned query bo, or
2780 * as a query barrier when we need to make sure that all queries have
2781 * finished before the next fifo command. (For example on hardware
2782 * context destructions where the hardware may otherwise leak unfinished
2785 * This function does not return any failure codes, but make attempts
2786 * to do safe unpinning in case of errors.
2788 * The function will synchronize on the previous query barrier, and will
2789 * thus not finish until that barrier has executed.
2791 * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
2792 * before calling this function.
2794 void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
2795 struct vmw_fence_obj *fence)
2798 struct list_head validate_list;
2799 struct ttm_validate_buffer pinned_val, query_val;
2800 struct vmw_fence_obj *lfence = NULL;
2801 struct ww_acquire_ctx ticket;
2803 if (dev_priv->pinned_bo == NULL)
2806 INIT_LIST_HEAD(&validate_list);
2808 pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
2809 pinned_val.shared = false;
2810 list_add_tail(&pinned_val.head, &validate_list);
2812 query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
2813 query_val.shared = false;
2814 list_add_tail(&query_val.head, &validate_list);
2816 ret = ttm_eu_reserve_buffers(&ticket, &validate_list,
2818 if (unlikely(ret != 0)) {
2819 vmw_execbuf_unpin_panic(dev_priv);
2820 goto out_no_reserve;
2823 if (dev_priv->query_cid_valid) {
2824 BUG_ON(fence != NULL);
2825 ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
2826 if (unlikely(ret != 0)) {
2827 vmw_execbuf_unpin_panic(dev_priv);
2830 dev_priv->query_cid_valid = false;
2833 vmw_bo_pin(dev_priv->pinned_bo, false);
2834 vmw_bo_pin(dev_priv->dummy_query_bo, false);
2835 dev_priv->dummy_query_bo_pinned = false;
2837 if (fence == NULL) {
2838 (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
2842 ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
2844 vmw_fence_obj_unreference(&lfence);
2846 ttm_bo_unref(&query_val.bo);
2847 ttm_bo_unref(&pinned_val.bo);
2848 ttm_bo_unref(&dev_priv->pinned_bo);
2854 ttm_eu_backoff_reservation(&ticket, &validate_list);
2856 ttm_bo_unref(&query_val.bo);
2857 ttm_bo_unref(&pinned_val.bo);
2858 ttm_bo_unref(&dev_priv->pinned_bo);
2862 * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
2865 * @dev_priv: The device private structure.
2867 * This function should be used to unpin the pinned query bo, or
2868 * as a query barrier when we need to make sure that all queries have
2869 * finished before the next fifo command. (For example on hardware
2870 * context destructions where the hardware may otherwise leak unfinished
2873 * This function does not return any failure codes, but make attempts
2874 * to do safe unpinning in case of errors.
2876 * The function will synchronize on the previous query barrier, and will
2877 * thus not finish until that barrier has executed.
2879 void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
2881 mutex_lock(&dev_priv->cmdbuf_mutex);
2882 if (dev_priv->query_cid_valid)
2883 __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
2884 mutex_unlock(&dev_priv->cmdbuf_mutex);
2888 int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
2889 struct drm_file *file_priv)
2891 struct vmw_private *dev_priv = vmw_priv(dev);
2892 struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
2896 * This will allow us to extend the ioctl argument while
2897 * maintaining backwards compatibility:
2898 * We take different code paths depending on the value of
2902 if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
2903 DRM_ERROR("Incorrect execbuf version.\n");
2904 DRM_ERROR("You're running outdated experimental "
2905 "vmwgfx user-space drivers.");
2909 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2910 if (unlikely(ret != 0))
2913 ret = vmw_execbuf_process(file_priv, dev_priv,
2914 (void __user *)(unsigned long)arg->commands,
2915 NULL, arg->command_size, arg->throttle_us,
2917 (void __user *)(unsigned long)arg->fence_rep,
2919 ttm_read_unlock(&dev_priv->reservation_sem);
2920 if (unlikely(ret != 0))
2923 vmw_kms_cursor_post_execbuf(dev_priv);