2 * Copyright (C) 2015 Broadcom
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
10 * DOC: VC4 plane module
12 * Each DRM plane is a layer of pixels being scanned out by the HVS.
14 * At atomic modeset check time, we compute the HVS display element
15 * state that would be necessary for displaying the plane (giving us a
16 * chance to figure out if a plane configuration is invalid), then at
17 * atomic flush time the CRTC will ask us to write our element state
18 * into the region of the HVS that it has allocated for us.
23 #include "drm_atomic_helper.h"
24 #include "drm_fb_cma_helper.h"
25 #include "drm_plane_helper.h"
27 struct vc4_plane_state {
28 struct drm_plane_state base;
30 u32 dlist_size; /* Number of dwords in allocated for the display list */
31 u32 dlist_count; /* Number of used dwords in the display list. */
34 static inline struct vc4_plane_state *
35 to_vc4_plane_state(struct drm_plane_state *state)
37 return (struct vc4_plane_state *)state;
40 static const struct hvs_format {
41 u32 drm; /* DRM_FORMAT_* */
42 u32 hvs; /* HVS_FORMAT_* */
47 .drm = DRM_FORMAT_XRGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
48 .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = false,
51 .drm = DRM_FORMAT_ARGB8888, .hvs = HVS_PIXEL_FORMAT_RGBA8888,
52 .pixel_order = HVS_PIXEL_ORDER_ABGR, .has_alpha = true,
56 static const struct hvs_format *vc4_get_hvs_format(u32 drm_format)
60 for (i = 0; i < ARRAY_SIZE(hvs_formats); i++) {
61 if (hvs_formats[i].drm == drm_format)
62 return &hvs_formats[i];
68 static bool plane_enabled(struct drm_plane_state *state)
70 return state->fb && state->crtc;
73 struct drm_plane_state *vc4_plane_duplicate_state(struct drm_plane *plane)
75 struct vc4_plane_state *vc4_state;
77 if (WARN_ON(!plane->state))
80 vc4_state = kmemdup(plane->state, sizeof(*vc4_state), GFP_KERNEL);
84 __drm_atomic_helper_plane_duplicate_state(plane, &vc4_state->base);
86 if (vc4_state->dlist) {
87 vc4_state->dlist = kmemdup(vc4_state->dlist,
88 vc4_state->dlist_count * 4,
90 if (!vc4_state->dlist) {
94 vc4_state->dlist_size = vc4_state->dlist_count;
97 return &vc4_state->base;
100 void vc4_plane_destroy_state(struct drm_plane *plane,
101 struct drm_plane_state *state)
103 struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
105 kfree(vc4_state->dlist);
106 __drm_atomic_helper_plane_destroy_state(plane, &vc4_state->base);
110 /* Called during init to allocate the plane's atomic state. */
111 void vc4_plane_reset(struct drm_plane *plane)
113 struct vc4_plane_state *vc4_state;
115 WARN_ON(plane->state);
117 vc4_state = kzalloc(sizeof(*vc4_state), GFP_KERNEL);
121 plane->state = &vc4_state->base;
122 vc4_state->base.plane = plane;
125 static void vc4_dlist_write(struct vc4_plane_state *vc4_state, u32 val)
127 if (vc4_state->dlist_count == vc4_state->dlist_size) {
128 u32 new_size = max(4u, vc4_state->dlist_count * 2);
129 u32 *new_dlist = kmalloc(new_size * 4, GFP_KERNEL);
133 memcpy(new_dlist, vc4_state->dlist, vc4_state->dlist_count * 4);
135 kfree(vc4_state->dlist);
136 vc4_state->dlist = new_dlist;
137 vc4_state->dlist_size = new_size;
140 vc4_state->dlist[vc4_state->dlist_count++] = val;
143 /* Writes out a full display list for an active plane to the plane's
144 * private dlist state.
146 static int vc4_plane_mode_set(struct drm_plane *plane,
147 struct drm_plane_state *state)
149 struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
150 struct drm_framebuffer *fb = state->fb;
151 struct drm_gem_cma_object *bo = drm_fb_cma_get_gem_obj(fb, 0);
152 u32 ctl0_offset = vc4_state->dlist_count;
153 const struct hvs_format *format = vc4_get_hvs_format(fb->pixel_format);
154 uint32_t offset = fb->offsets[0];
155 int crtc_x = state->crtc_x;
156 int crtc_y = state->crtc_y;
157 int crtc_w = state->crtc_w;
158 int crtc_h = state->crtc_h;
161 offset += drm_format_plane_cpp(fb->pixel_format, 0) * -crtc_x;
167 offset += fb->pitches[0] * -crtc_y;
172 vc4_dlist_write(vc4_state,
174 (format->pixel_order << SCALER_CTL0_ORDER_SHIFT) |
175 (format->hvs << SCALER_CTL0_PIXEL_FORMAT_SHIFT) |
178 /* Position Word 0: Image Positions and Alpha Value */
179 vc4_dlist_write(vc4_state,
180 VC4_SET_FIELD(0xff, SCALER_POS0_FIXED_ALPHA) |
181 VC4_SET_FIELD(crtc_x, SCALER_POS0_START_X) |
182 VC4_SET_FIELD(crtc_y, SCALER_POS0_START_Y));
184 /* Position Word 1: Scaled Image Dimensions.
185 * Skipped due to SCALER_CTL0_UNITY scaling.
188 /* Position Word 2: Source Image Size, Alpha Mode */
189 vc4_dlist_write(vc4_state,
190 VC4_SET_FIELD(format->has_alpha ?
191 SCALER_POS2_ALPHA_MODE_PIPELINE :
192 SCALER_POS2_ALPHA_MODE_FIXED,
193 SCALER_POS2_ALPHA_MODE) |
194 VC4_SET_FIELD(crtc_w, SCALER_POS2_WIDTH) |
195 VC4_SET_FIELD(crtc_h, SCALER_POS2_HEIGHT));
197 /* Position Word 3: Context. Written by the HVS. */
198 vc4_dlist_write(vc4_state, 0xc0c0c0c0);
200 /* Pointer Word 0: RGB / Y Pointer */
201 vc4_dlist_write(vc4_state, bo->paddr + offset);
203 /* Pointer Context Word 0: Written by the HVS */
204 vc4_dlist_write(vc4_state, 0xc0c0c0c0);
206 /* Pitch word 0: Pointer 0 Pitch */
207 vc4_dlist_write(vc4_state,
208 VC4_SET_FIELD(fb->pitches[0], SCALER_SRC_PITCH));
210 vc4_state->dlist[ctl0_offset] |=
211 VC4_SET_FIELD(vc4_state->dlist_count, SCALER_CTL0_SIZE);
216 /* If a modeset involves changing the setup of a plane, the atomic
217 * infrastructure will call this to validate a proposed plane setup.
218 * However, if a plane isn't getting updated, this (and the
219 * corresponding vc4_plane_atomic_update) won't get called. Thus, we
220 * compute the dlist here and have all active plane dlists get updated
221 * in the CRTC's flush.
223 static int vc4_plane_atomic_check(struct drm_plane *plane,
224 struct drm_plane_state *state)
226 struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
228 vc4_state->dlist_count = 0;
230 if (plane_enabled(state))
231 return vc4_plane_mode_set(plane, state);
236 static void vc4_plane_atomic_update(struct drm_plane *plane,
237 struct drm_plane_state *old_state)
239 /* No contents here. Since we don't know where in the CRTC's
240 * dlist we should be stored, our dlist is uploaded to the
241 * hardware with vc4_plane_write_dlist() at CRTC atomic_flush
246 u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist)
248 struct vc4_plane_state *vc4_state = to_vc4_plane_state(plane->state);
251 /* Can't memcpy_toio() because it needs to be 32-bit writes. */
252 for (i = 0; i < vc4_state->dlist_count; i++)
253 writel(vc4_state->dlist[i], &dlist[i]);
255 return vc4_state->dlist_count;
258 u32 vc4_plane_dlist_size(struct drm_plane_state *state)
260 struct vc4_plane_state *vc4_state = to_vc4_plane_state(state);
262 return vc4_state->dlist_count;
265 static const struct drm_plane_helper_funcs vc4_plane_helper_funcs = {
268 .atomic_check = vc4_plane_atomic_check,
269 .atomic_update = vc4_plane_atomic_update,
272 static void vc4_plane_destroy(struct drm_plane *plane)
274 drm_plane_helper_disable(plane);
275 drm_plane_cleanup(plane);
278 static const struct drm_plane_funcs vc4_plane_funcs = {
279 .update_plane = drm_atomic_helper_update_plane,
280 .disable_plane = drm_atomic_helper_disable_plane,
281 .destroy = vc4_plane_destroy,
282 .set_property = NULL,
283 .reset = vc4_plane_reset,
284 .atomic_duplicate_state = vc4_plane_duplicate_state,
285 .atomic_destroy_state = vc4_plane_destroy_state,
288 struct drm_plane *vc4_plane_init(struct drm_device *dev,
289 enum drm_plane_type type)
291 struct drm_plane *plane = NULL;
292 struct vc4_plane *vc4_plane;
293 u32 formats[ARRAY_SIZE(hvs_formats)];
297 vc4_plane = devm_kzalloc(dev->dev, sizeof(*vc4_plane),
304 for (i = 0; i < ARRAY_SIZE(hvs_formats); i++)
305 formats[i] = hvs_formats[i].drm;
306 plane = &vc4_plane->base;
307 ret = drm_universal_plane_init(dev, plane, 0xff,
309 formats, ARRAY_SIZE(formats),
312 drm_plane_helper_add(plane, &vc4_plane_helper_funcs);
317 vc4_plane_destroy(plane);