1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright 2012-2019 Red Hat
5 * This file is subject to the terms and conditions of the GNU General
6 * Public License version 2. See the file COPYING in the main
7 * directory of this archive for more details.
9 * Authors: Matthew Garrett
13 * Portions of this code derived from cirrusfb.c:
14 * drivers/video/cirrusfb.c - driver for Cirrus Logic chipsets
16 * Copyright 1999-2001 Jeff Garzik <jgarzik@pobox.com>
19 #include <linux/iosys-map.h>
20 #include <linux/module.h>
21 #include <linux/pci.h>
23 #include <video/cirrus.h>
24 #include <video/vga.h>
26 #include <drm/drm_aperture.h>
27 #include <drm/drm_atomic_helper.h>
28 #include <drm/drm_atomic_state_helper.h>
29 #include <drm/drm_connector.h>
30 #include <drm/drm_damage_helper.h>
31 #include <drm/drm_drv.h>
32 #include <drm/drm_edid.h>
33 #include <drm/drm_fbdev_generic.h>
34 #include <drm/drm_file.h>
35 #include <drm/drm_format_helper.h>
36 #include <drm/drm_fourcc.h>
37 #include <drm/drm_framebuffer.h>
38 #include <drm/drm_gem_atomic_helper.h>
39 #include <drm/drm_gem_framebuffer_helper.h>
40 #include <drm/drm_gem_shmem_helper.h>
41 #include <drm/drm_ioctl.h>
42 #include <drm/drm_managed.h>
43 #include <drm/drm_modeset_helper_vtables.h>
44 #include <drm/drm_module.h>
45 #include <drm/drm_probe_helper.h>
46 #include <drm/drm_simple_kms_helper.h>
48 #define DRIVER_NAME "cirrus"
49 #define DRIVER_DESC "qemu cirrus vga"
50 #define DRIVER_DATE "2019"
51 #define DRIVER_MAJOR 2
52 #define DRIVER_MINOR 0
54 #define CIRRUS_MAX_PITCH (0x1FF << 3) /* (4096 - 1) & ~111b bytes */
55 #define CIRRUS_VRAM_SIZE (4 * 1024 * 1024) /* 4 MB */
57 struct cirrus_device {
58 struct drm_device dev;
59 struct drm_simple_display_pipe pipe;
60 struct drm_connector conn;
67 #define to_cirrus(_dev) container_of(_dev, struct cirrus_device, dev)
69 /* ------------------------------------------------------------------ */
71 * The meat of this driver. The core passes us a mode and we have to program
72 * it. The modesetting here is the bare minimum required to satisfy the qemu
73 * emulation of this hardware, and running this against a real device is
74 * likely to result in an inadequately programmed mode. We've already had
75 * the opportunity to modify the mode, so whatever we receive here should
76 * be something that can be correctly programmed and displayed
82 static u8 rreg_seq(struct cirrus_device *cirrus, u8 reg)
84 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
85 return ioread8(cirrus->mmio + SEQ_DATA);
88 static void wreg_seq(struct cirrus_device *cirrus, u8 reg, u8 val)
90 iowrite8(reg, cirrus->mmio + SEQ_INDEX);
91 iowrite8(val, cirrus->mmio + SEQ_DATA);
94 #define CRT_INDEX 0x14
97 static u8 rreg_crt(struct cirrus_device *cirrus, u8 reg)
99 iowrite8(reg, cirrus->mmio + CRT_INDEX);
100 return ioread8(cirrus->mmio + CRT_DATA);
103 static void wreg_crt(struct cirrus_device *cirrus, u8 reg, u8 val)
105 iowrite8(reg, cirrus->mmio + CRT_INDEX);
106 iowrite8(val, cirrus->mmio + CRT_DATA);
109 #define GFX_INDEX 0xe
112 static void wreg_gfx(struct cirrus_device *cirrus, u8 reg, u8 val)
114 iowrite8(reg, cirrus->mmio + GFX_INDEX);
115 iowrite8(val, cirrus->mmio + GFX_DATA);
118 #define VGA_DAC_MASK 0x06
120 static void wreg_hdr(struct cirrus_device *cirrus, u8 val)
122 ioread8(cirrus->mmio + VGA_DAC_MASK);
123 ioread8(cirrus->mmio + VGA_DAC_MASK);
124 ioread8(cirrus->mmio + VGA_DAC_MASK);
125 ioread8(cirrus->mmio + VGA_DAC_MASK);
126 iowrite8(val, cirrus->mmio + VGA_DAC_MASK);
129 static int cirrus_convert_to(struct drm_framebuffer *fb)
131 if (fb->format->cpp[0] == 4 && fb->pitches[0] > CIRRUS_MAX_PITCH) {
132 if (fb->width * 3 <= CIRRUS_MAX_PITCH)
133 /* convert from XR24 to RG24 */
136 /* convert from XR24 to RG16 */
142 static int cirrus_cpp(struct drm_framebuffer *fb)
144 int convert_cpp = cirrus_convert_to(fb);
148 return fb->format->cpp[0];
151 static int cirrus_pitch(struct drm_framebuffer *fb)
153 int convert_cpp = cirrus_convert_to(fb);
156 return convert_cpp * fb->width;
157 return fb->pitches[0];
160 static void cirrus_set_start_address(struct cirrus_device *cirrus, u32 offset)
166 if (!drm_dev_enter(&cirrus->dev, &idx))
170 wreg_crt(cirrus, 0x0c, (u8)((addr >> 8) & 0xff));
171 wreg_crt(cirrus, 0x0d, (u8)(addr & 0xff));
173 tmp = rreg_crt(cirrus, 0x1b);
175 tmp |= (addr >> 16) & 0x01;
176 tmp |= (addr >> 15) & 0x0c;
177 wreg_crt(cirrus, 0x1b, tmp);
179 tmp = rreg_crt(cirrus, 0x1d);
181 tmp |= (addr >> 12) & 0x80;
182 wreg_crt(cirrus, 0x1d, tmp);
187 static int cirrus_mode_set(struct cirrus_device *cirrus,
188 struct drm_display_mode *mode,
189 struct drm_framebuffer *fb)
191 int hsyncstart, hsyncend, htotal, hdispend;
192 int vtotal, vdispend;
194 int sr07 = 0, hdr = 0;
196 if (!drm_dev_enter(&cirrus->dev, &idx))
199 htotal = mode->htotal / 8;
200 hsyncend = mode->hsync_end / 8;
201 hsyncstart = mode->hsync_start / 8;
202 hdispend = mode->hdisplay / 8;
204 vtotal = mode->vtotal;
205 vdispend = mode->vdisplay;
215 wreg_crt(cirrus, VGA_CRTC_V_SYNC_END, 0x20);
216 wreg_crt(cirrus, VGA_CRTC_H_TOTAL, htotal);
217 wreg_crt(cirrus, VGA_CRTC_H_DISP, hdispend);
218 wreg_crt(cirrus, VGA_CRTC_H_SYNC_START, hsyncstart);
219 wreg_crt(cirrus, VGA_CRTC_H_SYNC_END, hsyncend);
220 wreg_crt(cirrus, VGA_CRTC_V_TOTAL, vtotal & 0xff);
221 wreg_crt(cirrus, VGA_CRTC_V_DISP_END, vdispend & 0xff);
224 if ((vdispend + 1) & 512)
226 wreg_crt(cirrus, VGA_CRTC_MAX_SCAN, tmp);
229 * Overflow bits for values that don't fit in the standard registers
234 if (vdispend & 0x100)
236 if ((vdispend + 1) & 0x100)
240 if (vdispend & 0x200)
242 wreg_crt(cirrus, VGA_CRTC_OVERFLOW, tmp);
246 /* More overflow bits */
248 if ((htotal + 5) & 0x40)
250 if ((htotal + 5) & 0x80)
257 wreg_crt(cirrus, CL_CRT1A, tmp);
259 /* Disable Hercules/CGA compatibility */
260 wreg_crt(cirrus, VGA_CRTC_MODE, 0x03);
262 sr07 = rreg_seq(cirrus, 0x07);
266 cirrus->cpp = cirrus_cpp(fb);
267 switch (cirrus->cpp * 8) {
288 wreg_seq(cirrus, 0x7, sr07);
290 /* Program the pitch */
291 cirrus->pitch = cirrus_pitch(fb);
292 tmp = cirrus->pitch / 8;
293 wreg_crt(cirrus, VGA_CRTC_OFFSET, tmp);
295 /* Enable extended blanking and pitch bits, and enable full memory */
297 tmp |= (cirrus->pitch >> 7) & 0x10;
298 tmp |= (cirrus->pitch >> 6) & 0x40;
299 wreg_crt(cirrus, 0x1b, tmp);
301 /* Enable high-colour modes */
302 wreg_gfx(cirrus, VGA_GFX_MODE, 0x40);
304 /* And set graphics mode */
305 wreg_gfx(cirrus, VGA_GFX_MISC, 0x01);
307 wreg_hdr(cirrus, hdr);
309 cirrus_set_start_address(cirrus, 0);
311 /* Unblank (needed on S3 resume, vgabios doesn't do it then) */
318 static int cirrus_fb_blit_rect(struct drm_framebuffer *fb,
319 const struct iosys_map *vmap,
320 struct drm_rect *rect)
322 struct cirrus_device *cirrus = to_cirrus(fb->dev);
323 struct iosys_map dst;
326 if (!drm_dev_enter(&cirrus->dev, &idx))
329 iosys_map_set_vaddr_iomem(&dst, cirrus->vram);
331 if (cirrus->cpp == fb->format->cpp[0]) {
332 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, rect));
333 drm_fb_memcpy(&dst, fb->pitches, vmap, fb, rect);
335 } else if (fb->format->cpp[0] == 4 && cirrus->cpp == 2) {
336 iosys_map_incr(&dst, drm_fb_clip_offset(cirrus->pitch, fb->format, rect));
337 drm_fb_xrgb8888_to_rgb565(&dst, &cirrus->pitch, vmap, fb, rect, false);
339 } else if (fb->format->cpp[0] == 4 && cirrus->cpp == 3) {
340 iosys_map_incr(&dst, drm_fb_clip_offset(cirrus->pitch, fb->format, rect));
341 drm_fb_xrgb8888_to_rgb888(&dst, &cirrus->pitch, vmap, fb, rect);
344 WARN_ON_ONCE("cpp mismatch");
352 static int cirrus_fb_blit_fullscreen(struct drm_framebuffer *fb,
353 const struct iosys_map *map)
355 struct drm_rect fullscreen = {
361 return cirrus_fb_blit_rect(fb, map, &fullscreen);
364 static int cirrus_check_size(int width, int height,
365 struct drm_framebuffer *fb)
367 int pitch = width * 2;
370 pitch = cirrus_pitch(fb);
372 if (pitch > CIRRUS_MAX_PITCH)
374 if (pitch * height > CIRRUS_VRAM_SIZE)
379 /* ------------------------------------------------------------------ */
380 /* cirrus connector */
382 static int cirrus_conn_get_modes(struct drm_connector *conn)
386 count = drm_add_modes_noedid(conn,
387 conn->dev->mode_config.max_width,
388 conn->dev->mode_config.max_height);
389 drm_set_preferred_mode(conn, 1024, 768);
393 static const struct drm_connector_helper_funcs cirrus_conn_helper_funcs = {
394 .get_modes = cirrus_conn_get_modes,
397 static const struct drm_connector_funcs cirrus_conn_funcs = {
398 .fill_modes = drm_helper_probe_single_connector_modes,
399 .destroy = drm_connector_cleanup,
400 .reset = drm_atomic_helper_connector_reset,
401 .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
402 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
405 static int cirrus_conn_init(struct cirrus_device *cirrus)
407 drm_connector_helper_add(&cirrus->conn, &cirrus_conn_helper_funcs);
408 return drm_connector_init(&cirrus->dev, &cirrus->conn,
409 &cirrus_conn_funcs, DRM_MODE_CONNECTOR_VGA);
413 /* ------------------------------------------------------------------ */
414 /* cirrus (simple) display pipe */
416 static enum drm_mode_status cirrus_pipe_mode_valid(struct drm_simple_display_pipe *pipe,
417 const struct drm_display_mode *mode)
419 if (cirrus_check_size(mode->hdisplay, mode->vdisplay, NULL) < 0)
424 static int cirrus_pipe_check(struct drm_simple_display_pipe *pipe,
425 struct drm_plane_state *plane_state,
426 struct drm_crtc_state *crtc_state)
428 struct drm_framebuffer *fb = plane_state->fb;
432 return cirrus_check_size(fb->width, fb->height, fb);
435 static void cirrus_pipe_enable(struct drm_simple_display_pipe *pipe,
436 struct drm_crtc_state *crtc_state,
437 struct drm_plane_state *plane_state)
439 struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev);
440 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
442 cirrus_mode_set(cirrus, &crtc_state->mode, plane_state->fb);
443 cirrus_fb_blit_fullscreen(plane_state->fb, &shadow_plane_state->data[0]);
446 static void cirrus_pipe_update(struct drm_simple_display_pipe *pipe,
447 struct drm_plane_state *old_state)
449 struct cirrus_device *cirrus = to_cirrus(pipe->crtc.dev);
450 struct drm_plane_state *state = pipe->plane.state;
451 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(state);
452 struct drm_crtc *crtc = &pipe->crtc;
453 struct drm_rect rect;
455 if (state->fb && cirrus->cpp != cirrus_cpp(state->fb))
456 cirrus_mode_set(cirrus, &crtc->mode, state->fb);
458 if (drm_atomic_helper_damage_merged(old_state, state, &rect))
459 cirrus_fb_blit_rect(state->fb, &shadow_plane_state->data[0], &rect);
462 static const struct drm_simple_display_pipe_funcs cirrus_pipe_funcs = {
463 .mode_valid = cirrus_pipe_mode_valid,
464 .check = cirrus_pipe_check,
465 .enable = cirrus_pipe_enable,
466 .update = cirrus_pipe_update,
467 DRM_GEM_SIMPLE_DISPLAY_PIPE_SHADOW_PLANE_FUNCS,
470 static const uint32_t cirrus_formats[] = {
476 static const uint64_t cirrus_modifiers[] = {
477 DRM_FORMAT_MOD_LINEAR,
478 DRM_FORMAT_MOD_INVALID
481 static int cirrus_pipe_init(struct cirrus_device *cirrus)
483 return drm_simple_display_pipe_init(&cirrus->dev,
487 ARRAY_SIZE(cirrus_formats),
492 /* ------------------------------------------------------------------ */
493 /* cirrus framebuffers & mode config */
495 static struct drm_framebuffer*
496 cirrus_fb_create(struct drm_device *dev, struct drm_file *file_priv,
497 const struct drm_mode_fb_cmd2 *mode_cmd)
499 if (mode_cmd->pixel_format != DRM_FORMAT_RGB565 &&
500 mode_cmd->pixel_format != DRM_FORMAT_RGB888 &&
501 mode_cmd->pixel_format != DRM_FORMAT_XRGB8888)
502 return ERR_PTR(-EINVAL);
503 if (cirrus_check_size(mode_cmd->width, mode_cmd->height, NULL) < 0)
504 return ERR_PTR(-EINVAL);
505 return drm_gem_fb_create_with_dirty(dev, file_priv, mode_cmd);
508 static const struct drm_mode_config_funcs cirrus_mode_config_funcs = {
509 .fb_create = cirrus_fb_create,
510 .atomic_check = drm_atomic_helper_check,
511 .atomic_commit = drm_atomic_helper_commit,
514 static int cirrus_mode_config_init(struct cirrus_device *cirrus)
516 struct drm_device *dev = &cirrus->dev;
519 ret = drmm_mode_config_init(dev);
523 dev->mode_config.min_width = 0;
524 dev->mode_config.min_height = 0;
525 dev->mode_config.max_width = CIRRUS_MAX_PITCH / 2;
526 dev->mode_config.max_height = 1024;
527 dev->mode_config.preferred_depth = 16;
528 dev->mode_config.prefer_shadow = 0;
529 dev->mode_config.funcs = &cirrus_mode_config_funcs;
534 /* ------------------------------------------------------------------ */
536 DEFINE_DRM_GEM_FOPS(cirrus_fops);
538 static const struct drm_driver cirrus_driver = {
539 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_ATOMIC,
544 .major = DRIVER_MAJOR,
545 .minor = DRIVER_MINOR,
547 .fops = &cirrus_fops,
548 DRM_GEM_SHMEM_DRIVER_OPS,
551 static int cirrus_pci_probe(struct pci_dev *pdev,
552 const struct pci_device_id *ent)
554 struct drm_device *dev;
555 struct cirrus_device *cirrus;
558 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &cirrus_driver);
562 ret = pcim_enable_device(pdev);
566 ret = pci_request_regions(pdev, DRIVER_NAME);
571 cirrus = devm_drm_dev_alloc(&pdev->dev, &cirrus_driver,
572 struct cirrus_device, dev);
574 return PTR_ERR(cirrus);
578 cirrus->vram = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 0),
579 pci_resource_len(pdev, 0));
580 if (cirrus->vram == NULL)
583 cirrus->mmio = devm_ioremap(&pdev->dev, pci_resource_start(pdev, 1),
584 pci_resource_len(pdev, 1));
585 if (cirrus->mmio == NULL)
588 ret = cirrus_mode_config_init(cirrus);
592 ret = cirrus_conn_init(cirrus);
596 ret = cirrus_pipe_init(cirrus);
600 drm_mode_config_reset(dev);
602 pci_set_drvdata(pdev, dev);
603 ret = drm_dev_register(dev, 0);
607 drm_fbdev_generic_setup(dev, 16);
611 static void cirrus_pci_remove(struct pci_dev *pdev)
613 struct drm_device *dev = pci_get_drvdata(pdev);
616 drm_atomic_helper_shutdown(dev);
619 static const struct pci_device_id pciidlist[] = {
621 .vendor = PCI_VENDOR_ID_CIRRUS,
622 .device = PCI_DEVICE_ID_CIRRUS_5446,
623 /* only bind to the cirrus chip in qemu */
624 .subvendor = PCI_SUBVENDOR_ID_REDHAT_QUMRANET,
625 .subdevice = PCI_SUBDEVICE_ID_QEMU,
627 .vendor = PCI_VENDOR_ID_CIRRUS,
628 .device = PCI_DEVICE_ID_CIRRUS_5446,
629 .subvendor = PCI_VENDOR_ID_XEN,
632 { /* end if list */ }
635 static struct pci_driver cirrus_pci_driver = {
637 .id_table = pciidlist,
638 .probe = cirrus_pci_probe,
639 .remove = cirrus_pci_remove,
642 drm_module_pci_driver(cirrus_pci_driver)
644 MODULE_DEVICE_TABLE(pci, pciidlist);
645 MODULE_LICENSE("GPL");