2 * Copyright (C) 2012 Avionic Design GmbH
3 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
10 #include <linux/bitops.h>
11 #include <linux/host1x.h>
12 #include <linux/idr.h>
13 #include <linux/iommu.h>
15 #include <drm/drm_atomic.h>
16 #include <drm/drm_atomic_helper.h>
21 #define DRIVER_NAME "tegra"
22 #define DRIVER_DESC "NVIDIA Tegra graphics"
23 #define DRIVER_DATE "20120330"
24 #define DRIVER_MAJOR 0
25 #define DRIVER_MINOR 0
26 #define DRIVER_PATCHLEVEL 0
28 #define CARVEOUT_SZ SZ_64M
29 #define CDMA_GATHER_FETCHES_MAX_NB 16383
31 struct tegra_drm_file {
36 static int tegra_atomic_check(struct drm_device *drm,
37 struct drm_atomic_state *state)
41 err = drm_atomic_helper_check_modeset(drm, state);
45 err = tegra_display_hub_atomic_check(drm, state);
49 err = drm_atomic_normalize_zpos(drm, state);
53 err = drm_atomic_helper_check_planes(drm, state);
57 if (state->legacy_cursor_update)
58 state->async_update = !drm_atomic_helper_async_check(drm, state);
63 static const struct drm_mode_config_funcs tegra_drm_mode_config_funcs = {
64 .fb_create = tegra_fb_create,
65 #ifdef CONFIG_DRM_FBDEV_EMULATION
66 .output_poll_changed = drm_fb_helper_output_poll_changed,
68 .atomic_check = tegra_atomic_check,
69 .atomic_commit = drm_atomic_helper_commit,
72 static void tegra_atomic_commit_tail(struct drm_atomic_state *old_state)
74 struct drm_device *drm = old_state->dev;
75 struct tegra_drm *tegra = drm->dev_private;
78 drm_atomic_helper_commit_modeset_disables(drm, old_state);
79 tegra_display_hub_atomic_commit(drm, old_state);
80 drm_atomic_helper_commit_planes(drm, old_state, 0);
81 drm_atomic_helper_commit_modeset_enables(drm, old_state);
82 drm_atomic_helper_commit_hw_done(old_state);
83 drm_atomic_helper_wait_for_vblanks(drm, old_state);
84 drm_atomic_helper_cleanup_planes(drm, old_state);
86 drm_atomic_helper_commit_tail_rpm(old_state);
90 static const struct drm_mode_config_helper_funcs
91 tegra_drm_mode_config_helpers = {
92 .atomic_commit_tail = tegra_atomic_commit_tail,
95 static int tegra_drm_load(struct drm_device *drm, unsigned long flags)
97 struct host1x_device *device = to_host1x_device(drm->dev);
98 struct tegra_drm *tegra;
101 tegra = kzalloc(sizeof(*tegra), GFP_KERNEL);
105 if (iommu_present(&platform_bus_type)) {
106 u64 carveout_start, carveout_end, gem_start, gem_end;
107 struct iommu_domain_geometry *geometry;
110 tegra->domain = iommu_domain_alloc(&platform_bus_type);
111 if (!tegra->domain) {
116 geometry = &tegra->domain->geometry;
117 gem_start = geometry->aperture_start;
118 gem_end = geometry->aperture_end - CARVEOUT_SZ;
119 carveout_start = gem_end + 1;
120 carveout_end = geometry->aperture_end;
122 order = __ffs(tegra->domain->pgsize_bitmap);
123 init_iova_domain(&tegra->carveout.domain, 1UL << order,
124 carveout_start >> order);
126 tegra->carveout.shift = iova_shift(&tegra->carveout.domain);
127 tegra->carveout.limit = carveout_end >> tegra->carveout.shift;
129 drm_mm_init(&tegra->mm, gem_start, gem_end - gem_start + 1);
130 mutex_init(&tegra->mm_lock);
132 DRM_DEBUG("IOMMU apertures:\n");
133 DRM_DEBUG(" GEM: %#llx-%#llx\n", gem_start, gem_end);
134 DRM_DEBUG(" Carveout: %#llx-%#llx\n", carveout_start,
138 mutex_init(&tegra->clients_lock);
139 INIT_LIST_HEAD(&tegra->clients);
141 drm->dev_private = tegra;
144 drm_mode_config_init(drm);
146 drm->mode_config.min_width = 0;
147 drm->mode_config.min_height = 0;
149 drm->mode_config.max_width = 4096;
150 drm->mode_config.max_height = 4096;
152 drm->mode_config.allow_fb_modifiers = true;
154 drm->mode_config.funcs = &tegra_drm_mode_config_funcs;
155 drm->mode_config.helper_private = &tegra_drm_mode_config_helpers;
157 err = tegra_drm_fb_prepare(drm);
161 drm_kms_helper_poll_init(drm);
163 err = host1x_device_init(device);
168 err = tegra_display_hub_prepare(tegra->hub);
174 * We don't use the drm_irq_install() helpers provided by the DRM
175 * core, so we need to set this manually in order to allow the
176 * DRM_IOCTL_WAIT_VBLANK to operate correctly.
178 drm->irq_enabled = true;
180 /* syncpoints are used for full 32-bit hardware VBLANK counters */
181 drm->max_vblank_count = 0xffffffff;
183 err = drm_vblank_init(drm, drm->mode_config.num_crtc);
187 drm_mode_config_reset(drm);
189 err = tegra_drm_fb_init(drm);
197 tegra_display_hub_cleanup(tegra->hub);
199 host1x_device_exit(device);
201 drm_kms_helper_poll_fini(drm);
202 tegra_drm_fb_free(drm);
204 drm_mode_config_cleanup(drm);
207 iommu_domain_free(tegra->domain);
208 drm_mm_takedown(&tegra->mm);
209 mutex_destroy(&tegra->mm_lock);
210 put_iova_domain(&tegra->carveout.domain);
217 static void tegra_drm_unload(struct drm_device *drm)
219 struct host1x_device *device = to_host1x_device(drm->dev);
220 struct tegra_drm *tegra = drm->dev_private;
223 drm_kms_helper_poll_fini(drm);
224 tegra_drm_fb_exit(drm);
225 drm_atomic_helper_shutdown(drm);
226 drm_mode_config_cleanup(drm);
228 err = host1x_device_exit(device);
233 iommu_domain_free(tegra->domain);
234 drm_mm_takedown(&tegra->mm);
235 mutex_destroy(&tegra->mm_lock);
236 put_iova_domain(&tegra->carveout.domain);
242 static int tegra_drm_open(struct drm_device *drm, struct drm_file *filp)
244 struct tegra_drm_file *fpriv;
246 fpriv = kzalloc(sizeof(*fpriv), GFP_KERNEL);
250 idr_init(&fpriv->contexts);
251 mutex_init(&fpriv->lock);
252 filp->driver_priv = fpriv;
257 static void tegra_drm_context_free(struct tegra_drm_context *context)
259 context->client->ops->close_channel(context);
263 static struct host1x_bo *
264 host1x_bo_lookup(struct drm_file *file, u32 handle)
266 struct drm_gem_object *gem;
269 gem = drm_gem_object_lookup(file, handle);
273 bo = to_tegra_bo(gem);
277 static int host1x_reloc_copy_from_user(struct host1x_reloc *dest,
278 struct drm_tegra_reloc __user *src,
279 struct drm_device *drm,
280 struct drm_file *file)
285 err = get_user(cmdbuf, &src->cmdbuf.handle);
289 err = get_user(dest->cmdbuf.offset, &src->cmdbuf.offset);
293 err = get_user(target, &src->target.handle);
297 err = get_user(dest->target.offset, &src->target.offset);
301 err = get_user(dest->shift, &src->shift);
305 dest->cmdbuf.bo = host1x_bo_lookup(file, cmdbuf);
306 if (!dest->cmdbuf.bo)
309 dest->target.bo = host1x_bo_lookup(file, target);
310 if (!dest->target.bo)
316 static int host1x_waitchk_copy_from_user(struct host1x_waitchk *dest,
317 struct drm_tegra_waitchk __user *src,
318 struct drm_file *file)
323 err = get_user(cmdbuf, &src->handle);
327 err = get_user(dest->offset, &src->offset);
331 err = get_user(dest->syncpt_id, &src->syncpt);
335 err = get_user(dest->thresh, &src->thresh);
339 dest->bo = host1x_bo_lookup(file, cmdbuf);
346 int tegra_drm_submit(struct tegra_drm_context *context,
347 struct drm_tegra_submit *args, struct drm_device *drm,
348 struct drm_file *file)
350 unsigned int num_cmdbufs = args->num_cmdbufs;
351 unsigned int num_relocs = args->num_relocs;
352 unsigned int num_waitchks = args->num_waitchks;
353 struct drm_tegra_cmdbuf __user *user_cmdbufs;
354 struct drm_tegra_reloc __user *user_relocs;
355 struct drm_tegra_waitchk __user *user_waitchks;
356 struct drm_tegra_syncpt __user *user_syncpt;
357 struct drm_tegra_syncpt syncpt;
358 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
359 struct drm_gem_object **refs;
360 struct host1x_syncpt *sp;
361 struct host1x_job *job;
362 unsigned int num_refs;
365 user_cmdbufs = u64_to_user_ptr(args->cmdbufs);
366 user_relocs = u64_to_user_ptr(args->relocs);
367 user_waitchks = u64_to_user_ptr(args->waitchks);
368 user_syncpt = u64_to_user_ptr(args->syncpts);
370 /* We don't yet support other than one syncpt_incr struct per submit */
371 if (args->num_syncpts != 1)
374 /* We don't yet support waitchks */
375 if (args->num_waitchks != 0)
378 job = host1x_job_alloc(context->channel, args->num_cmdbufs,
379 args->num_relocs, args->num_waitchks);
383 job->num_relocs = args->num_relocs;
384 job->num_waitchk = args->num_waitchks;
385 job->client = (u32)args->context;
386 job->class = context->client->base.class;
387 job->serialize = true;
390 * Track referenced BOs so that they can be unreferenced after the
391 * submission is complete.
393 num_refs = num_cmdbufs + num_relocs * 2 + num_waitchks;
395 refs = kmalloc_array(num_refs, sizeof(*refs), GFP_KERNEL);
401 /* reuse as an iterator later */
404 while (num_cmdbufs) {
405 struct drm_tegra_cmdbuf cmdbuf;
406 struct host1x_bo *bo;
407 struct tegra_bo *obj;
410 if (copy_from_user(&cmdbuf, user_cmdbufs, sizeof(cmdbuf))) {
416 * The maximum number of CDMA gather fetches is 16383, a higher
417 * value means the words count is malformed.
419 if (cmdbuf.words > CDMA_GATHER_FETCHES_MAX_NB) {
424 bo = host1x_bo_lookup(file, cmdbuf.handle);
430 offset = (u64)cmdbuf.offset + (u64)cmdbuf.words * sizeof(u32);
431 obj = host1x_to_tegra_bo(bo);
432 refs[num_refs++] = &obj->gem;
435 * Gather buffer base address must be 4-bytes aligned,
436 * unaligned offset is malformed and cause commands stream
437 * corruption on the buffer address relocation.
439 if (offset & 3 || offset >= obj->gem.size) {
444 host1x_job_add_gather(job, bo, cmdbuf.words, cmdbuf.offset);
449 /* copy and resolve relocations from submit */
450 while (num_relocs--) {
451 struct host1x_reloc *reloc;
452 struct tegra_bo *obj;
454 err = host1x_reloc_copy_from_user(&job->relocarray[num_relocs],
455 &user_relocs[num_relocs], drm,
460 reloc = &job->relocarray[num_relocs];
461 obj = host1x_to_tegra_bo(reloc->cmdbuf.bo);
462 refs[num_refs++] = &obj->gem;
465 * The unaligned cmdbuf offset will cause an unaligned write
466 * during of the relocations patching, corrupting the commands
469 if (reloc->cmdbuf.offset & 3 ||
470 reloc->cmdbuf.offset >= obj->gem.size) {
475 obj = host1x_to_tegra_bo(reloc->target.bo);
476 refs[num_refs++] = &obj->gem;
478 if (reloc->target.offset >= obj->gem.size) {
484 /* copy and resolve waitchks from submit */
485 while (num_waitchks--) {
486 struct host1x_waitchk *wait = &job->waitchk[num_waitchks];
487 struct tegra_bo *obj;
489 err = host1x_waitchk_copy_from_user(
490 wait, &user_waitchks[num_waitchks], file);
494 obj = host1x_to_tegra_bo(wait->bo);
495 refs[num_refs++] = &obj->gem;
498 * The unaligned offset will cause an unaligned write during
499 * of the waitchks patching, corrupting the commands stream.
501 if (wait->offset & 3 ||
502 wait->offset >= obj->gem.size) {
508 if (copy_from_user(&syncpt, user_syncpt, sizeof(syncpt))) {
513 /* check whether syncpoint ID is valid */
514 sp = host1x_syncpt_get(host1x, syncpt.id);
520 job->is_addr_reg = context->client->ops->is_addr_reg;
521 job->is_valid_class = context->client->ops->is_valid_class;
522 job->syncpt_incrs = syncpt.incrs;
523 job->syncpt_id = syncpt.id;
524 job->timeout = 10000;
526 if (args->timeout && args->timeout < 10000)
527 job->timeout = args->timeout;
529 err = host1x_job_pin(job, context->client->base.dev);
533 err = host1x_job_submit(job);
535 host1x_job_unpin(job);
539 args->fence = job->syncpt_end;
543 drm_gem_object_put_unlocked(refs[num_refs]);
553 #ifdef CONFIG_DRM_TEGRA_STAGING
554 static int tegra_gem_create(struct drm_device *drm, void *data,
555 struct drm_file *file)
557 struct drm_tegra_gem_create *args = data;
560 bo = tegra_bo_create_with_handle(file, drm, args->size, args->flags,
568 static int tegra_gem_mmap(struct drm_device *drm, void *data,
569 struct drm_file *file)
571 struct drm_tegra_gem_mmap *args = data;
572 struct drm_gem_object *gem;
575 gem = drm_gem_object_lookup(file, args->handle);
579 bo = to_tegra_bo(gem);
581 args->offset = drm_vma_node_offset_addr(&bo->gem.vma_node);
583 drm_gem_object_put_unlocked(gem);
588 static int tegra_syncpt_read(struct drm_device *drm, void *data,
589 struct drm_file *file)
591 struct host1x *host = dev_get_drvdata(drm->dev->parent);
592 struct drm_tegra_syncpt_read *args = data;
593 struct host1x_syncpt *sp;
595 sp = host1x_syncpt_get(host, args->id);
599 args->value = host1x_syncpt_read_min(sp);
603 static int tegra_syncpt_incr(struct drm_device *drm, void *data,
604 struct drm_file *file)
606 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
607 struct drm_tegra_syncpt_incr *args = data;
608 struct host1x_syncpt *sp;
610 sp = host1x_syncpt_get(host1x, args->id);
614 return host1x_syncpt_incr(sp);
617 static int tegra_syncpt_wait(struct drm_device *drm, void *data,
618 struct drm_file *file)
620 struct host1x *host1x = dev_get_drvdata(drm->dev->parent);
621 struct drm_tegra_syncpt_wait *args = data;
622 struct host1x_syncpt *sp;
624 sp = host1x_syncpt_get(host1x, args->id);
628 return host1x_syncpt_wait(sp, args->thresh,
629 msecs_to_jiffies(args->timeout),
633 static int tegra_client_open(struct tegra_drm_file *fpriv,
634 struct tegra_drm_client *client,
635 struct tegra_drm_context *context)
639 err = client->ops->open_channel(client, context);
643 err = idr_alloc(&fpriv->contexts, context, 1, 0, GFP_KERNEL);
645 client->ops->close_channel(context);
649 context->client = client;
655 static int tegra_open_channel(struct drm_device *drm, void *data,
656 struct drm_file *file)
658 struct tegra_drm_file *fpriv = file->driver_priv;
659 struct tegra_drm *tegra = drm->dev_private;
660 struct drm_tegra_open_channel *args = data;
661 struct tegra_drm_context *context;
662 struct tegra_drm_client *client;
665 context = kzalloc(sizeof(*context), GFP_KERNEL);
669 mutex_lock(&fpriv->lock);
671 list_for_each_entry(client, &tegra->clients, list)
672 if (client->base.class == args->client) {
673 err = tegra_client_open(fpriv, client, context);
677 args->context = context->id;
684 mutex_unlock(&fpriv->lock);
688 static int tegra_close_channel(struct drm_device *drm, void *data,
689 struct drm_file *file)
691 struct tegra_drm_file *fpriv = file->driver_priv;
692 struct drm_tegra_close_channel *args = data;
693 struct tegra_drm_context *context;
696 mutex_lock(&fpriv->lock);
698 context = idr_find(&fpriv->contexts, args->context);
704 idr_remove(&fpriv->contexts, context->id);
705 tegra_drm_context_free(context);
708 mutex_unlock(&fpriv->lock);
712 static int tegra_get_syncpt(struct drm_device *drm, void *data,
713 struct drm_file *file)
715 struct tegra_drm_file *fpriv = file->driver_priv;
716 struct drm_tegra_get_syncpt *args = data;
717 struct tegra_drm_context *context;
718 struct host1x_syncpt *syncpt;
721 mutex_lock(&fpriv->lock);
723 context = idr_find(&fpriv->contexts, args->context);
729 if (args->index >= context->client->base.num_syncpts) {
734 syncpt = context->client->base.syncpts[args->index];
735 args->id = host1x_syncpt_id(syncpt);
738 mutex_unlock(&fpriv->lock);
742 static int tegra_submit(struct drm_device *drm, void *data,
743 struct drm_file *file)
745 struct tegra_drm_file *fpriv = file->driver_priv;
746 struct drm_tegra_submit *args = data;
747 struct tegra_drm_context *context;
750 mutex_lock(&fpriv->lock);
752 context = idr_find(&fpriv->contexts, args->context);
758 err = context->client->ops->submit(context, args, drm, file);
761 mutex_unlock(&fpriv->lock);
765 static int tegra_get_syncpt_base(struct drm_device *drm, void *data,
766 struct drm_file *file)
768 struct tegra_drm_file *fpriv = file->driver_priv;
769 struct drm_tegra_get_syncpt_base *args = data;
770 struct tegra_drm_context *context;
771 struct host1x_syncpt_base *base;
772 struct host1x_syncpt *syncpt;
775 mutex_lock(&fpriv->lock);
777 context = idr_find(&fpriv->contexts, args->context);
783 if (args->syncpt >= context->client->base.num_syncpts) {
788 syncpt = context->client->base.syncpts[args->syncpt];
790 base = host1x_syncpt_get_base(syncpt);
796 args->id = host1x_syncpt_base_id(base);
799 mutex_unlock(&fpriv->lock);
803 static int tegra_gem_set_tiling(struct drm_device *drm, void *data,
804 struct drm_file *file)
806 struct drm_tegra_gem_set_tiling *args = data;
807 enum tegra_bo_tiling_mode mode;
808 struct drm_gem_object *gem;
809 unsigned long value = 0;
812 switch (args->mode) {
813 case DRM_TEGRA_GEM_TILING_MODE_PITCH:
814 mode = TEGRA_BO_TILING_MODE_PITCH;
816 if (args->value != 0)
821 case DRM_TEGRA_GEM_TILING_MODE_TILED:
822 mode = TEGRA_BO_TILING_MODE_TILED;
824 if (args->value != 0)
829 case DRM_TEGRA_GEM_TILING_MODE_BLOCK:
830 mode = TEGRA_BO_TILING_MODE_BLOCK;
842 gem = drm_gem_object_lookup(file, args->handle);
846 bo = to_tegra_bo(gem);
848 bo->tiling.mode = mode;
849 bo->tiling.value = value;
851 drm_gem_object_put_unlocked(gem);
856 static int tegra_gem_get_tiling(struct drm_device *drm, void *data,
857 struct drm_file *file)
859 struct drm_tegra_gem_get_tiling *args = data;
860 struct drm_gem_object *gem;
864 gem = drm_gem_object_lookup(file, args->handle);
868 bo = to_tegra_bo(gem);
870 switch (bo->tiling.mode) {
871 case TEGRA_BO_TILING_MODE_PITCH:
872 args->mode = DRM_TEGRA_GEM_TILING_MODE_PITCH;
876 case TEGRA_BO_TILING_MODE_TILED:
877 args->mode = DRM_TEGRA_GEM_TILING_MODE_TILED;
881 case TEGRA_BO_TILING_MODE_BLOCK:
882 args->mode = DRM_TEGRA_GEM_TILING_MODE_BLOCK;
883 args->value = bo->tiling.value;
891 drm_gem_object_put_unlocked(gem);
896 static int tegra_gem_set_flags(struct drm_device *drm, void *data,
897 struct drm_file *file)
899 struct drm_tegra_gem_set_flags *args = data;
900 struct drm_gem_object *gem;
903 if (args->flags & ~DRM_TEGRA_GEM_FLAGS)
906 gem = drm_gem_object_lookup(file, args->handle);
910 bo = to_tegra_bo(gem);
913 if (args->flags & DRM_TEGRA_GEM_BOTTOM_UP)
914 bo->flags |= TEGRA_BO_BOTTOM_UP;
916 drm_gem_object_put_unlocked(gem);
921 static int tegra_gem_get_flags(struct drm_device *drm, void *data,
922 struct drm_file *file)
924 struct drm_tegra_gem_get_flags *args = data;
925 struct drm_gem_object *gem;
928 gem = drm_gem_object_lookup(file, args->handle);
932 bo = to_tegra_bo(gem);
935 if (bo->flags & TEGRA_BO_BOTTOM_UP)
936 args->flags |= DRM_TEGRA_GEM_BOTTOM_UP;
938 drm_gem_object_put_unlocked(gem);
944 static const struct drm_ioctl_desc tegra_drm_ioctls[] = {
945 #ifdef CONFIG_DRM_TEGRA_STAGING
946 DRM_IOCTL_DEF_DRV(TEGRA_GEM_CREATE, tegra_gem_create,
947 DRM_UNLOCKED | DRM_RENDER_ALLOW),
948 DRM_IOCTL_DEF_DRV(TEGRA_GEM_MMAP, tegra_gem_mmap,
949 DRM_UNLOCKED | DRM_RENDER_ALLOW),
950 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_READ, tegra_syncpt_read,
951 DRM_UNLOCKED | DRM_RENDER_ALLOW),
952 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_INCR, tegra_syncpt_incr,
953 DRM_UNLOCKED | DRM_RENDER_ALLOW),
954 DRM_IOCTL_DEF_DRV(TEGRA_SYNCPT_WAIT, tegra_syncpt_wait,
955 DRM_UNLOCKED | DRM_RENDER_ALLOW),
956 DRM_IOCTL_DEF_DRV(TEGRA_OPEN_CHANNEL, tegra_open_channel,
957 DRM_UNLOCKED | DRM_RENDER_ALLOW),
958 DRM_IOCTL_DEF_DRV(TEGRA_CLOSE_CHANNEL, tegra_close_channel,
959 DRM_UNLOCKED | DRM_RENDER_ALLOW),
960 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT, tegra_get_syncpt,
961 DRM_UNLOCKED | DRM_RENDER_ALLOW),
962 DRM_IOCTL_DEF_DRV(TEGRA_SUBMIT, tegra_submit,
963 DRM_UNLOCKED | DRM_RENDER_ALLOW),
964 DRM_IOCTL_DEF_DRV(TEGRA_GET_SYNCPT_BASE, tegra_get_syncpt_base,
965 DRM_UNLOCKED | DRM_RENDER_ALLOW),
966 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_TILING, tegra_gem_set_tiling,
967 DRM_UNLOCKED | DRM_RENDER_ALLOW),
968 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_TILING, tegra_gem_get_tiling,
969 DRM_UNLOCKED | DRM_RENDER_ALLOW),
970 DRM_IOCTL_DEF_DRV(TEGRA_GEM_SET_FLAGS, tegra_gem_set_flags,
971 DRM_UNLOCKED | DRM_RENDER_ALLOW),
972 DRM_IOCTL_DEF_DRV(TEGRA_GEM_GET_FLAGS, tegra_gem_get_flags,
973 DRM_UNLOCKED | DRM_RENDER_ALLOW),
977 static const struct file_operations tegra_drm_fops = {
978 .owner = THIS_MODULE,
980 .release = drm_release,
981 .unlocked_ioctl = drm_ioctl,
982 .mmap = tegra_drm_mmap,
985 .compat_ioctl = drm_compat_ioctl,
986 .llseek = noop_llseek,
989 static int tegra_drm_context_cleanup(int id, void *p, void *data)
991 struct tegra_drm_context *context = p;
993 tegra_drm_context_free(context);
998 static void tegra_drm_postclose(struct drm_device *drm, struct drm_file *file)
1000 struct tegra_drm_file *fpriv = file->driver_priv;
1002 mutex_lock(&fpriv->lock);
1003 idr_for_each(&fpriv->contexts, tegra_drm_context_cleanup, NULL);
1004 mutex_unlock(&fpriv->lock);
1006 idr_destroy(&fpriv->contexts);
1007 mutex_destroy(&fpriv->lock);
1011 #ifdef CONFIG_DEBUG_FS
1012 static int tegra_debugfs_framebuffers(struct seq_file *s, void *data)
1014 struct drm_info_node *node = (struct drm_info_node *)s->private;
1015 struct drm_device *drm = node->minor->dev;
1016 struct drm_framebuffer *fb;
1018 mutex_lock(&drm->mode_config.fb_lock);
1020 list_for_each_entry(fb, &drm->mode_config.fb_list, head) {
1021 seq_printf(s, "%3d: user size: %d x %d, depth %d, %d bpp, refcount %d\n",
1022 fb->base.id, fb->width, fb->height,
1024 fb->format->cpp[0] * 8,
1025 drm_framebuffer_read_refcount(fb));
1028 mutex_unlock(&drm->mode_config.fb_lock);
1033 static int tegra_debugfs_iova(struct seq_file *s, void *data)
1035 struct drm_info_node *node = (struct drm_info_node *)s->private;
1036 struct drm_device *drm = node->minor->dev;
1037 struct tegra_drm *tegra = drm->dev_private;
1038 struct drm_printer p = drm_seq_file_printer(s);
1040 if (tegra->domain) {
1041 mutex_lock(&tegra->mm_lock);
1042 drm_mm_print(&tegra->mm, &p);
1043 mutex_unlock(&tegra->mm_lock);
1049 static struct drm_info_list tegra_debugfs_list[] = {
1050 { "framebuffers", tegra_debugfs_framebuffers, 0 },
1051 { "iova", tegra_debugfs_iova, 0 },
1054 static int tegra_debugfs_init(struct drm_minor *minor)
1056 return drm_debugfs_create_files(tegra_debugfs_list,
1057 ARRAY_SIZE(tegra_debugfs_list),
1058 minor->debugfs_root, minor);
1062 static struct drm_driver tegra_drm_driver = {
1063 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
1064 DRIVER_ATOMIC | DRIVER_RENDER,
1065 .load = tegra_drm_load,
1066 .unload = tegra_drm_unload,
1067 .open = tegra_drm_open,
1068 .postclose = tegra_drm_postclose,
1069 .lastclose = drm_fb_helper_lastclose,
1071 #if defined(CONFIG_DEBUG_FS)
1072 .debugfs_init = tegra_debugfs_init,
1075 .gem_free_object_unlocked = tegra_bo_free_object,
1076 .gem_vm_ops = &tegra_bo_vm_ops,
1078 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
1079 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1080 .gem_prime_export = tegra_gem_prime_export,
1081 .gem_prime_import = tegra_gem_prime_import,
1083 .dumb_create = tegra_bo_dumb_create,
1085 .ioctls = tegra_drm_ioctls,
1086 .num_ioctls = ARRAY_SIZE(tegra_drm_ioctls),
1087 .fops = &tegra_drm_fops,
1089 .name = DRIVER_NAME,
1090 .desc = DRIVER_DESC,
1091 .date = DRIVER_DATE,
1092 .major = DRIVER_MAJOR,
1093 .minor = DRIVER_MINOR,
1094 .patchlevel = DRIVER_PATCHLEVEL,
1097 int tegra_drm_register_client(struct tegra_drm *tegra,
1098 struct tegra_drm_client *client)
1100 mutex_lock(&tegra->clients_lock);
1101 list_add_tail(&client->list, &tegra->clients);
1102 mutex_unlock(&tegra->clients_lock);
1107 int tegra_drm_unregister_client(struct tegra_drm *tegra,
1108 struct tegra_drm_client *client)
1110 mutex_lock(&tegra->clients_lock);
1111 list_del_init(&client->list);
1112 mutex_unlock(&tegra->clients_lock);
1117 struct iommu_group *host1x_client_iommu_attach(struct host1x_client *client,
1120 struct drm_device *drm = dev_get_drvdata(client->parent);
1121 struct tegra_drm *tegra = drm->dev_private;
1122 struct iommu_group *group = NULL;
1125 if (tegra->domain) {
1126 group = iommu_group_get(client->dev);
1128 dev_err(client->dev, "failed to get IOMMU group\n");
1129 return ERR_PTR(-ENODEV);
1132 if (!shared || (shared && (group != tegra->group))) {
1133 err = iommu_attach_group(tegra->domain, group);
1135 iommu_group_put(group);
1136 return ERR_PTR(err);
1139 if (shared && !tegra->group)
1140 tegra->group = group;
1147 void host1x_client_iommu_detach(struct host1x_client *client,
1148 struct iommu_group *group)
1150 struct drm_device *drm = dev_get_drvdata(client->parent);
1151 struct tegra_drm *tegra = drm->dev_private;
1154 if (group == tegra->group) {
1155 iommu_detach_group(tegra->domain, group);
1156 tegra->group = NULL;
1159 iommu_group_put(group);
1163 void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *dma)
1171 size = iova_align(&tegra->carveout.domain, size);
1173 size = PAGE_ALIGN(size);
1175 gfp = GFP_KERNEL | __GFP_ZERO;
1176 if (!tegra->domain) {
1178 * Many units only support 32-bit addresses, even on 64-bit
1179 * SoCs. If there is no IOMMU to translate into a 32-bit IO
1180 * virtual address space, force allocations to be in the
1181 * lower 32-bit range.
1186 virt = (void *)__get_free_pages(gfp, get_order(size));
1188 return ERR_PTR(-ENOMEM);
1190 if (!tegra->domain) {
1192 * If IOMMU is disabled, devices address physical memory
1195 *dma = virt_to_phys(virt);
1199 alloc = alloc_iova(&tegra->carveout.domain,
1200 size >> tegra->carveout.shift,
1201 tegra->carveout.limit, true);
1207 *dma = iova_dma_addr(&tegra->carveout.domain, alloc);
1208 err = iommu_map(tegra->domain, *dma, virt_to_phys(virt),
1209 size, IOMMU_READ | IOMMU_WRITE);
1216 __free_iova(&tegra->carveout.domain, alloc);
1218 free_pages((unsigned long)virt, get_order(size));
1220 return ERR_PTR(err);
1223 void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt,
1227 size = iova_align(&tegra->carveout.domain, size);
1229 size = PAGE_ALIGN(size);
1231 if (tegra->domain) {
1232 iommu_unmap(tegra->domain, dma, size);
1233 free_iova(&tegra->carveout.domain,
1234 iova_pfn(&tegra->carveout.domain, dma));
1237 free_pages((unsigned long)virt, get_order(size));
1240 static int host1x_drm_probe(struct host1x_device *dev)
1242 struct drm_driver *driver = &tegra_drm_driver;
1243 struct drm_device *drm;
1246 drm = drm_dev_alloc(driver, &dev->dev);
1248 return PTR_ERR(drm);
1250 dev_set_drvdata(&dev->dev, drm);
1252 err = drm_dev_register(drm, 0);
1263 static int host1x_drm_remove(struct host1x_device *dev)
1265 struct drm_device *drm = dev_get_drvdata(&dev->dev);
1267 drm_dev_unregister(drm);
1273 #ifdef CONFIG_PM_SLEEP
1274 static int host1x_drm_suspend(struct device *dev)
1276 struct drm_device *drm = dev_get_drvdata(dev);
1277 struct tegra_drm *tegra = drm->dev_private;
1279 drm_kms_helper_poll_disable(drm);
1280 tegra_drm_fb_suspend(drm);
1282 tegra->state = drm_atomic_helper_suspend(drm);
1283 if (IS_ERR(tegra->state)) {
1284 tegra_drm_fb_resume(drm);
1285 drm_kms_helper_poll_enable(drm);
1286 return PTR_ERR(tegra->state);
1292 static int host1x_drm_resume(struct device *dev)
1294 struct drm_device *drm = dev_get_drvdata(dev);
1295 struct tegra_drm *tegra = drm->dev_private;
1297 drm_atomic_helper_resume(drm, tegra->state);
1298 tegra_drm_fb_resume(drm);
1299 drm_kms_helper_poll_enable(drm);
1305 static SIMPLE_DEV_PM_OPS(host1x_drm_pm_ops, host1x_drm_suspend,
1308 static const struct of_device_id host1x_drm_subdevs[] = {
1309 { .compatible = "nvidia,tegra20-dc", },
1310 { .compatible = "nvidia,tegra20-hdmi", },
1311 { .compatible = "nvidia,tegra20-gr2d", },
1312 { .compatible = "nvidia,tegra20-gr3d", },
1313 { .compatible = "nvidia,tegra30-dc", },
1314 { .compatible = "nvidia,tegra30-hdmi", },
1315 { .compatible = "nvidia,tegra30-gr2d", },
1316 { .compatible = "nvidia,tegra30-gr3d", },
1317 { .compatible = "nvidia,tegra114-dsi", },
1318 { .compatible = "nvidia,tegra114-hdmi", },
1319 { .compatible = "nvidia,tegra114-gr3d", },
1320 { .compatible = "nvidia,tegra124-dc", },
1321 { .compatible = "nvidia,tegra124-sor", },
1322 { .compatible = "nvidia,tegra124-hdmi", },
1323 { .compatible = "nvidia,tegra124-dsi", },
1324 { .compatible = "nvidia,tegra124-vic", },
1325 { .compatible = "nvidia,tegra132-dsi", },
1326 { .compatible = "nvidia,tegra210-dc", },
1327 { .compatible = "nvidia,tegra210-dsi", },
1328 { .compatible = "nvidia,tegra210-sor", },
1329 { .compatible = "nvidia,tegra210-sor1", },
1330 { .compatible = "nvidia,tegra210-vic", },
1331 { .compatible = "nvidia,tegra186-display", },
1332 { .compatible = "nvidia,tegra186-dc", },
1333 { .compatible = "nvidia,tegra186-sor", },
1334 { .compatible = "nvidia,tegra186-sor1", },
1335 { .compatible = "nvidia,tegra186-vic", },
1339 static struct host1x_driver host1x_drm_driver = {
1342 .pm = &host1x_drm_pm_ops,
1344 .probe = host1x_drm_probe,
1345 .remove = host1x_drm_remove,
1346 .subdevs = host1x_drm_subdevs,
1349 static struct platform_driver * const drivers[] = {
1350 &tegra_display_hub_driver,
1354 &tegra_dpaux_driver,
1361 static int __init host1x_drm_init(void)
1365 err = host1x_driver_register(&host1x_drm_driver);
1369 err = platform_register_drivers(drivers, ARRAY_SIZE(drivers));
1371 goto unregister_host1x;
1376 host1x_driver_unregister(&host1x_drm_driver);
1379 module_init(host1x_drm_init);
1381 static void __exit host1x_drm_exit(void)
1383 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
1384 host1x_driver_unregister(&host1x_drm_driver);
1386 module_exit(host1x_drm_exit);
1388 MODULE_AUTHOR("Thierry Reding <thierry.reding@avionic-design.de>");
1389 MODULE_DESCRIPTION("NVIDIA Tegra DRM driver");
1390 MODULE_LICENSE("GPL v2");