drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (c) 2018 Jernej Skrabec <jernej.skrabec@siol.net>
   4  */
   5
   6 #include <linux/component.h>
   7 #include <linux/module.h>
   8 #include <linux/of_device.h>
   9 #include <linux/platform_device.h>
  10
  11 #include <drm/drm_crtc_helper.h>
  12 #include <drm/drm_of.h>
  13 #include <drm/drm_simple_kms_helper.h>
  14
  15 #include "sun8i_dw_hdmi.h"
  16 #include "sun8i_tcon_top.h"
  17
  18 static void sun8i_dw_hdmi_encoder_mode_set(struct drm_encoder *encoder,
  19                                            struct drm_display_mode *mode,
  20                                            struct drm_display_mode *adj_mode)
  21 {
  22         struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder);
  23
  24         clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000);
  25 }
  26
  27 static const struct drm_encoder_helper_funcs
  28 sun8i_dw_hdmi_encoder_helper_funcs = {
  29         .mode_set = sun8i_dw_hdmi_encoder_mode_set,
  30 };
  31
  32 static enum drm_mode_status
  33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data,
  34                               const struct drm_display_info *info,
  35                               const struct drm_display_mode *mode)
  36 {
  37         if (mode->clock > 297000)
  38                 return MODE_CLOCK_HIGH;
  39
  40         return MODE_OK;
  41 }
  42
  43 static enum drm_mode_status
  44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data,
  45                             const struct drm_display_info *info,
  46                             const struct drm_display_mode *mode)
  47 {
  48         /*
  49          * Controller support maximum of 594 MHz, which correlates to
  50          * 4K@60Hz 4:4:4 or RGB. However, for frequencies greater than
  51          * 340 MHz scrambling has to be enabled. Because scrambling is
  52          * not yet implemented, just limit to 340 MHz for now.
  53          */
  54         if (mode->clock > 340000)
  55                 return MODE_CLOCK_HIGH;
  56
  57         return MODE_OK;
  58 }
  59
  60 static bool sun8i_dw_hdmi_node_is_tcon_top(struct device_node *node)
  61 {
  62         return IS_ENABLED(CONFIG_DRM_SUN8I_TCON_TOP) &&
  63                 !!of_match_node(sun8i_tcon_top_of_table, node);
  64 }
  65
  66 static u32 sun8i_dw_hdmi_find_possible_crtcs(struct drm_device *drm,
  67                                              struct device_node *node)
  68 {
  69         struct device_node *port, *ep, *remote, *remote_port;
  70         u32 crtcs = 0;
  71
  72         remote = of_graph_get_remote_node(node, 0, -1);
  73         if (!remote)
  74                 return 0;
  75
  76         if (sun8i_dw_hdmi_node_is_tcon_top(remote)) {
  77                 port = of_graph_get_port_by_id(remote, 4);
  78                 if (!port)
  79                         goto crtcs_exit;
  80
  81                 for_each_child_of_node(port, ep) {
  82                         remote_port = of_graph_get_remote_port(ep);
  83                         if (remote_port) {
  84                                 crtcs |= drm_of_crtc_port_mask(drm, remote_port);
  85                                 of_node_put(remote_port);
  86                         }
  87                 }
  88         } else {
  89                 crtcs = drm_of_find_possible_crtcs(drm, node);
  90         }
  91
  92 crtcs_exit:
  93         of_node_put(remote);
  94
  95         return crtcs;
  96 }
  97
  98 static int sun8i_dw_hdmi_find_connector_pdev(struct device *dev,
  99                                              struct platform_device **pdev_out)
 100 {
 101         struct platform_device *pdev;
 102         struct device_node *remote;
 103
 104         remote = of_graph_get_remote_node(dev->of_node, 1, -1);
 105         if (!remote)
 106                 return -ENODEV;
 107
 108         if (!of_device_is_compatible(remote, "hdmi-connector")) {
 109                 of_node_put(remote);
 110                 return -ENODEV;
 111         }
 112
 113         pdev = of_find_device_by_node(remote);
 114         of_node_put(remote);
 115         if (!pdev)
 116                 return -ENODEV;
 117
 118         *pdev_out = pdev;
 119         return 0;
 120 }
 121
 122 static int sun8i_dw_hdmi_bind(struct device *dev, struct device *master,
 123                               void *data)
 124 {
 125         struct platform_device *pdev = to_platform_device(dev), *connector_pdev;
 126         struct dw_hdmi_plat_data *plat_data;
 127         struct drm_device *drm = data;
 128         struct device_node *phy_node;
 129         struct drm_encoder *encoder;
 130         struct sun8i_dw_hdmi *hdmi;
 131         int ret;
 132
 133         if (!pdev->dev.of_node)
 134                 return -ENODEV;
 135
 136         hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL);
 137         if (!hdmi)
 138                 return -ENOMEM;
 139
 140         plat_data = &hdmi->plat_data;
 141         hdmi->dev = &pdev->dev;
 142         encoder = &hdmi->encoder;
 143
 144         hdmi->quirks = of_device_get_match_data(dev);
 145
 146         encoder->possible_crtcs =
 147                 sun8i_dw_hdmi_find_possible_crtcs(drm, dev->of_node);
 148         /*
 149          * If we failed to find the CRTC(s) which this encoder is
 150          * supposed to be connected to, it's because the CRTC has
 151          * not been registered yet.  Defer probing, and hope that
 152          * the required CRTC is added later.
 153          */
 154         if (encoder->possible_crtcs == 0)
 155                 return -EPROBE_DEFER;
 156
 157         hdmi->rst_ctrl = devm_reset_control_get(dev, "ctrl");
 158         if (IS_ERR(hdmi->rst_ctrl)) {
 159                 dev_err(dev, "Could not get ctrl reset control\n");
 160                 return PTR_ERR(hdmi->rst_ctrl);
 161         }
 162
 163         hdmi->clk_tmds = devm_clk_get(dev, "tmds");
 164         if (IS_ERR(hdmi->clk_tmds)) {
 165                 dev_err(dev, "Couldn't get the tmds clock\n");
 166                 return PTR_ERR(hdmi->clk_tmds);
 167         }
 168
 169         hdmi->regulator = devm_regulator_get(dev, "hvcc");
 170         if (IS_ERR(hdmi->regulator)) {
 171                 dev_err(dev, "Couldn't get regulator\n");
 172                 return PTR_ERR(hdmi->regulator);
 173         }
 174
 175         ret = sun8i_dw_hdmi_find_connector_pdev(dev, &connector_pdev);
 176         if (!ret) {
 177                 hdmi->ddc_en = gpiod_get_optional(&connector_pdev->dev,
 178                                                   "ddc-en", GPIOD_OUT_HIGH);
 179                 platform_device_put(connector_pdev);
 180
 181                 if (IS_ERR(hdmi->ddc_en)) {
 182                         dev_err(dev, "Couldn't get ddc-en gpio\n");
 183                         return PTR_ERR(hdmi->ddc_en);
 184                 }
 185         }
 186
 187         ret = regulator_enable(hdmi->regulator);
 188         if (ret) {
 189                 dev_err(dev, "Failed to enable regulator\n");
 190                 goto err_unref_ddc_en;
 191         }
 192
 193         gpiod_set_value(hdmi->ddc_en, 1);
 194
 195         ret = reset_control_deassert(hdmi->rst_ctrl);
 196         if (ret) {
 197                 dev_err(dev, "Could not deassert ctrl reset control\n");
 198                 goto err_disable_ddc_en;
 199         }
 200
 201         ret = clk_prepare_enable(hdmi->clk_tmds);
 202         if (ret) {
 203                 dev_err(dev, "Could not enable tmds clock\n");
 204                 goto err_assert_ctrl_reset;
 205         }
 206
 207         phy_node = of_parse_phandle(dev->of_node, "phys", 0);
 208         if (!phy_node) {
 209                 dev_err(dev, "Can't found PHY phandle\n");
 210                 ret = -EINVAL;
 211                 goto err_disable_clk_tmds;
 212         }
 213
 214         ret = sun8i_hdmi_phy_probe(hdmi, phy_node);
 215         of_node_put(phy_node);
 216         if (ret) {
 217                 dev_err(dev, "Couldn't get the HDMI PHY\n");
 218                 goto err_disable_clk_tmds;
 219         }
 220
 221         drm_encoder_helper_add(encoder, &sun8i_dw_hdmi_encoder_helper_funcs);
 222         drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
 223
 224         sun8i_hdmi_phy_init(hdmi->phy);
 225
 226         plat_data->mode_valid = hdmi->quirks->mode_valid;
 227         plat_data->use_drm_infoframe = hdmi->quirks->use_drm_infoframe;
 228         sun8i_hdmi_phy_set_ops(hdmi->phy, plat_data);
 229
 230         platform_set_drvdata(pdev, hdmi);
 231
 232         hdmi->hdmi = dw_hdmi_bind(pdev, encoder, plat_data);
 233
 234         /*
 235          * If dw_hdmi_bind() fails we'll never call dw_hdmi_unbind(),
 236          * which would have called the encoder cleanup.  Do it manually.
 237          */
 238         if (IS_ERR(hdmi->hdmi)) {
 239                 ret = PTR_ERR(hdmi->hdmi);
 240                 goto cleanup_encoder;
 241         }
 242
 243         return 0;
 244
 245 cleanup_encoder:
 246         drm_encoder_cleanup(encoder);
 247         sun8i_hdmi_phy_remove(hdmi);
 248 err_disable_clk_tmds:
 249         clk_disable_unprepare(hdmi->clk_tmds);
 250 err_assert_ctrl_reset:
 251         reset_control_assert(hdmi->rst_ctrl);
 252 err_disable_ddc_en:
 253         gpiod_set_value(hdmi->ddc_en, 0);
 254         regulator_disable(hdmi->regulator);
 255 err_unref_ddc_en:
 256         if (hdmi->ddc_en)
 257                 gpiod_put(hdmi->ddc_en);
 258
 259         return ret;
 260 }
 261
 262 static void sun8i_dw_hdmi_unbind(struct device *dev, struct device *master,
 263                                  void *data)
 264 {
 265         struct sun8i_dw_hdmi *hdmi = dev_get_drvdata(dev);
 266
 267         dw_hdmi_unbind(hdmi->hdmi);
 268         sun8i_hdmi_phy_remove(hdmi);
 269         clk_disable_unprepare(hdmi->clk_tmds);
 270         reset_control_assert(hdmi->rst_ctrl);
 271         gpiod_set_value(hdmi->ddc_en, 0);
 272         regulator_disable(hdmi->regulator);
 273
 274         if (hdmi->ddc_en)
 275                 gpiod_put(hdmi->ddc_en);
 276 }
 277
 278 static const struct component_ops sun8i_dw_hdmi_ops = {
 279         .bind   = sun8i_dw_hdmi_bind,
 280         .unbind = sun8i_dw_hdmi_unbind,
 281 };
 282
 283 static int sun8i_dw_hdmi_probe(struct platform_device *pdev)
 284 {
 285         return component_add(&pdev->dev, &sun8i_dw_hdmi_ops);
 286 }
 287
 288 static int sun8i_dw_hdmi_remove(struct platform_device *pdev)
 289 {
 290         component_del(&pdev->dev, &sun8i_dw_hdmi_ops);
 291
 292         return 0;
 293 }
 294
 295 static const struct sun8i_dw_hdmi_quirks sun8i_a83t_quirks = {
 296         .mode_valid = sun8i_dw_hdmi_mode_valid_a83t,
 297 };
 298
 299 static const struct sun8i_dw_hdmi_quirks sun50i_h6_quirks = {
 300         .mode_valid = sun8i_dw_hdmi_mode_valid_h6,
 301         .use_drm_infoframe = true,
 302 };
 303
 304 static const struct of_device_id sun8i_dw_hdmi_dt_ids[] = {
 305         {
 306                 .compatible = "allwinner,sun8i-a83t-dw-hdmi",
 307                 .data = &sun8i_a83t_quirks,
 308         },
 309         {
 310                 .compatible = "allwinner,sun50i-h6-dw-hdmi",
 311                 .data = &sun50i_h6_quirks,
 312         },
 313         { /* sentinel */ },
 314 };
 315 MODULE_DEVICE_TABLE(of, sun8i_dw_hdmi_dt_ids);
 316
 317 static struct platform_driver sun8i_dw_hdmi_pltfm_driver = {
 318         .probe  = sun8i_dw_hdmi_probe,
 319         .remove = sun8i_dw_hdmi_remove,
 320         .driver = {
 321                 .name = "sun8i-dw-hdmi",
 322                 .of_match_table = sun8i_dw_hdmi_dt_ids,
 323         },
 324 };
 325 module_platform_driver(sun8i_dw_hdmi_pltfm_driver);
 326
 327 MODULE_AUTHOR("Jernej Skrabec <jernej.skrabec@siol.net>");
 328 MODULE_DESCRIPTION("Allwinner DW HDMI bridge");
 329 MODULE_LICENSE("GPL");