drivers/gpu/drm/solomon/ssd130x.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * DRM driver for Solomon SSD130x OLED displays
   4  *
   5  * Copyright 2022 Red Hat Inc.
   6  * Author: Javier Martinez Canillas <javierm@redhat.com>
   7  *
   8  * Based on drivers/video/fbdev/ssd1307fb.c
   9  * Copyright 2012 Free Electrons
  10  */
  11
  12 #include <linux/backlight.h>
  13 #include <linux/bitfield.h>
  14 #include <linux/bits.h>
  15 #include <linux/delay.h>
  16 #include <linux/gpio/consumer.h>
  17 #include <linux/property.h>
  18 #include <linux/pwm.h>
  19 #include <linux/regulator/consumer.h>
  20
  21 #include <drm/drm_atomic.h>
  22 #include <drm/drm_atomic_helper.h>
  23 #include <drm/drm_damage_helper.h>
  24 #include <drm/drm_edid.h>
  25 #include <drm/drm_fb_helper.h>
  26 #include <drm/drm_format_helper.h>
  27 #include <drm/drm_framebuffer.h>
  28 #include <drm/drm_gem_atomic_helper.h>
  29 #include <drm/drm_gem_framebuffer_helper.h>
  30 #include <drm/drm_gem_shmem_helper.h>
  31 #include <drm/drm_managed.h>
  32 #include <drm/drm_modes.h>
  33 #include <drm/drm_rect.h>
  34 #include <drm/drm_probe_helper.h>
  35
  36 #include "ssd130x.h"
  37
  38 #define DRIVER_NAME     "ssd130x"
  39 #define DRIVER_DESC     "DRM driver for Solomon SSD130x OLED displays"
  40 #define DRIVER_DATE     "20220131"
  41 #define DRIVER_MAJOR    1
  42 #define DRIVER_MINOR    0
  43
  44 #define SSD130X_PAGE_COL_START_LOW              0x00
  45 #define SSD130X_PAGE_COL_START_HIGH             0x10
  46 #define SSD130X_SET_ADDRESS_MODE                0x20
  47 #define SSD130X_SET_COL_RANGE                   0x21
  48 #define SSD130X_SET_PAGE_RANGE                  0x22
  49 #define SSD130X_CONTRAST                        0x81
  50 #define SSD130X_SET_LOOKUP_TABLE                0x91
  51 #define SSD130X_CHARGE_PUMP                     0x8d
  52 #define SSD130X_SET_SEG_REMAP                   0xa0
  53 #define SSD130X_DISPLAY_OFF                     0xae
  54 #define SSD130X_SET_MULTIPLEX_RATIO             0xa8
  55 #define SSD130X_DISPLAY_ON                      0xaf
  56 #define SSD130X_START_PAGE_ADDRESS              0xb0
  57 #define SSD130X_SET_COM_SCAN_DIR                0xc0
  58 #define SSD130X_SET_DISPLAY_OFFSET              0xd3
  59 #define SSD130X_SET_CLOCK_FREQ                  0xd5
  60 #define SSD130X_SET_AREA_COLOR_MODE             0xd8
  61 #define SSD130X_SET_PRECHARGE_PERIOD            0xd9
  62 #define SSD130X_SET_COM_PINS_CONFIG             0xda
  63 #define SSD130X_SET_VCOMH                       0xdb
  64
  65 #define SSD130X_PAGE_COL_START_MASK             GENMASK(3, 0)
  66 #define SSD130X_PAGE_COL_START_HIGH_SET(val)    FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val) >> 4)
  67 #define SSD130X_PAGE_COL_START_LOW_SET(val)     FIELD_PREP(SSD130X_PAGE_COL_START_MASK, (val))
  68 #define SSD130X_START_PAGE_ADDRESS_MASK         GENMASK(2, 0)
  69 #define SSD130X_START_PAGE_ADDRESS_SET(val)     FIELD_PREP(SSD130X_START_PAGE_ADDRESS_MASK, (val))
  70 #define SSD130X_SET_SEG_REMAP_MASK              GENMASK(0, 0)
  71 #define SSD130X_SET_SEG_REMAP_SET(val)          FIELD_PREP(SSD130X_SET_SEG_REMAP_MASK, (val))
  72 #define SSD130X_SET_COM_SCAN_DIR_MASK           GENMASK(3, 3)
  73 #define SSD130X_SET_COM_SCAN_DIR_SET(val)       FIELD_PREP(SSD130X_SET_COM_SCAN_DIR_MASK, (val))
  74 #define SSD130X_SET_CLOCK_DIV_MASK              GENMASK(3, 0)
  75 #define SSD130X_SET_CLOCK_DIV_SET(val)          FIELD_PREP(SSD130X_SET_CLOCK_DIV_MASK, (val))
  76 #define SSD130X_SET_CLOCK_FREQ_MASK             GENMASK(7, 4)
  77 #define SSD130X_SET_CLOCK_FREQ_SET(val)         FIELD_PREP(SSD130X_SET_CLOCK_FREQ_MASK, (val))
  78 #define SSD130X_SET_PRECHARGE_PERIOD1_MASK      GENMASK(3, 0)
  79 #define SSD130X_SET_PRECHARGE_PERIOD1_SET(val)  FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD1_MASK, (val))
  80 #define SSD130X_SET_PRECHARGE_PERIOD2_MASK      GENMASK(7, 4)
  81 #define SSD130X_SET_PRECHARGE_PERIOD2_SET(val)  FIELD_PREP(SSD130X_SET_PRECHARGE_PERIOD2_MASK, (val))
  82 #define SSD130X_SET_COM_PINS_CONFIG1_MASK       GENMASK(4, 4)
  83 #define SSD130X_SET_COM_PINS_CONFIG1_SET(val)   FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG1_MASK, !(val))
  84 #define SSD130X_SET_COM_PINS_CONFIG2_MASK       GENMASK(5, 5)
  85 #define SSD130X_SET_COM_PINS_CONFIG2_SET(val)   FIELD_PREP(SSD130X_SET_COM_PINS_CONFIG2_MASK, (val))
  86
  87 #define SSD130X_SET_ADDRESS_MODE_HORIZONTAL     0x00
  88 #define SSD130X_SET_ADDRESS_MODE_VERTICAL       0x01
  89 #define SSD130X_SET_ADDRESS_MODE_PAGE           0x02
  90
  91 #define SSD130X_SET_AREA_COLOR_MODE_ENABLE      0x1e
  92 #define SSD130X_SET_AREA_COLOR_MODE_LOW_POWER   0x05
  93
  94 #define MAX_CONTRAST 255
  95
  96 const struct ssd130x_deviceinfo ssd130x_variants[] = {
  97         [SH1106_ID] = {
  98                 .default_vcomh = 0x40,
  99                 .default_dclk_div = 1,
 100                 .default_dclk_frq = 5,
 101                 .page_mode_only = 1,
 102         },
 103         [SSD1305_ID] = {
 104                 .default_vcomh = 0x34,
 105                 .default_dclk_div = 1,
 106                 .default_dclk_frq = 7,
 107         },
 108         [SSD1306_ID] = {
 109                 .default_vcomh = 0x20,
 110                 .default_dclk_div = 1,
 111                 .default_dclk_frq = 8,
 112                 .need_chargepump = 1,
 113         },
 114         [SSD1307_ID] = {
 115                 .default_vcomh = 0x20,
 116                 .default_dclk_div = 2,
 117                 .default_dclk_frq = 12,
 118                 .need_pwm = 1,
 119         },
 120         [SSD1309_ID] = {
 121                 .default_vcomh = 0x34,
 122                 .default_dclk_div = 1,
 123                 .default_dclk_frq = 10,
 124         }
 125 };
 126 EXPORT_SYMBOL_NS_GPL(ssd130x_variants, DRM_SSD130X);
 127
 128 static inline struct ssd130x_device *drm_to_ssd130x(struct drm_device *drm)
 129 {
 130         return container_of(drm, struct ssd130x_device, drm);
 131 }
 132
 133 /*
 134  * Helper to write data (SSD130X_DATA) to the device.
 135  */
 136 static int ssd130x_write_data(struct ssd130x_device *ssd130x, u8 *values, int count)
 137 {
 138         return regmap_bulk_write(ssd130x->regmap, SSD130X_DATA, values, count);
 139 }
 140
 141 /*
 142  * Helper to write command (SSD130X_COMMAND). The fist variadic argument
 143  * is the command to write and the following are the command options.
 144  *
 145  * Note that the ssd130x protocol requires each command and option to be
 146  * written as a SSD130X_COMMAND device register value. That is why a call
 147  * to regmap_write(..., SSD130X_COMMAND, ...) is done for each argument.
 148  */
 149 static int ssd130x_write_cmd(struct ssd130x_device *ssd130x, int count,
 150                              /* u8 cmd, u8 option, ... */...)
 151 {
 152         va_list ap;
 153         u8 value;
 154         int ret;
 155
 156         va_start(ap, count);
 157
 158         do {
 159                 value = va_arg(ap, int);
 160                 ret = regmap_write(ssd130x->regmap, SSD130X_COMMAND, value);
 161                 if (ret)
 162                         goto out_end;
 163         } while (--count);
 164
 165 out_end:
 166         va_end(ap);
 167
 168         return ret;
 169 }
 170
 171 /* Set address range for horizontal/vertical addressing modes */
 172 static int ssd130x_set_col_range(struct ssd130x_device *ssd130x,
 173                                  u8 col_start, u8 cols)
 174 {
 175         u8 col_end = col_start + cols - 1;
 176         int ret;
 177
 178         if (col_start == ssd130x->col_start && col_end == ssd130x->col_end)
 179                 return 0;
 180
 181         ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_COL_RANGE, col_start, col_end);
 182         if (ret < 0)
 183                 return ret;
 184
 185         ssd130x->col_start = col_start;
 186         ssd130x->col_end = col_end;
 187         return 0;
 188 }
 189
 190 static int ssd130x_set_page_range(struct ssd130x_device *ssd130x,
 191                                   u8 page_start, u8 pages)
 192 {
 193         u8 page_end = page_start + pages - 1;
 194         int ret;
 195
 196         if (page_start == ssd130x->page_start && page_end == ssd130x->page_end)
 197                 return 0;
 198
 199         ret = ssd130x_write_cmd(ssd130x, 3, SSD130X_SET_PAGE_RANGE, page_start, page_end);
 200         if (ret < 0)
 201                 return ret;
 202
 203         ssd130x->page_start = page_start;
 204         ssd130x->page_end = page_end;
 205         return 0;
 206 }
 207
 208 /* Set page and column start address for page addressing mode */
 209 static int ssd130x_set_page_pos(struct ssd130x_device *ssd130x,
 210                                 u8 page_start, u8 col_start)
 211 {
 212         int ret;
 213         u32 page, col_low, col_high;
 214
 215         page = SSD130X_START_PAGE_ADDRESS |
 216                SSD130X_START_PAGE_ADDRESS_SET(page_start);
 217         col_low = SSD130X_PAGE_COL_START_LOW |
 218                   SSD130X_PAGE_COL_START_LOW_SET(col_start);
 219         col_high = SSD130X_PAGE_COL_START_HIGH |
 220                    SSD130X_PAGE_COL_START_HIGH_SET(col_start);
 221         ret = ssd130x_write_cmd(ssd130x, 3, page, col_low, col_high);
 222         if (ret < 0)
 223                 return ret;
 224
 225         return 0;
 226 }
 227
 228 static int ssd130x_pwm_enable(struct ssd130x_device *ssd130x)
 229 {
 230         struct device *dev = ssd130x->dev;
 231         struct pwm_state pwmstate;
 232
 233         ssd130x->pwm = pwm_get(dev, NULL);
 234         if (IS_ERR(ssd130x->pwm)) {
 235                 dev_err(dev, "Could not get PWM from firmware description!\n");
 236                 return PTR_ERR(ssd130x->pwm);
 237         }
 238
 239         pwm_init_state(ssd130x->pwm, &pwmstate);
 240         pwm_set_relative_duty_cycle(&pwmstate, 50, 100);
 241         pwm_apply_state(ssd130x->pwm, &pwmstate);
 242
 243         /* Enable the PWM */
 244         pwm_enable(ssd130x->pwm);
 245
 246         dev_dbg(dev, "Using PWM%d with a %lluns period.\n",
 247                 ssd130x->pwm->pwm, pwm_get_period(ssd130x->pwm));
 248
 249         return 0;
 250 }
 251
 252 static void ssd130x_reset(struct ssd130x_device *ssd130x)
 253 {
 254         if (!ssd130x->reset)
 255                 return;
 256
 257         /* Reset the screen */
 258         gpiod_set_value_cansleep(ssd130x->reset, 1);
 259         udelay(4);
 260         gpiod_set_value_cansleep(ssd130x->reset, 0);
 261         udelay(4);
 262 }
 263
 264 static int ssd130x_power_on(struct ssd130x_device *ssd130x)
 265 {
 266         struct device *dev = ssd130x->dev;
 267         int ret;
 268
 269         ssd130x_reset(ssd130x);
 270
 271         ret = regulator_enable(ssd130x->vcc_reg);
 272         if (ret) {
 273                 dev_err(dev, "Failed to enable VCC: %d\n", ret);
 274                 return ret;
 275         }
 276
 277         if (ssd130x->device_info->need_pwm) {
 278                 ret = ssd130x_pwm_enable(ssd130x);
 279                 if (ret) {
 280                         dev_err(dev, "Failed to enable PWM: %d\n", ret);
 281                         regulator_disable(ssd130x->vcc_reg);
 282                         return ret;
 283                 }
 284         }
 285
 286         return 0;
 287 }
 288
 289 static void ssd130x_power_off(struct ssd130x_device *ssd130x)
 290 {
 291         pwm_disable(ssd130x->pwm);
 292         pwm_put(ssd130x->pwm);
 293
 294         regulator_disable(ssd130x->vcc_reg);
 295 }
 296
 297 static int ssd130x_init(struct ssd130x_device *ssd130x)
 298 {
 299         u32 precharge, dclk, com_invdir, compins, chargepump, seg_remap;
 300         int ret;
 301
 302         /* Set initial contrast */
 303         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CONTRAST, ssd130x->contrast);
 304         if (ret < 0)
 305                 return ret;
 306
 307         /* Set segment re-map */
 308         seg_remap = (SSD130X_SET_SEG_REMAP |
 309                      SSD130X_SET_SEG_REMAP_SET(ssd130x->seg_remap));
 310         ret = ssd130x_write_cmd(ssd130x, 1, seg_remap);
 311         if (ret < 0)
 312                 return ret;
 313
 314         /* Set COM direction */
 315         com_invdir = (SSD130X_SET_COM_SCAN_DIR |
 316                       SSD130X_SET_COM_SCAN_DIR_SET(ssd130x->com_invdir));
 317         ret = ssd130x_write_cmd(ssd130x,  1, com_invdir);
 318         if (ret < 0)
 319                 return ret;
 320
 321         /* Set multiplex ratio value */
 322         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_MULTIPLEX_RATIO, ssd130x->height - 1);
 323         if (ret < 0)
 324                 return ret;
 325
 326         /* set display offset value */
 327         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_DISPLAY_OFFSET, ssd130x->com_offset);
 328         if (ret < 0)
 329                 return ret;
 330
 331         /* Set clock frequency */
 332         dclk = (SSD130X_SET_CLOCK_DIV_SET(ssd130x->dclk_div - 1) |
 333                 SSD130X_SET_CLOCK_FREQ_SET(ssd130x->dclk_frq));
 334         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_CLOCK_FREQ, dclk);
 335         if (ret < 0)
 336                 return ret;
 337
 338         /* Set Area Color Mode ON/OFF & Low Power Display Mode */
 339         if (ssd130x->area_color_enable || ssd130x->low_power) {
 340                 u32 mode = 0;
 341
 342                 if (ssd130x->area_color_enable)
 343                         mode |= SSD130X_SET_AREA_COLOR_MODE_ENABLE;
 344
 345                 if (ssd130x->low_power)
 346                         mode |= SSD130X_SET_AREA_COLOR_MODE_LOW_POWER;
 347
 348                 ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_AREA_COLOR_MODE, mode);
 349                 if (ret < 0)
 350                         return ret;
 351         }
 352
 353         /* Set precharge period in number of ticks from the internal clock */
 354         precharge = (SSD130X_SET_PRECHARGE_PERIOD1_SET(ssd130x->prechargep1) |
 355                      SSD130X_SET_PRECHARGE_PERIOD2_SET(ssd130x->prechargep2));
 356         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_PRECHARGE_PERIOD, precharge);
 357         if (ret < 0)
 358                 return ret;
 359
 360         /* Set COM pins configuration */
 361         compins = BIT(1);
 362         compins |= (SSD130X_SET_COM_PINS_CONFIG1_SET(ssd130x->com_seq) |
 363                     SSD130X_SET_COM_PINS_CONFIG2_SET(ssd130x->com_lrremap));
 364         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_COM_PINS_CONFIG, compins);
 365         if (ret < 0)
 366                 return ret;
 367
 368         /* Set VCOMH */
 369         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_VCOMH, ssd130x->vcomh);
 370         if (ret < 0)
 371                 return ret;
 372
 373         /* Turn on the DC-DC Charge Pump */
 374         chargepump = BIT(4);
 375
 376         if (ssd130x->device_info->need_chargepump)
 377                 chargepump |= BIT(2);
 378
 379         ret = ssd130x_write_cmd(ssd130x, 2, SSD130X_CHARGE_PUMP, chargepump);
 380         if (ret < 0)
 381                 return ret;
 382
 383         /* Set lookup table */
 384         if (ssd130x->lookup_table_set) {
 385                 int i;
 386
 387                 ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_SET_LOOKUP_TABLE);
 388                 if (ret < 0)
 389                         return ret;
 390
 391                 for (i = 0; i < ARRAY_SIZE(ssd130x->lookup_table); i++) {
 392                         u8 val = ssd130x->lookup_table[i];
 393
 394                         if (val < 31 || val > 63)
 395                                 dev_warn(ssd130x->dev,
 396                                          "lookup table index %d value out of range 31 <= %d <= 63\n",
 397                                          i, val);
 398                         ret = ssd130x_write_cmd(ssd130x, 1, val);
 399                         if (ret < 0)
 400                                 return ret;
 401                 }
 402         }
 403
 404         /* Switch to page addressing mode */
 405         if (ssd130x->page_address_mode)
 406                 return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
 407                                          SSD130X_SET_ADDRESS_MODE_PAGE);
 408
 409         /* Switch to horizontal addressing mode */
 410         return ssd130x_write_cmd(ssd130x, 2, SSD130X_SET_ADDRESS_MODE,
 411                                  SSD130X_SET_ADDRESS_MODE_HORIZONTAL);
 412 }
 413
 414 static int ssd130x_update_rect(struct ssd130x_device *ssd130x, u8 *buf,
 415                                struct drm_rect *rect)
 416 {
 417         unsigned int x = rect->x1;
 418         unsigned int y = rect->y1;
 419         unsigned int width = drm_rect_width(rect);
 420         unsigned int height = drm_rect_height(rect);
 421         unsigned int line_length = DIV_ROUND_UP(width, 8);
 422         unsigned int pages = DIV_ROUND_UP(height, 8);
 423         struct drm_device *drm = &ssd130x->drm;
 424         u32 array_idx = 0;
 425         int ret, i, j, k;
 426         u8 *data_array = NULL;
 427
 428         drm_WARN_ONCE(drm, y % 8 != 0, "y must be aligned to screen page\n");
 429
 430         data_array = kcalloc(width, pages, GFP_KERNEL);
 431         if (!data_array)
 432                 return -ENOMEM;
 433
 434         /*
 435          * The screen is divided in pages, each having a height of 8
 436          * pixels, and the width of the screen. When sending a byte of
 437          * data to the controller, it gives the 8 bits for the current
 438          * column. I.e, the first byte are the 8 bits of the first
 439          * column, then the 8 bits for the second column, etc.
 440          *
 441          *
 442          * Representation of the screen, assuming it is 5 bits
 443          * wide. Each letter-number combination is a bit that controls
 444          * one pixel.
 445          *
 446          * A0 A1 A2 A3 A4
 447          * B0 B1 B2 B3 B4
 448          * C0 C1 C2 C3 C4
 449          * D0 D1 D2 D3 D4
 450          * E0 E1 E2 E3 E4
 451          * F0 F1 F2 F3 F4
 452          * G0 G1 G2 G3 G4
 453          * H0 H1 H2 H3 H4
 454          *
 455          * If you want to update this screen, you need to send 5 bytes:
 456          *  (1) A0 B0 C0 D0 E0 F0 G0 H0
 457          *  (2) A1 B1 C1 D1 E1 F1 G1 H1
 458          *  (3) A2 B2 C2 D2 E2 F2 G2 H2
 459          *  (4) A3 B3 C3 D3 E3 F3 G3 H3
 460          *  (5) A4 B4 C4 D4 E4 F4 G4 H4
 461          */
 462
 463         if (!ssd130x->page_address_mode) {
 464                 /* Set address range for horizontal addressing mode */
 465                 ret = ssd130x_set_col_range(ssd130x, ssd130x->col_offset + x, width);
 466                 if (ret < 0)
 467                         goto out_free;
 468
 469                 ret = ssd130x_set_page_range(ssd130x, ssd130x->page_offset + y / 8, pages);
 470                 if (ret < 0)
 471                         goto out_free;
 472         }
 473
 474         for (i = 0; i < pages; i++) {
 475                 int m = 8;
 476
 477                 /* Last page may be partial */
 478                 if (8 * (y / 8 + i + 1) > ssd130x->height)
 479                         m = ssd130x->height % 8;
 480                 for (j = 0; j < width; j++) {
 481                         u8 data = 0;
 482
 483                         for (k = 0; k < m; k++) {
 484                                 u8 byte = buf[(8 * i + k) * line_length + j / 8];
 485                                 u8 bit = (byte >> (j % 8)) & 1;
 486
 487                                 data |= bit << k;
 488                         }
 489                         data_array[array_idx++] = data;
 490                 }
 491
 492                 /*
 493                  * In page addressing mode, the start address needs to be reset,
 494                  * and each page then needs to be written out separately.
 495                  */
 496                 if (ssd130x->page_address_mode) {
 497                         ret = ssd130x_set_page_pos(ssd130x,
 498                                                    ssd130x->page_offset + i,
 499                                                    ssd130x->col_offset + x);
 500                         if (ret < 0)
 501                                 goto out_free;
 502
 503                         ret = ssd130x_write_data(ssd130x, data_array, width);
 504                         if (ret < 0)
 505                                 goto out_free;
 506
 507                         array_idx = 0;
 508                 }
 509         }
 510
 511         /* Write out update in one go if we aren't using page addressing mode */
 512         if (!ssd130x->page_address_mode)
 513                 ret = ssd130x_write_data(ssd130x, data_array, width * pages);
 514
 515 out_free:
 516         kfree(data_array);
 517         return ret;
 518 }
 519
 520 static void ssd130x_clear_screen(struct ssd130x_device *ssd130x)
 521 {
 522         u8 *buf = NULL;
 523         struct drm_rect fullscreen = {
 524                 .x1 = 0,
 525                 .x2 = ssd130x->width,
 526                 .y1 = 0,
 527                 .y2 = ssd130x->height,
 528         };
 529
 530         buf = kcalloc(DIV_ROUND_UP(ssd130x->width, 8), ssd130x->height,
 531                       GFP_KERNEL);
 532         if (!buf)
 533                 return;
 534
 535         ssd130x_update_rect(ssd130x, buf, &fullscreen);
 536
 537         kfree(buf);
 538 }
 539
 540 static int ssd130x_fb_blit_rect(struct drm_framebuffer *fb, const struct iosys_map *vmap,
 541                                 struct drm_rect *rect)
 542 {
 543         struct ssd130x_device *ssd130x = drm_to_ssd130x(fb->dev);
 544         struct iosys_map dst;
 545         unsigned int dst_pitch;
 546         int ret = 0;
 547         u8 *buf = NULL;
 548
 549         /* Align y to display page boundaries */
 550         rect->y1 = round_down(rect->y1, 8);
 551         rect->y2 = min_t(unsigned int, round_up(rect->y2, 8), ssd130x->height);
 552
 553         dst_pitch = DIV_ROUND_UP(drm_rect_width(rect), 8);
 554         buf = kcalloc(dst_pitch, drm_rect_height(rect), GFP_KERNEL);
 555         if (!buf)
 556                 return -ENOMEM;
 557
 558         iosys_map_set_vaddr(&dst, buf);
 559         drm_fb_xrgb8888_to_mono(&dst, &dst_pitch, vmap, fb, rect);
 560
 561         ssd130x_update_rect(ssd130x, buf, rect);
 562
 563         kfree(buf);
 564
 565         return ret;
 566 }
 567
 568 static int ssd130x_primary_plane_helper_atomic_check(struct drm_plane *plane,
 569                                                      struct drm_atomic_state *new_state)
 570 {
 571         struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(new_state, plane);
 572         struct drm_crtc *new_crtc = new_plane_state->crtc;
 573         struct drm_crtc_state *new_crtc_state = NULL;
 574
 575         if (new_crtc)
 576                 new_crtc_state = drm_atomic_get_new_crtc_state(new_state, new_crtc);
 577
 578         return drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
 579                                                    DRM_PLANE_NO_SCALING,
 580                                                    DRM_PLANE_NO_SCALING,
 581                                                    false, false);
 582 }
 583
 584 static void ssd130x_primary_plane_helper_atomic_update(struct drm_plane *plane,
 585                                                        struct drm_atomic_state *old_state)
 586 {
 587         struct drm_plane_state *plane_state = plane->state;
 588         struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(old_state, plane);
 589         struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
 590         struct drm_device *drm = plane->dev;
 591         struct drm_rect src_clip, dst_clip;
 592         int idx;
 593
 594         if (!drm_atomic_helper_damage_merged(old_plane_state, plane_state, &src_clip))
 595                 return;
 596
 597         dst_clip = plane_state->dst;
 598         if (!drm_rect_intersect(&dst_clip, &src_clip))
 599                 return;
 600
 601         if (!drm_dev_enter(drm, &idx))
 602                 return;
 603
 604         ssd130x_fb_blit_rect(plane_state->fb, &shadow_plane_state->data[0], &dst_clip);
 605
 606         drm_dev_exit(idx);
 607 }
 608
 609 static void ssd130x_primary_plane_helper_atomic_disable(struct drm_plane *plane,
 610                                                         struct drm_atomic_state *old_state)
 611 {
 612         struct drm_device *drm = plane->dev;
 613         struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
 614         int idx;
 615
 616         if (!drm_dev_enter(drm, &idx))
 617                 return;
 618
 619         ssd130x_clear_screen(ssd130x);
 620
 621         drm_dev_exit(idx);
 622 }
 623
 624 static const struct drm_plane_helper_funcs ssd130x_primary_plane_helper_funcs = {
 625         DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
 626         .atomic_check = ssd130x_primary_plane_helper_atomic_check,
 627         .atomic_update = ssd130x_primary_plane_helper_atomic_update,
 628         .atomic_disable = ssd130x_primary_plane_helper_atomic_disable,
 629 };
 630
 631 static const struct drm_plane_funcs ssd130x_primary_plane_funcs = {
 632         .update_plane = drm_atomic_helper_update_plane,
 633         .disable_plane = drm_atomic_helper_disable_plane,
 634         .destroy = drm_plane_cleanup,
 635         DRM_GEM_SHADOW_PLANE_FUNCS,
 636 };
 637
 638 static enum drm_mode_status ssd130x_crtc_helper_mode_valid(struct drm_crtc *crtc,
 639                                                            const struct drm_display_mode *mode)
 640 {
 641         struct ssd130x_device *ssd130x = drm_to_ssd130x(crtc->dev);
 642
 643         if (mode->hdisplay != ssd130x->mode.hdisplay &&
 644             mode->vdisplay != ssd130x->mode.vdisplay)
 645                 return MODE_ONE_SIZE;
 646         else if (mode->hdisplay != ssd130x->mode.hdisplay)
 647                 return MODE_ONE_WIDTH;
 648         else if (mode->vdisplay != ssd130x->mode.vdisplay)
 649                 return MODE_ONE_HEIGHT;
 650
 651         return MODE_OK;
 652 }
 653
 654 static int ssd130x_crtc_helper_atomic_check(struct drm_crtc *crtc,
 655                                             struct drm_atomic_state *new_state)
 656 {
 657         struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);
 658         int ret;
 659
 660         ret = drm_atomic_helper_check_crtc_state(new_crtc_state, false);
 661         if (ret)
 662                 return ret;
 663
 664         return drm_atomic_add_affected_planes(new_state, crtc);
 665 }
 666
 667 /*
 668  * The CRTC is always enabled. Screen updates are performed by
 669  * the primary plane's atomic_update function. Disabling clears
 670  * the screen in the primary plane's atomic_disable function.
 671  */
 672 static const struct drm_crtc_helper_funcs ssd130x_crtc_helper_funcs = {
 673         .mode_valid = ssd130x_crtc_helper_mode_valid,
 674         .atomic_check = ssd130x_crtc_helper_atomic_check,
 675 };
 676
 677 static void ssd130x_crtc_reset(struct drm_crtc *crtc)
 678 {
 679         struct drm_device *drm = crtc->dev;
 680         struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
 681
 682         ssd130x_init(ssd130x);
 683
 684         drm_atomic_helper_crtc_reset(crtc);
 685 }
 686
 687 static const struct drm_crtc_funcs ssd130x_crtc_funcs = {
 688         .reset = ssd130x_crtc_reset,
 689         .destroy = drm_crtc_cleanup,
 690         .set_config = drm_atomic_helper_set_config,
 691         .page_flip = drm_atomic_helper_page_flip,
 692         .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
 693         .atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
 694 };
 695
 696 static void ssd130x_encoder_helper_atomic_enable(struct drm_encoder *encoder,
 697                                                  struct drm_atomic_state *state)
 698 {
 699         struct drm_device *drm = encoder->dev;
 700         struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
 701         int ret;
 702
 703         ret = ssd130x_power_on(ssd130x);
 704         if (ret)
 705                 return;
 706
 707         ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_ON);
 708
 709         backlight_enable(ssd130x->bl_dev);
 710 }
 711
 712 static void ssd130x_encoder_helper_atomic_disable(struct drm_encoder *encoder,
 713                                                   struct drm_atomic_state *state)
 714 {
 715         struct drm_device *drm = encoder->dev;
 716         struct ssd130x_device *ssd130x = drm_to_ssd130x(drm);
 717
 718         backlight_disable(ssd130x->bl_dev);
 719
 720         ssd130x_write_cmd(ssd130x, 1, SSD130X_DISPLAY_OFF);
 721
 722         ssd130x_power_off(ssd130x);
 723 }
 724
 725 static const struct drm_encoder_helper_funcs ssd130x_encoder_helper_funcs = {
 726         .atomic_enable = ssd130x_encoder_helper_atomic_enable,
 727         .atomic_disable = ssd130x_encoder_helper_atomic_disable,
 728 };
 729
 730 static const struct drm_encoder_funcs ssd130x_encoder_funcs = {
 731         .destroy = drm_encoder_cleanup,
 732 };
 733
 734 static int ssd130x_connector_helper_get_modes(struct drm_connector *connector)
 735 {
 736         struct ssd130x_device *ssd130x = drm_to_ssd130x(connector->dev);
 737         struct drm_display_mode *mode;
 738         struct device *dev = ssd130x->dev;
 739
 740         mode = drm_mode_duplicate(connector->dev, &ssd130x->mode);
 741         if (!mode) {
 742                 dev_err(dev, "Failed to duplicated mode\n");
 743                 return 0;
 744         }
 745
 746         drm_mode_probed_add(connector, mode);
 747         drm_set_preferred_mode(connector, mode->hdisplay, mode->vdisplay);
 748
 749         /* There is only a single mode */
 750         return 1;
 751 }
 752
 753 static const struct drm_connector_helper_funcs ssd130x_connector_helper_funcs = {
 754         .get_modes = ssd130x_connector_helper_get_modes,
 755 };
 756
 757 static const struct drm_connector_funcs ssd130x_connector_funcs = {
 758         .reset = drm_atomic_helper_connector_reset,
 759         .fill_modes = drm_helper_probe_single_connector_modes,
 760         .destroy = drm_connector_cleanup,
 761         .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
 762         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 763 };
 764
 765 static const struct drm_mode_config_funcs ssd130x_mode_config_funcs = {
 766         .fb_create = drm_gem_fb_create_with_dirty,
 767         .atomic_check = drm_atomic_helper_check,
 768         .atomic_commit = drm_atomic_helper_commit,
 769 };
 770
 771 static const uint32_t ssd130x_formats[] = {
 772         DRM_FORMAT_XRGB8888,
 773 };
 774
 775 DEFINE_DRM_GEM_FOPS(ssd130x_fops);
 776
 777 static const struct drm_driver ssd130x_drm_driver = {
 778         DRM_GEM_SHMEM_DRIVER_OPS,
 779         .name                   = DRIVER_NAME,
 780         .desc                   = DRIVER_DESC,
 781         .date                   = DRIVER_DATE,
 782         .major                  = DRIVER_MAJOR,
 783         .minor                  = DRIVER_MINOR,
 784         .driver_features        = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET,
 785         .fops                   = &ssd130x_fops,
 786 };
 787
 788 static int ssd130x_update_bl(struct backlight_device *bdev)
 789 {
 790         struct ssd130x_device *ssd130x = bl_get_data(bdev);
 791         int brightness = backlight_get_brightness(bdev);
 792         int ret;
 793
 794         ssd130x->contrast = brightness;
 795
 796         ret = ssd130x_write_cmd(ssd130x, 1, SSD130X_CONTRAST);
 797         if (ret < 0)
 798                 return ret;
 799
 800         ret = ssd130x_write_cmd(ssd130x, 1, ssd130x->contrast);
 801         if (ret < 0)
 802                 return ret;
 803
 804         return 0;
 805 }
 806
 807 static const struct backlight_ops ssd130xfb_bl_ops = {
 808         .update_status  = ssd130x_update_bl,
 809 };
 810
 811 static void ssd130x_parse_properties(struct ssd130x_device *ssd130x)
 812 {
 813         struct device *dev = ssd130x->dev;
 814
 815         if (device_property_read_u32(dev, "solomon,width", &ssd130x->width))
 816                 ssd130x->width = 96;
 817
 818         if (device_property_read_u32(dev, "solomon,height", &ssd130x->height))
 819                 ssd130x->height = 16;
 820
 821         if (device_property_read_u32(dev, "solomon,page-offset", &ssd130x->page_offset))
 822                 ssd130x->page_offset = 1;
 823
 824         if (device_property_read_u32(dev, "solomon,col-offset", &ssd130x->col_offset))
 825                 ssd130x->col_offset = 0;
 826
 827         if (device_property_read_u32(dev, "solomon,com-offset", &ssd130x->com_offset))
 828                 ssd130x->com_offset = 0;
 829
 830         if (device_property_read_u32(dev, "solomon,prechargep1", &ssd130x->prechargep1))
 831                 ssd130x->prechargep1 = 2;
 832
 833         if (device_property_read_u32(dev, "solomon,prechargep2", &ssd130x->prechargep2))
 834                 ssd130x->prechargep2 = 2;
 835
 836         if (!device_property_read_u8_array(dev, "solomon,lookup-table",
 837                                            ssd130x->lookup_table,
 838                                            ARRAY_SIZE(ssd130x->lookup_table)))
 839                 ssd130x->lookup_table_set = 1;
 840
 841         ssd130x->seg_remap = !device_property_read_bool(dev, "solomon,segment-no-remap");
 842         ssd130x->com_seq = device_property_read_bool(dev, "solomon,com-seq");
 843         ssd130x->com_lrremap = device_property_read_bool(dev, "solomon,com-lrremap");
 844         ssd130x->com_invdir = device_property_read_bool(dev, "solomon,com-invdir");
 845         ssd130x->area_color_enable =
 846                 device_property_read_bool(dev, "solomon,area-color-enable");
 847         ssd130x->low_power = device_property_read_bool(dev, "solomon,low-power");
 848
 849         ssd130x->contrast = 127;
 850         ssd130x->vcomh = ssd130x->device_info->default_vcomh;
 851
 852         /* Setup display timing */
 853         if (device_property_read_u32(dev, "solomon,dclk-div", &ssd130x->dclk_div))
 854                 ssd130x->dclk_div = ssd130x->device_info->default_dclk_div;
 855         if (device_property_read_u32(dev, "solomon,dclk-frq", &ssd130x->dclk_frq))
 856                 ssd130x->dclk_frq = ssd130x->device_info->default_dclk_frq;
 857 }
 858
 859 static int ssd130x_init_modeset(struct ssd130x_device *ssd130x)
 860 {
 861         struct drm_display_mode *mode = &ssd130x->mode;
 862         struct device *dev = ssd130x->dev;
 863         struct drm_device *drm = &ssd130x->drm;
 864         unsigned long max_width, max_height;
 865         struct drm_plane *primary_plane;
 866         struct drm_crtc *crtc;
 867         struct drm_encoder *encoder;
 868         struct drm_connector *connector;
 869         int ret;
 870
 871         /*
 872          * Modesetting
 873          */
 874
 875         ret = drmm_mode_config_init(drm);
 876         if (ret) {
 877                 dev_err(dev, "DRM mode config init failed: %d\n", ret);
 878                 return ret;
 879         }
 880
 881         mode->type = DRM_MODE_TYPE_DRIVER;
 882         mode->clock = 1;
 883         mode->hdisplay = mode->htotal = ssd130x->width;
 884         mode->hsync_start = mode->hsync_end = ssd130x->width;
 885         mode->vdisplay = mode->vtotal = ssd130x->height;
 886         mode->vsync_start = mode->vsync_end = ssd130x->height;
 887         mode->width_mm = 27;
 888         mode->height_mm = 27;
 889
 890         max_width = max_t(unsigned long, mode->hdisplay, DRM_SHADOW_PLANE_MAX_WIDTH);
 891         max_height = max_t(unsigned long, mode->vdisplay, DRM_SHADOW_PLANE_MAX_HEIGHT);
 892
 893         drm->mode_config.min_width = mode->hdisplay;
 894         drm->mode_config.max_width = max_width;
 895         drm->mode_config.min_height = mode->vdisplay;
 896         drm->mode_config.max_height = max_height;
 897         drm->mode_config.preferred_depth = 32;
 898         drm->mode_config.funcs = &ssd130x_mode_config_funcs;
 899
 900         /* Primary plane */
 901
 902         primary_plane = &ssd130x->primary_plane;
 903         ret = drm_universal_plane_init(drm, primary_plane, 0, &ssd130x_primary_plane_funcs,
 904                                        ssd130x_formats, ARRAY_SIZE(ssd130x_formats),
 905                                        NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
 906         if (ret) {
 907                 dev_err(dev, "DRM primary plane init failed: %d\n", ret);
 908                 return ret;
 909         }
 910
 911         drm_plane_helper_add(primary_plane, &ssd130x_primary_plane_helper_funcs);
 912
 913         drm_plane_enable_fb_damage_clips(primary_plane);
 914
 915         /* CRTC */
 916
 917         crtc = &ssd130x->crtc;
 918         ret = drm_crtc_init_with_planes(drm, crtc, primary_plane, NULL,
 919                                         &ssd130x_crtc_funcs, NULL);
 920         if (ret) {
 921                 dev_err(dev, "DRM crtc init failed: %d\n", ret);
 922                 return ret;
 923         }
 924
 925         drm_crtc_helper_add(crtc, &ssd130x_crtc_helper_funcs);
 926
 927         /* Encoder */
 928
 929         encoder = &ssd130x->encoder;
 930         ret = drm_encoder_init(drm, encoder, &ssd130x_encoder_funcs,
 931                                DRM_MODE_ENCODER_NONE, NULL);
 932         if (ret) {
 933                 dev_err(dev, "DRM encoder init failed: %d\n", ret);
 934                 return ret;
 935         }
 936
 937         drm_encoder_helper_add(encoder, &ssd130x_encoder_helper_funcs);
 938
 939         encoder->possible_crtcs = drm_crtc_mask(crtc);
 940
 941         /* Connector */
 942
 943         connector = &ssd130x->connector;
 944         ret = drm_connector_init(drm, connector, &ssd130x_connector_funcs,
 945                                  DRM_MODE_CONNECTOR_Unknown);
 946         if (ret) {
 947                 dev_err(dev, "DRM connector init failed: %d\n", ret);
 948                 return ret;
 949         }
 950
 951         drm_connector_helper_add(connector, &ssd130x_connector_helper_funcs);
 952
 953         ret = drm_connector_attach_encoder(connector, encoder);
 954         if (ret) {
 955                 dev_err(dev, "DRM attach connector to encoder failed: %d\n", ret);
 956                 return ret;
 957         }
 958
 959         drm_mode_config_reset(drm);
 960
 961         return 0;
 962 }
 963
 964 static int ssd130x_get_resources(struct ssd130x_device *ssd130x)
 965 {
 966         struct device *dev = ssd130x->dev;
 967
 968         ssd130x->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
 969         if (IS_ERR(ssd130x->reset))
 970                 return dev_err_probe(dev, PTR_ERR(ssd130x->reset),
 971                                      "Failed to get reset gpio\n");
 972
 973         ssd130x->vcc_reg = devm_regulator_get(dev, "vcc");
 974         if (IS_ERR(ssd130x->vcc_reg))
 975                 return dev_err_probe(dev, PTR_ERR(ssd130x->vcc_reg),
 976                                      "Failed to get VCC regulator\n");
 977
 978         return 0;
 979 }
 980
 981 struct ssd130x_device *ssd130x_probe(struct device *dev, struct regmap *regmap)
 982 {
 983         struct ssd130x_device *ssd130x;
 984         struct backlight_device *bl;
 985         struct drm_device *drm;
 986         int ret;
 987
 988         ssd130x = devm_drm_dev_alloc(dev, &ssd130x_drm_driver,
 989                                      struct ssd130x_device, drm);
 990         if (IS_ERR(ssd130x))
 991                 return ERR_PTR(dev_err_probe(dev, PTR_ERR(ssd130x),
 992                                              "Failed to allocate DRM device\n"));
 993
 994         drm = &ssd130x->drm;
 995
 996         ssd130x->dev = dev;
 997         ssd130x->regmap = regmap;
 998         ssd130x->device_info = device_get_match_data(dev);
 999
1000         if (ssd130x->device_info->page_mode_only)
1001                 ssd130x->page_address_mode = 1;
1002
1003         ssd130x_parse_properties(ssd130x);
1004
1005         ret = ssd130x_get_resources(ssd130x);
1006         if (ret)
1007                 return ERR_PTR(ret);
1008
1009         bl = devm_backlight_device_register(dev, dev_name(dev), dev, ssd130x,
1010                                             &ssd130xfb_bl_ops, NULL);
1011         if (IS_ERR(bl))
1012                 return ERR_PTR(dev_err_probe(dev, PTR_ERR(bl),
1013                                              "Unable to register backlight device\n"));
1014
1015         bl->props.brightness = ssd130x->contrast;
1016         bl->props.max_brightness = MAX_CONTRAST;
1017         ssd130x->bl_dev = bl;
1018
1019         ret = ssd130x_init_modeset(ssd130x);
1020         if (ret)
1021                 return ERR_PTR(ret);
1022
1023         ret = drm_dev_register(drm, 0);
1024         if (ret)
1025                 return ERR_PTR(dev_err_probe(dev, ret, "DRM device register failed\n"));
1026
1027         drm_fbdev_generic_setup(drm, 0);
1028
1029         return ssd130x;
1030 }
1031 EXPORT_SYMBOL_GPL(ssd130x_probe);
1032
1033 void ssd130x_remove(struct ssd130x_device *ssd130x)
1034 {
1035         drm_dev_unplug(&ssd130x->drm);
1036 }
1037 EXPORT_SYMBOL_GPL(ssd130x_remove);
1038
1039 void ssd130x_shutdown(struct ssd130x_device *ssd130x)
1040 {
1041         drm_atomic_helper_shutdown(&ssd130x->drm);
1042 }
1043 EXPORT_SYMBOL_GPL(ssd130x_shutdown);
1044
1045 MODULE_DESCRIPTION(DRIVER_DESC);
1046 MODULE_AUTHOR("Javier Martinez Canillas <javierm@redhat.com>");
1047 MODULE_LICENSE("GPL v2");