2 * Copyright 2013 Advanced Micro Devices, Inc.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
25 * Authors: Christian König <christian.koenig@amd.com>
28 #include <linux/firmware.h>
29 #include <linux/module.h>
34 #include "radeon_asic.h"
38 #define FIRMWARE_BONAIRE "radeon/BONAIRE_vce.bin"
40 MODULE_FIRMWARE(FIRMWARE_BONAIRE);
43 * radeon_vce_init - allocate memory, load vce firmware
45 * @rdev: radeon_device pointer
47 * First step to get VCE online, allocate memory and load the firmware
49 int radeon_vce_init(struct radeon_device *rdev)
51 unsigned long bo_size;
55 switch (rdev->family) {
59 fw_name = FIRMWARE_BONAIRE;
66 r = request_firmware(&rdev->vce_fw, fw_name, rdev->dev);
68 dev_err(rdev->dev, "radeon_vce: Can't load firmware \"%s\"\n",
73 bo_size = RADEON_GPU_PAGE_ALIGN(rdev->vce_fw->size) +
74 RADEON_VCE_STACK_SIZE + RADEON_VCE_HEAP_SIZE;
75 r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true,
76 RADEON_GEM_DOMAIN_VRAM, NULL, &rdev->vce.vcpu_bo);
78 dev_err(rdev->dev, "(%d) failed to allocate VCE bo\n", r);
82 r = radeon_vce_resume(rdev);
86 memset(rdev->vce.cpu_addr, 0, bo_size);
87 memcpy(rdev->vce.cpu_addr, rdev->vce_fw->data, rdev->vce_fw->size);
89 r = radeon_vce_suspend(rdev);
93 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
94 atomic_set(&rdev->vce.handles[i], 0);
95 rdev->vce.filp[i] = NULL;
102 * radeon_vce_fini - free memory
104 * @rdev: radeon_device pointer
106 * Last step on VCE teardown, free firmware memory
108 void radeon_vce_fini(struct radeon_device *rdev)
110 radeon_vce_suspend(rdev);
111 radeon_bo_unref(&rdev->vce.vcpu_bo);
115 * radeon_vce_suspend - unpin VCE fw memory
117 * @rdev: radeon_device pointer
119 * TODO: Test VCE suspend/resume
121 int radeon_vce_suspend(struct radeon_device *rdev)
125 if (rdev->vce.vcpu_bo == NULL)
128 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
130 radeon_bo_kunmap(rdev->vce.vcpu_bo);
131 radeon_bo_unpin(rdev->vce.vcpu_bo);
132 radeon_bo_unreserve(rdev->vce.vcpu_bo);
138 * radeon_vce_resume - pin VCE fw memory
140 * @rdev: radeon_device pointer
142 * TODO: Test VCE suspend/resume
144 int radeon_vce_resume(struct radeon_device *rdev)
148 if (rdev->vce.vcpu_bo == NULL)
151 r = radeon_bo_reserve(rdev->vce.vcpu_bo, false);
153 radeon_bo_unref(&rdev->vce.vcpu_bo);
154 dev_err(rdev->dev, "(%d) failed to reserve VCE bo\n", r);
158 r = radeon_bo_pin(rdev->vce.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
159 &rdev->vce.gpu_addr);
161 radeon_bo_unreserve(rdev->vce.vcpu_bo);
162 radeon_bo_unref(&rdev->vce.vcpu_bo);
163 dev_err(rdev->dev, "(%d) VCE bo pin failed\n", r);
167 r = radeon_bo_kmap(rdev->vce.vcpu_bo, &rdev->vce.cpu_addr);
169 dev_err(rdev->dev, "(%d) VCE map failed\n", r);
173 radeon_bo_unreserve(rdev->vce.vcpu_bo);
179 * radeon_vce_free_handles - free still open VCE handles
181 * @rdev: radeon_device pointer
182 * @filp: drm file pointer
184 * Close all VCE handles still open by this file pointer
186 void radeon_vce_free_handles(struct radeon_device *rdev, struct drm_file *filp)
189 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
190 uint32_t handle = atomic_read(&rdev->vce.handles[i]);
191 if (!handle || rdev->vce.filp[i] != filp)
194 r = radeon_vce_get_destroy_msg(rdev, TN_RING_TYPE_VCE1_INDEX,
197 DRM_ERROR("Error destroying VCE handle (%d)!\n", r);
199 rdev->vce.filp[i] = NULL;
200 atomic_set(&rdev->vce.handles[i], 0);
205 * radeon_vce_get_create_msg - generate a VCE create msg
207 * @rdev: radeon_device pointer
208 * @ring: ring we should submit the msg to
209 * @handle: VCE session handle to use
210 * @fence: optional fence to return
212 * Open up a stream for HW test
214 int radeon_vce_get_create_msg(struct radeon_device *rdev, int ring,
215 uint32_t handle, struct radeon_fence **fence)
217 const unsigned ib_size_dw = 1024;
222 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
224 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
228 dummy = ib.gpu_addr + 1024;
230 /* stitch together an VCE create msg */
232 ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
233 ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
234 ib.ptr[ib.length_dw++] = handle;
236 ib.ptr[ib.length_dw++] = 0x00000030; /* len */
237 ib.ptr[ib.length_dw++] = 0x01000001; /* create cmd */
238 ib.ptr[ib.length_dw++] = 0x00000000;
239 ib.ptr[ib.length_dw++] = 0x00000042;
240 ib.ptr[ib.length_dw++] = 0x0000000a;
241 ib.ptr[ib.length_dw++] = 0x00000001;
242 ib.ptr[ib.length_dw++] = 0x00000080;
243 ib.ptr[ib.length_dw++] = 0x00000060;
244 ib.ptr[ib.length_dw++] = 0x00000100;
245 ib.ptr[ib.length_dw++] = 0x00000100;
246 ib.ptr[ib.length_dw++] = 0x0000000c;
247 ib.ptr[ib.length_dw++] = 0x00000000;
249 ib.ptr[ib.length_dw++] = 0x00000014; /* len */
250 ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
251 ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
252 ib.ptr[ib.length_dw++] = dummy;
253 ib.ptr[ib.length_dw++] = 0x00000001;
255 for (i = ib.length_dw; i < ib_size_dw; ++i)
258 r = radeon_ib_schedule(rdev, &ib, NULL);
260 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
264 *fence = radeon_fence_ref(ib.fence);
266 radeon_ib_free(rdev, &ib);
272 * radeon_vce_get_destroy_msg - generate a VCE destroy msg
274 * @rdev: radeon_device pointer
275 * @ring: ring we should submit the msg to
276 * @handle: VCE session handle to use
277 * @fence: optional fence to return
279 * Close up a stream for HW test or if userspace failed to do so
281 int radeon_vce_get_destroy_msg(struct radeon_device *rdev, int ring,
282 uint32_t handle, struct radeon_fence **fence)
284 const unsigned ib_size_dw = 1024;
289 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
291 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
295 dummy = ib.gpu_addr + 1024;
297 /* stitch together an VCE destroy msg */
299 ib.ptr[ib.length_dw++] = 0x0000000c; /* len */
300 ib.ptr[ib.length_dw++] = 0x00000001; /* session cmd */
301 ib.ptr[ib.length_dw++] = handle;
303 ib.ptr[ib.length_dw++] = 0x00000014; /* len */
304 ib.ptr[ib.length_dw++] = 0x05000005; /* feedback buffer */
305 ib.ptr[ib.length_dw++] = upper_32_bits(dummy);
306 ib.ptr[ib.length_dw++] = dummy;
307 ib.ptr[ib.length_dw++] = 0x00000001;
309 ib.ptr[ib.length_dw++] = 0x00000008; /* len */
310 ib.ptr[ib.length_dw++] = 0x02000001; /* destroy cmd */
312 for (i = ib.length_dw; i < ib_size_dw; ++i)
315 r = radeon_ib_schedule(rdev, &ib, NULL);
317 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
321 *fence = radeon_fence_ref(ib.fence);
323 radeon_ib_free(rdev, &ib);
329 * radeon_vce_cs_reloc - command submission relocation
332 * @lo: address of lower dword
333 * @hi: address of higher dword
335 * Patch relocation inside command stream with real buffer address
337 int radeon_vce_cs_reloc(struct radeon_cs_parser *p, int lo, int hi)
339 struct radeon_cs_chunk *relocs_chunk;
343 relocs_chunk = &p->chunks[p->chunk_relocs_idx];
344 offset = radeon_get_ib_value(p, lo);
345 idx = radeon_get_ib_value(p, hi);
347 if (idx >= relocs_chunk->length_dw) {
348 DRM_ERROR("Relocs at %d after relocations chunk end %d !\n",
349 idx, relocs_chunk->length_dw);
353 offset += p->relocs_ptr[(idx / 4)]->lobj.gpu_offset;
355 p->ib.ptr[lo] = offset & 0xFFFFFFFF;
356 p->ib.ptr[hi] = offset >> 32;
362 * radeon_vce_cs_parse - parse and validate the command stream
367 int radeon_vce_cs_parse(struct radeon_cs_parser *p)
370 bool destroy = false;
373 while (p->idx < p->chunks[p->chunk_ib_idx].length_dw) {
374 uint32_t len = radeon_get_ib_value(p, p->idx);
375 uint32_t cmd = radeon_get_ib_value(p, p->idx + 1);
377 if ((len < 8) || (len & 3)) {
378 DRM_ERROR("invalid VCE command length (%d)!\n", len);
383 case 0x00000001: // session
384 handle = radeon_get_ib_value(p, p->idx + 2);
387 case 0x00000002: // task info
388 case 0x01000001: // create
389 case 0x04000001: // config extension
390 case 0x04000002: // pic control
391 case 0x04000005: // rate control
392 case 0x04000007: // motion estimation
393 case 0x04000008: // rdo
396 case 0x03000001: // encode
397 r = radeon_vce_cs_reloc(p, p->idx + 10, p->idx + 9);
401 r = radeon_vce_cs_reloc(p, p->idx + 12, p->idx + 11);
406 case 0x02000001: // destroy
410 case 0x05000001: // context buffer
411 case 0x05000004: // video bitstream buffer
412 case 0x05000005: // feedback buffer
413 r = radeon_vce_cs_reloc(p, p->idx + 3, p->idx + 2);
419 DRM_ERROR("invalid VCE command (0x%x)!\n", cmd);
427 /* IB contains a destroy msg, free the handle */
428 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i)
429 atomic_cmpxchg(&p->rdev->vce.handles[i], handle, 0);
434 /* create or encode, validate the handle */
435 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
436 if (atomic_read(&p->rdev->vce.handles[i]) == handle)
440 /* handle not found try to alloc a new one */
441 for (i = 0; i < RADEON_MAX_VCE_HANDLES; ++i) {
442 if (!atomic_cmpxchg(&p->rdev->vce.handles[i], 0, handle)) {
443 p->rdev->vce.filp[i] = p->filp;
448 DRM_ERROR("No more free VCE handles!\n");
453 * radeon_vce_semaphore_emit - emit a semaphore command
455 * @rdev: radeon_device pointer
456 * @ring: engine to use
457 * @semaphore: address of semaphore
458 * @emit_wait: true=emit wait, false=emit signal
461 bool radeon_vce_semaphore_emit(struct radeon_device *rdev,
462 struct radeon_ring *ring,
463 struct radeon_semaphore *semaphore,
466 uint64_t addr = semaphore->gpu_addr;
468 radeon_ring_write(ring, VCE_CMD_SEMAPHORE);
469 radeon_ring_write(ring, (addr >> 3) & 0x000FFFFF);
470 radeon_ring_write(ring, (addr >> 23) & 0x000FFFFF);
471 radeon_ring_write(ring, 0x01003000 | (emit_wait ? 1 : 0));
473 radeon_ring_write(ring, VCE_CMD_END);
479 * radeon_vce_ib_execute - execute indirect buffer
481 * @rdev: radeon_device pointer
482 * @ib: the IB to execute
485 void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
487 struct radeon_ring *ring = &rdev->ring[ib->ring];
488 radeon_ring_write(ring, VCE_CMD_IB);
489 radeon_ring_write(ring, ib->gpu_addr);
490 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr));
491 radeon_ring_write(ring, ib->length_dw);
495 * radeon_vce_fence_emit - add a fence command to the ring
497 * @rdev: radeon_device pointer
501 void radeon_vce_fence_emit(struct radeon_device *rdev,
502 struct radeon_fence *fence)
504 struct radeon_ring *ring = &rdev->ring[fence->ring];
505 uint32_t addr = rdev->fence_drv[fence->ring].gpu_addr;
507 radeon_ring_write(ring, VCE_CMD_FENCE);
508 radeon_ring_write(ring, addr);
509 radeon_ring_write(ring, upper_32_bits(addr));
510 radeon_ring_write(ring, fence->seq);
511 radeon_ring_write(ring, VCE_CMD_TRAP);
512 radeon_ring_write(ring, VCE_CMD_END);
516 * radeon_vce_ring_test - test if VCE ring is working
518 * @rdev: radeon_device pointer
519 * @ring: the engine to test on
522 int radeon_vce_ring_test(struct radeon_device *rdev, struct radeon_ring *ring)
524 uint32_t rptr = vce_v1_0_get_rptr(rdev, ring);
528 r = radeon_ring_lock(rdev, ring, 16);
530 DRM_ERROR("radeon: vce failed to lock ring %d (%d).\n",
534 radeon_ring_write(ring, VCE_CMD_END);
535 radeon_ring_unlock_commit(rdev, ring);
537 for (i = 0; i < rdev->usec_timeout; i++) {
538 if (vce_v1_0_get_rptr(rdev, ring) != rptr)
543 if (i < rdev->usec_timeout) {
544 DRM_INFO("ring test on %d succeeded in %d usecs\n",
547 DRM_ERROR("radeon: ring %d test failed\n",
556 * radeon_vce_ib_test - test if VCE IBs are working
558 * @rdev: radeon_device pointer
559 * @ring: the engine to test on
562 int radeon_vce_ib_test(struct radeon_device *rdev, struct radeon_ring *ring)
564 struct radeon_fence *fence = NULL;
567 r = radeon_vce_get_create_msg(rdev, ring->idx, 1, NULL);
569 DRM_ERROR("radeon: failed to get create msg (%d).\n", r);
573 r = radeon_vce_get_destroy_msg(rdev, ring->idx, 1, &fence);
575 DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r);
579 r = radeon_fence_wait(fence, false);
581 DRM_ERROR("radeon: fence wait failed (%d).\n", r);
583 DRM_INFO("ib test on ring %d succeeded\n", ring->idx);
586 radeon_fence_unref(&fence);