drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_agpsupport.h>
  42 #include <drm/drm_debugfs.h>
  43 #include <drm/drm_device.h>
  44 #include <drm/drm_file.h>
  45 #include <drm/drm_prime.h>
  46 #include <drm/radeon_drm.h>
  47 #include <drm/ttm/ttm_bo_api.h>
  48 #include <drm/ttm/ttm_bo_driver.h>
  49 #include <drm/ttm/ttm_module.h>
  50 #include <drm/ttm/ttm_page_alloc.h>
  51 #include <drm/ttm/ttm_placement.h>
  52
  53 #include "radeon_reg.h"
  54 #include "radeon.h"
  55
  56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  58
  59 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  60 {
  61         struct radeon_mman *mman;
  62         struct radeon_device *rdev;
  63
  64         mman = container_of(bdev, struct radeon_mman, bdev);
  65         rdev = container_of(mman, struct radeon_device, mman);
  66         return rdev;
  67 }
  68
  69 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
  70                                 struct ttm_mem_type_manager *man)
  71 {
  72         struct radeon_device *rdev;
  73
  74         rdev = radeon_get_rdev(bdev);
  75
  76         switch (type) {
  77         case TTM_PL_SYSTEM:
  78                 /* System memory */
  79                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
  80                 man->available_caching = TTM_PL_MASK_CACHING;
  81                 man->default_caching = TTM_PL_FLAG_CACHED;
  82                 break;
  83         case TTM_PL_TT:
  84                 man->func = &ttm_bo_manager_func;
  85                 man->available_caching = TTM_PL_MASK_CACHING;
  86                 man->default_caching = TTM_PL_FLAG_CACHED;
  87                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
  88 #if IS_ENABLED(CONFIG_AGP)
  89                 if (rdev->flags & RADEON_IS_AGP) {
  90                         if (!rdev->ddev->agp) {
  91                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
  92                                           (unsigned)type);
  93                                 return -EINVAL;
  94                         }
  95                         if (!rdev->ddev->agp->cant_use_aperture)
  96                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
  97                         man->available_caching = TTM_PL_FLAG_UNCACHED |
  98                                                  TTM_PL_FLAG_WC;
  99                         man->default_caching = TTM_PL_FLAG_WC;
 100                 }
 101 #endif
 102                 break;
 103         case TTM_PL_VRAM:
 104                 /* "On-card" video ram */
 105                 man->func = &ttm_bo_manager_func;
 106                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 107                              TTM_MEMTYPE_FLAG_MAPPABLE;
 108                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 109                 man->default_caching = TTM_PL_FLAG_WC;
 110                 break;
 111         default:
 112                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 113                 return -EINVAL;
 114         }
 115         return 0;
 116 }
 117
 118 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 119                                 struct ttm_placement *placement)
 120 {
 121         static const struct ttm_place placements = {
 122                 .fpfn = 0,
 123                 .lpfn = 0,
 124                 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
 125         };
 126
 127         struct radeon_bo *rbo;
 128
 129         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 130                 placement->placement = &placements;
 131                 placement->busy_placement = &placements;
 132                 placement->num_placement = 1;
 133                 placement->num_busy_placement = 1;
 134                 return;
 135         }
 136         rbo = container_of(bo, struct radeon_bo, tbo);
 137         switch (bo->mem.mem_type) {
 138         case TTM_PL_VRAM:
 139                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 140                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 141                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 142                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 143                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 144                         int i;
 145
 146                         /* Try evicting to the CPU inaccessible part of VRAM
 147                          * first, but only set GTT as busy placement, so this
 148                          * BO will be evicted to GTT rather than causing other
 149                          * BOs to be evicted from VRAM
 150                          */
 151                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 152                                                          RADEON_GEM_DOMAIN_GTT);
 153                         rbo->placement.num_busy_placement = 0;
 154                         for (i = 0; i < rbo->placement.num_placement; i++) {
 155                                 if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) {
 156                                         if (rbo->placements[i].fpfn < fpfn)
 157                                                 rbo->placements[i].fpfn = fpfn;
 158                                 } else {
 159                                         rbo->placement.busy_placement =
 160                                                 &rbo->placements[i];
 161                                         rbo->placement.num_busy_placement = 1;
 162                                 }
 163                         }
 164                 } else
 165                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 166                 break;
 167         case TTM_PL_TT:
 168         default:
 169                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 170         }
 171         *placement = rbo->placement;
 172 }
 173
 174 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 175 {
 176         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 177
 178         if (radeon_ttm_tt_has_userptr(bo->ttm))
 179                 return -EPERM;
 180         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
 181                                           filp->private_data);
 182 }
 183
 184 static void radeon_move_null(struct ttm_buffer_object *bo,
 185                              struct ttm_mem_reg *new_mem)
 186 {
 187         struct ttm_mem_reg *old_mem = &bo->mem;
 188
 189         BUG_ON(old_mem->mm_node != NULL);
 190         *old_mem = *new_mem;
 191         new_mem->mm_node = NULL;
 192 }
 193
 194 static int radeon_move_blit(struct ttm_buffer_object *bo,
 195                         bool evict, bool no_wait_gpu,
 196                         struct ttm_mem_reg *new_mem,
 197                         struct ttm_mem_reg *old_mem)
 198 {
 199         struct radeon_device *rdev;
 200         uint64_t old_start, new_start;
 201         struct radeon_fence *fence;
 202         unsigned num_pages;
 203         int r, ridx;
 204
 205         rdev = radeon_get_rdev(bo->bdev);
 206         ridx = radeon_copy_ring_index(rdev);
 207         old_start = (u64)old_mem->start << PAGE_SHIFT;
 208         new_start = (u64)new_mem->start << PAGE_SHIFT;
 209
 210         switch (old_mem->mem_type) {
 211         case TTM_PL_VRAM:
 212                 old_start += rdev->mc.vram_start;
 213                 break;
 214         case TTM_PL_TT:
 215                 old_start += rdev->mc.gtt_start;
 216                 break;
 217         default:
 218                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 219                 return -EINVAL;
 220         }
 221         switch (new_mem->mem_type) {
 222         case TTM_PL_VRAM:
 223                 new_start += rdev->mc.vram_start;
 224                 break;
 225         case TTM_PL_TT:
 226                 new_start += rdev->mc.gtt_start;
 227                 break;
 228         default:
 229                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 230                 return -EINVAL;
 231         }
 232         if (!rdev->ring[ridx].ready) {
 233                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 234                 return -EINVAL;
 235         }
 236
 237         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 238
 239         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 240         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 241         if (IS_ERR(fence))
 242                 return PTR_ERR(fence);
 243
 244         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
 245         radeon_fence_unref(&fence);
 246         return r;
 247 }
 248
 249 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 250                                 bool evict, bool interruptible,
 251                                 bool no_wait_gpu,
 252                                 struct ttm_mem_reg *new_mem)
 253 {
 254         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 255         struct ttm_mem_reg *old_mem = &bo->mem;
 256         struct ttm_mem_reg tmp_mem;
 257         struct ttm_place placements;
 258         struct ttm_placement placement;
 259         int r;
 260
 261         tmp_mem = *new_mem;
 262         tmp_mem.mm_node = NULL;
 263         placement.num_placement = 1;
 264         placement.placement = &placements;
 265         placement.num_busy_placement = 1;
 266         placement.busy_placement = &placements;
 267         placements.fpfn = 0;
 268         placements.lpfn = 0;
 269         placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 270         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 271         if (unlikely(r)) {
 272                 return r;
 273         }
 274
 275         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 276         if (unlikely(r)) {
 277                 goto out_cleanup;
 278         }
 279
 280         r = ttm_tt_bind(bo->ttm, &tmp_mem, &ctx);
 281         if (unlikely(r)) {
 282                 goto out_cleanup;
 283         }
 284         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 285         if (unlikely(r)) {
 286                 goto out_cleanup;
 287         }
 288         r = ttm_bo_move_ttm(bo, &ctx, new_mem);
 289 out_cleanup:
 290         ttm_bo_mem_put(bo, &tmp_mem);
 291         return r;
 292 }
 293
 294 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 295                                 bool evict, bool interruptible,
 296                                 bool no_wait_gpu,
 297                                 struct ttm_mem_reg *new_mem)
 298 {
 299         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 300         struct ttm_mem_reg *old_mem = &bo->mem;
 301         struct ttm_mem_reg tmp_mem;
 302         struct ttm_placement placement;
 303         struct ttm_place placements;
 304         int r;
 305
 306         tmp_mem = *new_mem;
 307         tmp_mem.mm_node = NULL;
 308         placement.num_placement = 1;
 309         placement.placement = &placements;
 310         placement.num_busy_placement = 1;
 311         placement.busy_placement = &placements;
 312         placements.fpfn = 0;
 313         placements.lpfn = 0;
 314         placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 315         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 316         if (unlikely(r)) {
 317                 return r;
 318         }
 319         r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
 320         if (unlikely(r)) {
 321                 goto out_cleanup;
 322         }
 323         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 324         if (unlikely(r)) {
 325                 goto out_cleanup;
 326         }
 327 out_cleanup:
 328         ttm_bo_mem_put(bo, &tmp_mem);
 329         return r;
 330 }
 331
 332 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 333                           struct ttm_operation_ctx *ctx,
 334                           struct ttm_mem_reg *new_mem)
 335 {
 336         struct radeon_device *rdev;
 337         struct radeon_bo *rbo;
 338         struct ttm_mem_reg *old_mem = &bo->mem;
 339         int r;
 340
 341         r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
 342         if (r)
 343                 return r;
 344
 345         /* Can't move a pinned BO */
 346         rbo = container_of(bo, struct radeon_bo, tbo);
 347         if (WARN_ON_ONCE(rbo->pin_count > 0))
 348                 return -EINVAL;
 349
 350         rdev = radeon_get_rdev(bo->bdev);
 351         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 352                 radeon_move_null(bo, new_mem);
 353                 return 0;
 354         }
 355         if ((old_mem->mem_type == TTM_PL_TT &&
 356              new_mem->mem_type == TTM_PL_SYSTEM) ||
 357             (old_mem->mem_type == TTM_PL_SYSTEM &&
 358              new_mem->mem_type == TTM_PL_TT)) {
 359                 /* bind is enough */
 360                 radeon_move_null(bo, new_mem);
 361                 return 0;
 362         }
 363         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 364             rdev->asic->copy.copy == NULL) {
 365                 /* use memcpy */
 366                 goto memcpy;
 367         }
 368
 369         if (old_mem->mem_type == TTM_PL_VRAM &&
 370             new_mem->mem_type == TTM_PL_SYSTEM) {
 371                 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
 372                                         ctx->no_wait_gpu, new_mem);
 373         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 374                    new_mem->mem_type == TTM_PL_VRAM) {
 375                 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
 376                                             ctx->no_wait_gpu, new_mem);
 377         } else {
 378                 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
 379                                      new_mem, old_mem);
 380         }
 381
 382         if (r) {
 383 memcpy:
 384                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 385                 if (r) {
 386                         return r;
 387                 }
 388         }
 389
 390         /* update statistics */
 391         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 392         return 0;
 393 }
 394
 395 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 396 {
 397         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 398         struct radeon_device *rdev = radeon_get_rdev(bdev);
 399
 400         mem->bus.addr = NULL;
 401         mem->bus.offset = 0;
 402         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 403         mem->bus.base = 0;
 404         mem->bus.is_iomem = false;
 405         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 406                 return -EINVAL;
 407         switch (mem->mem_type) {
 408         case TTM_PL_SYSTEM:
 409                 /* system memory */
 410                 return 0;
 411         case TTM_PL_TT:
 412 #if IS_ENABLED(CONFIG_AGP)
 413                 if (rdev->flags & RADEON_IS_AGP) {
 414                         /* RADEON_IS_AGP is set only if AGP is active */
 415                         mem->bus.offset = mem->start << PAGE_SHIFT;
 416                         mem->bus.base = rdev->mc.agp_base;
 417                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 418                 }
 419 #endif
 420                 break;
 421         case TTM_PL_VRAM:
 422                 mem->bus.offset = mem->start << PAGE_SHIFT;
 423                 /* check if it's visible */
 424                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 425                         return -EINVAL;
 426                 mem->bus.base = rdev->mc.aper_base;
 427                 mem->bus.is_iomem = true;
 428 #ifdef __alpha__
 429                 /*
 430                  * Alpha: use bus.addr to hold the ioremap() return,
 431                  * so we can modify bus.base below.
 432                  */
 433                 if (mem->placement & TTM_PL_FLAG_WC)
 434                         mem->bus.addr =
 435                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 436                                            mem->bus.size);
 437                 else
 438                         mem->bus.addr =
 439                                 ioremap(mem->bus.base + mem->bus.offset,
 440                                                 mem->bus.size);
 441                 if (!mem->bus.addr)
 442                         return -ENOMEM;
 443
 444                 /*
 445                  * Alpha: Use just the bus offset plus
 446                  * the hose/domain memory base for bus.base.
 447                  * It then can be used to build PTEs for VRAM
 448                  * access, as done in ttm_bo_vm_fault().
 449                  */
 450                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 451                         rdev->ddev->hose->dense_mem_base;
 452 #endif
 453                 break;
 454         default:
 455                 return -EINVAL;
 456         }
 457         return 0;
 458 }
 459
 460 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 461 {
 462 }
 463
 464 /*
 465  * TTM backend functions.
 466  */
 467 struct radeon_ttm_tt {
 468         struct ttm_dma_tt               ttm;
 469         struct radeon_device            *rdev;
 470         u64                             offset;
 471
 472         uint64_t                        userptr;
 473         struct mm_struct                *usermm;
 474         uint32_t                        userflags;
 475 };
 476
 477 /* prepare the sg table with the user pages */
 478 static int radeon_ttm_tt_pin_userptr(struct ttm_tt *ttm)
 479 {
 480         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 481         struct radeon_ttm_tt *gtt = (void *)ttm;
 482         unsigned pinned = 0, nents;
 483         int r;
 484
 485         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 486         enum dma_data_direction direction = write ?
 487                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 488
 489         if (current->mm != gtt->usermm)
 490                 return -EPERM;
 491
 492         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 493                 /* check that we only pin down anonymous memory
 494                    to prevent problems with writeback */
 495                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 496                 struct vm_area_struct *vma;
 497                 vma = find_vma(gtt->usermm, gtt->userptr);
 498                 if (!vma || vma->vm_file || vma->vm_end < end)
 499                         return -EPERM;
 500         }
 501
 502         do {
 503                 unsigned num_pages = ttm->num_pages - pinned;
 504                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 505                 struct page **pages = ttm->pages + pinned;
 506
 507                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 508                                    pages, NULL);
 509                 if (r < 0)
 510                         goto release_pages;
 511
 512                 pinned += r;
 513
 514         } while (pinned < ttm->num_pages);
 515
 516         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 517                                       ttm->num_pages << PAGE_SHIFT,
 518                                       GFP_KERNEL);
 519         if (r)
 520                 goto release_sg;
 521
 522         r = -ENOMEM;
 523         nents = dma_map_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
 524         if (nents == 0)
 525                 goto release_sg;
 526
 527         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 528                                          gtt->ttm.dma_address, ttm->num_pages);
 529
 530         return 0;
 531
 532 release_sg:
 533         kfree(ttm->sg);
 534
 535 release_pages:
 536         release_pages(ttm->pages, pinned);
 537         return r;
 538 }
 539
 540 static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
 541 {
 542         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 543         struct radeon_ttm_tt *gtt = (void *)ttm;
 544         struct sg_page_iter sg_iter;
 545
 546         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 547         enum dma_data_direction direction = write ?
 548                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 549
 550         /* double check that we don't free the table twice */
 551         if (!ttm->sg->sgl)
 552                 return;
 553
 554         /* free the sg table and pages again */
 555         dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction);
 556
 557         for_each_sg_page(ttm->sg->sgl, &sg_iter, ttm->sg->nents, 0) {
 558                 struct page *page = sg_page_iter_page(&sg_iter);
 559                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 560                         set_page_dirty(page);
 561
 562                 mark_page_accessed(page);
 563                 put_page(page);
 564         }
 565
 566         sg_free_table(ttm->sg);
 567 }
 568
 569 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 570                                    struct ttm_mem_reg *bo_mem)
 571 {
 572         struct radeon_ttm_tt *gtt = (void*)ttm;
 573         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 574                 RADEON_GART_PAGE_WRITE;
 575         int r;
 576
 577         if (gtt->userptr) {
 578                 radeon_ttm_tt_pin_userptr(ttm);
 579                 flags &= ~RADEON_GART_PAGE_WRITE;
 580         }
 581
 582         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 583         if (!ttm->num_pages) {
 584                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 585                      ttm->num_pages, bo_mem, ttm);
 586         }
 587         if (ttm->caching_state == tt_cached)
 588                 flags |= RADEON_GART_PAGE_SNOOP;
 589         r = radeon_gart_bind(gtt->rdev, gtt->offset, ttm->num_pages,
 590                              ttm->pages, gtt->ttm.dma_address, flags);
 591         if (r) {
 592                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 593                           ttm->num_pages, (unsigned)gtt->offset);
 594                 return r;
 595         }
 596         return 0;
 597 }
 598
 599 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 600 {
 601         struct radeon_ttm_tt *gtt = (void *)ttm;
 602
 603         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 604
 605         if (gtt->userptr)
 606                 radeon_ttm_tt_unpin_userptr(ttm);
 607
 608         return 0;
 609 }
 610
 611 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 612 {
 613         struct radeon_ttm_tt *gtt = (void *)ttm;
 614
 615         ttm_dma_tt_fini(&gtt->ttm);
 616         kfree(gtt);
 617 }
 618
 619 static struct ttm_backend_func radeon_backend_func = {
 620         .bind = &radeon_ttm_backend_bind,
 621         .unbind = &radeon_ttm_backend_unbind,
 622         .destroy = &radeon_ttm_backend_destroy,
 623 };
 624
 625 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 626                                            uint32_t page_flags)
 627 {
 628         struct radeon_device *rdev;
 629         struct radeon_ttm_tt *gtt;
 630
 631         rdev = radeon_get_rdev(bo->bdev);
 632 #if IS_ENABLED(CONFIG_AGP)
 633         if (rdev->flags & RADEON_IS_AGP) {
 634                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
 635                                          page_flags);
 636         }
 637 #endif
 638
 639         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 640         if (gtt == NULL) {
 641                 return NULL;
 642         }
 643         gtt->ttm.ttm.func = &radeon_backend_func;
 644         gtt->rdev = rdev;
 645         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags)) {
 646                 kfree(gtt);
 647                 return NULL;
 648         }
 649         return &gtt->ttm.ttm;
 650 }
 651
 652 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct ttm_tt *ttm)
 653 {
 654         if (!ttm || ttm->func != &radeon_backend_func)
 655                 return NULL;
 656         return (struct radeon_ttm_tt *)ttm;
 657 }
 658
 659 static int radeon_ttm_tt_populate(struct ttm_tt *ttm,
 660                         struct ttm_operation_ctx *ctx)
 661 {
 662         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 663         struct radeon_device *rdev;
 664         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 665
 666         if (gtt && gtt->userptr) {
 667                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 668                 if (!ttm->sg)
 669                         return -ENOMEM;
 670
 671                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 672                 ttm->state = tt_unbound;
 673                 return 0;
 674         }
 675
 676         if (slave && ttm->sg) {
 677                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 678                                                  gtt->ttm.dma_address, ttm->num_pages);
 679                 ttm->state = tt_unbound;
 680                 return 0;
 681         }
 682
 683         rdev = radeon_get_rdev(ttm->bdev);
 684 #if IS_ENABLED(CONFIG_AGP)
 685         if (rdev->flags & RADEON_IS_AGP) {
 686                 return ttm_agp_tt_populate(ttm, ctx);
 687         }
 688 #endif
 689
 690 #ifdef CONFIG_SWIOTLB
 691         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 692                 return ttm_dma_populate(&gtt->ttm, rdev->dev, ctx);
 693         }
 694 #endif
 695
 696         return ttm_populate_and_map_pages(rdev->dev, &gtt->ttm, ctx);
 697 }
 698
 699 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 700 {
 701         struct radeon_device *rdev;
 702         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 703         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 704
 705         if (gtt && gtt->userptr) {
 706                 kfree(ttm->sg);
 707                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 708                 return;
 709         }
 710
 711         if (slave)
 712                 return;
 713
 714         rdev = radeon_get_rdev(ttm->bdev);
 715 #if IS_ENABLED(CONFIG_AGP)
 716         if (rdev->flags & RADEON_IS_AGP) {
 717                 ttm_agp_tt_unpopulate(ttm);
 718                 return;
 719         }
 720 #endif
 721
 722 #ifdef CONFIG_SWIOTLB
 723         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 724                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 725                 return;
 726         }
 727 #endif
 728
 729         ttm_unmap_and_unpopulate_pages(rdev->dev, &gtt->ttm);
 730 }
 731
 732 int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
 733                               uint32_t flags)
 734 {
 735         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 736
 737         if (gtt == NULL)
 738                 return -EINVAL;
 739
 740         gtt->userptr = addr;
 741         gtt->usermm = current->mm;
 742         gtt->userflags = flags;
 743         return 0;
 744 }
 745
 746 bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm)
 747 {
 748         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 749
 750         if (gtt == NULL)
 751                 return false;
 752
 753         return !!gtt->userptr;
 754 }
 755
 756 bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm)
 757 {
 758         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 759
 760         if (gtt == NULL)
 761                 return false;
 762
 763         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 764 }
 765
 766 static struct ttm_bo_driver radeon_bo_driver = {
 767         .ttm_tt_create = &radeon_ttm_tt_create,
 768         .ttm_tt_populate = &radeon_ttm_tt_populate,
 769         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 770         .init_mem_type = &radeon_init_mem_type,
 771         .eviction_valuable = ttm_bo_eviction_valuable,
 772         .evict_flags = &radeon_evict_flags,
 773         .move = &radeon_bo_move,
 774         .verify_access = &radeon_verify_access,
 775         .move_notify = &radeon_bo_move_notify,
 776         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 777         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 778         .io_mem_free = &radeon_ttm_io_mem_free,
 779 };
 780
 781 int radeon_ttm_init(struct radeon_device *rdev)
 782 {
 783         int r;
 784
 785         /* No others user of address space so set it to 0 */
 786         r = ttm_bo_device_init(&rdev->mman.bdev,
 787                                &radeon_bo_driver,
 788                                rdev->ddev->anon_inode->i_mapping,
 789                                rdev->ddev->vma_offset_manager,
 790                                dma_addressing_limited(&rdev->pdev->dev));
 791         if (r) {
 792                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 793                 return r;
 794         }
 795         rdev->mman.initialized = true;
 796         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 797                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 798         if (r) {
 799                 DRM_ERROR("Failed initializing VRAM heap.\n");
 800                 return r;
 801         }
 802         /* Change the size here instead of the init above so only lpfn is affected */
 803         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 804
 805         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 806                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 807                              NULL, &rdev->stolen_vga_memory);
 808         if (r) {
 809                 return r;
 810         }
 811         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 812         if (r)
 813                 return r;
 814         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 815         radeon_bo_unreserve(rdev->stolen_vga_memory);
 816         if (r) {
 817                 radeon_bo_unref(&rdev->stolen_vga_memory);
 818                 return r;
 819         }
 820         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 821                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 822         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 823                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 824         if (r) {
 825                 DRM_ERROR("Failed initializing GTT heap.\n");
 826                 return r;
 827         }
 828         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 829                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 830
 831         r = radeon_ttm_debugfs_init(rdev);
 832         if (r) {
 833                 DRM_ERROR("Failed to init debugfs\n");
 834                 return r;
 835         }
 836         return 0;
 837 }
 838
 839 void radeon_ttm_fini(struct radeon_device *rdev)
 840 {
 841         int r;
 842
 843         if (!rdev->mman.initialized)
 844                 return;
 845         radeon_ttm_debugfs_fini(rdev);
 846         if (rdev->stolen_vga_memory) {
 847                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 848                 if (r == 0) {
 849                         radeon_bo_unpin(rdev->stolen_vga_memory);
 850                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 851                 }
 852                 radeon_bo_unref(&rdev->stolen_vga_memory);
 853         }
 854         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 855         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 856         ttm_bo_device_release(&rdev->mman.bdev);
 857         radeon_gart_fini(rdev);
 858         rdev->mman.initialized = false;
 859         DRM_INFO("radeon: ttm finalized\n");
 860 }
 861
 862 /* this should only be called at bootup or when userspace
 863  * isn't running */
 864 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 865 {
 866         struct ttm_mem_type_manager *man;
 867
 868         if (!rdev->mman.initialized)
 869                 return;
 870
 871         man = &rdev->mman.bdev.man[TTM_PL_VRAM];
 872         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 873         man->size = size >> PAGE_SHIFT;
 874 }
 875
 876 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
 877 {
 878         struct ttm_buffer_object *bo;
 879         struct radeon_device *rdev;
 880         vm_fault_t ret;
 881
 882         bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
 883         if (bo == NULL)
 884                 return VM_FAULT_NOPAGE;
 885
 886         rdev = radeon_get_rdev(bo->bdev);
 887         down_read(&rdev->pm.mclk_lock);
 888         ret = ttm_bo_vm_fault(vmf);
 889         up_read(&rdev->pm.mclk_lock);
 890         return ret;
 891 }
 892
 893 static struct vm_operations_struct radeon_ttm_vm_ops = {
 894         .fault = radeon_ttm_fault,
 895         .open = ttm_bo_vm_open,
 896         .close = ttm_bo_vm_close,
 897         .access = ttm_bo_vm_access
 898 };
 899
 900 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 901 {
 902         int r;
 903         struct drm_file *file_priv = filp->private_data;
 904         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
 905
 906         if (rdev == NULL)
 907                 return -EINVAL;
 908
 909         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 910         if (unlikely(r != 0))
 911                 return r;
 912
 913         vma->vm_ops = &radeon_ttm_vm_ops;
 914         return 0;
 915 }
 916
 917 #if defined(CONFIG_DEBUG_FS)
 918
 919 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 920 {
 921         struct drm_info_node *node = (struct drm_info_node *)m->private;
 922         unsigned ttm_pl = *(int*)node->info_ent->data;
 923         struct drm_device *dev = node->minor->dev;
 924         struct radeon_device *rdev = dev->dev_private;
 925         struct ttm_mem_type_manager *man = &rdev->mman.bdev.man[ttm_pl];
 926         struct drm_printer p = drm_seq_file_printer(m);
 927
 928         man->func->debug(man, &p);
 929         return 0;
 930 }
 931
 932
 933 static int ttm_pl_vram = TTM_PL_VRAM;
 934 static int ttm_pl_tt = TTM_PL_TT;
 935
 936 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 937         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 938         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 939         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 940 #ifdef CONFIG_SWIOTLB
 941         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 942 #endif
 943 };
 944
 945 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 946 {
 947         struct radeon_device *rdev = inode->i_private;
 948         i_size_write(inode, rdev->mc.mc_vram_size);
 949         filep->private_data = inode->i_private;
 950         return 0;
 951 }
 952
 953 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 954                                     size_t size, loff_t *pos)
 955 {
 956         struct radeon_device *rdev = f->private_data;
 957         ssize_t result = 0;
 958         int r;
 959
 960         if (size & 0x3 || *pos & 0x3)
 961                 return -EINVAL;
 962
 963         while (size) {
 964                 unsigned long flags;
 965                 uint32_t value;
 966
 967                 if (*pos >= rdev->mc.mc_vram_size)
 968                         return result;
 969
 970                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
 971                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
 972                 if (rdev->family >= CHIP_CEDAR)
 973                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
 974                 value = RREG32(RADEON_MM_DATA);
 975                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
 976
 977                 r = put_user(value, (uint32_t *)buf);
 978                 if (r)
 979                         return r;
 980
 981                 result += 4;
 982                 buf += 4;
 983                 *pos += 4;
 984                 size -= 4;
 985         }
 986
 987         return result;
 988 }
 989
 990 static const struct file_operations radeon_ttm_vram_fops = {
 991         .owner = THIS_MODULE,
 992         .open = radeon_ttm_vram_open,
 993         .read = radeon_ttm_vram_read,
 994         .llseek = default_llseek
 995 };
 996
 997 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
 998 {
 999         struct radeon_device *rdev = inode->i_private;
1000         i_size_write(inode, rdev->mc.gtt_size);
1001         filep->private_data = inode->i_private;
1002         return 0;
1003 }
1004
1005 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
1006                                    size_t size, loff_t *pos)
1007 {
1008         struct radeon_device *rdev = f->private_data;
1009         ssize_t result = 0;
1010         int r;
1011
1012         while (size) {
1013                 loff_t p = *pos / PAGE_SIZE;
1014                 unsigned off = *pos & ~PAGE_MASK;
1015                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
1016                 struct page *page;
1017                 void *ptr;
1018
1019                 if (p >= rdev->gart.num_cpu_pages)
1020                         return result;
1021
1022                 page = rdev->gart.pages[p];
1023                 if (page) {
1024                         ptr = kmap(page);
1025                         ptr += off;
1026
1027                         r = copy_to_user(buf, ptr, cur_size);
1028                         kunmap(rdev->gart.pages[p]);
1029                 } else
1030                         r = clear_user(buf, cur_size);
1031
1032                 if (r)
1033                         return -EFAULT;
1034
1035                 result += cur_size;
1036                 buf += cur_size;
1037                 *pos += cur_size;
1038                 size -= cur_size;
1039         }
1040
1041         return result;
1042 }
1043
1044 static const struct file_operations radeon_ttm_gtt_fops = {
1045         .owner = THIS_MODULE,
1046         .open = radeon_ttm_gtt_open,
1047         .read = radeon_ttm_gtt_read,
1048         .llseek = default_llseek
1049 };
1050
1051 #endif
1052
1053 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1054 {
1055 #if defined(CONFIG_DEBUG_FS)
1056         unsigned count;
1057
1058         struct drm_minor *minor = rdev->ddev->primary;
1059         struct dentry *root = minor->debugfs_root;
1060
1061         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1062                                               root, rdev,
1063                                               &radeon_ttm_vram_fops);
1064
1065         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1066                                              root, rdev, &radeon_ttm_gtt_fops);
1067
1068         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1069
1070 #ifdef CONFIG_SWIOTLB
1071         if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1072                 --count;
1073 #endif
1074
1075         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1076 #else
1077
1078         return 0;
1079 #endif
1080 }
1081
1082 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1083 {
1084 #if defined(CONFIG_DEBUG_FS)
1085
1086         debugfs_remove(rdev->mman.vram);
1087         rdev->mman.vram = NULL;
1088
1089         debugfs_remove(rdev->mman.gtt);
1090         rdev->mman.gtt = NULL;
1091 #endif
1092 }