drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32
  33 #include <linux/dma-mapping.h>
  34 #include <linux/pagemap.h>
  35 #include <linux/pci.h>
  36 #include <linux/seq_file.h>
  37 #include <linux/slab.h>
  38 #include <linux/swap.h>
  39 #include <linux/swiotlb.h>
  40
  41 #include <drm/drm_agpsupport.h>
  42 #include <drm/drm_debugfs.h>
  43 #include <drm/drm_device.h>
  44 #include <drm/drm_file.h>
  45 #include <drm/drm_prime.h>
  46 #include <drm/radeon_drm.h>
  47 #include <drm/ttm/ttm_bo_api.h>
  48 #include <drm/ttm/ttm_bo_driver.h>
  49 #include <drm/ttm/ttm_module.h>
  50 #include <drm/ttm/ttm_page_alloc.h>
  51 #include <drm/ttm/ttm_placement.h>
  52
  53 #include "radeon_reg.h"
  54 #include "radeon.h"
  55
  56 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  57 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev);
  58
  59 struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  60 {
  61         struct radeon_mman *mman;
  62         struct radeon_device *rdev;
  63
  64         mman = container_of(bdev, struct radeon_mman, bdev);
  65         rdev = container_of(mman, struct radeon_device, mman);
  66         return rdev;
  67 }
  68
  69 static int radeon_ttm_init_vram(struct radeon_device *rdev)
  70 {
  71         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_VRAM,
  72                                   TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC,
  73                                   TTM_PL_FLAG_WC, false,
  74                                   rdev->mc.real_vram_size >> PAGE_SHIFT);
  75 }
  76
  77 static int radeon_ttm_init_gtt(struct radeon_device *rdev)
  78 {
  79         return ttm_range_man_init(&rdev->mman.bdev, TTM_PL_TT,
  80                                   TTM_PL_MASK_CACHING,
  81                                   TTM_PL_FLAG_CACHED, true,
  82                                   rdev->mc.gtt_size >> PAGE_SHIFT);
  83 }
  84
  85 static void radeon_evict_flags(struct ttm_buffer_object *bo,
  86                                 struct ttm_placement *placement)
  87 {
  88         static const struct ttm_place placements = {
  89                 .fpfn = 0,
  90                 .lpfn = 0,
  91                 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM
  92         };
  93
  94         struct radeon_bo *rbo;
  95
  96         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
  97                 placement->placement = &placements;
  98                 placement->busy_placement = &placements;
  99                 placement->num_placement = 1;
 100                 placement->num_busy_placement = 1;
 101                 return;
 102         }
 103         rbo = container_of(bo, struct radeon_bo, tbo);
 104         switch (bo->mem.mem_type) {
 105         case TTM_PL_VRAM:
 106                 if (rbo->rdev->ring[radeon_copy_ring_index(rbo->rdev)].ready == false)
 107                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 108                 else if (rbo->rdev->mc.visible_vram_size < rbo->rdev->mc.real_vram_size &&
 109                          bo->mem.start < (rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT)) {
 110                         unsigned fpfn = rbo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 111                         int i;
 112
 113                         /* Try evicting to the CPU inaccessible part of VRAM
 114                          * first, but only set GTT as busy placement, so this
 115                          * BO will be evicted to GTT rather than causing other
 116                          * BOs to be evicted from VRAM
 117                          */
 118                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM |
 119                                                          RADEON_GEM_DOMAIN_GTT);
 120                         rbo->placement.num_busy_placement = 0;
 121                         for (i = 0; i < rbo->placement.num_placement; i++) {
 122                                 if (rbo->placements[i].flags & TTM_PL_FLAG_VRAM) {
 123                                         if (rbo->placements[i].fpfn < fpfn)
 124                                                 rbo->placements[i].fpfn = fpfn;
 125                                 } else {
 126                                         rbo->placement.busy_placement =
 127                                                 &rbo->placements[i];
 128                                         rbo->placement.num_busy_placement = 1;
 129                                 }
 130                         }
 131                 } else
 132                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 133                 break;
 134         case TTM_PL_TT:
 135         default:
 136                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 137         }
 138         *placement = rbo->placement;
 139 }
 140
 141 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 142 {
 143         struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo);
 144
 145         if (radeon_ttm_tt_has_userptr(bo->ttm))
 146                 return -EPERM;
 147         return drm_vma_node_verify_access(&rbo->tbo.base.vma_node,
 148                                           filp->private_data);
 149 }
 150
 151 static void radeon_move_null(struct ttm_buffer_object *bo,
 152                              struct ttm_resource *new_mem)
 153 {
 154         struct ttm_resource *old_mem = &bo->mem;
 155
 156         BUG_ON(old_mem->mm_node != NULL);
 157         *old_mem = *new_mem;
 158         new_mem->mm_node = NULL;
 159 }
 160
 161 static int radeon_move_blit(struct ttm_buffer_object *bo,
 162                         bool evict, bool no_wait_gpu,
 163                         struct ttm_resource *new_mem,
 164                         struct ttm_resource *old_mem)
 165 {
 166         struct radeon_device *rdev;
 167         uint64_t old_start, new_start;
 168         struct radeon_fence *fence;
 169         unsigned num_pages;
 170         int r, ridx;
 171
 172         rdev = radeon_get_rdev(bo->bdev);
 173         ridx = radeon_copy_ring_index(rdev);
 174         old_start = (u64)old_mem->start << PAGE_SHIFT;
 175         new_start = (u64)new_mem->start << PAGE_SHIFT;
 176
 177         switch (old_mem->mem_type) {
 178         case TTM_PL_VRAM:
 179                 old_start += rdev->mc.vram_start;
 180                 break;
 181         case TTM_PL_TT:
 182                 old_start += rdev->mc.gtt_start;
 183                 break;
 184         default:
 185                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 186                 return -EINVAL;
 187         }
 188         switch (new_mem->mem_type) {
 189         case TTM_PL_VRAM:
 190                 new_start += rdev->mc.vram_start;
 191                 break;
 192         case TTM_PL_TT:
 193                 new_start += rdev->mc.gtt_start;
 194                 break;
 195         default:
 196                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 197                 return -EINVAL;
 198         }
 199         if (!rdev->ring[ridx].ready) {
 200                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 201                 return -EINVAL;
 202         }
 203
 204         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 205
 206         num_pages = new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 207         fence = radeon_copy(rdev, old_start, new_start, num_pages, bo->base.resv);
 208         if (IS_ERR(fence))
 209                 return PTR_ERR(fence);
 210
 211         r = ttm_bo_move_accel_cleanup(bo, &fence->base, evict, new_mem);
 212         radeon_fence_unref(&fence);
 213         return r;
 214 }
 215
 216 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 217                                 bool evict, bool interruptible,
 218                                 bool no_wait_gpu,
 219                                 struct ttm_resource *new_mem)
 220 {
 221         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 222         struct ttm_resource *old_mem = &bo->mem;
 223         struct ttm_resource tmp_mem;
 224         struct ttm_place placements;
 225         struct ttm_placement placement;
 226         int r;
 227
 228         tmp_mem = *new_mem;
 229         tmp_mem.mm_node = NULL;
 230         placement.num_placement = 1;
 231         placement.placement = &placements;
 232         placement.num_busy_placement = 1;
 233         placement.busy_placement = &placements;
 234         placements.fpfn = 0;
 235         placements.lpfn = 0;
 236         placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 237         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 238         if (unlikely(r)) {
 239                 return r;
 240         }
 241
 242         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 243         if (unlikely(r)) {
 244                 goto out_cleanup;
 245         }
 246
 247         r = ttm_tt_bind(bo->ttm, &tmp_mem, &ctx);
 248         if (unlikely(r)) {
 249                 goto out_cleanup;
 250         }
 251         r = radeon_move_blit(bo, true, no_wait_gpu, &tmp_mem, old_mem);
 252         if (unlikely(r)) {
 253                 goto out_cleanup;
 254         }
 255         r = ttm_bo_move_ttm(bo, &ctx, new_mem);
 256 out_cleanup:
 257         ttm_resource_free(bo, &tmp_mem);
 258         return r;
 259 }
 260
 261 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 262                                 bool evict, bool interruptible,
 263                                 bool no_wait_gpu,
 264                                 struct ttm_resource *new_mem)
 265 {
 266         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 267         struct ttm_resource *old_mem = &bo->mem;
 268         struct ttm_resource tmp_mem;
 269         struct ttm_placement placement;
 270         struct ttm_place placements;
 271         int r;
 272
 273         tmp_mem = *new_mem;
 274         tmp_mem.mm_node = NULL;
 275         placement.num_placement = 1;
 276         placement.placement = &placements;
 277         placement.num_busy_placement = 1;
 278         placement.busy_placement = &placements;
 279         placements.fpfn = 0;
 280         placements.lpfn = 0;
 281         placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 282         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, &ctx);
 283         if (unlikely(r)) {
 284                 return r;
 285         }
 286         r = ttm_bo_move_ttm(bo, &ctx, &tmp_mem);
 287         if (unlikely(r)) {
 288                 goto out_cleanup;
 289         }
 290         r = radeon_move_blit(bo, true, no_wait_gpu, new_mem, old_mem);
 291         if (unlikely(r)) {
 292                 goto out_cleanup;
 293         }
 294 out_cleanup:
 295         ttm_resource_free(bo, &tmp_mem);
 296         return r;
 297 }
 298
 299 static int radeon_bo_move(struct ttm_buffer_object *bo, bool evict,
 300                           struct ttm_operation_ctx *ctx,
 301                           struct ttm_resource *new_mem)
 302 {
 303         struct radeon_device *rdev;
 304         struct radeon_bo *rbo;
 305         struct ttm_resource *old_mem = &bo->mem;
 306         int r;
 307
 308         r = ttm_bo_wait(bo, ctx->interruptible, ctx->no_wait_gpu);
 309         if (r)
 310                 return r;
 311
 312         /* Can't move a pinned BO */
 313         rbo = container_of(bo, struct radeon_bo, tbo);
 314         if (WARN_ON_ONCE(rbo->pin_count > 0))
 315                 return -EINVAL;
 316
 317         rdev = radeon_get_rdev(bo->bdev);
 318         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 319                 radeon_move_null(bo, new_mem);
 320                 return 0;
 321         }
 322         if ((old_mem->mem_type == TTM_PL_TT &&
 323              new_mem->mem_type == TTM_PL_SYSTEM) ||
 324             (old_mem->mem_type == TTM_PL_SYSTEM &&
 325              new_mem->mem_type == TTM_PL_TT)) {
 326                 /* bind is enough */
 327                 radeon_move_null(bo, new_mem);
 328                 return 0;
 329         }
 330         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 331             rdev->asic->copy.copy == NULL) {
 332                 /* use memcpy */
 333                 goto memcpy;
 334         }
 335
 336         if (old_mem->mem_type == TTM_PL_VRAM &&
 337             new_mem->mem_type == TTM_PL_SYSTEM) {
 338                 r = radeon_move_vram_ram(bo, evict, ctx->interruptible,
 339                                         ctx->no_wait_gpu, new_mem);
 340         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 341                    new_mem->mem_type == TTM_PL_VRAM) {
 342                 r = radeon_move_ram_vram(bo, evict, ctx->interruptible,
 343                                             ctx->no_wait_gpu, new_mem);
 344         } else {
 345                 r = radeon_move_blit(bo, evict, ctx->no_wait_gpu,
 346                                      new_mem, old_mem);
 347         }
 348
 349         if (r) {
 350 memcpy:
 351                 r = ttm_bo_move_memcpy(bo, ctx, new_mem);
 352                 if (r) {
 353                         return r;
 354                 }
 355         }
 356
 357         /* update statistics */
 358         atomic64_add((u64)bo->num_pages << PAGE_SHIFT, &rdev->num_bytes_moved);
 359         return 0;
 360 }
 361
 362 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_resource *mem)
 363 {
 364         struct radeon_device *rdev = radeon_get_rdev(bdev);
 365
 366         mem->bus.addr = NULL;
 367         mem->bus.offset = 0;
 368         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 369         mem->bus.base = 0;
 370         mem->bus.is_iomem = false;
 371
 372         switch (mem->mem_type) {
 373         case TTM_PL_SYSTEM:
 374                 /* system memory */
 375                 return 0;
 376         case TTM_PL_TT:
 377 #if IS_ENABLED(CONFIG_AGP)
 378                 if (rdev->flags & RADEON_IS_AGP) {
 379                         /* RADEON_IS_AGP is set only if AGP is active */
 380                         mem->bus.offset = mem->start << PAGE_SHIFT;
 381                         mem->bus.base = rdev->mc.agp_base;
 382                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 383                 }
 384 #endif
 385                 break;
 386         case TTM_PL_VRAM:
 387                 mem->bus.offset = mem->start << PAGE_SHIFT;
 388                 /* check if it's visible */
 389                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 390                         return -EINVAL;
 391                 mem->bus.base = rdev->mc.aper_base;
 392                 mem->bus.is_iomem = true;
 393 #ifdef __alpha__
 394                 /*
 395                  * Alpha: use bus.addr to hold the ioremap() return,
 396                  * so we can modify bus.base below.
 397                  */
 398                 if (mem->placement & TTM_PL_FLAG_WC)
 399                         mem->bus.addr =
 400                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 401                                            mem->bus.size);
 402                 else
 403                         mem->bus.addr =
 404                                 ioremap(mem->bus.base + mem->bus.offset,
 405                                                 mem->bus.size);
 406                 if (!mem->bus.addr)
 407                         return -ENOMEM;
 408
 409                 /*
 410                  * Alpha: Use just the bus offset plus
 411                  * the hose/domain memory base for bus.base.
 412                  * It then can be used to build PTEs for VRAM
 413                  * access, as done in ttm_bo_vm_fault().
 414                  */
 415                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 416                         rdev->ddev->hose->dense_mem_base;
 417 #endif
 418                 break;
 419         default:
 420                 return -EINVAL;
 421         }
 422         return 0;
 423 }
 424
 425 /*
 426  * TTM backend functions.
 427  */
 428 struct radeon_ttm_tt {
 429         struct ttm_dma_tt               ttm;
 430         struct radeon_device            *rdev;
 431         u64                             offset;
 432
 433         uint64_t                        userptr;
 434         struct mm_struct                *usermm;
 435         uint32_t                        userflags;
 436 };
 437
 438 /* prepare the sg table with the user pages */
 439 static int radeon_ttm_tt_pin_userptr(struct ttm_tt *ttm)
 440 {
 441         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 442         struct radeon_ttm_tt *gtt = (void *)ttm;
 443         unsigned pinned = 0;
 444         int r;
 445
 446         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 447         enum dma_data_direction direction = write ?
 448                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 449
 450         if (current->mm != gtt->usermm)
 451                 return -EPERM;
 452
 453         if (gtt->userflags & RADEON_GEM_USERPTR_ANONONLY) {
 454                 /* check that we only pin down anonymous memory
 455                    to prevent problems with writeback */
 456                 unsigned long end = gtt->userptr + ttm->num_pages * PAGE_SIZE;
 457                 struct vm_area_struct *vma;
 458                 vma = find_vma(gtt->usermm, gtt->userptr);
 459                 if (!vma || vma->vm_file || vma->vm_end < end)
 460                         return -EPERM;
 461         }
 462
 463         do {
 464                 unsigned num_pages = ttm->num_pages - pinned;
 465                 uint64_t userptr = gtt->userptr + pinned * PAGE_SIZE;
 466                 struct page **pages = ttm->pages + pinned;
 467
 468                 r = get_user_pages(userptr, num_pages, write ? FOLL_WRITE : 0,
 469                                    pages, NULL);
 470                 if (r < 0)
 471                         goto release_pages;
 472
 473                 pinned += r;
 474
 475         } while (pinned < ttm->num_pages);
 476
 477         r = sg_alloc_table_from_pages(ttm->sg, ttm->pages, ttm->num_pages, 0,
 478                                       ttm->num_pages << PAGE_SHIFT,
 479                                       GFP_KERNEL);
 480         if (r)
 481                 goto release_sg;
 482
 483         r = dma_map_sgtable(rdev->dev, ttm->sg, direction, 0);
 484         if (r)
 485                 goto release_sg;
 486
 487         drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 488                                          gtt->ttm.dma_address, ttm->num_pages);
 489
 490         return 0;
 491
 492 release_sg:
 493         kfree(ttm->sg);
 494
 495 release_pages:
 496         release_pages(ttm->pages, pinned);
 497         return r;
 498 }
 499
 500 static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm)
 501 {
 502         struct radeon_device *rdev = radeon_get_rdev(ttm->bdev);
 503         struct radeon_ttm_tt *gtt = (void *)ttm;
 504         struct sg_page_iter sg_iter;
 505
 506         int write = !(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 507         enum dma_data_direction direction = write ?
 508                 DMA_BIDIRECTIONAL : DMA_TO_DEVICE;
 509
 510         /* double check that we don't free the table twice */
 511         if (!ttm->sg->sgl)
 512                 return;
 513
 514         /* free the sg table and pages again */
 515         dma_unmap_sgtable(rdev->dev, ttm->sg, direction, 0);
 516
 517         for_each_sgtable_page(ttm->sg, &sg_iter, 0) {
 518                 struct page *page = sg_page_iter_page(&sg_iter);
 519                 if (!(gtt->userflags & RADEON_GEM_USERPTR_READONLY))
 520                         set_page_dirty(page);
 521
 522                 mark_page_accessed(page);
 523                 put_page(page);
 524         }
 525
 526         sg_free_table(ttm->sg);
 527 }
 528
 529 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 530                                    struct ttm_resource *bo_mem)
 531 {
 532         struct radeon_ttm_tt *gtt = (void*)ttm;
 533         uint32_t flags = RADEON_GART_PAGE_VALID | RADEON_GART_PAGE_READ |
 534                 RADEON_GART_PAGE_WRITE;
 535         int r;
 536
 537         if (gtt->userptr) {
 538                 radeon_ttm_tt_pin_userptr(ttm);
 539                 flags &= ~RADEON_GART_PAGE_WRITE;
 540         }
 541
 542         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 543         if (!ttm->num_pages) {
 544                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 545                      ttm->num_pages, bo_mem, ttm);
 546         }
 547         if (ttm->caching_state == tt_cached)
 548                 flags |= RADEON_GART_PAGE_SNOOP;
 549         r = radeon_gart_bind(gtt->rdev, gtt->offset, ttm->num_pages,
 550                              ttm->pages, gtt->ttm.dma_address, flags);
 551         if (r) {
 552                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 553                           ttm->num_pages, (unsigned)gtt->offset);
 554                 return r;
 555         }
 556         return 0;
 557 }
 558
 559 static void radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 560 {
 561         struct radeon_ttm_tt *gtt = (void *)ttm;
 562
 563         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 564
 565         if (gtt->userptr)
 566                 radeon_ttm_tt_unpin_userptr(ttm);
 567 }
 568
 569 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 570 {
 571         struct radeon_ttm_tt *gtt = (void *)ttm;
 572
 573         ttm_dma_tt_fini(&gtt->ttm);
 574         kfree(gtt);
 575 }
 576
 577 static struct ttm_backend_func radeon_backend_func = {
 578         .bind = &radeon_ttm_backend_bind,
 579         .unbind = &radeon_ttm_backend_unbind,
 580         .destroy = &radeon_ttm_backend_destroy,
 581 };
 582
 583 static struct ttm_tt *radeon_ttm_tt_create(struct ttm_buffer_object *bo,
 584                                            uint32_t page_flags)
 585 {
 586         struct radeon_device *rdev;
 587         struct radeon_ttm_tt *gtt;
 588
 589         rdev = radeon_get_rdev(bo->bdev);
 590 #if IS_ENABLED(CONFIG_AGP)
 591         if (rdev->flags & RADEON_IS_AGP) {
 592                 return ttm_agp_tt_create(bo, rdev->ddev->agp->bridge,
 593                                          page_flags);
 594         }
 595 #endif
 596
 597         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 598         if (gtt == NULL) {
 599                 return NULL;
 600         }
 601         gtt->ttm.ttm.func = &radeon_backend_func;
 602         gtt->rdev = rdev;
 603         if (ttm_dma_tt_init(&gtt->ttm, bo, page_flags)) {
 604                 kfree(gtt);
 605                 return NULL;
 606         }
 607         return &gtt->ttm.ttm;
 608 }
 609
 610 static struct radeon_ttm_tt *radeon_ttm_tt_to_gtt(struct ttm_tt *ttm)
 611 {
 612         if (!ttm || ttm->func != &radeon_backend_func)
 613                 return NULL;
 614         return (struct radeon_ttm_tt *)ttm;
 615 }
 616
 617 static int radeon_ttm_tt_populate(struct ttm_tt *ttm,
 618                         struct ttm_operation_ctx *ctx)
 619 {
 620         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 621         struct radeon_device *rdev;
 622         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 623
 624         if (gtt && gtt->userptr) {
 625                 ttm->sg = kzalloc(sizeof(struct sg_table), GFP_KERNEL);
 626                 if (!ttm->sg)
 627                         return -ENOMEM;
 628
 629                 ttm->page_flags |= TTM_PAGE_FLAG_SG;
 630                 ttm->state = tt_unbound;
 631                 return 0;
 632         }
 633
 634         if (slave && ttm->sg) {
 635                 drm_prime_sg_to_page_addr_arrays(ttm->sg, ttm->pages,
 636                                                  gtt->ttm.dma_address, ttm->num_pages);
 637                 ttm->state = tt_unbound;
 638                 return 0;
 639         }
 640
 641         rdev = radeon_get_rdev(ttm->bdev);
 642 #if IS_ENABLED(CONFIG_AGP)
 643         if (rdev->flags & RADEON_IS_AGP) {
 644                 return ttm_agp_tt_populate(ttm, ctx);
 645         }
 646 #endif
 647
 648 #ifdef CONFIG_SWIOTLB
 649         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 650                 return ttm_dma_populate(&gtt->ttm, rdev->dev, ctx);
 651         }
 652 #endif
 653
 654         return ttm_populate_and_map_pages(rdev->dev, &gtt->ttm, ctx);
 655 }
 656
 657 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 658 {
 659         struct radeon_device *rdev;
 660         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 661         bool slave = !!(ttm->page_flags & TTM_PAGE_FLAG_SG);
 662
 663         if (gtt && gtt->userptr) {
 664                 kfree(ttm->sg);
 665                 ttm->page_flags &= ~TTM_PAGE_FLAG_SG;
 666                 return;
 667         }
 668
 669         if (slave)
 670                 return;
 671
 672         rdev = radeon_get_rdev(ttm->bdev);
 673 #if IS_ENABLED(CONFIG_AGP)
 674         if (rdev->flags & RADEON_IS_AGP) {
 675                 ttm_agp_tt_unpopulate(ttm);
 676                 return;
 677         }
 678 #endif
 679
 680 #ifdef CONFIG_SWIOTLB
 681         if (rdev->need_swiotlb && swiotlb_nr_tbl()) {
 682                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 683                 return;
 684         }
 685 #endif
 686
 687         ttm_unmap_and_unpopulate_pages(rdev->dev, &gtt->ttm);
 688 }
 689
 690 int radeon_ttm_tt_set_userptr(struct ttm_tt *ttm, uint64_t addr,
 691                               uint32_t flags)
 692 {
 693         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 694
 695         if (gtt == NULL)
 696                 return -EINVAL;
 697
 698         gtt->userptr = addr;
 699         gtt->usermm = current->mm;
 700         gtt->userflags = flags;
 701         return 0;
 702 }
 703
 704 bool radeon_ttm_tt_has_userptr(struct ttm_tt *ttm)
 705 {
 706         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 707
 708         if (gtt == NULL)
 709                 return false;
 710
 711         return !!gtt->userptr;
 712 }
 713
 714 bool radeon_ttm_tt_is_readonly(struct ttm_tt *ttm)
 715 {
 716         struct radeon_ttm_tt *gtt = radeon_ttm_tt_to_gtt(ttm);
 717
 718         if (gtt == NULL)
 719                 return false;
 720
 721         return !!(gtt->userflags & RADEON_GEM_USERPTR_READONLY);
 722 }
 723
 724 static struct ttm_bo_driver radeon_bo_driver = {
 725         .ttm_tt_create = &radeon_ttm_tt_create,
 726         .ttm_tt_populate = &radeon_ttm_tt_populate,
 727         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 728         .eviction_valuable = ttm_bo_eviction_valuable,
 729         .evict_flags = &radeon_evict_flags,
 730         .move = &radeon_bo_move,
 731         .verify_access = &radeon_verify_access,
 732         .move_notify = &radeon_bo_move_notify,
 733         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 734         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 735 };
 736
 737 int radeon_ttm_init(struct radeon_device *rdev)
 738 {
 739         int r;
 740
 741         /* No others user of address space so set it to 0 */
 742         r = ttm_bo_device_init(&rdev->mman.bdev,
 743                                &radeon_bo_driver,
 744                                rdev->ddev->anon_inode->i_mapping,
 745                                rdev->ddev->vma_offset_manager,
 746                                dma_addressing_limited(&rdev->pdev->dev));
 747         if (r) {
 748                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 749                 return r;
 750         }
 751         rdev->mman.initialized = true;
 752
 753         r = radeon_ttm_init_vram(rdev);
 754         if (r) {
 755                 DRM_ERROR("Failed initializing VRAM heap.\n");
 756                 return r;
 757         }
 758         /* Change the size here instead of the init above so only lpfn is affected */
 759         radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);
 760
 761         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 762                              RADEON_GEM_DOMAIN_VRAM, 0, NULL,
 763                              NULL, &rdev->stolen_vga_memory);
 764         if (r) {
 765                 return r;
 766         }
 767         r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 768         if (r)
 769                 return r;
 770         r = radeon_bo_pin(rdev->stolen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 771         radeon_bo_unreserve(rdev->stolen_vga_memory);
 772         if (r) {
 773                 radeon_bo_unref(&rdev->stolen_vga_memory);
 774                 return r;
 775         }
 776         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 777                  (unsigned) (rdev->mc.real_vram_size / (1024 * 1024)));
 778
 779         r = radeon_ttm_init_gtt(rdev);
 780         if (r) {
 781                 DRM_ERROR("Failed initializing GTT heap.\n");
 782                 return r;
 783         }
 784         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 785                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 786
 787         r = radeon_ttm_debugfs_init(rdev);
 788         if (r) {
 789                 DRM_ERROR("Failed to init debugfs\n");
 790                 return r;
 791         }
 792         return 0;
 793 }
 794
 795 void radeon_ttm_fini(struct radeon_device *rdev)
 796 {
 797         int r;
 798
 799         if (!rdev->mman.initialized)
 800                 return;
 801         radeon_ttm_debugfs_fini(rdev);
 802         if (rdev->stolen_vga_memory) {
 803                 r = radeon_bo_reserve(rdev->stolen_vga_memory, false);
 804                 if (r == 0) {
 805                         radeon_bo_unpin(rdev->stolen_vga_memory);
 806                         radeon_bo_unreserve(rdev->stolen_vga_memory);
 807                 }
 808                 radeon_bo_unref(&rdev->stolen_vga_memory);
 809         }
 810         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_VRAM);
 811         ttm_range_man_fini(&rdev->mman.bdev, TTM_PL_TT);
 812         ttm_bo_device_release(&rdev->mman.bdev);
 813         radeon_gart_fini(rdev);
 814         rdev->mman.initialized = false;
 815         DRM_INFO("radeon: ttm finalized\n");
 816 }
 817
 818 /* this should only be called at bootup or when userspace
 819  * isn't running */
 820 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 821 {
 822         struct ttm_resource_manager *man;
 823
 824         if (!rdev->mman.initialized)
 825                 return;
 826
 827         man = ttm_manager_type(&rdev->mman.bdev, TTM_PL_VRAM);
 828         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 829         man->size = size >> PAGE_SHIFT;
 830 }
 831
 832 static vm_fault_t radeon_ttm_fault(struct vm_fault *vmf)
 833 {
 834         struct ttm_buffer_object *bo;
 835         struct radeon_device *rdev;
 836         vm_fault_t ret;
 837
 838         bo = (struct ttm_buffer_object *)vmf->vma->vm_private_data;
 839         if (bo == NULL)
 840                 return VM_FAULT_NOPAGE;
 841
 842         rdev = radeon_get_rdev(bo->bdev);
 843         down_read(&rdev->pm.mclk_lock);
 844         ret = ttm_bo_vm_fault(vmf);
 845         up_read(&rdev->pm.mclk_lock);
 846         return ret;
 847 }
 848
 849 static struct vm_operations_struct radeon_ttm_vm_ops = {
 850         .fault = radeon_ttm_fault,
 851         .open = ttm_bo_vm_open,
 852         .close = ttm_bo_vm_close,
 853         .access = ttm_bo_vm_access
 854 };
 855
 856 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 857 {
 858         int r;
 859         struct drm_file *file_priv = filp->private_data;
 860         struct radeon_device *rdev = file_priv->minor->dev->dev_private;
 861
 862         if (rdev == NULL)
 863                 return -EINVAL;
 864
 865         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 866         if (unlikely(r != 0))
 867                 return r;
 868
 869         vma->vm_ops = &radeon_ttm_vm_ops;
 870         return 0;
 871 }
 872
 873 #if defined(CONFIG_DEBUG_FS)
 874
 875 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 876 {
 877         struct drm_info_node *node = (struct drm_info_node *)m->private;
 878         unsigned ttm_pl = *(int*)node->info_ent->data;
 879         struct drm_device *dev = node->minor->dev;
 880         struct radeon_device *rdev = dev->dev_private;
 881         struct ttm_resource_manager *man = ttm_manager_type(&rdev->mman.bdev, ttm_pl);
 882         struct drm_printer p = drm_seq_file_printer(m);
 883
 884         man->func->debug(man, &p);
 885         return 0;
 886 }
 887
 888
 889 static int ttm_pl_vram = TTM_PL_VRAM;
 890 static int ttm_pl_tt = TTM_PL_TT;
 891
 892 static struct drm_info_list radeon_ttm_debugfs_list[] = {
 893         {"radeon_vram_mm", radeon_mm_dump_table, 0, &ttm_pl_vram},
 894         {"radeon_gtt_mm", radeon_mm_dump_table, 0, &ttm_pl_tt},
 895         {"ttm_page_pool", ttm_page_alloc_debugfs, 0, NULL},
 896 #ifdef CONFIG_SWIOTLB
 897         {"ttm_dma_page_pool", ttm_dma_page_alloc_debugfs, 0, NULL}
 898 #endif
 899 };
 900
 901 static int radeon_ttm_vram_open(struct inode *inode, struct file *filep)
 902 {
 903         struct radeon_device *rdev = inode->i_private;
 904         i_size_write(inode, rdev->mc.mc_vram_size);
 905         filep->private_data = inode->i_private;
 906         return 0;
 907 }
 908
 909 static ssize_t radeon_ttm_vram_read(struct file *f, char __user *buf,
 910                                     size_t size, loff_t *pos)
 911 {
 912         struct radeon_device *rdev = f->private_data;
 913         ssize_t result = 0;
 914         int r;
 915
 916         if (size & 0x3 || *pos & 0x3)
 917                 return -EINVAL;
 918
 919         while (size) {
 920                 unsigned long flags;
 921                 uint32_t value;
 922
 923                 if (*pos >= rdev->mc.mc_vram_size)
 924                         return result;
 925
 926                 spin_lock_irqsave(&rdev->mmio_idx_lock, flags);
 927                 WREG32(RADEON_MM_INDEX, ((uint32_t)*pos) | 0x80000000);
 928                 if (rdev->family >= CHIP_CEDAR)
 929                         WREG32(EVERGREEN_MM_INDEX_HI, *pos >> 31);
 930                 value = RREG32(RADEON_MM_DATA);
 931                 spin_unlock_irqrestore(&rdev->mmio_idx_lock, flags);
 932
 933                 r = put_user(value, (uint32_t *)buf);
 934                 if (r)
 935                         return r;
 936
 937                 result += 4;
 938                 buf += 4;
 939                 *pos += 4;
 940                 size -= 4;
 941         }
 942
 943         return result;
 944 }
 945
 946 static const struct file_operations radeon_ttm_vram_fops = {
 947         .owner = THIS_MODULE,
 948         .open = radeon_ttm_vram_open,
 949         .read = radeon_ttm_vram_read,
 950         .llseek = default_llseek
 951 };
 952
 953 static int radeon_ttm_gtt_open(struct inode *inode, struct file *filep)
 954 {
 955         struct radeon_device *rdev = inode->i_private;
 956         i_size_write(inode, rdev->mc.gtt_size);
 957         filep->private_data = inode->i_private;
 958         return 0;
 959 }
 960
 961 static ssize_t radeon_ttm_gtt_read(struct file *f, char __user *buf,
 962                                    size_t size, loff_t *pos)
 963 {
 964         struct radeon_device *rdev = f->private_data;
 965         ssize_t result = 0;
 966         int r;
 967
 968         while (size) {
 969                 loff_t p = *pos / PAGE_SIZE;
 970                 unsigned off = *pos & ~PAGE_MASK;
 971                 size_t cur_size = min_t(size_t, size, PAGE_SIZE - off);
 972                 struct page *page;
 973                 void *ptr;
 974
 975                 if (p >= rdev->gart.num_cpu_pages)
 976                         return result;
 977
 978                 page = rdev->gart.pages[p];
 979                 if (page) {
 980                         ptr = kmap(page);
 981                         ptr += off;
 982
 983                         r = copy_to_user(buf, ptr, cur_size);
 984                         kunmap(rdev->gart.pages[p]);
 985                 } else
 986                         r = clear_user(buf, cur_size);
 987
 988                 if (r)
 989                         return -EFAULT;
 990
 991                 result += cur_size;
 992                 buf += cur_size;
 993                 *pos += cur_size;
 994                 size -= cur_size;
 995         }
 996
 997         return result;
 998 }
 999
1000 static const struct file_operations radeon_ttm_gtt_fops = {
1001         .owner = THIS_MODULE,
1002         .open = radeon_ttm_gtt_open,
1003         .read = radeon_ttm_gtt_read,
1004         .llseek = default_llseek
1005 };
1006
1007 #endif
1008
1009 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
1010 {
1011 #if defined(CONFIG_DEBUG_FS)
1012         unsigned count;
1013
1014         struct drm_minor *minor = rdev->ddev->primary;
1015         struct dentry *root = minor->debugfs_root;
1016
1017         rdev->mman.vram = debugfs_create_file("radeon_vram", S_IFREG | S_IRUGO,
1018                                               root, rdev,
1019                                               &radeon_ttm_vram_fops);
1020
1021         rdev->mman.gtt = debugfs_create_file("radeon_gtt", S_IFREG | S_IRUGO,
1022                                              root, rdev, &radeon_ttm_gtt_fops);
1023
1024         count = ARRAY_SIZE(radeon_ttm_debugfs_list);
1025
1026 #ifdef CONFIG_SWIOTLB
1027         if (!(rdev->need_swiotlb && swiotlb_nr_tbl()))
1028                 --count;
1029 #endif
1030
1031         return radeon_debugfs_add_files(rdev, radeon_ttm_debugfs_list, count);
1032 #else
1033
1034         return 0;
1035 #endif
1036 }
1037
1038 static void radeon_ttm_debugfs_fini(struct radeon_device *rdev)
1039 {
1040 #if defined(CONFIG_DEBUG_FS)
1041
1042         debugfs_remove(rdev->mman.vram);
1043         rdev->mman.vram = NULL;
1044
1045         debugfs_remove(rdev->mman.gtt);
1046         rdev->mman.gtt = NULL;
1047 #endif
1048 }