2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
28 #include <linux/seq_file.h>
30 #include "radeon_drm.h"
31 #include "radeon_reg.h"
35 int radeon_debugfs_ib_init(struct radeon_device *rdev);
40 int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib)
42 struct radeon_fence *fence;
43 struct radeon_ib *nib;
48 r = radeon_fence_create(rdev, &fence);
50 DRM_ERROR("failed to create fence for new IB\n");
53 mutex_lock(&rdev->ib_pool.mutex);
54 i = find_first_zero_bit(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
55 if (i < RADEON_IB_POOL_SIZE) {
56 set_bit(i, rdev->ib_pool.alloc_bm);
57 rdev->ib_pool.ibs[i].length_dw = 0;
58 *ib = &rdev->ib_pool.ibs[i];
59 mutex_unlock(&rdev->ib_pool.mutex);
62 if (list_empty(&rdev->ib_pool.scheduled_ibs)) {
63 /* we go do nothings here */
64 mutex_unlock(&rdev->ib_pool.mutex);
65 DRM_ERROR("all IB allocated none scheduled.\n");
69 /* get the first ib on the scheduled list */
70 nib = list_entry(rdev->ib_pool.scheduled_ibs.next,
71 struct radeon_ib, list);
72 if (nib->fence == NULL) {
73 /* we go do nothings here */
74 mutex_unlock(&rdev->ib_pool.mutex);
75 DRM_ERROR("IB %lu scheduled without a fence.\n", nib->idx);
79 mutex_unlock(&rdev->ib_pool.mutex);
81 r = radeon_fence_wait(nib->fence, false);
83 DRM_ERROR("radeon: IB(%lu:0x%016lX:%u)\n", nib->idx,
84 (unsigned long)nib->gpu_addr, nib->length_dw);
85 DRM_ERROR("radeon: GPU lockup detected, fail to get a IB\n");
88 radeon_fence_unref(&nib->fence);
92 /* scheduled list is accessed here */
93 mutex_lock(&rdev->ib_pool.mutex);
95 INIT_LIST_HEAD(&nib->list);
96 mutex_unlock(&rdev->ib_pool.mutex);
101 radeon_fence_unref(&fence);
103 (*ib)->fence = fence;
108 void radeon_ib_free(struct radeon_device *rdev, struct radeon_ib **ib)
110 struct radeon_ib *tmp = *ib;
116 mutex_lock(&rdev->ib_pool.mutex);
117 if (!list_empty(&tmp->list) && !radeon_fence_signaled(tmp->fence)) {
118 /* IB is scheduled & not signaled don't do anythings */
119 mutex_unlock(&rdev->ib_pool.mutex);
122 list_del(&tmp->list);
123 INIT_LIST_HEAD(&tmp->list);
125 radeon_fence_unref(&tmp->fence);
128 clear_bit(tmp->idx, rdev->ib_pool.alloc_bm);
129 mutex_unlock(&rdev->ib_pool.mutex);
132 int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib)
136 if (!ib->length_dw || !rdev->cp.ready) {
137 /* TODO: Nothings in the ib we should report. */
138 DRM_ERROR("radeon: couldn't schedule IB(%lu).\n", ib->idx);
142 /* 64 dwords should be enough for fence too */
143 r = radeon_ring_lock(rdev, 64);
145 DRM_ERROR("radeon: scheduling IB failled (%d).\n", r);
148 radeon_ring_ib_execute(rdev, ib);
149 radeon_fence_emit(rdev, ib->fence);
150 mutex_lock(&rdev->ib_pool.mutex);
151 list_add_tail(&ib->list, &rdev->ib_pool.scheduled_ibs);
152 mutex_unlock(&rdev->ib_pool.mutex);
153 radeon_ring_unlock_commit(rdev);
157 int radeon_ib_pool_init(struct radeon_device *rdev)
164 if (rdev->ib_pool.robj)
166 /* Allocate 1M object buffer */
167 INIT_LIST_HEAD(&rdev->ib_pool.scheduled_ibs);
168 r = radeon_bo_create(rdev, NULL, RADEON_IB_POOL_SIZE*64*1024,
169 true, RADEON_GEM_DOMAIN_GTT,
170 &rdev->ib_pool.robj);
172 DRM_ERROR("radeon: failed to ib pool (%d).\n", r);
175 r = radeon_bo_reserve(rdev->ib_pool.robj, false);
176 if (unlikely(r != 0))
178 r = radeon_bo_pin(rdev->ib_pool.robj, RADEON_GEM_DOMAIN_GTT, &gpu_addr);
180 radeon_bo_unreserve(rdev->ib_pool.robj);
181 DRM_ERROR("radeon: failed to pin ib pool (%d).\n", r);
184 r = radeon_bo_kmap(rdev->ib_pool.robj, &ptr);
185 radeon_bo_unreserve(rdev->ib_pool.robj);
187 DRM_ERROR("radeon: failed to map ib poll (%d).\n", r);
190 for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
193 offset = i * 64 * 1024;
194 rdev->ib_pool.ibs[i].gpu_addr = gpu_addr + offset;
195 rdev->ib_pool.ibs[i].ptr = ptr + offset;
196 rdev->ib_pool.ibs[i].idx = i;
197 rdev->ib_pool.ibs[i].length_dw = 0;
198 INIT_LIST_HEAD(&rdev->ib_pool.ibs[i].list);
200 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
201 rdev->ib_pool.ready = true;
202 DRM_INFO("radeon: ib pool ready.\n");
203 if (radeon_debugfs_ib_init(rdev)) {
204 DRM_ERROR("Failed to register debugfs file for IB !\n");
209 void radeon_ib_pool_fini(struct radeon_device *rdev)
213 if (!rdev->ib_pool.ready) {
216 mutex_lock(&rdev->ib_pool.mutex);
217 bitmap_zero(rdev->ib_pool.alloc_bm, RADEON_IB_POOL_SIZE);
218 if (rdev->ib_pool.robj) {
219 r = radeon_bo_reserve(rdev->ib_pool.robj, false);
220 if (likely(r == 0)) {
221 radeon_bo_kunmap(rdev->ib_pool.robj);
222 radeon_bo_unpin(rdev->ib_pool.robj);
223 radeon_bo_unreserve(rdev->ib_pool.robj);
225 radeon_bo_unref(&rdev->ib_pool.robj);
226 rdev->ib_pool.robj = NULL;
228 mutex_unlock(&rdev->ib_pool.mutex);
235 void radeon_ring_free_size(struct radeon_device *rdev)
237 if (rdev->family >= CHIP_R600)
238 rdev->cp.rptr = RREG32(R600_CP_RB_RPTR);
240 rdev->cp.rptr = RREG32(RADEON_CP_RB_RPTR);
241 /* This works because ring_size is a power of 2 */
242 rdev->cp.ring_free_dw = (rdev->cp.rptr + (rdev->cp.ring_size / 4));
243 rdev->cp.ring_free_dw -= rdev->cp.wptr;
244 rdev->cp.ring_free_dw &= rdev->cp.ptr_mask;
245 if (!rdev->cp.ring_free_dw) {
246 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
250 int radeon_ring_lock(struct radeon_device *rdev, unsigned ndw)
254 /* Align requested size with padding so unlock_commit can
256 ndw = (ndw + rdev->cp.align_mask) & ~rdev->cp.align_mask;
257 mutex_lock(&rdev->cp.mutex);
258 while (ndw > (rdev->cp.ring_free_dw - 1)) {
259 radeon_ring_free_size(rdev);
260 if (ndw < rdev->cp.ring_free_dw) {
263 r = radeon_fence_wait_next(rdev);
265 mutex_unlock(&rdev->cp.mutex);
269 rdev->cp.count_dw = ndw;
270 rdev->cp.wptr_old = rdev->cp.wptr;
274 void radeon_ring_unlock_commit(struct radeon_device *rdev)
276 unsigned count_dw_pad;
279 /* We pad to match fetch size */
280 count_dw_pad = (rdev->cp.align_mask + 1) -
281 (rdev->cp.wptr & rdev->cp.align_mask);
282 for (i = 0; i < count_dw_pad; i++) {
283 radeon_ring_write(rdev, 2 << 30);
286 radeon_cp_commit(rdev);
287 mutex_unlock(&rdev->cp.mutex);
290 void radeon_ring_unlock_undo(struct radeon_device *rdev)
292 rdev->cp.wptr = rdev->cp.wptr_old;
293 mutex_unlock(&rdev->cp.mutex);
296 int radeon_ring_init(struct radeon_device *rdev, unsigned ring_size)
300 rdev->cp.ring_size = ring_size;
301 /* Allocate ring buffer */
302 if (rdev->cp.ring_obj == NULL) {
303 r = radeon_bo_create(rdev, NULL, rdev->cp.ring_size, true,
304 RADEON_GEM_DOMAIN_GTT,
307 dev_err(rdev->dev, "(%d) ring create failed\n", r);
310 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
311 if (unlikely(r != 0))
313 r = radeon_bo_pin(rdev->cp.ring_obj, RADEON_GEM_DOMAIN_GTT,
316 radeon_bo_unreserve(rdev->cp.ring_obj);
317 dev_err(rdev->dev, "(%d) ring pin failed\n", r);
320 r = radeon_bo_kmap(rdev->cp.ring_obj,
321 (void **)&rdev->cp.ring);
322 radeon_bo_unreserve(rdev->cp.ring_obj);
324 dev_err(rdev->dev, "(%d) ring map failed\n", r);
328 rdev->cp.ptr_mask = (rdev->cp.ring_size / 4) - 1;
329 rdev->cp.ring_free_dw = rdev->cp.ring_size / 4;
333 void radeon_ring_fini(struct radeon_device *rdev)
337 mutex_lock(&rdev->cp.mutex);
338 if (rdev->cp.ring_obj) {
339 r = radeon_bo_reserve(rdev->cp.ring_obj, false);
340 if (likely(r == 0)) {
341 radeon_bo_kunmap(rdev->cp.ring_obj);
342 radeon_bo_unpin(rdev->cp.ring_obj);
343 radeon_bo_unreserve(rdev->cp.ring_obj);
345 radeon_bo_unref(&rdev->cp.ring_obj);
346 rdev->cp.ring = NULL;
347 rdev->cp.ring_obj = NULL;
349 mutex_unlock(&rdev->cp.mutex);
356 #if defined(CONFIG_DEBUG_FS)
357 static int radeon_debugfs_ib_info(struct seq_file *m, void *data)
359 struct drm_info_node *node = (struct drm_info_node *) m->private;
360 struct radeon_ib *ib = node->info_ent->data;
366 seq_printf(m, "IB %04lu\n", ib->idx);
367 seq_printf(m, "IB fence %p\n", ib->fence);
368 seq_printf(m, "IB size %05u dwords\n", ib->length_dw);
369 for (i = 0; i < ib->length_dw; i++) {
370 seq_printf(m, "[%05u]=0x%08X\n", i, ib->ptr[i]);
375 static struct drm_info_list radeon_debugfs_ib_list[RADEON_IB_POOL_SIZE];
376 static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
379 int radeon_debugfs_ib_init(struct radeon_device *rdev)
381 #if defined(CONFIG_DEBUG_FS)
384 for (i = 0; i < RADEON_IB_POOL_SIZE; i++) {
385 sprintf(radeon_debugfs_ib_names[i], "radeon_ib_%04u", i);
386 radeon_debugfs_ib_list[i].name = radeon_debugfs_ib_names[i];
387 radeon_debugfs_ib_list[i].show = &radeon_debugfs_ib_info;
388 radeon_debugfs_ib_list[i].driver_features = 0;
389 radeon_debugfs_ib_list[i].data = &rdev->ib_pool.ibs[i];
391 return radeon_debugfs_add_files(rdev, radeon_debugfs_ib_list,
392 RADEON_IB_POOL_SIZE);