drivers/gpu/drm/radeon/radeon_fence.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Dave Airlie
  30  */
  31 #include <linux/seq_file.h>
  32 #include <linux/atomic.h>
  33 #include <linux/wait.h>
  34 #include <linux/list.h>
  35 #include <linux/kref.h>
  36 #include <linux/slab.h>
  37 #include "drmP.h"
  38 #include "drm.h"
  39 #include "radeon_reg.h"
  40 #include "radeon.h"
  41 #include "radeon_trace.h"
  42
  43 static void radeon_fence_write(struct radeon_device *rdev, u32 seq, int ring)
  44 {
  45         if (rdev->wb.enabled) {
  46                 *rdev->fence_drv[ring].cpu_addr = cpu_to_le32(seq);
  47         } else {
  48                 WREG32(rdev->fence_drv[ring].scratch_reg, seq);
  49         }
  50 }
  51
  52 static u32 radeon_fence_read(struct radeon_device *rdev, int ring)
  53 {
  54         u32 seq = 0;
  55
  56         if (rdev->wb.enabled) {
  57                 seq = le32_to_cpu(*rdev->fence_drv[ring].cpu_addr);
  58         } else {
  59                 seq = RREG32(rdev->fence_drv[ring].scratch_reg);
  60         }
  61         return seq;
  62 }
  63
  64 int radeon_fence_emit(struct radeon_device *rdev,
  65                       struct radeon_fence **fence,
  66                       int ring)
  67 {
  68         /* we are protected by the ring emission mutex */
  69         *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
  70         if ((*fence) == NULL) {
  71                 return -ENOMEM;
  72         }
  73         kref_init(&((*fence)->kref));
  74         (*fence)->rdev = rdev;
  75         (*fence)->seq = ++rdev->fence_drv[ring].seq;
  76         (*fence)->ring = ring;
  77         radeon_fence_ring_emit(rdev, ring, *fence);
  78         trace_radeon_fence_emit(rdev->ddev, (*fence)->seq);
  79         return 0;
  80 }
  81
  82 void radeon_fence_process(struct radeon_device *rdev, int ring)
  83 {
  84         uint64_t seq, last_seq;
  85         unsigned count_loop = 0;
  86         bool wake = false;
  87
  88         /* Note there is a scenario here for an infinite loop but it's
  89          * very unlikely to happen. For it to happen, the current polling
  90          * process need to be interrupted by another process and another
  91          * process needs to update the last_seq btw the atomic read and
  92          * xchg of the current process.
  93          *
  94          * More over for this to go in infinite loop there need to be
  95          * continuously new fence signaled ie radeon_fence_read needs
  96          * to return a different value each time for both the currently
  97          * polling process and the other process that xchg the last_seq
  98          * btw atomic read and xchg of the current process. And the
  99          * value the other process set as last seq must be higher than
 100          * the seq value we just read. Which means that current process
 101          * need to be interrupted after radeon_fence_read and before
 102          * atomic xchg.
 103          *
 104          * To be even more safe we count the number of time we loop and
 105          * we bail after 10 loop just accepting the fact that we might
 106          * have temporarly set the last_seq not to the true real last
 107          * seq but to an older one.
 108          */
 109         last_seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
 110         do {
 111                 seq = radeon_fence_read(rdev, ring);
 112                 seq |= last_seq & 0xffffffff00000000LL;
 113                 if (seq < last_seq) {
 114                         seq += 0x100000000LL;
 115                 }
 116
 117                 if (seq == last_seq) {
 118                         break;
 119                 }
 120                 /* If we loop over we don't want to return without
 121                  * checking if a fence is signaled as it means that the
 122                  * seq we just read is different from the previous on.
 123                  */
 124                 wake = true;
 125                 last_seq = seq;
 126                 if ((count_loop++) > 10) {
 127                         /* We looped over too many time leave with the
 128                          * fact that we might have set an older fence
 129                          * seq then the current real last seq as signaled
 130                          * by the hw.
 131                          */
 132                         break;
 133                 }
 134         } while (atomic64_xchg(&rdev->fence_drv[ring].last_seq, seq) > seq);
 135
 136         if (wake) {
 137                 rdev->fence_drv[ring].last_activity = jiffies;
 138                 wake_up_all(&rdev->fence_queue);
 139         }
 140 }
 141
 142 static void radeon_fence_destroy(struct kref *kref)
 143 {
 144         struct radeon_fence *fence;
 145
 146         fence = container_of(kref, struct radeon_fence, kref);
 147         kfree(fence);
 148 }
 149
 150 static bool radeon_fence_seq_signaled(struct radeon_device *rdev,
 151                                       u64 seq, unsigned ring)
 152 {
 153         if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
 154                 return true;
 155         }
 156         /* poll new last sequence at least once */
 157         radeon_fence_process(rdev, ring);
 158         if (atomic64_read(&rdev->fence_drv[ring].last_seq) >= seq) {
 159                 return true;
 160         }
 161         return false;
 162 }
 163
 164 bool radeon_fence_signaled(struct radeon_fence *fence)
 165 {
 166         if (!fence) {
 167                 return true;
 168         }
 169         if (fence->seq == RADEON_FENCE_SIGNALED_SEQ) {
 170                 return true;
 171         }
 172         if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
 173                 fence->seq = RADEON_FENCE_SIGNALED_SEQ;
 174                 return true;
 175         }
 176         return false;
 177 }
 178
 179 static int radeon_fence_wait_seq(struct radeon_device *rdev, u64 target_seq,
 180                                  unsigned ring, bool intr, bool lock_ring)
 181 {
 182         unsigned long timeout, last_activity;
 183         uint64_t seq;
 184         unsigned i;
 185         bool signaled;
 186         int r;
 187
 188         while (target_seq > atomic64_read(&rdev->fence_drv[ring].last_seq)) {
 189                 if (!rdev->ring[ring].ready) {
 190                         return -EBUSY;
 191                 }
 192
 193                 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
 194                 if (time_after(rdev->fence_drv[ring].last_activity, timeout)) {
 195                         /* the normal case, timeout is somewhere before last_activity */
 196                         timeout = rdev->fence_drv[ring].last_activity - timeout;
 197                 } else {
 198                         /* either jiffies wrapped around, or no fence was signaled in the last 500ms
 199                          * anyway we will just wait for the minimum amount and then check for a lockup
 200                          */
 201                         timeout = 1;
 202                 }
 203                 seq = atomic64_read(&rdev->fence_drv[ring].last_seq);
 204                 /* Save current last activity valuee, used to check for GPU lockups */
 205                 last_activity = rdev->fence_drv[ring].last_activity;
 206
 207                 trace_radeon_fence_wait_begin(rdev->ddev, seq);
 208                 radeon_irq_kms_sw_irq_get(rdev, ring);
 209                 if (intr) {
 210                         r = wait_event_interruptible_timeout(rdev->fence_queue,
 211                                 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
 212                                 timeout);
 213                 } else {
 214                         r = wait_event_timeout(rdev->fence_queue,
 215                                 (signaled = radeon_fence_seq_signaled(rdev, target_seq, ring)),
 216                                 timeout);
 217                 }
 218                 radeon_irq_kms_sw_irq_put(rdev, ring);
 219                 if (unlikely(r < 0)) {
 220                         return r;
 221                 }
 222                 trace_radeon_fence_wait_end(rdev->ddev, seq);
 223
 224                 if (unlikely(!signaled)) {
 225                         /* we were interrupted for some reason and fence
 226                          * isn't signaled yet, resume waiting */
 227                         if (r) {
 228                                 continue;
 229                         }
 230
 231                         /* check if sequence value has changed since last_activity */
 232                         if (seq != atomic64_read(&rdev->fence_drv[ring].last_seq)) {
 233                                 continue;
 234                         }
 235
 236                         if (lock_ring) {
 237                                 mutex_lock(&rdev->ring_lock);
 238                         }
 239
 240                         /* test if somebody else has already decided that this is a lockup */
 241                         if (last_activity != rdev->fence_drv[ring].last_activity) {
 242                                 if (lock_ring) {
 243                                         mutex_unlock(&rdev->ring_lock);
 244                                 }
 245                                 continue;
 246                         }
 247
 248                         if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
 249                                 /* good news we believe it's a lockup */
 250                                 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx last fence id 0x%016llx)\n",
 251                                          target_seq, seq);
 252
 253                                 /* change last activity so nobody else think there is a lockup */
 254                                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 255                                         rdev->fence_drv[i].last_activity = jiffies;
 256                                 }
 257
 258                                 /* mark the ring as not ready any more */
 259                                 rdev->ring[ring].ready = false;
 260                                 if (lock_ring) {
 261                                         mutex_unlock(&rdev->ring_lock);
 262                                 }
 263                                 return -EDEADLK;
 264                         }
 265
 266                         if (lock_ring) {
 267                                 mutex_unlock(&rdev->ring_lock);
 268                         }
 269                 }
 270         }
 271         return 0;
 272 }
 273
 274 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
 275 {
 276         int r;
 277
 278         if (fence == NULL) {
 279                 WARN(1, "Querying an invalid fence : %p !\n", fence);
 280                 return -EINVAL;
 281         }
 282
 283         r = radeon_fence_wait_seq(fence->rdev, fence->seq,
 284                                   fence->ring, intr, true);
 285         if (r) {
 286                 return r;
 287         }
 288         fence->seq = RADEON_FENCE_SIGNALED_SEQ;
 289         return 0;
 290 }
 291
 292 bool radeon_fence_any_seq_signaled(struct radeon_device *rdev, u64 *seq)
 293 {
 294         unsigned i;
 295
 296         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 297                 if (seq[i] && radeon_fence_seq_signaled(rdev, seq[i], i)) {
 298                         return true;
 299                 }
 300         }
 301         return false;
 302 }
 303
 304 static int radeon_fence_wait_any_seq(struct radeon_device *rdev,
 305                                      u64 *target_seq, bool intr)
 306 {
 307         unsigned long timeout, last_activity, tmp;
 308         unsigned i, ring = RADEON_NUM_RINGS;
 309         bool signaled;
 310         int r;
 311
 312         for (i = 0, last_activity = 0; i < RADEON_NUM_RINGS; ++i) {
 313                 if (!target_seq[i]) {
 314                         continue;
 315                 }
 316
 317                 /* use the most recent one as indicator */
 318                 if (time_after(rdev->fence_drv[i].last_activity, last_activity)) {
 319                         last_activity = rdev->fence_drv[i].last_activity;
 320                 }
 321
 322                 /* For lockup detection just pick the lowest ring we are
 323                  * actively waiting for
 324                  */
 325                 if (i < ring) {
 326                         ring = i;
 327                 }
 328         }
 329
 330         /* nothing to wait for ? */
 331         if (ring == RADEON_NUM_RINGS) {
 332                 return 0;
 333         }
 334
 335         while (!radeon_fence_any_seq_signaled(rdev, target_seq)) {
 336                 timeout = jiffies - RADEON_FENCE_JIFFIES_TIMEOUT;
 337                 if (time_after(last_activity, timeout)) {
 338                         /* the normal case, timeout is somewhere before last_activity */
 339                         timeout = last_activity - timeout;
 340                 } else {
 341                         /* either jiffies wrapped around, or no fence was signaled in the last 500ms
 342                          * anyway we will just wait for the minimum amount and then check for a lockup
 343                          */
 344                         timeout = 1;
 345                 }
 346
 347                 trace_radeon_fence_wait_begin(rdev->ddev, target_seq[ring]);
 348                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 349                         if (target_seq[i]) {
 350                                 radeon_irq_kms_sw_irq_get(rdev, i);
 351                         }
 352                 }
 353                 if (intr) {
 354                         r = wait_event_interruptible_timeout(rdev->fence_queue,
 355                                 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
 356                                 timeout);
 357                 } else {
 358                         r = wait_event_timeout(rdev->fence_queue,
 359                                 (signaled = radeon_fence_any_seq_signaled(rdev, target_seq)),
 360                                 timeout);
 361                 }
 362                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 363                         if (target_seq[i]) {
 364                                 radeon_irq_kms_sw_irq_put(rdev, i);
 365                         }
 366                 }
 367                 if (unlikely(r < 0)) {
 368                         return r;
 369                 }
 370                 trace_radeon_fence_wait_end(rdev->ddev, target_seq[ring]);
 371
 372                 if (unlikely(!signaled)) {
 373                         /* we were interrupted for some reason and fence
 374                          * isn't signaled yet, resume waiting */
 375                         if (r) {
 376                                 continue;
 377                         }
 378
 379                         mutex_lock(&rdev->ring_lock);
 380                         for (i = 0, tmp = 0; i < RADEON_NUM_RINGS; ++i) {
 381                                 if (time_after(rdev->fence_drv[i].last_activity, tmp)) {
 382                                         tmp = rdev->fence_drv[i].last_activity;
 383                                 }
 384                         }
 385                         /* test if somebody else has already decided that this is a lockup */
 386                         if (last_activity != tmp) {
 387                                 last_activity = tmp;
 388                                 mutex_unlock(&rdev->ring_lock);
 389                                 continue;
 390                         }
 391
 392                         if (radeon_ring_is_lockup(rdev, ring, &rdev->ring[ring])) {
 393                                 /* good news we believe it's a lockup */
 394                                 dev_warn(rdev->dev, "GPU lockup (waiting for 0x%016llx)\n",
 395                                          target_seq[ring]);
 396
 397                                 /* change last activity so nobody else think there is a lockup */
 398                                 for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 399                                         rdev->fence_drv[i].last_activity = jiffies;
 400                                 }
 401
 402                                 /* mark the ring as not ready any more */
 403                                 rdev->ring[ring].ready = false;
 404                                 mutex_unlock(&rdev->ring_lock);
 405                                 return -EDEADLK;
 406                         }
 407                         mutex_unlock(&rdev->ring_lock);
 408                 }
 409         }
 410         return 0;
 411 }
 412
 413 int radeon_fence_wait_any(struct radeon_device *rdev,
 414                           struct radeon_fence **fences,
 415                           bool intr)
 416 {
 417         uint64_t seq[RADEON_NUM_RINGS];
 418         unsigned i;
 419         int r;
 420
 421         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 422                 seq[i] = 0;
 423
 424                 if (!fences[i]) {
 425                         continue;
 426                 }
 427
 428                 if (fences[i]->seq == RADEON_FENCE_SIGNALED_SEQ) {
 429                         /* something was allready signaled */
 430                         return 0;
 431                 }
 432
 433                 seq[i] = fences[i]->seq;
 434         }
 435
 436         r = radeon_fence_wait_any_seq(rdev, seq, intr);
 437         if (r) {
 438                 return r;
 439         }
 440         return 0;
 441 }
 442
 443 int radeon_fence_wait_next_locked(struct radeon_device *rdev, int ring)
 444 {
 445         uint64_t seq;
 446
 447         /* We are not protected by ring lock when reading current seq but
 448          * it's ok as worst case is we return to early while we could have
 449          * wait.
 450          */
 451         seq = atomic64_read(&rdev->fence_drv[ring].last_seq) + 1ULL;
 452         if (seq >= rdev->fence_drv[ring].seq) {
 453                 /* nothing to wait for, last_seq is
 454                    already the last emited fence */
 455                 return -ENOENT;
 456         }
 457         return radeon_fence_wait_seq(rdev, seq, ring, false, false);
 458 }
 459
 460 int radeon_fence_wait_empty_locked(struct radeon_device *rdev, int ring)
 461 {
 462         /* We are not protected by ring lock when reading current seq
 463          * but it's ok as wait empty is call from place where no more
 464          * activity can be scheduled so there won't be concurrent access
 465          * to seq value.
 466          */
 467         return radeon_fence_wait_seq(rdev, rdev->fence_drv[ring].seq,
 468                                      ring, false, false);
 469 }
 470
 471 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
 472 {
 473         kref_get(&fence->kref);
 474         return fence;
 475 }
 476
 477 void radeon_fence_unref(struct radeon_fence **fence)
 478 {
 479         struct radeon_fence *tmp = *fence;
 480
 481         *fence = NULL;
 482         if (tmp) {
 483                 kref_put(&tmp->kref, radeon_fence_destroy);
 484         }
 485 }
 486
 487 unsigned radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
 488 {
 489         uint64_t emitted;
 490
 491         /* We are not protected by ring lock when reading the last sequence
 492          * but it's ok to report slightly wrong fence count here.
 493          */
 494         radeon_fence_process(rdev, ring);
 495         emitted = rdev->fence_drv[ring].seq - atomic64_read(&rdev->fence_drv[ring].last_seq);
 496         /* to avoid 32bits warp around */
 497         if (emitted > 0x10000000) {
 498                 emitted = 0x10000000;
 499         }
 500         return (unsigned)emitted;
 501 }
 502
 503 int radeon_fence_driver_start_ring(struct radeon_device *rdev, int ring)
 504 {
 505         uint64_t index;
 506         int r;
 507
 508         radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 509         if (rdev->wb.use_event) {
 510                 rdev->fence_drv[ring].scratch_reg = 0;
 511                 index = R600_WB_EVENT_OFFSET + ring * 4;
 512         } else {
 513                 r = radeon_scratch_get(rdev, &rdev->fence_drv[ring].scratch_reg);
 514                 if (r) {
 515                         dev_err(rdev->dev, "fence failed to get scratch register\n");
 516                         return r;
 517                 }
 518                 index = RADEON_WB_SCRATCH_OFFSET +
 519                         rdev->fence_drv[ring].scratch_reg -
 520                         rdev->scratch.reg_base;
 521         }
 522         rdev->fence_drv[ring].cpu_addr = &rdev->wb.wb[index/4];
 523         rdev->fence_drv[ring].gpu_addr = rdev->wb.gpu_addr + index;
 524         radeon_fence_write(rdev, rdev->fence_drv[ring].seq, ring);
 525         rdev->fence_drv[ring].initialized = true;
 526         dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx and cpu addr 0x%p\n",
 527                  ring, rdev->fence_drv[ring].gpu_addr, rdev->fence_drv[ring].cpu_addr);
 528         return 0;
 529 }
 530
 531 static void radeon_fence_driver_init_ring(struct radeon_device *rdev, int ring)
 532 {
 533         rdev->fence_drv[ring].scratch_reg = -1;
 534         rdev->fence_drv[ring].cpu_addr = NULL;
 535         rdev->fence_drv[ring].gpu_addr = 0;
 536         rdev->fence_drv[ring].seq = 0;
 537         atomic64_set(&rdev->fence_drv[ring].last_seq, 0);
 538         rdev->fence_drv[ring].last_activity = jiffies;
 539         rdev->fence_drv[ring].initialized = false;
 540 }
 541
 542 int radeon_fence_driver_init(struct radeon_device *rdev)
 543 {
 544         int ring;
 545
 546         init_waitqueue_head(&rdev->fence_queue);
 547         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 548                 radeon_fence_driver_init_ring(rdev, ring);
 549         }
 550         if (radeon_debugfs_fence_init(rdev)) {
 551                 dev_err(rdev->dev, "fence debugfs file creation failed\n");
 552         }
 553         return 0;
 554 }
 555
 556 void radeon_fence_driver_fini(struct radeon_device *rdev)
 557 {
 558         int ring;
 559
 560         mutex_lock(&rdev->ring_lock);
 561         for (ring = 0; ring < RADEON_NUM_RINGS; ring++) {
 562                 if (!rdev->fence_drv[ring].initialized)
 563                         continue;
 564                 radeon_fence_wait_empty_locked(rdev, ring);
 565                 wake_up_all(&rdev->fence_queue);
 566                 radeon_scratch_free(rdev, rdev->fence_drv[ring].scratch_reg);
 567                 rdev->fence_drv[ring].initialized = false;
 568         }
 569         mutex_unlock(&rdev->ring_lock);
 570 }
 571
 572
 573 /*
 574  * Fence debugfs
 575  */
 576 #if defined(CONFIG_DEBUG_FS)
 577 static int radeon_debugfs_fence_info(struct seq_file *m, void *data)
 578 {
 579         struct drm_info_node *node = (struct drm_info_node *)m->private;
 580         struct drm_device *dev = node->minor->dev;
 581         struct radeon_device *rdev = dev->dev_private;
 582         int i;
 583
 584         for (i = 0; i < RADEON_NUM_RINGS; ++i) {
 585                 if (!rdev->fence_drv[i].initialized)
 586                         continue;
 587
 588                 seq_printf(m, "--- ring %d ---\n", i);
 589                 seq_printf(m, "Last signaled fence 0x%016llx\n",
 590                            (unsigned long long)atomic64_read(&rdev->fence_drv[i].last_seq));
 591                 seq_printf(m, "Last emitted  0x%016llx\n",
 592                            rdev->fence_drv[i].seq);
 593         }
 594         return 0;
 595 }
 596
 597 static struct drm_info_list radeon_debugfs_fence_list[] = {
 598         {"radeon_fence_info", &radeon_debugfs_fence_info, 0, NULL},
 599 };
 600 #endif
 601
 602 int radeon_debugfs_fence_init(struct radeon_device *rdev)
 603 {
 604 #if defined(CONFIG_DEBUG_FS)
 605         return radeon_debugfs_add_files(rdev, radeon_debugfs_fence_list, 1);
 606 #else
 607         return 0;
 608 #endif
 609 }