5 * \author Gareth Hughes <gareth@valinux.com>
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
33 #include <drm/radeon_drm.h>
34 #include "radeon_drv.h"
36 #include <drm/drm_pciids.h>
37 #include <linux/console.h>
38 #include <linux/module.h>
43 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
45 * - 2.2.0 - add r6xx/r7xx const buffer support
46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47 * - 2.4.0 - add crtc id query
48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
50 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
51 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
52 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
53 * 2.10.0 - fusion 2D tiling
54 * 2.11.0 - backend map, initial compute support for the CS checker
55 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
56 * 2.13.0 - virtual memory support, streamout
57 * 2.14.0 - add evergreen tiling informations
58 * 2.15.0 - add max_pipes query
59 * 2.16.0 - fix evergreen 2D tiled surface calculation
60 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
61 * 2.18.0 - r600-eg: allow "invalid" DB formats
62 * 2.19.0 - r600-eg: MSAA textures
63 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
64 * 2.21.0 - r600-r700: FMASK and CMASK
65 * 2.22.0 - r600 only: RESOLVE_BOX allowed
66 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
67 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
68 * 2.25.0 - eg+: new info request for num SE and num SH
69 * 2.26.0 - r600-eg: fix htile size computation
70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
71 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
72 * 2.29.0 - R500 FP16 color clear registers
73 * 2.30.0 - fix for FMASK texturing
74 * 2.31.0 - Add fastfb support for rs690
75 * 2.32.0 - new info request for rings working
76 * 2.33.0 - Add SI tiling mode array query
77 * 2.34.0 - Add CIK tiling mode array query
79 #define KMS_DRIVER_MAJOR 2
80 #define KMS_DRIVER_MINOR 34
81 #define KMS_DRIVER_PATCHLEVEL 0
82 int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
83 int radeon_driver_unload_kms(struct drm_device *dev);
84 int radeon_driver_firstopen_kms(struct drm_device *dev);
85 void radeon_driver_lastclose_kms(struct drm_device *dev);
86 int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
87 void radeon_driver_postclose_kms(struct drm_device *dev,
88 struct drm_file *file_priv);
89 void radeon_driver_preclose_kms(struct drm_device *dev,
90 struct drm_file *file_priv);
91 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
92 int radeon_resume_kms(struct drm_device *dev);
93 u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
94 int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
95 void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
96 int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
98 struct timeval *vblank_time,
100 void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
101 int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
102 void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
103 irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
104 int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
105 struct drm_file *file_priv);
106 int radeon_gem_object_init(struct drm_gem_object *obj);
107 void radeon_gem_object_free(struct drm_gem_object *obj);
108 int radeon_gem_object_open(struct drm_gem_object *obj,
109 struct drm_file *file_priv);
110 void radeon_gem_object_close(struct drm_gem_object *obj,
111 struct drm_file *file_priv);
112 extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
113 int *vpos, int *hpos);
114 extern struct drm_ioctl_desc radeon_ioctls_kms[];
115 extern int radeon_max_kms_ioctl;
116 int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
117 int radeon_mode_dumb_mmap(struct drm_file *filp,
118 struct drm_device *dev,
119 uint32_t handle, uint64_t *offset_p);
120 int radeon_mode_dumb_create(struct drm_file *file_priv,
121 struct drm_device *dev,
122 struct drm_mode_create_dumb *args);
123 int radeon_mode_dumb_destroy(struct drm_file *file_priv,
124 struct drm_device *dev,
126 struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
127 struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
129 struct sg_table *sg);
130 int radeon_gem_prime_pin(struct drm_gem_object *obj);
131 void radeon_gem_prime_unpin(struct drm_gem_object *obj);
132 void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
133 void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
134 extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
137 #if defined(CONFIG_DEBUG_FS)
138 int radeon_debugfs_init(struct drm_minor *minor);
139 void radeon_debugfs_cleanup(struct drm_minor *minor);
143 #if defined(CONFIG_VGA_SWITCHEROO)
144 void radeon_register_atpx_handler(void);
145 void radeon_unregister_atpx_handler(void);
147 static inline void radeon_register_atpx_handler(void) {}
148 static inline void radeon_unregister_atpx_handler(void) {}
152 int radeon_modeset = -1;
153 int radeon_dynclks = -1;
154 int radeon_r4xx_atom = 0;
155 int radeon_agpmode = 0;
156 int radeon_vram_limit = 0;
157 int radeon_gart_size = 512; /* default gart size */
158 int radeon_benchmarking = 0;
159 int radeon_testing = 0;
160 int radeon_connector_table = 0;
162 int radeon_audio = 0;
163 int radeon_disp_priority = 0;
164 int radeon_hw_i2c = 0;
165 int radeon_pcie_gen2 = -1;
167 int radeon_lockup_timeout = 10000;
168 int radeon_fastfb = 0;
171 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
172 module_param_named(no_wb, radeon_no_wb, int, 0444);
174 MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
175 module_param_named(modeset, radeon_modeset, int, 0400);
177 MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
178 module_param_named(dynclks, radeon_dynclks, int, 0444);
180 MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
181 module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
183 MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
184 module_param_named(vramlimit, radeon_vram_limit, int, 0600);
186 MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
187 module_param_named(agpmode, radeon_agpmode, int, 0444);
189 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
190 module_param_named(gartsize, radeon_gart_size, int, 0600);
192 MODULE_PARM_DESC(benchmark, "Run benchmark");
193 module_param_named(benchmark, radeon_benchmarking, int, 0444);
195 MODULE_PARM_DESC(test, "Run tests");
196 module_param_named(test, radeon_testing, int, 0444);
198 MODULE_PARM_DESC(connector_table, "Force connector table");
199 module_param_named(connector_table, radeon_connector_table, int, 0444);
201 MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
202 module_param_named(tv, radeon_tv, int, 0444);
204 MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
205 module_param_named(audio, radeon_audio, int, 0444);
207 MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
208 module_param_named(disp_priority, radeon_disp_priority, int, 0444);
210 MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
211 module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
213 MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
214 module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
216 MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
217 module_param_named(msi, radeon_msi, int, 0444);
219 MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
220 module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
222 MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
223 module_param_named(fastfb, radeon_fastfb, int, 0444);
225 MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
226 module_param_named(dpm, radeon_dpm, int, 0444);
228 static struct pci_device_id pciidlist[] = {
232 MODULE_DEVICE_TABLE(pci, pciidlist);
234 #ifdef CONFIG_DRM_RADEON_UMS
236 static int radeon_suspend(struct drm_device *dev, pm_message_t state)
238 drm_radeon_private_t *dev_priv = dev->dev_private;
240 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
243 /* Disable *all* interrupts */
244 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
245 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
246 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
250 static int radeon_resume(struct drm_device *dev)
252 drm_radeon_private_t *dev_priv = dev->dev_private;
254 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
257 /* Restore interrupt registers */
258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
259 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
260 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
264 static const struct file_operations radeon_driver_old_fops = {
265 .owner = THIS_MODULE,
267 .release = drm_release,
268 .unlocked_ioctl = drm_ioctl,
271 .fasync = drm_fasync,
274 .compat_ioctl = radeon_compat_ioctl,
276 .llseek = noop_llseek,
279 static struct drm_driver driver_old = {
281 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
282 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
283 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
284 .load = radeon_driver_load,
285 .firstopen = radeon_driver_firstopen,
286 .open = radeon_driver_open,
287 .preclose = radeon_driver_preclose,
288 .postclose = radeon_driver_postclose,
289 .lastclose = radeon_driver_lastclose,
290 .unload = radeon_driver_unload,
291 .suspend = radeon_suspend,
292 .resume = radeon_resume,
293 .get_vblank_counter = radeon_get_vblank_counter,
294 .enable_vblank = radeon_enable_vblank,
295 .disable_vblank = radeon_disable_vblank,
296 .master_create = radeon_master_create,
297 .master_destroy = radeon_master_destroy,
298 .irq_preinstall = radeon_driver_irq_preinstall,
299 .irq_postinstall = radeon_driver_irq_postinstall,
300 .irq_uninstall = radeon_driver_irq_uninstall,
301 .irq_handler = radeon_driver_irq_handler,
302 .ioctls = radeon_ioctls,
303 .dma_ioctl = radeon_cp_buffers,
304 .fops = &radeon_driver_old_fops,
308 .major = DRIVER_MAJOR,
309 .minor = DRIVER_MINOR,
310 .patchlevel = DRIVER_PATCHLEVEL,
315 static struct drm_driver kms_driver;
317 static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
319 struct apertures_struct *ap;
320 bool primary = false;
322 ap = alloc_apertures(1);
326 ap->ranges[0].base = pci_resource_start(pdev, 0);
327 ap->ranges[0].size = pci_resource_len(pdev, 0);
330 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
332 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
338 static int radeon_pci_probe(struct pci_dev *pdev,
339 const struct pci_device_id *ent)
343 /* Get rid of things like offb */
344 ret = radeon_kick_out_firmware_fb(pdev);
348 return drm_get_pci_dev(pdev, ent, &kms_driver);
352 radeon_pci_remove(struct pci_dev *pdev)
354 struct drm_device *dev = pci_get_drvdata(pdev);
360 radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
362 struct drm_device *dev = pci_get_drvdata(pdev);
363 return radeon_suspend_kms(dev, state);
367 radeon_pci_resume(struct pci_dev *pdev)
369 struct drm_device *dev = pci_get_drvdata(pdev);
370 return radeon_resume_kms(dev);
373 static const struct file_operations radeon_driver_kms_fops = {
374 .owner = THIS_MODULE,
376 .release = drm_release,
377 .unlocked_ioctl = drm_ioctl,
380 .fasync = drm_fasync,
383 .compat_ioctl = radeon_kms_compat_ioctl,
387 static struct drm_driver kms_driver = {
389 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
390 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
393 .load = radeon_driver_load_kms,
394 .firstopen = radeon_driver_firstopen_kms,
395 .open = radeon_driver_open_kms,
396 .preclose = radeon_driver_preclose_kms,
397 .postclose = radeon_driver_postclose_kms,
398 .lastclose = radeon_driver_lastclose_kms,
399 .unload = radeon_driver_unload_kms,
400 .suspend = radeon_suspend_kms,
401 .resume = radeon_resume_kms,
402 .get_vblank_counter = radeon_get_vblank_counter_kms,
403 .enable_vblank = radeon_enable_vblank_kms,
404 .disable_vblank = radeon_disable_vblank_kms,
405 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
406 .get_scanout_position = radeon_get_crtc_scanoutpos,
407 #if defined(CONFIG_DEBUG_FS)
408 .debugfs_init = radeon_debugfs_init,
409 .debugfs_cleanup = radeon_debugfs_cleanup,
411 .irq_preinstall = radeon_driver_irq_preinstall_kms,
412 .irq_postinstall = radeon_driver_irq_postinstall_kms,
413 .irq_uninstall = radeon_driver_irq_uninstall_kms,
414 .irq_handler = radeon_driver_irq_handler_kms,
415 .ioctls = radeon_ioctls_kms,
416 .gem_init_object = radeon_gem_object_init,
417 .gem_free_object = radeon_gem_object_free,
418 .gem_open_object = radeon_gem_object_open,
419 .gem_close_object = radeon_gem_object_close,
420 .dma_ioctl = radeon_dma_ioctl_kms,
421 .dumb_create = radeon_mode_dumb_create,
422 .dumb_map_offset = radeon_mode_dumb_mmap,
423 .dumb_destroy = radeon_mode_dumb_destroy,
424 .fops = &radeon_driver_kms_fops,
426 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
427 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
428 .gem_prime_export = drm_gem_prime_export,
429 .gem_prime_import = drm_gem_prime_import,
430 .gem_prime_pin = radeon_gem_prime_pin,
431 .gem_prime_unpin = radeon_gem_prime_unpin,
432 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
433 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
434 .gem_prime_vmap = radeon_gem_prime_vmap,
435 .gem_prime_vunmap = radeon_gem_prime_vunmap,
440 .major = KMS_DRIVER_MAJOR,
441 .minor = KMS_DRIVER_MINOR,
442 .patchlevel = KMS_DRIVER_PATCHLEVEL,
445 static struct drm_driver *driver;
446 static struct pci_driver *pdriver;
448 #ifdef CONFIG_DRM_RADEON_UMS
449 static struct pci_driver radeon_pci_driver = {
451 .id_table = pciidlist,
455 static struct pci_driver radeon_kms_pci_driver = {
457 .id_table = pciidlist,
458 .probe = radeon_pci_probe,
459 .remove = radeon_pci_remove,
460 .suspend = radeon_pci_suspend,
461 .resume = radeon_pci_resume,
464 static int __init radeon_init(void)
466 #ifdef CONFIG_VGA_CONSOLE
467 if (vgacon_text_force() && radeon_modeset == -1) {
468 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
472 /* set to modesetting by default if not nomodeset */
473 if (radeon_modeset == -1)
476 if (radeon_modeset == 1) {
477 DRM_INFO("radeon kernel modesetting enabled.\n");
478 driver = &kms_driver;
479 pdriver = &radeon_kms_pci_driver;
480 driver->driver_features |= DRIVER_MODESET;
481 driver->num_ioctls = radeon_max_kms_ioctl;
482 radeon_register_atpx_handler();
485 #ifdef CONFIG_DRM_RADEON_UMS
486 DRM_INFO("radeon userspace modesetting enabled.\n");
487 driver = &driver_old;
488 pdriver = &radeon_pci_driver;
489 driver->driver_features &= ~DRIVER_MODESET;
490 driver->num_ioctls = radeon_max_ioctl;
492 DRM_ERROR("No UMS support in radeon module!\n");
497 /* let modprobe override vga console setting */
498 return drm_pci_init(driver, pdriver);
501 static void __exit radeon_exit(void)
503 drm_pci_exit(driver, pdriver);
504 radeon_unregister_atpx_handler();
507 module_init(radeon_init);
508 module_exit(radeon_exit);
510 MODULE_AUTHOR(DRIVER_AUTHOR);
511 MODULE_DESCRIPTION(DRIVER_DESC);
512 MODULE_LICENSE("GPL and additional rights");