drivers/gpu/drm/radeon/radeon_dp_mst.c

   1
   2 #include <drm/drmP.h>
   3 #include <drm/drm_dp_mst_helper.h>
   4 #include <drm/drm_fb_helper.h>
   5
   6 #include "radeon.h"
   7 #include "atom.h"
   8 #include "ni_reg.h"
   9
  10 static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
  11
  12 static int radeon_atom_set_enc_offset(int id)
  13 {
  14         static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
  15                                        EVERGREEN_CRTC1_REGISTER_OFFSET,
  16                                        EVERGREEN_CRTC2_REGISTER_OFFSET,
  17                                        EVERGREEN_CRTC3_REGISTER_OFFSET,
  18                                        EVERGREEN_CRTC4_REGISTER_OFFSET,
  19                                        EVERGREEN_CRTC5_REGISTER_OFFSET,
  20                                        0x13830 - 0x7030 };
  21
  22         return offsets[id];
  23 }
  24
  25 static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
  26                                      struct radeon_encoder_mst *mst_enc,
  27                                      enum radeon_hpd_id hpd, bool enable)
  28 {
  29         struct drm_device *dev = primary->base.dev;
  30         struct radeon_device *rdev = dev->dev_private;
  31         uint32_t reg;
  32         int retries = 0;
  33         uint32_t temp;
  34
  35         reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
  36
  37         /* set MST mode */
  38         reg &= ~NI_DIG_FE_DIG_MODE(7);
  39         reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
  40
  41         if (enable)
  42                 reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  43         else
  44                 reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
  45
  46         reg |= NI_DIG_HPD_SELECT(hpd);
  47         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
  48         WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
  49
  50         if (enable) {
  51                 uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
  52
  53                 do {
  54                         temp = RREG32(NI_DIG_FE_CNTL + offset);
  55                 } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
  56                 if (retries == 10000)
  57                         DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
  58         }
  59         return 0;
  60 }
  61
  62 static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
  63                                            int stream_number,
  64                                            int fe,
  65                                            int slots)
  66 {
  67         struct drm_device *dev = primary->base.dev;
  68         struct radeon_device *rdev = dev->dev_private;
  69         u32 temp, val;
  70         int retries  = 0;
  71         int satreg, satidx;
  72
  73         satreg = stream_number >> 1;
  74         satidx = stream_number & 1;
  75
  76         temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
  77
  78         val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
  79
  80         val <<= (16 * satidx);
  81
  82         temp &= ~(0xffff << (16 * satidx));
  83
  84         temp |= val;
  85
  86         DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  87         WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
  88
  89         WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
  90
  91         do {
  92                 temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
  93         } while ((temp & 0x1) && retries++ < 10000);
  94
  95         if (retries == 10000)
  96                 DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
  97
  98         /* MTP 16 ? */
  99         return 0;
 100 }
 101
 102 static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
 103                                                struct radeon_encoder *primary)
 104 {
 105         struct drm_device *dev = mst_conn->base.dev;
 106         struct stream_attribs new_attribs[6];
 107         int i;
 108         int idx = 0;
 109         struct radeon_connector *radeon_connector;
 110         struct drm_connector *connector;
 111
 112         memset(new_attribs, 0, sizeof(new_attribs));
 113         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 114                 struct radeon_encoder *subenc;
 115                 struct radeon_encoder_mst *mst_enc;
 116
 117                 radeon_connector = to_radeon_connector(connector);
 118                 if (!radeon_connector->is_mst_connector)
 119                         continue;
 120
 121                 if (radeon_connector->mst_port != mst_conn)
 122                         continue;
 123
 124                 subenc = radeon_connector->mst_encoder;
 125                 mst_enc = subenc->enc_priv;
 126
 127                 if (!mst_enc->enc_active)
 128                         continue;
 129
 130                 new_attribs[idx].fe = mst_enc->fe;
 131                 new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
 132                 idx++;
 133         }
 134
 135         for (i = 0; i < idx; i++) {
 136                 if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
 137                     new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
 138                         radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
 139                         mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
 140                         mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
 141                 }
 142         }
 143
 144         for (i = idx; i < mst_conn->enabled_attribs; i++) {
 145                 radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
 146                 mst_conn->cur_stream_attribs[i].fe = 0;
 147                 mst_conn->cur_stream_attribs[i].slots = 0;
 148         }
 149         mst_conn->enabled_attribs = idx;
 150         return 0;
 151 }
 152
 153 static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
 154 {
 155         struct drm_device *dev = mst->base.dev;
 156         struct radeon_device *rdev = dev->dev_private;
 157         struct radeon_encoder_mst *mst_enc = mst->enc_priv;
 158         uint32_t val, temp;
 159         uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
 160         int retries = 0;
 161
 162         val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
 163
 164         WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
 165
 166         do {
 167                 temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
 168         } while ((temp & 0x1) && (retries++ < 10000));
 169
 170         if (retries >= 10000)
 171                 DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
 172         return 0;
 173 }
 174
 175 static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
 176 {
 177         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 178         struct radeon_connector *master = radeon_connector->mst_port;
 179         struct edid *edid;
 180         int ret = 0;
 181
 182         edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
 183         radeon_connector->edid = edid;
 184         DRM_DEBUG_KMS("edid retrieved %p\n", edid);
 185         if (radeon_connector->edid) {
 186                 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
 187                 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
 188                 drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
 189                 return ret;
 190         }
 191         drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
 192
 193         return ret;
 194 }
 195
 196 static int radeon_dp_mst_get_modes(struct drm_connector *connector)
 197 {
 198         return radeon_dp_mst_get_ddc_modes(connector);
 199 }
 200
 201 static enum drm_mode_status
 202 radeon_dp_mst_mode_valid(struct drm_connector *connector,
 203                         struct drm_display_mode *mode)
 204 {
 205         /* TODO - validate mode against available PBN for link */
 206         if (mode->clock < 10000)
 207                 return MODE_CLOCK_LOW;
 208
 209         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 210                 return MODE_H_ILLEGAL;
 211
 212         return MODE_OK;
 213 }
 214
 215 struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
 216 {
 217         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 218
 219         return &radeon_connector->mst_encoder->base;
 220 }
 221
 222 static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
 223         .get_modes = radeon_dp_mst_get_modes,
 224         .mode_valid = radeon_dp_mst_mode_valid,
 225         .best_encoder = radeon_mst_best_encoder,
 226 };
 227
 228 static enum drm_connector_status
 229 radeon_dp_mst_detect(struct drm_connector *connector, bool force)
 230 {
 231         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 232         struct radeon_connector *master = radeon_connector->mst_port;
 233
 234         return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
 235 }
 236
 237 static void
 238 radeon_dp_mst_connector_destroy(struct drm_connector *connector)
 239 {
 240         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 241         struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
 242
 243         drm_encoder_cleanup(&radeon_encoder->base);
 244         kfree(radeon_encoder);
 245         drm_connector_cleanup(connector);
 246         kfree(radeon_connector);
 247 }
 248
 249 static void radeon_connector_dpms(struct drm_connector *connector, int mode)
 250 {
 251         DRM_DEBUG_KMS("\n");
 252 }
 253
 254 static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
 255         .dpms = radeon_connector_dpms,
 256         .detect = radeon_dp_mst_detect,
 257         .fill_modes = drm_helper_probe_single_connector_modes,
 258         .destroy = radeon_dp_mst_connector_destroy,
 259 };
 260
 261 static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 262                                                          struct drm_dp_mst_port *port,
 263                                                          const char *pathprop)
 264 {
 265         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 266         struct drm_device *dev = master->base.dev;
 267         struct radeon_device *rdev = dev->dev_private;
 268         struct radeon_connector *radeon_connector;
 269         struct drm_connector *connector;
 270
 271         radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
 272         if (!radeon_connector)
 273                 return NULL;
 274
 275         radeon_connector->is_mst_connector = true;
 276         connector = &radeon_connector->base;
 277         radeon_connector->port = port;
 278         radeon_connector->mst_port = master;
 279         DRM_DEBUG_KMS("\n");
 280
 281         drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
 282         drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
 283         radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
 284
 285         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 286         drm_mode_connector_set_path_property(connector, pathprop);
 287
 288         drm_modeset_lock_all(dev);
 289         radeon_fb_add_connector(rdev, connector);
 290         drm_modeset_unlock_all(dev);
 291
 292         drm_connector_register(connector);
 293         return connector;
 294 }
 295
 296 static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
 297                                             struct drm_connector *connector)
 298 {
 299         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 300         struct drm_device *dev = master->base.dev;
 301         struct radeon_device *rdev = dev->dev_private;
 302
 303         drm_connector_unregister(connector);
 304         /* need to nuke the connector */
 305         drm_modeset_lock_all(dev);
 306         /* dpms off */
 307         radeon_fb_remove_connector(rdev, connector);
 308
 309         drm_connector_cleanup(connector);
 310         drm_modeset_unlock_all(dev);
 311
 312         kfree(connector);
 313         DRM_DEBUG_KMS("\n");
 314 }
 315
 316 static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
 317 {
 318         struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
 319         struct drm_device *dev = master->base.dev;
 320
 321         drm_kms_helper_hotplug_event(dev);
 322 }
 323
 324 struct drm_dp_mst_topology_cbs mst_cbs = {
 325         .add_connector = radeon_dp_add_mst_connector,
 326         .destroy_connector = radeon_dp_destroy_mst_connector,
 327         .hotplug = radeon_dp_mst_hotplug,
 328 };
 329
 330 struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
 331 {
 332         struct drm_device *dev = encoder->dev;
 333         struct drm_connector *connector;
 334
 335         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 336                 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 337                 if (!connector->encoder)
 338                         continue;
 339                 if (!radeon_connector->is_mst_connector)
 340                         continue;
 341
 342                 DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
 343                 if (connector->encoder == encoder)
 344                         return radeon_connector;
 345         }
 346         return NULL;
 347 }
 348
 349 void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
 350 {
 351         struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
 352         struct drm_device *dev = crtc->dev;
 353         struct radeon_device *rdev = dev->dev_private;
 354         struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
 355         struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
 356         struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
 357         int dp_clock;
 358         struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
 359
 360         if (radeon_connector) {
 361                 radeon_connector->pixelclock_for_modeset = mode->clock;
 362                 if (radeon_connector->base.display_info.bpc)
 363                         radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
 364                 else
 365                         radeon_crtc->bpc = 8;
 366         }
 367
 368         DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
 369         dp_clock = dig_connector->dp_clock;
 370         radeon_crtc->ss_enabled =
 371                 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
 372                                                  ASIC_INTERNAL_SS_ON_DP,
 373                                                  dp_clock);
 374 }
 375
 376 static void
 377 radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
 378 {
 379         struct drm_device *dev = encoder->dev;
 380         struct radeon_device *rdev = dev->dev_private;
 381         struct radeon_encoder *radeon_encoder, *primary;
 382         struct radeon_encoder_mst *mst_enc;
 383         struct radeon_encoder_atom_dig *dig_enc;
 384         struct radeon_connector *radeon_connector;
 385         struct drm_crtc *crtc;
 386         struct radeon_crtc *radeon_crtc;
 387         int ret, slots;
 388
 389         if (!ASIC_IS_DCE5(rdev)) {
 390                 DRM_ERROR("got mst dpms on non-DCE5\n");
 391                 return;
 392         }
 393
 394         radeon_connector = radeon_mst_find_connector(encoder);
 395         if (!radeon_connector)
 396                 return;
 397
 398         radeon_encoder = to_radeon_encoder(encoder);
 399
 400         mst_enc = radeon_encoder->enc_priv;
 401
 402         primary = mst_enc->primary;
 403
 404         dig_enc = primary->enc_priv;
 405
 406         crtc = encoder->crtc;
 407         DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
 408
 409         switch (mode) {
 410         case DRM_MODE_DPMS_ON:
 411                 dig_enc->active_mst_links++;
 412
 413                 radeon_crtc = to_radeon_crtc(crtc);
 414
 415                 if (dig_enc->active_mst_links == 1) {
 416                         mst_enc->fe = dig_enc->dig_encoder;
 417                         mst_enc->fe_from_be = true;
 418                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 419
 420                         atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
 421                         atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
 422                                                         0, 0, dig_enc->dig_encoder);
 423
 424                         if (radeon_dp_needs_link_train(mst_enc->connector) ||
 425                             dig_enc->active_mst_links == 1) {
 426                                 radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
 427                         }
 428
 429                 } else {
 430                         mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
 431                         if (mst_enc->fe == -1)
 432                                 DRM_ERROR("failed to get frontend for dig encoder\n");
 433                         mst_enc->fe_from_be = false;
 434                         atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
 435                 }
 436
 437                 DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
 438                               dig_enc->linkb, radeon_crtc->crtc_id);
 439
 440                 ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
 441                                                radeon_connector->port,
 442                                                mst_enc->pbn, &slots);
 443                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 444
 445                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 446                                           radeon_connector->mst_port->hpd.hpd, true);
 447
 448                 mst_enc->enc_active = true;
 449                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 450                 radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
 451
 452                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
 453                                             mst_enc->fe);
 454                 ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 455
 456                 ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 457
 458                 break;
 459         case DRM_MODE_DPMS_STANDBY:
 460         case DRM_MODE_DPMS_SUSPEND:
 461         case DRM_MODE_DPMS_OFF:
 462                 DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
 463
 464                 if (!mst_enc->enc_active)
 465                         return;
 466
 467                 drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 468                 ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
 469
 470                 drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
 471                 /* and this can also fail */
 472                 drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
 473
 474                 drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
 475
 476                 mst_enc->enc_active = false;
 477                 radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
 478
 479                 radeon_dp_mst_set_be_cntl(primary, mst_enc,
 480                                           radeon_connector->mst_port->hpd.hpd, false);
 481                 atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
 482                                             mst_enc->fe);
 483
 484                 if (!mst_enc->fe_from_be)
 485                         radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
 486
 487                 mst_enc->fe_from_be = false;
 488                 dig_enc->active_mst_links--;
 489                 if (dig_enc->active_mst_links == 0) {
 490                         /* drop link */
 491                 }
 492
 493                 break;
 494         }
 495
 496 }
 497
 498 static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
 499                                    const struct drm_display_mode *mode,
 500                                    struct drm_display_mode *adjusted_mode)
 501 {
 502         struct radeon_encoder_mst *mst_enc;
 503         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
 504         int bpp = 24;
 505
 506         mst_enc = radeon_encoder->enc_priv;
 507
 508         mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
 509
 510         mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
 511         DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
 512                       mst_enc->primary->active_device, mst_enc->primary->devices,
 513                       mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
 514
 515
 516         drm_mode_set_crtcinfo(adjusted_mode, 0);
 517         {
 518           struct radeon_connector_atom_dig *dig_connector;
 519
 520           dig_connector = mst_enc->connector->con_priv;
 521           dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
 522           dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
 523                                                                 dig_connector->dpcd);
 524           DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
 525                         dig_connector->dp_lane_count, dig_connector->dp_clock);
 526         }
 527         return true;
 528 }
 529
 530 static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
 531 {
 532         struct radeon_connector *radeon_connector;
 533         struct radeon_encoder *radeon_encoder, *primary;
 534         struct radeon_encoder_mst *mst_enc;
 535         struct radeon_encoder_atom_dig *dig_enc;
 536
 537         radeon_connector = radeon_mst_find_connector(encoder);
 538         if (!radeon_connector) {
 539                 DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
 540                 return;
 541         }
 542         radeon_encoder = to_radeon_encoder(encoder);
 543
 544         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
 545
 546         mst_enc = radeon_encoder->enc_priv;
 547
 548         primary = mst_enc->primary;
 549
 550         dig_enc = primary->enc_priv;
 551
 552         mst_enc->port = radeon_connector->port;
 553
 554         if (dig_enc->dig_encoder == -1) {
 555                 dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
 556                 primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
 557                 atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
 558
 559
 560         }
 561         DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
 562 }
 563
 564 static void
 565 radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
 566                              struct drm_display_mode *mode,
 567                              struct drm_display_mode *adjusted_mode)
 568 {
 569         DRM_DEBUG_KMS("\n");
 570 }
 571
 572 static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
 573 {
 574         radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
 575         DRM_DEBUG_KMS("\n");
 576 }
 577
 578 static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
 579         .dpms = radeon_mst_encoder_dpms,
 580         .mode_fixup = radeon_mst_mode_fixup,
 581         .prepare = radeon_mst_encoder_prepare,
 582         .mode_set = radeon_mst_encoder_mode_set,
 583         .commit = radeon_mst_encoder_commit,
 584 };
 585
 586 void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 587 {
 588         drm_encoder_cleanup(encoder);
 589         kfree(encoder);
 590 }
 591
 592 static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
 593         .destroy = radeon_dp_mst_encoder_destroy,
 594 };
 595
 596 static struct radeon_encoder *
 597 radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
 598 {
 599         struct drm_device *dev = connector->base.dev;
 600         struct radeon_device *rdev = dev->dev_private;
 601         struct radeon_encoder *radeon_encoder;
 602         struct radeon_encoder_mst *mst_enc;
 603         struct drm_encoder *encoder;
 604         const struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
 605         struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
 606
 607         DRM_DEBUG_KMS("enc master is %p\n", enc_master);
 608         radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
 609         if (!radeon_encoder)
 610                 return NULL;
 611
 612         radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
 613         if (!radeon_encoder->enc_priv) {
 614                 kfree(radeon_encoder);
 615                 return NULL;
 616         }
 617         encoder = &radeon_encoder->base;
 618         switch (rdev->num_crtc) {
 619         case 1:
 620                 encoder->possible_crtcs = 0x1;
 621                 break;
 622         case 2:
 623         default:
 624                 encoder->possible_crtcs = 0x3;
 625                 break;
 626         case 4:
 627                 encoder->possible_crtcs = 0xf;
 628                 break;
 629         case 6:
 630                 encoder->possible_crtcs = 0x3f;
 631                 break;
 632         }
 633
 634         drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
 635                          DRM_MODE_ENCODER_DPMST);
 636         drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
 637
 638         mst_enc = radeon_encoder->enc_priv;
 639         mst_enc->connector = connector;
 640         mst_enc->primary = to_radeon_encoder(enc_master);
 641         radeon_encoder->is_mst_encoder = true;
 642         return radeon_encoder;
 643 }
 644
 645 int
 646 radeon_dp_mst_init(struct radeon_connector *radeon_connector)
 647 {
 648         struct drm_device *dev = radeon_connector->base.dev;
 649
 650         if (!radeon_connector->ddc_bus->has_aux)
 651                 return 0;
 652
 653         radeon_connector->mst_mgr.cbs = &mst_cbs;
 654         return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
 655                                             &radeon_connector->ddc_bus->aux, 16, 6,
 656                                             radeon_connector->base.base.id);
 657 }
 658
 659 int
 660 radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
 661 {
 662         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 663         struct drm_device *dev = radeon_connector->base.dev;
 664         struct radeon_device *rdev = dev->dev_private;
 665         int ret;
 666         u8 msg[1];
 667
 668         if (!radeon_mst)
 669                 return 0;
 670
 671         if (!ASIC_IS_DCE5(rdev))
 672                 return 0;
 673
 674         if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
 675                 return 0;
 676
 677         ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
 678                                1);
 679         if (ret) {
 680                 if (msg[0] & DP_MST_CAP) {
 681                         DRM_DEBUG_KMS("Sink is MST capable\n");
 682                         dig_connector->is_mst = true;
 683                 } else {
 684                         DRM_DEBUG_KMS("Sink is not MST capable\n");
 685                         dig_connector->is_mst = false;
 686                 }
 687
 688         }
 689         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 690                                         dig_connector->is_mst);
 691         return dig_connector->is_mst;
 692 }
 693
 694 int
 695 radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
 696 {
 697         struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
 698         int retry;
 699
 700         if (dig_connector->is_mst) {
 701                 u8 esi[16] = { 0 };
 702                 int dret;
 703                 int ret = 0;
 704                 bool handled;
 705
 706                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 707                                        DP_SINK_COUNT_ESI, esi, 8);
 708 go_again:
 709                 if (dret == 8) {
 710                         DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 711                         ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
 712
 713                         if (handled) {
 714                                 for (retry = 0; retry < 3; retry++) {
 715                                         int wret;
 716                                         wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
 717                                                                  DP_SINK_COUNT_ESI + 1, &esi[1], 3);
 718                                         if (wret == 3)
 719                                                 break;
 720                                 }
 721
 722                                 dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
 723                                                         DP_SINK_COUNT_ESI, esi, 8);
 724                                 if (dret == 8) {
 725                                         DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
 726                                         goto go_again;
 727                                 }
 728                         } else
 729                                 ret = 0;
 730
 731                         return ret;
 732                 } else {
 733                         DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
 734                         dig_connector->is_mst = false;
 735                         drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
 736                                                         dig_connector->is_mst);
 737                         /* send a hotplug event */
 738                 }
 739         }
 740         return -EINVAL;
 741 }
 742
 743 #if defined(CONFIG_DEBUG_FS)
 744
 745 static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
 746 {
 747         struct drm_info_node *node = (struct drm_info_node *)m->private;
 748         struct drm_device *dev = node->minor->dev;
 749         struct drm_connector *connector;
 750         struct radeon_connector *radeon_connector;
 751         struct radeon_connector_atom_dig *dig_connector;
 752         int i;
 753
 754         drm_modeset_lock_all(dev);
 755         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
 756                 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
 757                         continue;
 758
 759                 radeon_connector = to_radeon_connector(connector);
 760                 dig_connector = radeon_connector->con_priv;
 761                 if (radeon_connector->is_mst_connector)
 762                         continue;
 763                 if (!dig_connector->is_mst)
 764                         continue;
 765                 drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
 766
 767                 for (i = 0; i < radeon_connector->enabled_attribs; i++)
 768                         seq_printf(m, "attrib %d: %d %d\n", i,
 769                                    radeon_connector->cur_stream_attribs[i].fe,
 770                                    radeon_connector->cur_stream_attribs[i].slots);
 771         }
 772         drm_modeset_unlock_all(dev);
 773         return 0;
 774 }
 775
 776 static struct drm_info_list radeon_debugfs_mst_list[] = {
 777         {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
 778 };
 779 #endif
 780
 781 int radeon_mst_debugfs_init(struct radeon_device *rdev)
 782 {
 783 #if defined(CONFIG_DEBUG_FS)
 784         return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
 785 #endif
 786         return 0;
 787 }