cafd2f8ec7c18ccf9ebac14c7c364ca1e57f4dcf
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_audio.c
1 /*
2  * Copyright 2014 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: Slava Grigorev <slava.grigorev@amd.com>
23  */
24
25 #include <linux/gcd.h>
26 #include <drm/drmP.h>
27 #include <drm/drm_crtc.h>
28 #include "radeon.h"
29 #include "atom.h"
30 #include "radeon_audio.h"
31
32 void r600_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
33                 u8 enable_mask);
34 void dce4_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
35                 u8 enable_mask);
36 void dce6_audio_enable(struct radeon_device *rdev, struct r600_audio_pin *pin,
37                 u8 enable_mask);
38 u32 dce6_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg);
39 void dce6_endpoint_wreg(struct radeon_device *rdev,
40                 u32 offset, u32 reg, u32 v);
41 void dce3_2_afmt_write_sad_regs(struct drm_encoder *encoder,
42                 struct cea_sad *sads, int sad_count);
43 void evergreen_hdmi_write_sad_regs(struct drm_encoder *encoder,
44                 struct cea_sad *sads, int sad_count);
45 void dce6_afmt_write_sad_regs(struct drm_encoder *encoder,
46                 struct cea_sad *sads, int sad_count);
47 void dce3_2_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
48                 u8 *sadb, int sad_count);
49 void dce3_2_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
50                 u8 *sadb, int sad_count);
51 void dce4_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
52                 u8 *sadb, int sad_count);
53 void dce4_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
54                 u8 *sadb, int sad_count);
55 void dce6_afmt_hdmi_write_speaker_allocation(struct drm_encoder *encoder,
56                 u8 *sadb, int sad_count);
57 void dce6_afmt_dp_write_speaker_allocation(struct drm_encoder *encoder,
58                 u8 *sadb, int sad_count);
59 void dce4_afmt_write_latency_fields(struct drm_encoder *encoder,
60                 struct drm_connector *connector, struct drm_display_mode *mode);
61 void dce6_afmt_write_latency_fields(struct drm_encoder *encoder,
62                 struct drm_connector *connector, struct drm_display_mode *mode);
63 struct r600_audio_pin* r600_audio_get_pin(struct radeon_device *rdev);
64 struct r600_audio_pin* dce6_audio_get_pin(struct radeon_device *rdev);
65 void dce6_afmt_select_pin(struct drm_encoder *encoder);
66 void r600_hdmi_audio_set_dto(struct radeon_device *rdev,
67         struct radeon_crtc *crtc, unsigned int clock);
68 void dce3_2_audio_set_dto(struct radeon_device *rdev,
69         struct radeon_crtc *crtc, unsigned int clock);
70 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
71         struct radeon_crtc *crtc, unsigned int clock);
72 void dce4_dp_audio_set_dto(struct radeon_device *rdev,
73         struct radeon_crtc *crtc, unsigned int clock);
74 void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
75         struct radeon_crtc *crtc, unsigned int clock);
76 void dce6_dp_audio_set_dto(struct radeon_device *rdev,
77         struct radeon_crtc *crtc, unsigned int clock);
78 void r600_set_avi_packet(struct radeon_device *rdev, u32 offset,
79         unsigned char *buffer, size_t size);
80 void evergreen_set_avi_packet(struct radeon_device *rdev, u32 offset,
81         unsigned char *buffer, size_t size);
82 void r600_hdmi_update_acr(struct drm_encoder *encoder, long offset,
83         const struct radeon_hdmi_acr *acr);
84 void dce3_2_hdmi_update_acr(struct drm_encoder *encoder, long offset,
85         const struct radeon_hdmi_acr *acr);
86 void evergreen_hdmi_update_acr(struct drm_encoder *encoder, long offset,
87         const struct radeon_hdmi_acr *acr);
88 void r600_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
89 void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset);
90 void dce4_hdmi_set_color_depth(struct drm_encoder *encoder,
91         u32 offset, int bpc);
92
93 static const u32 pin_offsets[7] =
94 {
95         (0x5e00 - 0x5e00),
96         (0x5e18 - 0x5e00),
97         (0x5e30 - 0x5e00),
98         (0x5e48 - 0x5e00),
99         (0x5e60 - 0x5e00),
100         (0x5e78 - 0x5e00),
101         (0x5e90 - 0x5e00),
102 };
103
104 static u32 radeon_audio_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
105 {
106         return RREG32(reg);
107 }
108
109 static void radeon_audio_wreg(struct radeon_device *rdev, u32 offset,
110                 u32 reg, u32 v)
111 {
112         WREG32(reg, v);
113 }
114
115 static struct radeon_audio_basic_funcs r600_funcs = {
116         .endpoint_rreg = radeon_audio_rreg,
117         .endpoint_wreg = radeon_audio_wreg,
118         .enable = r600_audio_enable,
119 };
120
121 static struct radeon_audio_basic_funcs dce32_funcs = {
122         .endpoint_rreg = radeon_audio_rreg,
123         .endpoint_wreg = radeon_audio_wreg,
124         .enable = r600_audio_enable,
125 };
126
127 static struct radeon_audio_basic_funcs dce4_funcs = {
128         .endpoint_rreg = radeon_audio_rreg,
129         .endpoint_wreg = radeon_audio_wreg,
130         .enable = dce4_audio_enable,
131 };
132
133 static struct radeon_audio_basic_funcs dce6_funcs = {
134         .endpoint_rreg = dce6_endpoint_rreg,
135         .endpoint_wreg = dce6_endpoint_wreg,
136         .enable = dce6_audio_enable,
137 };
138
139 static struct radeon_audio_funcs r600_hdmi_funcs = {
140         .get_pin = r600_audio_get_pin,
141         .set_dto = r600_hdmi_audio_set_dto,
142         .update_acr = r600_hdmi_update_acr,
143         .set_vbi_packet = r600_set_vbi_packet,
144         .set_avi_packet = r600_set_avi_packet,
145 };
146
147 static struct radeon_audio_funcs dce32_hdmi_funcs = {
148         .get_pin = r600_audio_get_pin,
149         .write_sad_regs = dce3_2_afmt_write_sad_regs,
150         .write_speaker_allocation = dce3_2_afmt_hdmi_write_speaker_allocation,
151         .set_dto = dce3_2_audio_set_dto,
152         .update_acr = dce3_2_hdmi_update_acr,
153         .set_vbi_packet = r600_set_vbi_packet,
154         .set_avi_packet = r600_set_avi_packet,
155 };
156
157 static struct radeon_audio_funcs dce32_dp_funcs = {
158         .get_pin = r600_audio_get_pin,
159         .write_sad_regs = dce3_2_afmt_write_sad_regs,
160         .write_speaker_allocation = dce3_2_afmt_dp_write_speaker_allocation,
161         .set_dto = dce3_2_audio_set_dto,
162         .set_avi_packet = r600_set_avi_packet,
163 };
164
165 static struct radeon_audio_funcs dce4_hdmi_funcs = {
166         .get_pin = r600_audio_get_pin,
167         .write_sad_regs = evergreen_hdmi_write_sad_regs,
168         .write_speaker_allocation = dce4_afmt_hdmi_write_speaker_allocation,
169         .write_latency_fields = dce4_afmt_write_latency_fields,
170         .set_dto = dce4_hdmi_audio_set_dto,
171         .update_acr = evergreen_hdmi_update_acr,
172         .set_vbi_packet = dce4_set_vbi_packet,
173         .set_color_depth = dce4_hdmi_set_color_depth,
174         .set_avi_packet = evergreen_set_avi_packet,
175 };
176
177 static struct radeon_audio_funcs dce4_dp_funcs = {
178         .get_pin = r600_audio_get_pin,
179         .write_sad_regs = evergreen_hdmi_write_sad_regs,
180         .write_speaker_allocation = dce4_afmt_dp_write_speaker_allocation,
181         .write_latency_fields = dce4_afmt_write_latency_fields,
182         .set_dto = dce4_dp_audio_set_dto,
183         .set_avi_packet = evergreen_set_avi_packet,
184 };
185
186 static struct radeon_audio_funcs dce6_hdmi_funcs = {
187         .select_pin = dce6_afmt_select_pin,
188         .get_pin = dce6_audio_get_pin,
189         .write_sad_regs = dce6_afmt_write_sad_regs,
190         .write_speaker_allocation = dce6_afmt_hdmi_write_speaker_allocation,
191         .write_latency_fields = dce6_afmt_write_latency_fields,
192         .set_dto = dce6_hdmi_audio_set_dto,
193         .update_acr = evergreen_hdmi_update_acr,
194         .set_vbi_packet = dce4_set_vbi_packet,
195         .set_color_depth = dce4_hdmi_set_color_depth,
196         .set_avi_packet = evergreen_set_avi_packet,
197 };
198
199 static struct radeon_audio_funcs dce6_dp_funcs = {
200         .select_pin = dce6_afmt_select_pin,
201         .get_pin = dce6_audio_get_pin,
202         .write_sad_regs = dce6_afmt_write_sad_regs,
203         .write_speaker_allocation = dce6_afmt_dp_write_speaker_allocation,
204         .write_latency_fields = dce6_afmt_write_latency_fields,
205         .set_dto = dce6_dp_audio_set_dto,
206         .set_avi_packet = evergreen_set_avi_packet,
207 };
208
209 static void radeon_audio_interface_init(struct radeon_device *rdev)
210 {
211         if (ASIC_IS_DCE6(rdev)) {
212                 rdev->audio.funcs = &dce6_funcs;
213                 rdev->audio.hdmi_funcs = &dce6_hdmi_funcs;
214                 rdev->audio.dp_funcs = &dce6_dp_funcs;
215         } else if (ASIC_IS_DCE4(rdev)) {
216                 rdev->audio.funcs = &dce4_funcs;
217                 rdev->audio.hdmi_funcs = &dce4_hdmi_funcs;
218                 rdev->audio.dp_funcs = &dce4_dp_funcs;
219         } else if (ASIC_IS_DCE32(rdev)) {
220                 rdev->audio.funcs = &dce32_funcs;
221                 rdev->audio.hdmi_funcs = &dce32_hdmi_funcs;
222                 rdev->audio.dp_funcs = &dce32_dp_funcs;
223         } else {
224                 rdev->audio.funcs = &r600_funcs;
225                 rdev->audio.hdmi_funcs = &r600_hdmi_funcs;
226                 rdev->audio.dp_funcs = 0;
227         }
228 }
229
230 static int radeon_audio_chipset_supported(struct radeon_device *rdev)
231 {
232         return ASIC_IS_DCE2(rdev) && !ASIC_IS_NODCE(rdev);
233 }
234
235 int radeon_audio_init(struct radeon_device *rdev)
236 {
237         int i;
238
239         if (!radeon_audio || !radeon_audio_chipset_supported(rdev))
240                 return 0;
241
242         rdev->audio.enabled = true;
243
244         if (ASIC_IS_DCE83(rdev))                /* KB: 2 streams, 3 endpoints */
245                 rdev->audio.num_pins = 3;
246         else if (ASIC_IS_DCE81(rdev))   /* KV: 4 streams, 7 endpoints */
247                 rdev->audio.num_pins = 7;
248         else if (ASIC_IS_DCE8(rdev))    /* BN/HW: 6 streams, 7 endpoints */
249                 rdev->audio.num_pins = 7;
250         else if (ASIC_IS_DCE64(rdev))   /* OL: 2 streams, 2 endpoints */
251                 rdev->audio.num_pins = 2;
252         else if (ASIC_IS_DCE61(rdev))   /* TN: 4 streams, 6 endpoints */
253                 rdev->audio.num_pins = 6;
254         else if (ASIC_IS_DCE6(rdev))    /* SI: 6 streams, 6 endpoints */
255                 rdev->audio.num_pins = 6;
256         else
257                 rdev->audio.num_pins = 1;
258
259         for (i = 0; i < rdev->audio.num_pins; i++) {
260                 rdev->audio.pin[i].channels = -1;
261                 rdev->audio.pin[i].rate = -1;
262                 rdev->audio.pin[i].bits_per_sample = -1;
263                 rdev->audio.pin[i].status_bits = 0;
264                 rdev->audio.pin[i].category_code = 0;
265                 rdev->audio.pin[i].connected = false;
266                 rdev->audio.pin[i].offset = pin_offsets[i];
267                 rdev->audio.pin[i].id = i;
268         }
269
270         radeon_audio_interface_init(rdev);
271
272         /* disable audio.  it will be set up later */
273         for (i = 0; i < rdev->audio.num_pins; i++)
274                 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
275
276         return 0;
277 }
278
279 void radeon_audio_detect(struct drm_connector *connector,
280         enum drm_connector_status status)
281 {
282         if (!connector || !connector->encoder)
283                 return;
284
285         if (status == connector_status_connected) {
286                 int sink_type;
287                 struct radeon_device *rdev = connector->encoder->dev->dev_private;
288                 struct radeon_connector *radeon_connector;
289                 struct radeon_encoder *radeon_encoder =
290                         to_radeon_encoder(connector->encoder);
291
292                 if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
293                         radeon_encoder->audio = 0;
294                         return;
295                 }
296
297                 radeon_connector = to_radeon_connector(connector);
298                 sink_type = radeon_dp_getsinktype(radeon_connector);
299
300                 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
301                         sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
302                         radeon_encoder->audio = rdev->audio.dp_funcs;
303                 else
304                         radeon_encoder->audio = rdev->audio.hdmi_funcs;
305                 /* TODO: set up the sads, etc. and set the audio enable_mask */
306         } else {
307                 /* TODO: reset the audio enable_mask */
308         }
309 }
310
311 u32 radeon_audio_endpoint_rreg(struct radeon_device *rdev, u32 offset, u32 reg)
312 {
313         if (rdev->audio.funcs->endpoint_rreg)
314                 return rdev->audio.funcs->endpoint_rreg(rdev, offset, reg);
315
316         return 0;
317 }
318
319 void radeon_audio_endpoint_wreg(struct radeon_device *rdev, u32 offset,
320         u32 reg, u32 v)
321 {
322         if (rdev->audio.funcs->endpoint_wreg)
323                 rdev->audio.funcs->endpoint_wreg(rdev, offset, reg, v);
324 }
325
326 void radeon_audio_write_sad_regs(struct drm_encoder *encoder)
327 {
328         struct radeon_encoder *radeon_encoder;
329         struct drm_connector *connector;
330         struct radeon_connector *radeon_connector = NULL;
331         struct cea_sad *sads;
332         int sad_count;
333
334         list_for_each_entry(connector,
335                 &encoder->dev->mode_config.connector_list, head) {
336                 if (connector->encoder == encoder) {
337                         radeon_connector = to_radeon_connector(connector);
338                         break;
339                 }
340         }
341
342         if (!radeon_connector) {
343                 DRM_ERROR("Couldn't find encoder's connector\n");
344                 return;
345         }
346
347         sad_count = drm_edid_to_sad(radeon_connector_edid(connector), &sads);
348         if (sad_count <= 0) {
349                 DRM_ERROR("Couldn't read SADs: %d\n", sad_count);
350                 return;
351         }
352         BUG_ON(!sads);
353
354         radeon_encoder = to_radeon_encoder(encoder);
355
356         if (radeon_encoder->audio && radeon_encoder->audio->write_sad_regs)
357                 radeon_encoder->audio->write_sad_regs(encoder, sads, sad_count);
358
359         kfree(sads);
360 }
361
362 void radeon_audio_write_speaker_allocation(struct drm_encoder *encoder)
363 {
364         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
365     struct drm_connector *connector;
366     struct radeon_connector *radeon_connector = NULL;
367     u8 *sadb = NULL;
368     int sad_count;
369
370     list_for_each_entry(connector,
371                 &encoder->dev->mode_config.connector_list, head) {
372         if (connector->encoder == encoder) {
373             radeon_connector = to_radeon_connector(connector);
374             break;
375         }
376     }
377
378     if (!radeon_connector) {
379         DRM_ERROR("Couldn't find encoder's connector\n");
380         return;
381     }
382
383     sad_count = drm_edid_to_speaker_allocation(
384                 radeon_connector_edid(connector), &sadb);
385     if (sad_count < 0) {
386         DRM_DEBUG("Couldn't read Speaker Allocation Data Block: %d\n",
387                         sad_count);
388         sad_count = 0;
389     }
390
391         if (radeon_encoder->audio && radeon_encoder->audio->write_speaker_allocation)
392                 radeon_encoder->audio->write_speaker_allocation(encoder, sadb, sad_count);
393
394     kfree(sadb);
395 }
396
397 void radeon_audio_write_latency_fields(struct drm_encoder *encoder,
398         struct drm_display_mode *mode)
399 {
400         struct radeon_encoder *radeon_encoder;
401         struct drm_connector *connector;
402         struct radeon_connector *radeon_connector = 0;
403
404         list_for_each_entry(connector,
405                 &encoder->dev->mode_config.connector_list, head) {
406                 if (connector->encoder == encoder) {
407                         radeon_connector = to_radeon_connector(connector);
408                         break;
409                 }
410         }
411
412         if (!radeon_connector) {
413                 DRM_ERROR("Couldn't find encoder's connector\n");
414                 return;
415         }
416
417         radeon_encoder = to_radeon_encoder(encoder);
418
419         if (radeon_encoder->audio && radeon_encoder->audio->write_latency_fields)
420                 radeon_encoder->audio->write_latency_fields(encoder, connector, mode);
421 }
422
423 struct r600_audio_pin* radeon_audio_get_pin(struct drm_encoder *encoder)
424 {
425         struct radeon_device *rdev = encoder->dev->dev_private;
426         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
427
428         if (radeon_encoder->audio && radeon_encoder->audio->get_pin)
429                 return radeon_encoder->audio->get_pin(rdev);
430
431         return NULL;
432 }
433
434 void radeon_audio_select_pin(struct drm_encoder *encoder)
435 {
436         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
437
438         if (radeon_encoder->audio && radeon_encoder->audio->select_pin)
439                 radeon_encoder->audio->select_pin(encoder);
440 }
441
442 void radeon_audio_enable(struct radeon_device *rdev,
443         struct r600_audio_pin *pin, u8 enable_mask)
444 {
445         if (rdev->audio.funcs->enable)
446                 rdev->audio.funcs->enable(rdev, pin, enable_mask);
447 }
448
449 void radeon_audio_fini(struct radeon_device *rdev)
450 {
451         int i;
452
453         if (!rdev->audio.enabled)
454                 return;
455
456         for (i = 0; i < rdev->audio.num_pins; i++)
457                 radeon_audio_enable(rdev, &rdev->audio.pin[i], false);
458
459         rdev->audio.enabled = false;
460 }
461
462 void radeon_audio_set_dto(struct drm_encoder *encoder, unsigned int clock)
463 {
464         struct radeon_device *rdev = encoder->dev->dev_private;
465         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
466         struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc);
467
468         if (radeon_encoder->audio && radeon_encoder->audio->set_dto)
469                 radeon_encoder->audio->set_dto(rdev, crtc, clock);
470 }
471
472 int radeon_audio_set_avi_packet(struct drm_encoder *encoder,
473         struct drm_display_mode *mode)
474 {
475     struct radeon_device *rdev = encoder->dev->dev_private;
476         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
477         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
478         u8 buffer[HDMI_INFOFRAME_HEADER_SIZE + HDMI_AVI_INFOFRAME_SIZE];
479         struct hdmi_avi_infoframe frame;
480         int err;
481
482         err = drm_hdmi_avi_infoframe_from_display_mode(&frame, mode);
483         if (err < 0) {
484                 DRM_ERROR("failed to setup AVI infoframe: %d\n", err);
485                 return err;
486         }
487
488         err = hdmi_avi_infoframe_pack(&frame, buffer, sizeof(buffer));
489         if (err < 0) {
490                 DRM_ERROR("failed to pack AVI infoframe: %d\n", err);
491                 return err;
492         }
493
494         if (dig && dig->afmt &&
495                 radeon_encoder->audio && radeon_encoder->audio->set_avi_packet)
496                 radeon_encoder->audio->set_avi_packet(rdev, dig->afmt->offset,
497                         buffer, sizeof(buffer));
498
499         return 0;
500 }
501
502 /*
503  * calculate CTS and N values if they are not found in the table
504  */
505 static void radeon_audio_calc_cts(unsigned int clock, int *CTS, int *N, int freq)
506 {
507         int n, cts;
508         unsigned long div, mul;
509
510         /* Safe, but overly large values */
511         n = 128 * freq;
512         cts = clock * 1000;
513
514         /* Smallest valid fraction */
515         div = gcd(n, cts);
516
517         n /= div;
518         cts /= div;
519
520         /*
521          * The optimal N is 128*freq/1000. Calculate the closest larger
522          * value that doesn't truncate any bits.
523          */
524         mul = ((128*freq/1000) + (n-1))/n;
525
526         n *= mul;
527         cts *= mul;
528
529         /* Check that we are in spec (not always possible) */
530         if (n < (128*freq/1500))
531                 printk(KERN_WARNING "Calculated ACR N value is too small. You may experience audio problems.\n");
532         if (n > (128*freq/300))
533                 printk(KERN_WARNING "Calculated ACR N value is too large. You may experience audio problems.\n");
534
535         *N = n;
536         *CTS = cts;
537
538         DRM_DEBUG("Calculated ACR timing N=%d CTS=%d for frequency %d\n",
539                 *N, *CTS, freq);
540 }
541
542 static const struct radeon_hdmi_acr* radeon_audio_acr(unsigned int clock)
543 {
544         static struct radeon_hdmi_acr res;
545         u8 i;
546
547         static const struct radeon_hdmi_acr hdmi_predefined_acr[] = {
548                 /*       32kHz    44.1kHz   48kHz    */
549                 /* Clock      N     CTS      N     CTS      N     CTS */
550                 {  25175,  4096,  25175, 28224, 125875,  6144,  25175 }, /*  25,20/1.001 MHz */
551                 {  25200,  4096,  25200,  6272,  28000,  6144,  25200 }, /*  25.20       MHz */
552                 {  27000,  4096,  27000,  6272,  30000,  6144,  27000 }, /*  27.00       MHz */
553                 {  27027,  4096,  27027,  6272,  30030,  6144,  27027 }, /*  27.00*1.001 MHz */
554                 {  54000,  4096,  54000,  6272,  60000,  6144,  54000 }, /*  54.00       MHz */
555                 {  54054,  4096,  54054,  6272,  60060,  6144,  54054 }, /*  54.00*1.001 MHz */
556                 {  74176,  4096,  74176,  5733,  75335,  6144,  74176 }, /*  74.25/1.001 MHz */
557                 {  74250,  4096,  74250,  6272,  82500,  6144,  74250 }, /*  74.25       MHz */
558                 { 148352,  4096, 148352,  5733, 150670,  6144, 148352 }, /* 148.50/1.001 MHz */
559                 { 148500,  4096, 148500,  6272, 165000,  6144, 148500 }, /* 148.50       MHz */
560         };
561
562         /* Precalculated values for common clocks */
563         for (i = 0; i < ARRAY_SIZE(hdmi_predefined_acr); i++)
564                 if (hdmi_predefined_acr[i].clock == clock)
565                         return &hdmi_predefined_acr[i];
566
567         /* And odd clocks get manually calculated */
568         radeon_audio_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
569         radeon_audio_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
570         radeon_audio_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
571
572         return &res;
573 }
574
575 /*
576  * update the N and CTS parameters for a given pixel clock rate
577  */
578 void radeon_audio_update_acr(struct drm_encoder *encoder, unsigned int clock)
579 {
580     const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock);
581     struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
582     struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
583
584         if (!dig || !dig->afmt)
585                 return;
586
587         if (radeon_encoder->audio && radeon_encoder->audio->update_acr)
588                 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr);
589 }
590
591 void radeon_audio_set_vbi_packet(struct drm_encoder *encoder)
592 {
593     struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
594     struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
595
596         if (!dig || !dig->afmt)
597                 return;
598
599         if (radeon_encoder->audio && radeon_encoder->audio->set_vbi_packet)
600                 radeon_encoder->audio->set_vbi_packet(encoder, dig->afmt->offset);
601 }
602
603 void radeon_hdmi_set_color_depth(struct drm_encoder *encoder)
604 {
605         int bpc = 8;
606         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
607         struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
608
609         if (!dig || !dig->afmt)
610                 return;
611
612         if (encoder->crtc) {
613                 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
614                 bpc = radeon_crtc->bpc;
615         }
616
617         if (radeon_encoder->audio && radeon_encoder->audio->set_color_depth)
618                 radeon_encoder->audio->set_color_depth(encoder, dig->afmt->offset, bpc);
619 }