2 * Copyright 2011 Advanced Micro Devices, Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
23 #ifndef __CYPRESS_DPM_H__
24 #define __CYPRESS_DPM_H__
26 #include "rv770_dpm.h"
27 #include "evergreen_smc.h"
29 struct evergreen_mc_reg_entry {
31 u32 mc_data[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
34 struct evergreen_mc_reg_table {
38 struct evergreen_mc_reg_entry mc_reg_table_entry[MAX_AC_TIMING_ENTRIES];
39 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE];
42 struct evergreen_ulv_param {
47 struct evergreen_arb_registers {
48 u32 mc_arb_dram_timing;
49 u32 mc_arb_dram_timing2;
51 u32 mc_arb_burst_time;
61 struct evergreen_power_info {
63 struct rv7xx_power_info rv7xx;
66 bool dynamic_ac_timing;
70 bool memory_transition;
71 bool pcie_performance_request;
72 bool pcie_performance_request_registered;
82 u32 mclk_edc_wr_enable_threshold;
83 struct evergreen_mc_reg_table mc_reg_table;
84 struct atom_voltage_table vddc_voltage_table;
85 struct atom_voltage_table vddci_voltage_table;
86 struct evergreen_arb_registers bootup_arb_registers;
87 struct evergreen_ulv_param ulv;
90 u16 mc_reg_table_start;
93 #define CYPRESS_HASI_DFLT 400000
94 #define CYPRESS_MGCGTTLOCAL0_DFLT 0x00000000
95 #define CYPRESS_MGCGTTLOCAL1_DFLT 0x00000000
96 #define CYPRESS_MGCGTTLOCAL2_DFLT 0x00000000
97 #define CYPRESS_MGCGTTLOCAL3_DFLT 0x00000000
98 #define CYPRESS_MGCGCGTSSMCTRL_DFLT 0x81944bc0
99 #define REDWOOD_MGCGCGTSSMCTRL_DFLT 0x6e944040
100 #define CEDAR_MGCGCGTSSMCTRL_DFLT 0x46944040
101 #define CYPRESS_VRC_DFLT 0xC00033
103 #define PCIE_PERF_REQ_REMOVE_REGISTRY 0
104 #define PCIE_PERF_REQ_FORCE_LOWPOWER 1
105 #define PCIE_PERF_REQ_PECI_GEN1 2
106 #define PCIE_PERF_REQ_PECI_GEN2 3
107 #define PCIE_PERF_REQ_PECI_GEN3 4
109 int cypress_convert_power_level_to_smc(struct radeon_device *rdev,
111 RV770_SMC_HW_PERFORMANCE_LEVEL *level,
113 int cypress_populate_smc_acpi_state(struct radeon_device *rdev,
114 RV770_SMC_STATETABLE *table);
115 int cypress_populate_smc_voltage_tables(struct radeon_device *rdev,
116 RV770_SMC_STATETABLE *table);
117 int cypress_populate_smc_initial_state(struct radeon_device *rdev,
118 struct radeon_ps *radeon_initial_state,
119 RV770_SMC_STATETABLE *table);
120 u32 cypress_calculate_burst_time(struct radeon_device *rdev,
121 u32 engine_clock, u32 memory_clock);
122 void cypress_notify_link_speed_change_before_state_change(struct radeon_device *rdev);
123 int cypress_upload_sw_state(struct radeon_device *rdev);
124 int cypress_upload_mc_reg_table(struct radeon_device *rdev);
125 void cypress_program_memory_timing_parameters(struct radeon_device *rdev);
126 void cypress_notify_link_speed_change_after_state_change(struct radeon_device *rdev);
127 int cypress_construct_voltage_tables(struct radeon_device *rdev);
128 int cypress_get_mvdd_configuration(struct radeon_device *rdev);
129 void cypress_enable_spread_spectrum(struct radeon_device *rdev,
131 void cypress_enable_display_gap(struct radeon_device *rdev);
132 int cypress_get_table_locations(struct radeon_device *rdev);
133 int cypress_populate_mc_reg_table(struct radeon_device *rdev);
134 void cypress_program_response_times(struct radeon_device *rdev);
135 int cypress_notify_smc_display_change(struct radeon_device *rdev,
137 void cypress_enable_sclk_control(struct radeon_device *rdev,
139 void cypress_enable_mclk_control(struct radeon_device *rdev,
141 void cypress_start_dpm(struct radeon_device *rdev);
142 void cypress_advertise_gen2_capability(struct radeon_device *rdev);