2 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3 * Author: Rob Clark <rob@ti.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
19 #include <linux/sort.h>
20 #include <linux/sys_soc.h>
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
27 #include "omap_dmm_tiler.h"
30 #define DRIVER_NAME MODULE_NAME
31 #define DRIVER_DESC "OMAP DRM"
32 #define DRIVER_DATE "20110917"
33 #define DRIVER_MAJOR 1
34 #define DRIVER_MINOR 0
35 #define DRIVER_PATCHLEVEL 0
41 /* Notes about mapping DSS and DRM entities:
43 * encoder: manager.. with some extension to allow one primary CRTC
44 * and zero or more video CRTC's to be mapped to one encoder?
45 * connector: dssdev.. manager can be attached/detached from different
49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
50 struct drm_atomic_state *old_state)
52 struct drm_crtc_state *new_crtc_state;
53 struct drm_crtc *crtc;
57 for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
58 if (!new_crtc_state->active)
61 ret = omap_crtc_wait_pending(crtc);
65 "atomic complete timeout (pipe %u)!\n", i);
69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
71 struct drm_device *dev = old_state->dev;
72 struct omap_drm_private *priv = dev->dev_private;
74 priv->dispc_ops->runtime_get(priv->dispc);
76 /* Apply the atomic update. */
77 drm_atomic_helper_commit_modeset_disables(dev, old_state);
79 if (priv->omaprev != 0x3430) {
80 /* With the current dss dispc implementation we have to enable
81 * the new modeset before we can commit planes. The dispc ovl
82 * configuration relies on the video mode configuration been
83 * written into the HW when the ovl configuration is
86 * This approach is not ideal because after a mode change the
87 * plane update is executed only after the first vblank
88 * interrupt. The dispc implementation should be fixed so that
89 * it is able use uncommitted drm state information.
91 drm_atomic_helper_commit_modeset_enables(dev, old_state);
92 omap_atomic_wait_for_completion(dev, old_state);
94 drm_atomic_helper_commit_planes(dev, old_state, 0);
96 drm_atomic_helper_commit_hw_done(old_state);
99 * OMAP3 DSS seems to have issues with the work-around above,
100 * resulting in endless sync losts if a crtc is enabled without
101 * a plane. For now, skip the WA for OMAP3.
103 drm_atomic_helper_commit_planes(dev, old_state, 0);
105 drm_atomic_helper_commit_modeset_enables(dev, old_state);
107 drm_atomic_helper_commit_hw_done(old_state);
111 * Wait for completion of the page flips to ensure that old buffers
112 * can't be touched by the hardware anymore before cleaning up planes.
114 omap_atomic_wait_for_completion(dev, old_state);
116 drm_atomic_helper_cleanup_planes(dev, old_state);
118 priv->dispc_ops->runtime_put(priv->dispc);
121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
122 .atomic_commit_tail = omap_atomic_commit_tail,
125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
126 .fb_create = omap_framebuffer_create,
127 .output_poll_changed = drm_fb_helper_output_poll_changed,
128 .atomic_check = drm_atomic_helper_check,
129 .atomic_commit = drm_atomic_helper_commit,
132 static int get_connector_type(struct omap_dss_device *dssdev)
134 switch (dssdev->type) {
135 case OMAP_DISPLAY_TYPE_HDMI:
136 return DRM_MODE_CONNECTOR_HDMIA;
137 case OMAP_DISPLAY_TYPE_DVI:
138 return DRM_MODE_CONNECTOR_DVID;
139 case OMAP_DISPLAY_TYPE_DSI:
140 return DRM_MODE_CONNECTOR_DSI;
141 case OMAP_DISPLAY_TYPE_DPI:
142 case OMAP_DISPLAY_TYPE_DBI:
143 return DRM_MODE_CONNECTOR_DPI;
144 case OMAP_DISPLAY_TYPE_VENC:
145 /* TODO: This could also be composite */
146 return DRM_MODE_CONNECTOR_SVIDEO;
147 case OMAP_DISPLAY_TYPE_SDI:
148 return DRM_MODE_CONNECTOR_LVDS;
150 return DRM_MODE_CONNECTOR_Unknown;
154 static void omap_disconnect_dssdevs(struct drm_device *ddev)
156 struct omap_drm_private *priv = ddev->dev_private;
159 for (i = 0; i < priv->num_dssdevs; i++) {
160 struct omap_dss_device *dssdev = priv->dssdevs[i];
162 omapdss_device_disconnect(dssdev, NULL);
163 priv->dssdevs[i] = NULL;
164 omapdss_device_put(dssdev);
167 priv->num_dssdevs = 0;
170 static int omap_compare_dssdevs(const void *a, const void *b)
172 const struct omap_dss_device *dssdev1 = *(struct omap_dss_device **)a;
173 const struct omap_dss_device *dssdev2 = *(struct omap_dss_device **)b;
175 if (dssdev1->alias_id > dssdev2->alias_id)
177 else if (dssdev1->alias_id < dssdev2->alias_id)
182 static int omap_connect_dssdevs(struct drm_device *ddev)
184 struct omap_drm_private *priv = ddev->dev_private;
185 struct omap_dss_device *dssdev = NULL;
188 if (!omapdss_stack_is_ready())
189 return -EPROBE_DEFER;
191 for_each_dss_display(dssdev) {
192 r = omapdss_device_connect(dssdev, NULL);
193 if (r == -EPROBE_DEFER) {
194 omapdss_device_put(dssdev);
197 dev_warn(dssdev->dev, "could not connect display: %s\n",
200 omapdss_device_get(dssdev);
201 priv->dssdevs[priv->num_dssdevs++] = dssdev;
202 if (priv->num_dssdevs == ARRAY_SIZE(priv->dssdevs)) {
203 /* To balance the 'for_each_dss_display' loop */
204 omapdss_device_put(dssdev);
210 /* Sort the list by DT aliases */
211 sort(priv->dssdevs, priv->num_dssdevs, sizeof(priv->dssdevs[0]),
212 omap_compare_dssdevs, NULL);
218 * if we are deferring probe, we disconnect the devices we previously
221 omap_disconnect_dssdevs(ddev);
226 static int omap_modeset_init_properties(struct drm_device *dev)
228 struct omap_drm_private *priv = dev->dev_private;
229 unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
231 priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
233 if (!priv->zorder_prop)
239 static int omap_modeset_init(struct drm_device *dev)
241 struct omap_drm_private *priv = dev->dev_private;
242 struct omap_dss_device *dssdev = NULL;
243 int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
244 int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
245 int num_crtcs, crtc_idx, plane_idx;
250 drm_mode_config_init(dev);
252 ret = omap_modeset_init_properties(dev);
257 * This function creates exactly one connector, encoder, crtc,
258 * and primary plane per each connected dss-device. Each
259 * connector->encoder->crtc chain is expected to be separate
260 * and each crtc is connect to a single dss-channel. If the
261 * configuration does not match the expectations or exceeds
262 * the available resources, the configuration is rejected.
264 num_crtcs = priv->num_dssdevs;
265 if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
266 num_crtcs > ARRAY_SIZE(priv->crtcs) ||
267 num_crtcs > ARRAY_SIZE(priv->planes) ||
268 num_crtcs > ARRAY_SIZE(priv->encoders) ||
269 num_crtcs > ARRAY_SIZE(priv->connectors)) {
270 dev_err(dev->dev, "%s(): Too many connected displays\n",
275 /* All planes can be put to any CRTC */
276 plane_crtc_mask = (1 << num_crtcs) - 1;
282 for (i = 0; i < priv->num_dssdevs; i++) {
283 struct omap_dss_device *dssdev = priv->dssdevs[i];
284 struct drm_connector *connector;
285 struct drm_encoder *encoder;
286 struct drm_plane *plane;
287 struct drm_crtc *crtc;
289 encoder = omap_encoder_init(dev, dssdev);
293 connector = omap_connector_init(dev,
294 get_connector_type(dssdev), dssdev, encoder);
298 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
301 return PTR_ERR(plane);
303 crtc = omap_crtc_init(dev, plane, dssdev);
305 return PTR_ERR(crtc);
307 drm_connector_attach_encoder(connector, encoder);
308 encoder->possible_crtcs = (1 << crtc_idx);
310 priv->crtcs[priv->num_crtcs++] = crtc;
311 priv->planes[priv->num_planes++] = plane;
312 priv->encoders[priv->num_encoders++] = encoder;
313 priv->connectors[priv->num_connectors++] = connector;
320 * Create normal planes for the remaining overlays:
322 for (; plane_idx < num_ovls; plane_idx++) {
323 struct drm_plane *plane;
325 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
328 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
331 return PTR_ERR(plane);
333 priv->planes[priv->num_planes++] = plane;
336 DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
337 priv->num_planes, priv->num_crtcs, priv->num_encoders,
338 priv->num_connectors);
340 dev->mode_config.min_width = 8;
341 dev->mode_config.min_height = 2;
344 * Note: these values are used for multiple independent things:
345 * connector mode filtering, buffer sizes, crtc sizes...
346 * Use big enough values here to cover all use cases, and do more
347 * specific checking in the respective code paths.
349 dev->mode_config.max_width = 8192;
350 dev->mode_config.max_height = 8192;
352 /* We want the zpos to be normalized */
353 dev->mode_config.normalize_zpos = true;
355 dev->mode_config.funcs = &omap_mode_config_funcs;
356 dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
358 drm_mode_config_reset(dev);
360 omap_drm_irq_install(dev);
366 * Enable the HPD in external components if supported
368 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
370 struct omap_drm_private *priv = ddev->dev_private;
373 for (i = 0; i < priv->num_dssdevs; i++) {
374 struct omap_dss_device *dssdev = priv->dssdevs[i];
376 if (dssdev->driver->enable_hpd)
377 dssdev->driver->enable_hpd(dssdev);
382 * Disable the HPD in external components if supported
384 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
386 struct omap_drm_private *priv = ddev->dev_private;
389 for (i = 0; i < priv->num_dssdevs; i++) {
390 struct omap_dss_device *dssdev = priv->dssdevs[i];
392 if (dssdev->driver->disable_hpd)
393 dssdev->driver->disable_hpd(dssdev);
402 static int ioctl_get_param(struct drm_device *dev, void *data,
403 struct drm_file *file_priv)
405 struct omap_drm_private *priv = dev->dev_private;
406 struct drm_omap_param *args = data;
408 DBG("%p: param=%llu", dev, args->param);
410 switch (args->param) {
411 case OMAP_PARAM_CHIPSET_ID:
412 args->value = priv->omaprev;
415 DBG("unknown parameter %lld", args->param);
422 static int ioctl_set_param(struct drm_device *dev, void *data,
423 struct drm_file *file_priv)
425 struct drm_omap_param *args = data;
427 switch (args->param) {
429 DBG("unknown parameter %lld", args->param);
436 #define OMAP_BO_USER_MASK 0x00ffffff /* flags settable by userspace */
438 static int ioctl_gem_new(struct drm_device *dev, void *data,
439 struct drm_file *file_priv)
441 struct drm_omap_gem_new *args = data;
442 u32 flags = args->flags & OMAP_BO_USER_MASK;
444 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
445 args->size.bytes, flags);
447 return omap_gem_new_handle(dev, file_priv, args->size, flags,
451 static int ioctl_gem_info(struct drm_device *dev, void *data,
452 struct drm_file *file_priv)
454 struct drm_omap_gem_info *args = data;
455 struct drm_gem_object *obj;
458 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
460 obj = drm_gem_object_lookup(file_priv, args->handle);
464 args->size = omap_gem_mmap_size(obj);
465 args->offset = omap_gem_mmap_offset(obj);
467 drm_gem_object_unreference_unlocked(obj);
472 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
473 DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
474 DRM_AUTH | DRM_RENDER_ALLOW),
475 DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
476 DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
477 DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
478 DRM_AUTH | DRM_RENDER_ALLOW),
479 /* Deprecated, to be removed. */
480 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
481 DRM_AUTH | DRM_RENDER_ALLOW),
482 /* Deprecated, to be removed. */
483 DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
484 DRM_AUTH | DRM_RENDER_ALLOW),
485 DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
486 DRM_AUTH | DRM_RENDER_ALLOW),
493 static int dev_open(struct drm_device *dev, struct drm_file *file)
495 file->driver_priv = NULL;
497 DBG("open: dev=%p, file=%p", dev, file);
502 static const struct vm_operations_struct omap_gem_vm_ops = {
503 .fault = omap_gem_fault,
504 .open = drm_gem_vm_open,
505 .close = drm_gem_vm_close,
508 static const struct file_operations omapdriver_fops = {
509 .owner = THIS_MODULE,
511 .unlocked_ioctl = drm_ioctl,
512 .compat_ioctl = drm_compat_ioctl,
513 .release = drm_release,
514 .mmap = omap_gem_mmap,
517 .llseek = noop_llseek,
520 static struct drm_driver omap_drm_driver = {
521 .driver_features = DRIVER_MODESET | DRIVER_GEM | DRIVER_PRIME |
522 DRIVER_ATOMIC | DRIVER_RENDER,
524 .lastclose = drm_fb_helper_lastclose,
525 #ifdef CONFIG_DEBUG_FS
526 .debugfs_init = omap_debugfs_init,
528 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
529 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
530 .gem_prime_export = omap_gem_prime_export,
531 .gem_prime_import = omap_gem_prime_import,
532 .gem_free_object_unlocked = omap_gem_free_object,
533 .gem_vm_ops = &omap_gem_vm_ops,
534 .dumb_create = omap_gem_dumb_create,
535 .dumb_map_offset = omap_gem_dumb_map_offset,
537 .num_ioctls = DRM_OMAP_NUM_IOCTLS,
538 .fops = &omapdriver_fops,
542 .major = DRIVER_MAJOR,
543 .minor = DRIVER_MINOR,
544 .patchlevel = DRIVER_PATCHLEVEL,
547 static const struct soc_device_attribute omapdrm_soc_devices[] = {
548 { .family = "OMAP3", .data = (void *)0x3430 },
549 { .family = "OMAP4", .data = (void *)0x4430 },
550 { .family = "OMAP5", .data = (void *)0x5430 },
551 { .family = "DRA7", .data = (void *)0x0752 },
555 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
557 const struct soc_device_attribute *soc;
558 struct drm_device *ddev;
562 DBG("%s", dev_name(dev));
564 /* Allocate and initialize the DRM device. */
565 ddev = drm_dev_alloc(&omap_drm_driver, dev);
567 return PTR_ERR(ddev);
570 ddev->dev_private = priv;
573 priv->dss = omapdss_get_dss();
574 priv->dispc = dispc_get_dispc(priv->dss);
575 priv->dispc_ops = dispc_get_ops(priv->dss);
577 omap_crtc_pre_init(priv);
579 ret = omap_connect_dssdevs(ddev);
581 goto err_crtc_uninit;
583 soc = soc_device_match(omapdrm_soc_devices);
584 priv->omaprev = soc ? (unsigned int)soc->data : 0;
585 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
587 mutex_init(&priv->list_lock);
588 INIT_LIST_HEAD(&priv->obj_list);
590 /* Get memory bandwidth limits */
591 if (priv->dispc_ops->get_memory_bandwidth_limit)
592 priv->max_bandwidth =
593 priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
597 ret = omap_modeset_init(ddev);
599 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
603 /* Initialize vblank handling, start with all CRTCs disabled. */
604 ret = drm_vblank_init(ddev, priv->num_crtcs);
606 dev_err(priv->dev, "could not init vblank\n");
607 goto err_cleanup_modeset;
610 for (i = 0; i < priv->num_crtcs; i++)
611 drm_crtc_vblank_off(priv->crtcs[i]);
613 omap_fbdev_init(ddev);
615 drm_kms_helper_poll_init(ddev);
616 omap_modeset_enable_external_hpd(ddev);
619 * Register the DRM device with the core and the connectors with
622 ret = drm_dev_register(ddev, 0);
624 goto err_cleanup_helpers;
629 omap_modeset_disable_external_hpd(ddev);
630 drm_kms_helper_poll_fini(ddev);
632 omap_fbdev_fini(ddev);
634 drm_mode_config_cleanup(ddev);
635 omap_drm_irq_uninstall(ddev);
637 omap_gem_deinit(ddev);
638 destroy_workqueue(priv->wq);
639 omap_disconnect_dssdevs(ddev);
641 omap_crtc_pre_uninit();
646 static void omapdrm_cleanup(struct omap_drm_private *priv)
648 struct drm_device *ddev = priv->ddev;
652 drm_dev_unregister(ddev);
654 omap_modeset_disable_external_hpd(ddev);
655 drm_kms_helper_poll_fini(ddev);
657 omap_fbdev_fini(ddev);
659 drm_atomic_helper_shutdown(ddev);
661 drm_mode_config_cleanup(ddev);
663 omap_drm_irq_uninstall(ddev);
664 omap_gem_deinit(ddev);
666 destroy_workqueue(priv->wq);
668 omap_disconnect_dssdevs(ddev);
669 omap_crtc_pre_uninit();
674 static int pdev_probe(struct platform_device *pdev)
676 struct omap_drm_private *priv;
679 if (omapdss_is_initialized() == false)
680 return -EPROBE_DEFER;
682 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
684 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
688 /* Allocate and initialize the driver private structure. */
689 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
693 platform_set_drvdata(pdev, priv);
695 ret = omapdrm_init(priv, &pdev->dev);
702 static int pdev_remove(struct platform_device *pdev)
704 struct omap_drm_private *priv = platform_get_drvdata(pdev);
706 omapdrm_cleanup(priv);
712 #ifdef CONFIG_PM_SLEEP
713 static int omap_drm_suspend_all_displays(struct drm_device *ddev)
715 struct omap_drm_private *priv = ddev->dev_private;
718 for (i = 0; i < priv->num_dssdevs; i++) {
719 struct omap_dss_device *dssdev = priv->dssdevs[i];
724 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
725 dssdev->driver->disable(dssdev);
726 dssdev->activate_after_resume = true;
728 dssdev->activate_after_resume = false;
735 static int omap_drm_resume_all_displays(struct drm_device *ddev)
737 struct omap_drm_private *priv = ddev->dev_private;
740 for (i = 0; i < priv->num_dssdevs; i++) {
741 struct omap_dss_device *dssdev = priv->dssdevs[i];
746 if (dssdev->activate_after_resume) {
747 dssdev->driver->enable(dssdev);
748 dssdev->activate_after_resume = false;
755 static int omap_drm_suspend(struct device *dev)
757 struct omap_drm_private *priv = dev_get_drvdata(dev);
758 struct drm_device *drm_dev = priv->ddev;
760 drm_kms_helper_poll_disable(drm_dev);
762 drm_modeset_lock_all(drm_dev);
763 omap_drm_suspend_all_displays(drm_dev);
764 drm_modeset_unlock_all(drm_dev);
769 static int omap_drm_resume(struct device *dev)
771 struct omap_drm_private *priv = dev_get_drvdata(dev);
772 struct drm_device *drm_dev = priv->ddev;
774 drm_modeset_lock_all(drm_dev);
775 omap_drm_resume_all_displays(drm_dev);
776 drm_modeset_unlock_all(drm_dev);
778 drm_kms_helper_poll_enable(drm_dev);
780 return omap_gem_resume(drm_dev);
784 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
786 static struct platform_driver pdev = {
789 .pm = &omapdrm_pm_ops,
792 .remove = pdev_remove,
795 static struct platform_driver * const drivers[] = {
800 static int __init omap_drm_init(void)
804 return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
807 static void __exit omap_drm_fini(void)
811 platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
814 /* need late_initcall() so we load after dss_driver's are loaded */
815 late_initcall(omap_drm_init);
816 module_exit(omap_drm_fini);
818 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
819 MODULE_DESCRIPTION("OMAP DRM Display Driver");
820 MODULE_ALIAS("platform:" DRIVER_NAME);
821 MODULE_LICENSE("GPL v2");