drm/omap: dss: Move and rename omap_dss_(get|put)_device()
[linux-2.6-block.git] / drivers / gpu / drm / omapdrm / omap_drv.c
1 /*
2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3  * Author: Rob Clark <rob@ti.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17
18 #include <linux/of.h>
19 #include <linux/sort.h>
20 #include <linux/sys_soc.h>
21
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
26
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
29
30 #define DRIVER_NAME             MODULE_NAME
31 #define DRIVER_DESC             "OMAP DRM"
32 #define DRIVER_DATE             "20110917"
33 #define DRIVER_MAJOR            1
34 #define DRIVER_MINOR            0
35 #define DRIVER_PATCHLEVEL       0
36
37 /*
38  * mode config funcs
39  */
40
41 /* Notes about mapping DSS and DRM entities:
42  *    CRTC:        overlay
43  *    encoder:     manager.. with some extension to allow one primary CRTC
44  *                 and zero or more video CRTC's to be mapped to one encoder?
45  *    connector:   dssdev.. manager can be attached/detached from different
46  *                 devices
47  */
48
49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
50                                             struct drm_atomic_state *old_state)
51 {
52         struct drm_crtc_state *new_crtc_state;
53         struct drm_crtc *crtc;
54         unsigned int i;
55         int ret;
56
57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
58                 if (!new_crtc_state->active)
59                         continue;
60
61                 ret = omap_crtc_wait_pending(crtc);
62
63                 if (!ret)
64                         dev_warn(dev->dev,
65                                  "atomic complete timeout (pipe %u)!\n", i);
66         }
67 }
68
69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
70 {
71         struct drm_device *dev = old_state->dev;
72         struct omap_drm_private *priv = dev->dev_private;
73
74         priv->dispc_ops->runtime_get(priv->dispc);
75
76         /* Apply the atomic update. */
77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
78
79         if (priv->omaprev != 0x3430) {
80                 /* With the current dss dispc implementation we have to enable
81                  * the new modeset before we can commit planes. The dispc ovl
82                  * configuration relies on the video mode configuration been
83                  * written into the HW when the ovl configuration is
84                  * calculated.
85                  *
86                  * This approach is not ideal because after a mode change the
87                  * plane update is executed only after the first vblank
88                  * interrupt. The dispc implementation should be fixed so that
89                  * it is able use uncommitted drm state information.
90                  */
91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
92                 omap_atomic_wait_for_completion(dev, old_state);
93
94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
95
96                 drm_atomic_helper_commit_hw_done(old_state);
97         } else {
98                 /*
99                  * OMAP3 DSS seems to have issues with the work-around above,
100                  * resulting in endless sync losts if a crtc is enabled without
101                  * a plane. For now, skip the WA for OMAP3.
102                  */
103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
104
105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
106
107                 drm_atomic_helper_commit_hw_done(old_state);
108         }
109
110         /*
111          * Wait for completion of the page flips to ensure that old buffers
112          * can't be touched by the hardware anymore before cleaning up planes.
113          */
114         omap_atomic_wait_for_completion(dev, old_state);
115
116         drm_atomic_helper_cleanup_planes(dev, old_state);
117
118         priv->dispc_ops->runtime_put(priv->dispc);
119 }
120
121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
122         .atomic_commit_tail = omap_atomic_commit_tail,
123 };
124
125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
126         .fb_create = omap_framebuffer_create,
127         .output_poll_changed = drm_fb_helper_output_poll_changed,
128         .atomic_check = drm_atomic_helper_check,
129         .atomic_commit = drm_atomic_helper_commit,
130 };
131
132 static int get_connector_type(struct omap_dss_device *dssdev)
133 {
134         switch (dssdev->type) {
135         case OMAP_DISPLAY_TYPE_HDMI:
136                 return DRM_MODE_CONNECTOR_HDMIA;
137         case OMAP_DISPLAY_TYPE_DVI:
138                 return DRM_MODE_CONNECTOR_DVID;
139         case OMAP_DISPLAY_TYPE_DSI:
140                 return DRM_MODE_CONNECTOR_DSI;
141         case OMAP_DISPLAY_TYPE_DPI:
142         case OMAP_DISPLAY_TYPE_DBI:
143                 return DRM_MODE_CONNECTOR_DPI;
144         case OMAP_DISPLAY_TYPE_VENC:
145                 /* TODO: This could also be composite */
146                 return DRM_MODE_CONNECTOR_SVIDEO;
147         case OMAP_DISPLAY_TYPE_SDI:
148                 return DRM_MODE_CONNECTOR_LVDS;
149         default:
150                 return DRM_MODE_CONNECTOR_Unknown;
151         }
152 }
153
154 static void omap_disconnect_dssdevs(struct drm_device *ddev)
155 {
156         struct omap_drm_private *priv = ddev->dev_private;
157         unsigned int i;
158
159         for (i = 0; i < priv->num_dssdevs; i++) {
160                 struct omap_dss_device *dssdev = priv->dssdevs[i];
161
162                 omapdss_device_disconnect(dssdev, NULL);
163                 priv->dssdevs[i] = NULL;
164                 omapdss_device_put(dssdev);
165         }
166
167         priv->num_dssdevs = 0;
168 }
169
170 static int omap_compare_dssdevs(const void *a, const void *b)
171 {
172         const struct omap_dss_device *dssdev1 = *(struct omap_dss_device **)a;
173         const struct omap_dss_device *dssdev2 = *(struct omap_dss_device **)b;
174
175         if (dssdev1->alias_id > dssdev2->alias_id)
176                 return 1;
177         else if (dssdev1->alias_id < dssdev2->alias_id)
178                 return -1;
179         return 0;
180 }
181
182 static int omap_connect_dssdevs(struct drm_device *ddev)
183 {
184         struct omap_drm_private *priv = ddev->dev_private;
185         struct omap_dss_device *dssdev = NULL;
186         int r;
187
188         if (!omapdss_stack_is_ready())
189                 return -EPROBE_DEFER;
190
191         for_each_dss_display(dssdev) {
192                 r = omapdss_device_connect(dssdev, NULL);
193                 if (r == -EPROBE_DEFER) {
194                         omapdss_device_put(dssdev);
195                         goto cleanup;
196                 } else if (r) {
197                         dev_warn(dssdev->dev, "could not connect display: %s\n",
198                                 dssdev->name);
199                 } else {
200                         omapdss_device_get(dssdev);
201                         priv->dssdevs[priv->num_dssdevs++] = dssdev;
202                         if (priv->num_dssdevs == ARRAY_SIZE(priv->dssdevs)) {
203                                 /* To balance the 'for_each_dss_display' loop */
204                                 omapdss_device_put(dssdev);
205                                 break;
206                         }
207                 }
208         }
209
210         /* Sort the list by DT aliases */
211         sort(priv->dssdevs, priv->num_dssdevs, sizeof(priv->dssdevs[0]),
212              omap_compare_dssdevs, NULL);
213
214         return 0;
215
216 cleanup:
217         /*
218          * if we are deferring probe, we disconnect the devices we previously
219          * connected
220          */
221         omap_disconnect_dssdevs(ddev);
222
223         return r;
224 }
225
226 static int omap_modeset_init_properties(struct drm_device *dev)
227 {
228         struct omap_drm_private *priv = dev->dev_private;
229         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
230
231         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
232                                                       num_planes - 1);
233         if (!priv->zorder_prop)
234                 return -ENOMEM;
235
236         return 0;
237 }
238
239 static int omap_modeset_init(struct drm_device *dev)
240 {
241         struct omap_drm_private *priv = dev->dev_private;
242         struct omap_dss_device *dssdev = NULL;
243         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
244         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
245         int num_crtcs, crtc_idx, plane_idx;
246         unsigned int i;
247         int ret;
248         u32 plane_crtc_mask;
249
250         drm_mode_config_init(dev);
251
252         ret = omap_modeset_init_properties(dev);
253         if (ret < 0)
254                 return ret;
255
256         /*
257          * This function creates exactly one connector, encoder, crtc,
258          * and primary plane per each connected dss-device. Each
259          * connector->encoder->crtc chain is expected to be separate
260          * and each crtc is connect to a single dss-channel. If the
261          * configuration does not match the expectations or exceeds
262          * the available resources, the configuration is rejected.
263          */
264         num_crtcs = priv->num_dssdevs;
265         if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
266             num_crtcs > ARRAY_SIZE(priv->crtcs) ||
267             num_crtcs > ARRAY_SIZE(priv->planes) ||
268             num_crtcs > ARRAY_SIZE(priv->encoders) ||
269             num_crtcs > ARRAY_SIZE(priv->connectors)) {
270                 dev_err(dev->dev, "%s(): Too many connected displays\n",
271                         __func__);
272                 return -EINVAL;
273         }
274
275         /* All planes can be put to any CRTC */
276         plane_crtc_mask = (1 << num_crtcs) - 1;
277
278         dssdev = NULL;
279
280         crtc_idx = 0;
281         plane_idx = 0;
282         for (i = 0; i < priv->num_dssdevs; i++) {
283                 struct omap_dss_device *dssdev = priv->dssdevs[i];
284                 struct drm_connector *connector;
285                 struct drm_encoder *encoder;
286                 struct drm_plane *plane;
287                 struct drm_crtc *crtc;
288
289                 encoder = omap_encoder_init(dev, dssdev);
290                 if (!encoder)
291                         return -ENOMEM;
292
293                 connector = omap_connector_init(dev,
294                                 get_connector_type(dssdev), dssdev, encoder);
295                 if (!connector)
296                         return -ENOMEM;
297
298                 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_PRIMARY,
299                                         plane_crtc_mask);
300                 if (IS_ERR(plane))
301                         return PTR_ERR(plane);
302
303                 crtc = omap_crtc_init(dev, plane, dssdev);
304                 if (IS_ERR(crtc))
305                         return PTR_ERR(crtc);
306
307                 drm_connector_attach_encoder(connector, encoder);
308                 encoder->possible_crtcs = (1 << crtc_idx);
309
310                 priv->crtcs[priv->num_crtcs++] = crtc;
311                 priv->planes[priv->num_planes++] = plane;
312                 priv->encoders[priv->num_encoders++] = encoder;
313                 priv->connectors[priv->num_connectors++] = connector;
314
315                 plane_idx++;
316                 crtc_idx++;
317         }
318
319         /*
320          * Create normal planes for the remaining overlays:
321          */
322         for (; plane_idx < num_ovls; plane_idx++) {
323                 struct drm_plane *plane;
324
325                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
326                         return -EINVAL;
327
328                 plane = omap_plane_init(dev, plane_idx, DRM_PLANE_TYPE_OVERLAY,
329                         plane_crtc_mask);
330                 if (IS_ERR(plane))
331                         return PTR_ERR(plane);
332
333                 priv->planes[priv->num_planes++] = plane;
334         }
335
336         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
337                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
338                 priv->num_connectors);
339
340         dev->mode_config.min_width = 8;
341         dev->mode_config.min_height = 2;
342
343         /*
344          * Note: these values are used for multiple independent things:
345          * connector mode filtering, buffer sizes, crtc sizes...
346          * Use big enough values here to cover all use cases, and do more
347          * specific checking in the respective code paths.
348          */
349         dev->mode_config.max_width = 8192;
350         dev->mode_config.max_height = 8192;
351
352         /* We want the zpos to be normalized */
353         dev->mode_config.normalize_zpos = true;
354
355         dev->mode_config.funcs = &omap_mode_config_funcs;
356         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
357
358         drm_mode_config_reset(dev);
359
360         omap_drm_irq_install(dev);
361
362         return 0;
363 }
364
365 /*
366  * Enable the HPD in external components if supported
367  */
368 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
369 {
370         struct omap_drm_private *priv = ddev->dev_private;
371         int i;
372
373         for (i = 0; i < priv->num_dssdevs; i++) {
374                 struct omap_dss_device *dssdev = priv->dssdevs[i];
375
376                 if (dssdev->driver->enable_hpd)
377                         dssdev->driver->enable_hpd(dssdev);
378         }
379 }
380
381 /*
382  * Disable the HPD in external components if supported
383  */
384 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
385 {
386         struct omap_drm_private *priv = ddev->dev_private;
387         int i;
388
389         for (i = 0; i < priv->num_dssdevs; i++) {
390                 struct omap_dss_device *dssdev = priv->dssdevs[i];
391
392                 if (dssdev->driver->disable_hpd)
393                         dssdev->driver->disable_hpd(dssdev);
394         }
395 }
396
397 /*
398  * drm ioctl funcs
399  */
400
401
402 static int ioctl_get_param(struct drm_device *dev, void *data,
403                 struct drm_file *file_priv)
404 {
405         struct omap_drm_private *priv = dev->dev_private;
406         struct drm_omap_param *args = data;
407
408         DBG("%p: param=%llu", dev, args->param);
409
410         switch (args->param) {
411         case OMAP_PARAM_CHIPSET_ID:
412                 args->value = priv->omaprev;
413                 break;
414         default:
415                 DBG("unknown parameter %lld", args->param);
416                 return -EINVAL;
417         }
418
419         return 0;
420 }
421
422 static int ioctl_set_param(struct drm_device *dev, void *data,
423                 struct drm_file *file_priv)
424 {
425         struct drm_omap_param *args = data;
426
427         switch (args->param) {
428         default:
429                 DBG("unknown parameter %lld", args->param);
430                 return -EINVAL;
431         }
432
433         return 0;
434 }
435
436 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
437
438 static int ioctl_gem_new(struct drm_device *dev, void *data,
439                 struct drm_file *file_priv)
440 {
441         struct drm_omap_gem_new *args = data;
442         u32 flags = args->flags & OMAP_BO_USER_MASK;
443
444         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
445              args->size.bytes, flags);
446
447         return omap_gem_new_handle(dev, file_priv, args->size, flags,
448                                    &args->handle);
449 }
450
451 static int ioctl_gem_info(struct drm_device *dev, void *data,
452                 struct drm_file *file_priv)
453 {
454         struct drm_omap_gem_info *args = data;
455         struct drm_gem_object *obj;
456         int ret = 0;
457
458         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
459
460         obj = drm_gem_object_lookup(file_priv, args->handle);
461         if (!obj)
462                 return -ENOENT;
463
464         args->size = omap_gem_mmap_size(obj);
465         args->offset = omap_gem_mmap_offset(obj);
466
467         drm_gem_object_unreference_unlocked(obj);
468
469         return ret;
470 }
471
472 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
473         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
474                           DRM_AUTH | DRM_RENDER_ALLOW),
475         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
476                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
477         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
478                           DRM_AUTH | DRM_RENDER_ALLOW),
479         /* Deprecated, to be removed. */
480         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
481                           DRM_AUTH | DRM_RENDER_ALLOW),
482         /* Deprecated, to be removed. */
483         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
484                           DRM_AUTH | DRM_RENDER_ALLOW),
485         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
486                           DRM_AUTH | DRM_RENDER_ALLOW),
487 };
488
489 /*
490  * drm driver funcs
491  */
492
493 static int dev_open(struct drm_device *dev, struct drm_file *file)
494 {
495         file->driver_priv = NULL;
496
497         DBG("open: dev=%p, file=%p", dev, file);
498
499         return 0;
500 }
501
502 static const struct vm_operations_struct omap_gem_vm_ops = {
503         .fault = omap_gem_fault,
504         .open = drm_gem_vm_open,
505         .close = drm_gem_vm_close,
506 };
507
508 static const struct file_operations omapdriver_fops = {
509         .owner = THIS_MODULE,
510         .open = drm_open,
511         .unlocked_ioctl = drm_ioctl,
512         .compat_ioctl = drm_compat_ioctl,
513         .release = drm_release,
514         .mmap = omap_gem_mmap,
515         .poll = drm_poll,
516         .read = drm_read,
517         .llseek = noop_llseek,
518 };
519
520 static struct drm_driver omap_drm_driver = {
521         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
522                 DRIVER_ATOMIC | DRIVER_RENDER,
523         .open = dev_open,
524         .lastclose = drm_fb_helper_lastclose,
525 #ifdef CONFIG_DEBUG_FS
526         .debugfs_init = omap_debugfs_init,
527 #endif
528         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
529         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
530         .gem_prime_export = omap_gem_prime_export,
531         .gem_prime_import = omap_gem_prime_import,
532         .gem_free_object_unlocked = omap_gem_free_object,
533         .gem_vm_ops = &omap_gem_vm_ops,
534         .dumb_create = omap_gem_dumb_create,
535         .dumb_map_offset = omap_gem_dumb_map_offset,
536         .ioctls = ioctls,
537         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
538         .fops = &omapdriver_fops,
539         .name = DRIVER_NAME,
540         .desc = DRIVER_DESC,
541         .date = DRIVER_DATE,
542         .major = DRIVER_MAJOR,
543         .minor = DRIVER_MINOR,
544         .patchlevel = DRIVER_PATCHLEVEL,
545 };
546
547 static const struct soc_device_attribute omapdrm_soc_devices[] = {
548         { .family = "OMAP3", .data = (void *)0x3430 },
549         { .family = "OMAP4", .data = (void *)0x4430 },
550         { .family = "OMAP5", .data = (void *)0x5430 },
551         { .family = "DRA7",  .data = (void *)0x0752 },
552         { /* sentinel */ }
553 };
554
555 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
556 {
557         const struct soc_device_attribute *soc;
558         struct drm_device *ddev;
559         unsigned int i;
560         int ret;
561
562         DBG("%s", dev_name(dev));
563
564         /* Allocate and initialize the DRM device. */
565         ddev = drm_dev_alloc(&omap_drm_driver, dev);
566         if (IS_ERR(ddev))
567                 return PTR_ERR(ddev);
568
569         priv->ddev = ddev;
570         ddev->dev_private = priv;
571
572         priv->dev = dev;
573         priv->dss = omapdss_get_dss();
574         priv->dispc = dispc_get_dispc(priv->dss);
575         priv->dispc_ops = dispc_get_ops(priv->dss);
576
577         omap_crtc_pre_init(priv);
578
579         ret = omap_connect_dssdevs(ddev);
580         if (ret)
581                 goto err_crtc_uninit;
582
583         soc = soc_device_match(omapdrm_soc_devices);
584         priv->omaprev = soc ? (unsigned int)soc->data : 0;
585         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
586
587         mutex_init(&priv->list_lock);
588         INIT_LIST_HEAD(&priv->obj_list);
589
590         /* Get memory bandwidth limits */
591         if (priv->dispc_ops->get_memory_bandwidth_limit)
592                 priv->max_bandwidth =
593                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
594
595         omap_gem_init(ddev);
596
597         ret = omap_modeset_init(ddev);
598         if (ret) {
599                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
600                 goto err_gem_deinit;
601         }
602
603         /* Initialize vblank handling, start with all CRTCs disabled. */
604         ret = drm_vblank_init(ddev, priv->num_crtcs);
605         if (ret) {
606                 dev_err(priv->dev, "could not init vblank\n");
607                 goto err_cleanup_modeset;
608         }
609
610         for (i = 0; i < priv->num_crtcs; i++)
611                 drm_crtc_vblank_off(priv->crtcs[i]);
612
613         omap_fbdev_init(ddev);
614
615         drm_kms_helper_poll_init(ddev);
616         omap_modeset_enable_external_hpd(ddev);
617
618         /*
619          * Register the DRM device with the core and the connectors with
620          * sysfs.
621          */
622         ret = drm_dev_register(ddev, 0);
623         if (ret)
624                 goto err_cleanup_helpers;
625
626         return 0;
627
628 err_cleanup_helpers:
629         omap_modeset_disable_external_hpd(ddev);
630         drm_kms_helper_poll_fini(ddev);
631
632         omap_fbdev_fini(ddev);
633 err_cleanup_modeset:
634         drm_mode_config_cleanup(ddev);
635         omap_drm_irq_uninstall(ddev);
636 err_gem_deinit:
637         omap_gem_deinit(ddev);
638         destroy_workqueue(priv->wq);
639         omap_disconnect_dssdevs(ddev);
640 err_crtc_uninit:
641         omap_crtc_pre_uninit();
642         drm_dev_unref(ddev);
643         return ret;
644 }
645
646 static void omapdrm_cleanup(struct omap_drm_private *priv)
647 {
648         struct drm_device *ddev = priv->ddev;
649
650         DBG("");
651
652         drm_dev_unregister(ddev);
653
654         omap_modeset_disable_external_hpd(ddev);
655         drm_kms_helper_poll_fini(ddev);
656
657         omap_fbdev_fini(ddev);
658
659         drm_atomic_helper_shutdown(ddev);
660
661         drm_mode_config_cleanup(ddev);
662
663         omap_drm_irq_uninstall(ddev);
664         omap_gem_deinit(ddev);
665
666         destroy_workqueue(priv->wq);
667
668         omap_disconnect_dssdevs(ddev);
669         omap_crtc_pre_uninit();
670
671         drm_dev_unref(ddev);
672 }
673
674 static int pdev_probe(struct platform_device *pdev)
675 {
676         struct omap_drm_private *priv;
677         int ret;
678
679         if (omapdss_is_initialized() == false)
680                 return -EPROBE_DEFER;
681
682         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
683         if (ret) {
684                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
685                 return ret;
686         }
687
688         /* Allocate and initialize the driver private structure. */
689         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
690         if (!priv)
691                 return -ENOMEM;
692
693         platform_set_drvdata(pdev, priv);
694
695         ret = omapdrm_init(priv, &pdev->dev);
696         if (ret < 0)
697                 kfree(priv);
698
699         return ret;
700 }
701
702 static int pdev_remove(struct platform_device *pdev)
703 {
704         struct omap_drm_private *priv = platform_get_drvdata(pdev);
705
706         omapdrm_cleanup(priv);
707         kfree(priv);
708
709         return 0;
710 }
711
712 #ifdef CONFIG_PM_SLEEP
713 static int omap_drm_suspend_all_displays(struct drm_device *ddev)
714 {
715         struct omap_drm_private *priv = ddev->dev_private;
716         int i;
717
718         for (i = 0; i < priv->num_dssdevs; i++) {
719                 struct omap_dss_device *dssdev = priv->dssdevs[i];
720
721                 if (!dssdev->driver)
722                         continue;
723
724                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
725                         dssdev->driver->disable(dssdev);
726                         dssdev->activate_after_resume = true;
727                 } else {
728                         dssdev->activate_after_resume = false;
729                 }
730         }
731
732         return 0;
733 }
734
735 static int omap_drm_resume_all_displays(struct drm_device *ddev)
736 {
737         struct omap_drm_private *priv = ddev->dev_private;
738         int i;
739
740         for (i = 0; i < priv->num_dssdevs; i++) {
741                 struct omap_dss_device *dssdev = priv->dssdevs[i];
742
743                 if (!dssdev->driver)
744                         continue;
745
746                 if (dssdev->activate_after_resume) {
747                         dssdev->driver->enable(dssdev);
748                         dssdev->activate_after_resume = false;
749                 }
750         }
751
752         return 0;
753 }
754
755 static int omap_drm_suspend(struct device *dev)
756 {
757         struct omap_drm_private *priv = dev_get_drvdata(dev);
758         struct drm_device *drm_dev = priv->ddev;
759
760         drm_kms_helper_poll_disable(drm_dev);
761
762         drm_modeset_lock_all(drm_dev);
763         omap_drm_suspend_all_displays(drm_dev);
764         drm_modeset_unlock_all(drm_dev);
765
766         return 0;
767 }
768
769 static int omap_drm_resume(struct device *dev)
770 {
771         struct omap_drm_private *priv = dev_get_drvdata(dev);
772         struct drm_device *drm_dev = priv->ddev;
773
774         drm_modeset_lock_all(drm_dev);
775         omap_drm_resume_all_displays(drm_dev);
776         drm_modeset_unlock_all(drm_dev);
777
778         drm_kms_helper_poll_enable(drm_dev);
779
780         return omap_gem_resume(drm_dev);
781 }
782 #endif
783
784 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
785
786 static struct platform_driver pdev = {
787         .driver = {
788                 .name = "omapdrm",
789                 .pm = &omapdrm_pm_ops,
790         },
791         .probe = pdev_probe,
792         .remove = pdev_remove,
793 };
794
795 static struct platform_driver * const drivers[] = {
796         &omap_dmm_driver,
797         &pdev,
798 };
799
800 static int __init omap_drm_init(void)
801 {
802         DBG("init");
803
804         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
805 }
806
807 static void __exit omap_drm_fini(void)
808 {
809         DBG("fini");
810
811         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
812 }
813
814 /* need late_initcall() so we load after dss_driver's are loaded */
815 late_initcall(omap_drm_init);
816 module_exit(omap_drm_fini);
817
818 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
819 MODULE_DESCRIPTION("OMAP DRM Display Driver");
820 MODULE_ALIAS("platform:" DRIVER_NAME);
821 MODULE_LICENSE("GPL v2");