drm/omap: Create all planes before CRTCs
[linux-2.6-block.git] / drivers / gpu / drm / omapdrm / omap_drv.c
1 /*
2  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
3  * Author: Rob Clark <rob@ti.com>
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of the GNU General Public License version 2 as published by
7  * the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * You should have received a copy of the GNU General Public License along with
15  * this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17
18 #include <linux/of.h>
19 #include <linux/sort.h>
20 #include <linux/sys_soc.h>
21
22 #include <drm/drm_atomic.h>
23 #include <drm/drm_atomic_helper.h>
24 #include <drm/drm_crtc_helper.h>
25 #include <drm/drm_fb_helper.h>
26
27 #include "omap_dmm_tiler.h"
28 #include "omap_drv.h"
29
30 #define DRIVER_NAME             MODULE_NAME
31 #define DRIVER_DESC             "OMAP DRM"
32 #define DRIVER_DATE             "20110917"
33 #define DRIVER_MAJOR            1
34 #define DRIVER_MINOR            0
35 #define DRIVER_PATCHLEVEL       0
36
37 /*
38  * mode config funcs
39  */
40
41 /* Notes about mapping DSS and DRM entities:
42  *    CRTC:        overlay
43  *    encoder:     manager.. with some extension to allow one primary CRTC
44  *                 and zero or more video CRTC's to be mapped to one encoder?
45  *    connector:   dssdev.. manager can be attached/detached from different
46  *                 devices
47  */
48
49 static void omap_atomic_wait_for_completion(struct drm_device *dev,
50                                             struct drm_atomic_state *old_state)
51 {
52         struct drm_crtc_state *new_crtc_state;
53         struct drm_crtc *crtc;
54         unsigned int i;
55         int ret;
56
57         for_each_new_crtc_in_state(old_state, crtc, new_crtc_state, i) {
58                 if (!new_crtc_state->active)
59                         continue;
60
61                 ret = omap_crtc_wait_pending(crtc);
62
63                 if (!ret)
64                         dev_warn(dev->dev,
65                                  "atomic complete timeout (pipe %u)!\n", i);
66         }
67 }
68
69 static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
70 {
71         struct drm_device *dev = old_state->dev;
72         struct omap_drm_private *priv = dev->dev_private;
73
74         priv->dispc_ops->runtime_get(priv->dispc);
75
76         /* Apply the atomic update. */
77         drm_atomic_helper_commit_modeset_disables(dev, old_state);
78
79         if (priv->omaprev != 0x3430) {
80                 /* With the current dss dispc implementation we have to enable
81                  * the new modeset before we can commit planes. The dispc ovl
82                  * configuration relies on the video mode configuration been
83                  * written into the HW when the ovl configuration is
84                  * calculated.
85                  *
86                  * This approach is not ideal because after a mode change the
87                  * plane update is executed only after the first vblank
88                  * interrupt. The dispc implementation should be fixed so that
89                  * it is able use uncommitted drm state information.
90                  */
91                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
92                 omap_atomic_wait_for_completion(dev, old_state);
93
94                 drm_atomic_helper_commit_planes(dev, old_state, 0);
95
96                 drm_atomic_helper_commit_hw_done(old_state);
97         } else {
98                 /*
99                  * OMAP3 DSS seems to have issues with the work-around above,
100                  * resulting in endless sync losts if a crtc is enabled without
101                  * a plane. For now, skip the WA for OMAP3.
102                  */
103                 drm_atomic_helper_commit_planes(dev, old_state, 0);
104
105                 drm_atomic_helper_commit_modeset_enables(dev, old_state);
106
107                 drm_atomic_helper_commit_hw_done(old_state);
108         }
109
110         /*
111          * Wait for completion of the page flips to ensure that old buffers
112          * can't be touched by the hardware anymore before cleaning up planes.
113          */
114         omap_atomic_wait_for_completion(dev, old_state);
115
116         drm_atomic_helper_cleanup_planes(dev, old_state);
117
118         priv->dispc_ops->runtime_put(priv->dispc);
119 }
120
121 static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
122         .atomic_commit_tail = omap_atomic_commit_tail,
123 };
124
125 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
126         .fb_create = omap_framebuffer_create,
127         .output_poll_changed = drm_fb_helper_output_poll_changed,
128         .atomic_check = drm_atomic_helper_check,
129         .atomic_commit = drm_atomic_helper_commit,
130 };
131
132 static int get_connector_type(struct omap_dss_device *dssdev)
133 {
134         switch (dssdev->type) {
135         case OMAP_DISPLAY_TYPE_HDMI:
136                 return DRM_MODE_CONNECTOR_HDMIA;
137         case OMAP_DISPLAY_TYPE_DVI:
138                 return DRM_MODE_CONNECTOR_DVID;
139         case OMAP_DISPLAY_TYPE_DSI:
140                 return DRM_MODE_CONNECTOR_DSI;
141         case OMAP_DISPLAY_TYPE_DPI:
142         case OMAP_DISPLAY_TYPE_DBI:
143                 return DRM_MODE_CONNECTOR_DPI;
144         case OMAP_DISPLAY_TYPE_VENC:
145                 /* TODO: This could also be composite */
146                 return DRM_MODE_CONNECTOR_SVIDEO;
147         case OMAP_DISPLAY_TYPE_SDI:
148                 return DRM_MODE_CONNECTOR_LVDS;
149         default:
150                 return DRM_MODE_CONNECTOR_Unknown;
151         }
152 }
153
154 static void omap_disconnect_dssdevs(struct drm_device *ddev)
155 {
156         struct omap_drm_private *priv = ddev->dev_private;
157         unsigned int i;
158
159         for (i = 0; i < priv->num_dssdevs; i++) {
160                 struct omap_dss_device *dssdev = priv->dssdevs[i];
161
162                 omapdss_device_disconnect(dssdev, NULL);
163                 priv->dssdevs[i] = NULL;
164                 omapdss_device_put(dssdev);
165         }
166
167         priv->num_dssdevs = 0;
168 }
169
170 static int omap_compare_dssdevs(const void *a, const void *b)
171 {
172         const struct omap_dss_device *dssdev1 = *(struct omap_dss_device **)a;
173         const struct omap_dss_device *dssdev2 = *(struct omap_dss_device **)b;
174
175         if (dssdev1->alias_id > dssdev2->alias_id)
176                 return 1;
177         else if (dssdev1->alias_id < dssdev2->alias_id)
178                 return -1;
179         return 0;
180 }
181
182 static int omap_connect_dssdevs(struct drm_device *ddev)
183 {
184         struct omap_drm_private *priv = ddev->dev_private;
185         struct omap_dss_device *dssdev = NULL;
186         int r;
187
188         if (!omapdss_stack_is_ready())
189                 return -EPROBE_DEFER;
190
191         for_each_dss_display(dssdev) {
192                 r = omapdss_device_connect(priv->dss, dssdev, NULL);
193                 if (r == -EPROBE_DEFER) {
194                         omapdss_device_put(dssdev);
195                         goto cleanup;
196                 } else if (r) {
197                         dev_warn(dssdev->dev, "could not connect display: %s\n",
198                                 dssdev->name);
199                 } else {
200                         omapdss_device_get(dssdev);
201                         priv->dssdevs[priv->num_dssdevs++] = dssdev;
202                         if (priv->num_dssdevs == ARRAY_SIZE(priv->dssdevs)) {
203                                 /* To balance the 'for_each_dss_display' loop */
204                                 omapdss_device_put(dssdev);
205                                 break;
206                         }
207                 }
208         }
209
210         /* Sort the list by DT aliases */
211         sort(priv->dssdevs, priv->num_dssdevs, sizeof(priv->dssdevs[0]),
212              omap_compare_dssdevs, NULL);
213
214         return 0;
215
216 cleanup:
217         /*
218          * if we are deferring probe, we disconnect the devices we previously
219          * connected
220          */
221         omap_disconnect_dssdevs(ddev);
222
223         return r;
224 }
225
226 static int omap_modeset_init_properties(struct drm_device *dev)
227 {
228         struct omap_drm_private *priv = dev->dev_private;
229         unsigned int num_planes = priv->dispc_ops->get_num_ovls(priv->dispc);
230
231         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
232                                                       num_planes - 1);
233         if (!priv->zorder_prop)
234                 return -ENOMEM;
235
236         return 0;
237 }
238
239 static int omap_modeset_init(struct drm_device *dev)
240 {
241         struct omap_drm_private *priv = dev->dev_private;
242         int num_ovls = priv->dispc_ops->get_num_ovls(priv->dispc);
243         int num_mgrs = priv->dispc_ops->get_num_mgrs(priv->dispc);
244         int num_crtcs;
245         unsigned int i;
246         int ret;
247         u32 plane_crtc_mask;
248
249         drm_mode_config_init(dev);
250
251         ret = omap_modeset_init_properties(dev);
252         if (ret < 0)
253                 return ret;
254
255         /*
256          * This function creates exactly one connector, encoder, crtc,
257          * and primary plane per each connected dss-device. Each
258          * connector->encoder->crtc chain is expected to be separate
259          * and each crtc is connect to a single dss-channel. If the
260          * configuration does not match the expectations or exceeds
261          * the available resources, the configuration is rejected.
262          */
263         num_crtcs = priv->num_dssdevs;
264         if (num_crtcs > num_mgrs || num_crtcs > num_ovls ||
265             num_crtcs > ARRAY_SIZE(priv->crtcs) ||
266             num_crtcs > ARRAY_SIZE(priv->planes) ||
267             num_crtcs > ARRAY_SIZE(priv->encoders) ||
268             num_crtcs > ARRAY_SIZE(priv->connectors)) {
269                 dev_err(dev->dev, "%s(): Too many connected displays\n",
270                         __func__);
271                 return -EINVAL;
272         }
273
274         /* Create all planes first. They can all be put to any CRTC. */
275         plane_crtc_mask = (1 << num_crtcs) - 1;
276
277         for (i = 0; i < num_ovls; i++) {
278                 enum drm_plane_type type = i < priv->num_dssdevs
279                                          ? DRM_PLANE_TYPE_PRIMARY
280                                          : DRM_PLANE_TYPE_OVERLAY;
281                 struct drm_plane *plane;
282
283                 if (WARN_ON(priv->num_planes >= ARRAY_SIZE(priv->planes)))
284                         return -EINVAL;
285
286                 plane = omap_plane_init(dev, i, type, plane_crtc_mask);
287                 if (IS_ERR(plane))
288                         return PTR_ERR(plane);
289
290                 priv->planes[priv->num_planes++] = plane;
291         }
292
293         /* Create the CRTCs, encoders and connectors. */
294         for (i = 0; i < priv->num_dssdevs; i++) {
295                 struct omap_dss_device *dssdev = priv->dssdevs[i];
296                 struct drm_connector *connector;
297                 struct drm_encoder *encoder;
298                 struct drm_crtc *crtc;
299
300                 encoder = omap_encoder_init(dev, dssdev);
301                 if (!encoder)
302                         return -ENOMEM;
303
304                 connector = omap_connector_init(dev,
305                                 get_connector_type(dssdev), dssdev, encoder);
306                 if (!connector)
307                         return -ENOMEM;
308
309                 crtc = omap_crtc_init(dev, priv->planes[i], dssdev);
310                 if (IS_ERR(crtc))
311                         return PTR_ERR(crtc);
312
313                 drm_connector_attach_encoder(connector, encoder);
314                 encoder->possible_crtcs = 1 << i;
315
316                 priv->crtcs[priv->num_crtcs++] = crtc;
317                 priv->encoders[priv->num_encoders++] = encoder;
318                 priv->connectors[priv->num_connectors++] = connector;
319         }
320
321         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
322                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
323                 priv->num_connectors);
324
325         dev->mode_config.min_width = 8;
326         dev->mode_config.min_height = 2;
327
328         /*
329          * Note: these values are used for multiple independent things:
330          * connector mode filtering, buffer sizes, crtc sizes...
331          * Use big enough values here to cover all use cases, and do more
332          * specific checking in the respective code paths.
333          */
334         dev->mode_config.max_width = 8192;
335         dev->mode_config.max_height = 8192;
336
337         /* We want the zpos to be normalized */
338         dev->mode_config.normalize_zpos = true;
339
340         dev->mode_config.funcs = &omap_mode_config_funcs;
341         dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
342
343         drm_mode_config_reset(dev);
344
345         omap_drm_irq_install(dev);
346
347         return 0;
348 }
349
350 /*
351  * Enable the HPD in external components if supported
352  */
353 static void omap_modeset_enable_external_hpd(struct drm_device *ddev)
354 {
355         struct omap_drm_private *priv = ddev->dev_private;
356         int i;
357
358         for (i = 0; i < priv->num_dssdevs; i++) {
359                 struct omap_dss_device *dssdev = priv->dssdevs[i];
360
361                 if (dssdev->driver->enable_hpd)
362                         dssdev->driver->enable_hpd(dssdev);
363         }
364 }
365
366 /*
367  * Disable the HPD in external components if supported
368  */
369 static void omap_modeset_disable_external_hpd(struct drm_device *ddev)
370 {
371         struct omap_drm_private *priv = ddev->dev_private;
372         int i;
373
374         for (i = 0; i < priv->num_dssdevs; i++) {
375                 struct omap_dss_device *dssdev = priv->dssdevs[i];
376
377                 if (dssdev->driver->disable_hpd)
378                         dssdev->driver->disable_hpd(dssdev);
379         }
380 }
381
382 /*
383  * drm ioctl funcs
384  */
385
386
387 static int ioctl_get_param(struct drm_device *dev, void *data,
388                 struct drm_file *file_priv)
389 {
390         struct omap_drm_private *priv = dev->dev_private;
391         struct drm_omap_param *args = data;
392
393         DBG("%p: param=%llu", dev, args->param);
394
395         switch (args->param) {
396         case OMAP_PARAM_CHIPSET_ID:
397                 args->value = priv->omaprev;
398                 break;
399         default:
400                 DBG("unknown parameter %lld", args->param);
401                 return -EINVAL;
402         }
403
404         return 0;
405 }
406
407 static int ioctl_set_param(struct drm_device *dev, void *data,
408                 struct drm_file *file_priv)
409 {
410         struct drm_omap_param *args = data;
411
412         switch (args->param) {
413         default:
414                 DBG("unknown parameter %lld", args->param);
415                 return -EINVAL;
416         }
417
418         return 0;
419 }
420
421 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
422
423 static int ioctl_gem_new(struct drm_device *dev, void *data,
424                 struct drm_file *file_priv)
425 {
426         struct drm_omap_gem_new *args = data;
427         u32 flags = args->flags & OMAP_BO_USER_MASK;
428
429         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
430              args->size.bytes, flags);
431
432         return omap_gem_new_handle(dev, file_priv, args->size, flags,
433                                    &args->handle);
434 }
435
436 static int ioctl_gem_info(struct drm_device *dev, void *data,
437                 struct drm_file *file_priv)
438 {
439         struct drm_omap_gem_info *args = data;
440         struct drm_gem_object *obj;
441         int ret = 0;
442
443         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
444
445         obj = drm_gem_object_lookup(file_priv, args->handle);
446         if (!obj)
447                 return -ENOENT;
448
449         args->size = omap_gem_mmap_size(obj);
450         args->offset = omap_gem_mmap_offset(obj);
451
452         drm_gem_object_unreference_unlocked(obj);
453
454         return ret;
455 }
456
457 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
458         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param,
459                           DRM_AUTH | DRM_RENDER_ALLOW),
460         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param,
461                           DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
462         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
463                           DRM_AUTH | DRM_RENDER_ALLOW),
464         /* Deprecated, to be removed. */
465         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
466                           DRM_AUTH | DRM_RENDER_ALLOW),
467         /* Deprecated, to be removed. */
468         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
469                           DRM_AUTH | DRM_RENDER_ALLOW),
470         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
471                           DRM_AUTH | DRM_RENDER_ALLOW),
472 };
473
474 /*
475  * drm driver funcs
476  */
477
478 static int dev_open(struct drm_device *dev, struct drm_file *file)
479 {
480         file->driver_priv = NULL;
481
482         DBG("open: dev=%p, file=%p", dev, file);
483
484         return 0;
485 }
486
487 static const struct vm_operations_struct omap_gem_vm_ops = {
488         .fault = omap_gem_fault,
489         .open = drm_gem_vm_open,
490         .close = drm_gem_vm_close,
491 };
492
493 static const struct file_operations omapdriver_fops = {
494         .owner = THIS_MODULE,
495         .open = drm_open,
496         .unlocked_ioctl = drm_ioctl,
497         .compat_ioctl = drm_compat_ioctl,
498         .release = drm_release,
499         .mmap = omap_gem_mmap,
500         .poll = drm_poll,
501         .read = drm_read,
502         .llseek = noop_llseek,
503 };
504
505 static struct drm_driver omap_drm_driver = {
506         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
507                 DRIVER_ATOMIC | DRIVER_RENDER,
508         .open = dev_open,
509         .lastclose = drm_fb_helper_lastclose,
510 #ifdef CONFIG_DEBUG_FS
511         .debugfs_init = omap_debugfs_init,
512 #endif
513         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
514         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
515         .gem_prime_export = omap_gem_prime_export,
516         .gem_prime_import = omap_gem_prime_import,
517         .gem_free_object_unlocked = omap_gem_free_object,
518         .gem_vm_ops = &omap_gem_vm_ops,
519         .dumb_create = omap_gem_dumb_create,
520         .dumb_map_offset = omap_gem_dumb_map_offset,
521         .ioctls = ioctls,
522         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
523         .fops = &omapdriver_fops,
524         .name = DRIVER_NAME,
525         .desc = DRIVER_DESC,
526         .date = DRIVER_DATE,
527         .major = DRIVER_MAJOR,
528         .minor = DRIVER_MINOR,
529         .patchlevel = DRIVER_PATCHLEVEL,
530 };
531
532 static const struct soc_device_attribute omapdrm_soc_devices[] = {
533         { .family = "OMAP3", .data = (void *)0x3430 },
534         { .family = "OMAP4", .data = (void *)0x4430 },
535         { .family = "OMAP5", .data = (void *)0x5430 },
536         { .family = "DRA7",  .data = (void *)0x0752 },
537         { /* sentinel */ }
538 };
539
540 static int omapdrm_init(struct omap_drm_private *priv, struct device *dev)
541 {
542         const struct soc_device_attribute *soc;
543         struct drm_device *ddev;
544         unsigned int i;
545         int ret;
546
547         DBG("%s", dev_name(dev));
548
549         /* Allocate and initialize the DRM device. */
550         ddev = drm_dev_alloc(&omap_drm_driver, dev);
551         if (IS_ERR(ddev))
552                 return PTR_ERR(ddev);
553
554         priv->ddev = ddev;
555         ddev->dev_private = priv;
556
557         priv->dev = dev;
558         priv->dss = omapdss_get_dss();
559         priv->dispc = dispc_get_dispc(priv->dss);
560         priv->dispc_ops = dispc_get_ops(priv->dss);
561
562         omap_crtc_pre_init(priv);
563
564         ret = omap_connect_dssdevs(ddev);
565         if (ret)
566                 goto err_crtc_uninit;
567
568         soc = soc_device_match(omapdrm_soc_devices);
569         priv->omaprev = soc ? (unsigned int)soc->data : 0;
570         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
571
572         mutex_init(&priv->list_lock);
573         INIT_LIST_HEAD(&priv->obj_list);
574
575         /* Get memory bandwidth limits */
576         if (priv->dispc_ops->get_memory_bandwidth_limit)
577                 priv->max_bandwidth =
578                         priv->dispc_ops->get_memory_bandwidth_limit(priv->dispc);
579
580         omap_gem_init(ddev);
581
582         ret = omap_modeset_init(ddev);
583         if (ret) {
584                 dev_err(priv->dev, "omap_modeset_init failed: ret=%d\n", ret);
585                 goto err_gem_deinit;
586         }
587
588         /* Initialize vblank handling, start with all CRTCs disabled. */
589         ret = drm_vblank_init(ddev, priv->num_crtcs);
590         if (ret) {
591                 dev_err(priv->dev, "could not init vblank\n");
592                 goto err_cleanup_modeset;
593         }
594
595         for (i = 0; i < priv->num_crtcs; i++)
596                 drm_crtc_vblank_off(priv->crtcs[i]);
597
598         omap_fbdev_init(ddev);
599
600         drm_kms_helper_poll_init(ddev);
601         omap_modeset_enable_external_hpd(ddev);
602
603         /*
604          * Register the DRM device with the core and the connectors with
605          * sysfs.
606          */
607         ret = drm_dev_register(ddev, 0);
608         if (ret)
609                 goto err_cleanup_helpers;
610
611         return 0;
612
613 err_cleanup_helpers:
614         omap_modeset_disable_external_hpd(ddev);
615         drm_kms_helper_poll_fini(ddev);
616
617         omap_fbdev_fini(ddev);
618 err_cleanup_modeset:
619         drm_mode_config_cleanup(ddev);
620         omap_drm_irq_uninstall(ddev);
621 err_gem_deinit:
622         omap_gem_deinit(ddev);
623         destroy_workqueue(priv->wq);
624         omap_disconnect_dssdevs(ddev);
625 err_crtc_uninit:
626         omap_crtc_pre_uninit(priv);
627         drm_dev_unref(ddev);
628         return ret;
629 }
630
631 static void omapdrm_cleanup(struct omap_drm_private *priv)
632 {
633         struct drm_device *ddev = priv->ddev;
634
635         DBG("");
636
637         drm_dev_unregister(ddev);
638
639         omap_modeset_disable_external_hpd(ddev);
640         drm_kms_helper_poll_fini(ddev);
641
642         omap_fbdev_fini(ddev);
643
644         drm_atomic_helper_shutdown(ddev);
645
646         drm_mode_config_cleanup(ddev);
647
648         omap_drm_irq_uninstall(ddev);
649         omap_gem_deinit(ddev);
650
651         destroy_workqueue(priv->wq);
652
653         omap_disconnect_dssdevs(ddev);
654         omap_crtc_pre_uninit(priv);
655
656         drm_dev_unref(ddev);
657 }
658
659 static int pdev_probe(struct platform_device *pdev)
660 {
661         struct omap_drm_private *priv;
662         int ret;
663
664         if (omapdss_is_initialized() == false)
665                 return -EPROBE_DEFER;
666
667         ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
668         if (ret) {
669                 dev_err(&pdev->dev, "Failed to set the DMA mask\n");
670                 return ret;
671         }
672
673         /* Allocate and initialize the driver private structure. */
674         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
675         if (!priv)
676                 return -ENOMEM;
677
678         platform_set_drvdata(pdev, priv);
679
680         ret = omapdrm_init(priv, &pdev->dev);
681         if (ret < 0)
682                 kfree(priv);
683
684         return ret;
685 }
686
687 static int pdev_remove(struct platform_device *pdev)
688 {
689         struct omap_drm_private *priv = platform_get_drvdata(pdev);
690
691         omapdrm_cleanup(priv);
692         kfree(priv);
693
694         return 0;
695 }
696
697 #ifdef CONFIG_PM_SLEEP
698 static int omap_drm_suspend_all_displays(struct drm_device *ddev)
699 {
700         struct omap_drm_private *priv = ddev->dev_private;
701         int i;
702
703         for (i = 0; i < priv->num_dssdevs; i++) {
704                 struct omap_dss_device *dssdev = priv->dssdevs[i];
705
706                 if (!dssdev->driver)
707                         continue;
708
709                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
710                         dssdev->driver->disable(dssdev);
711                         dssdev->activate_after_resume = true;
712                 } else {
713                         dssdev->activate_after_resume = false;
714                 }
715         }
716
717         return 0;
718 }
719
720 static int omap_drm_resume_all_displays(struct drm_device *ddev)
721 {
722         struct omap_drm_private *priv = ddev->dev_private;
723         int i;
724
725         for (i = 0; i < priv->num_dssdevs; i++) {
726                 struct omap_dss_device *dssdev = priv->dssdevs[i];
727
728                 if (!dssdev->driver)
729                         continue;
730
731                 if (dssdev->activate_after_resume) {
732                         dssdev->driver->enable(dssdev);
733                         dssdev->activate_after_resume = false;
734                 }
735         }
736
737         return 0;
738 }
739
740 static int omap_drm_suspend(struct device *dev)
741 {
742         struct omap_drm_private *priv = dev_get_drvdata(dev);
743         struct drm_device *drm_dev = priv->ddev;
744
745         drm_kms_helper_poll_disable(drm_dev);
746
747         drm_modeset_lock_all(drm_dev);
748         omap_drm_suspend_all_displays(drm_dev);
749         drm_modeset_unlock_all(drm_dev);
750
751         return 0;
752 }
753
754 static int omap_drm_resume(struct device *dev)
755 {
756         struct omap_drm_private *priv = dev_get_drvdata(dev);
757         struct drm_device *drm_dev = priv->ddev;
758
759         drm_modeset_lock_all(drm_dev);
760         omap_drm_resume_all_displays(drm_dev);
761         drm_modeset_unlock_all(drm_dev);
762
763         drm_kms_helper_poll_enable(drm_dev);
764
765         return omap_gem_resume(drm_dev);
766 }
767 #endif
768
769 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
770
771 static struct platform_driver pdev = {
772         .driver = {
773                 .name = "omapdrm",
774                 .pm = &omapdrm_pm_ops,
775         },
776         .probe = pdev_probe,
777         .remove = pdev_remove,
778 };
779
780 static struct platform_driver * const drivers[] = {
781         &omap_dmm_driver,
782         &pdev,
783 };
784
785 static int __init omap_drm_init(void)
786 {
787         DBG("init");
788
789         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
790 }
791
792 static void __exit omap_drm_fini(void)
793 {
794         DBG("fini");
795
796         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
797 }
798
799 /* need late_initcall() so we load after dss_driver's are loaded */
800 late_initcall(omap_drm_init);
801 module_exit(omap_drm_fini);
802
803 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
804 MODULE_DESCRIPTION("OMAP DRM Display Driver");
805 MODULE_ALIAS("platform:" DRIVER_NAME);
806 MODULE_LICENSE("GPL v2");