drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/wait.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  38
  39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  40 module_param(num_crtc, int, 0600);
  41
  42 /*
  43  * mode config funcs
  44  */
  45
  46 /* Notes about mapping DSS and DRM entities:
  47  *    CRTC:        overlay
  48  *    encoder:     manager.. with some extension to allow one primary CRTC
  49  *                 and zero or more video CRTC's to be mapped to one encoder?
  50  *    connector:   dssdev.. manager can be attached/detached from different
  51  *                 devices
  52  */
  53
  54 static void omap_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct omap_drm_private *priv = dev->dev_private;
  57         DBG("dev=%p", dev);
  58         if (priv->fbdev)
  59                 drm_fb_helper_hotplug_event(priv->fbdev);
  60 }
  61
  62 struct omap_atomic_state_commit {
  63         struct work_struct work;
  64         struct drm_device *dev;
  65         struct drm_atomic_state *state;
  66         u32 crtcs;
  67 };
  68
  69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  70                                             struct drm_atomic_state *old_state)
  71 {
  72         struct drm_crtc_state *old_crtc_state;
  73         struct drm_crtc *crtc;
  74         unsigned int i;
  75         int ret;
  76
  77         for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
  78                 if (!crtc->state->enable)
  79                         continue;
  80
  81                 ret = omap_crtc_wait_pending(crtc);
  82
  83                 if (!ret)
  84                         dev_warn(dev->dev,
  85                                  "atomic complete timeout (pipe %u)!\n", i);
  86         }
  87 }
  88
  89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
  90 {
  91         struct drm_device *dev = commit->dev;
  92         struct omap_drm_private *priv = dev->dev_private;
  93         struct drm_atomic_state *old_state = commit->state;
  94
  95         /* Apply the atomic update. */
  96         dispc_runtime_get();
  97
  98         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  99         drm_atomic_helper_commit_planes(dev, old_state,
 100                                         DRM_PLANE_COMMIT_ACTIVE_ONLY);
 101         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 102
 103         omap_atomic_wait_for_completion(dev, old_state);
 104
 105         drm_atomic_helper_cleanup_planes(dev, old_state);
 106
 107         dispc_runtime_put();
 108
 109         drm_atomic_state_put(old_state);
 110
 111         /* Complete the commit, wake up any waiter. */
 112         spin_lock(&priv->commit.lock);
 113         priv->commit.pending &= ~commit->crtcs;
 114         spin_unlock(&priv->commit.lock);
 115
 116         wake_up_all(&priv->commit.wait);
 117
 118         kfree(commit);
 119 }
 120
 121 static void omap_atomic_work(struct work_struct *work)
 122 {
 123         struct omap_atomic_state_commit *commit =
 124                 container_of(work, struct omap_atomic_state_commit, work);
 125
 126         omap_atomic_complete(commit);
 127 }
 128
 129 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
 130                                    struct omap_atomic_state_commit *commit)
 131 {
 132         bool pending;
 133
 134         spin_lock(&priv->commit.lock);
 135         pending = priv->commit.pending & commit->crtcs;
 136         spin_unlock(&priv->commit.lock);
 137
 138         return pending;
 139 }
 140
 141 static int omap_atomic_commit(struct drm_device *dev,
 142                               struct drm_atomic_state *state, bool nonblock)
 143 {
 144         struct omap_drm_private *priv = dev->dev_private;
 145         struct omap_atomic_state_commit *commit;
 146         struct drm_crtc *crtc;
 147         struct drm_crtc_state *crtc_state;
 148         int i, ret;
 149
 150         ret = drm_atomic_helper_prepare_planes(dev, state);
 151         if (ret)
 152                 return ret;
 153
 154         /* Allocate the commit object. */
 155         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 156         if (commit == NULL) {
 157                 ret = -ENOMEM;
 158                 goto error;
 159         }
 160
 161         INIT_WORK(&commit->work, omap_atomic_work);
 162         commit->dev = dev;
 163         commit->state = state;
 164
 165         /* Wait until all affected CRTCs have completed previous commits and
 166          * mark them as pending.
 167          */
 168         for_each_crtc_in_state(state, crtc, crtc_state, i)
 169                 commit->crtcs |= drm_crtc_mask(crtc);
 170
 171         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
 172
 173         spin_lock(&priv->commit.lock);
 174         priv->commit.pending |= commit->crtcs;
 175         spin_unlock(&priv->commit.lock);
 176
 177         /* Swap the state, this is the point of no return. */
 178         drm_atomic_helper_swap_state(state, true);
 179
 180         drm_atomic_state_get(state);
 181         if (nonblock)
 182                 schedule_work(&commit->work);
 183         else
 184                 omap_atomic_complete(commit);
 185
 186         return 0;
 187
 188 error:
 189         drm_atomic_helper_cleanup_planes(dev, state);
 190         return ret;
 191 }
 192
 193 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 194         .fb_create = omap_framebuffer_create,
 195         .output_poll_changed = omap_fb_output_poll_changed,
 196         .atomic_check = drm_atomic_helper_check,
 197         .atomic_commit = omap_atomic_commit,
 198 };
 199
 200 static int get_connector_type(struct omap_dss_device *dssdev)
 201 {
 202         switch (dssdev->type) {
 203         case OMAP_DISPLAY_TYPE_HDMI:
 204                 return DRM_MODE_CONNECTOR_HDMIA;
 205         case OMAP_DISPLAY_TYPE_DVI:
 206                 return DRM_MODE_CONNECTOR_DVID;
 207         case OMAP_DISPLAY_TYPE_DSI:
 208                 return DRM_MODE_CONNECTOR_DSI;
 209         default:
 210                 return DRM_MODE_CONNECTOR_Unknown;
 211         }
 212 }
 213
 214 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
 215 {
 216         struct omap_drm_private *priv = dev->dev_private;
 217         int i;
 218
 219         for (i = 0; i < priv->num_crtcs; i++) {
 220                 struct drm_crtc *crtc = priv->crtcs[i];
 221
 222                 if (omap_crtc_channel(crtc) == channel)
 223                         return true;
 224         }
 225
 226         return false;
 227 }
 228 static void omap_disconnect_dssdevs(void)
 229 {
 230         struct omap_dss_device *dssdev = NULL;
 231
 232         for_each_dss_dev(dssdev)
 233                 dssdev->driver->disconnect(dssdev);
 234 }
 235
 236 static int omap_connect_dssdevs(void)
 237 {
 238         int r;
 239         struct omap_dss_device *dssdev = NULL;
 240         bool no_displays = true;
 241
 242         for_each_dss_dev(dssdev) {
 243                 r = dssdev->driver->connect(dssdev);
 244                 if (r == -EPROBE_DEFER) {
 245                         omap_dss_put_device(dssdev);
 246                         goto cleanup;
 247                 } else if (r) {
 248                         dev_warn(dssdev->dev, "could not connect display: %s\n",
 249                                 dssdev->name);
 250                 } else {
 251                         no_displays = false;
 252                 }
 253         }
 254
 255         if (no_displays)
 256                 return -EPROBE_DEFER;
 257
 258         return 0;
 259
 260 cleanup:
 261         /*
 262          * if we are deferring probe, we disconnect the devices we previously
 263          * connected
 264          */
 265         omap_disconnect_dssdevs();
 266
 267         return r;
 268 }
 269
 270 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
 271                                     enum omap_channel channel,
 272                                     u32 possible_crtcs)
 273 {
 274         struct omap_drm_private *priv = dev->dev_private;
 275         struct drm_plane *plane;
 276         struct drm_crtc *crtc;
 277
 278         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY,
 279                 possible_crtcs);
 280         if (IS_ERR(plane))
 281                 return PTR_ERR(plane);
 282
 283         crtc = omap_crtc_init(dev, plane, channel, id);
 284
 285         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 286         priv->crtcs[id] = crtc;
 287         priv->num_crtcs++;
 288
 289         priv->planes[id] = plane;
 290         priv->num_planes++;
 291
 292         return 0;
 293 }
 294
 295 static int omap_modeset_init_properties(struct drm_device *dev)
 296 {
 297         struct omap_drm_private *priv = dev->dev_private;
 298
 299         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
 300         if (!priv->zorder_prop)
 301                 return -ENOMEM;
 302
 303         return 0;
 304 }
 305
 306 static int omap_modeset_init(struct drm_device *dev)
 307 {
 308         struct omap_drm_private *priv = dev->dev_private;
 309         struct omap_dss_device *dssdev = NULL;
 310         int num_ovls = dss_feat_get_num_ovls();
 311         int num_mgrs = dss_feat_get_num_mgrs();
 312         int num_crtcs;
 313         int i, id = 0;
 314         int ret;
 315         u32 possible_crtcs;
 316
 317         drm_mode_config_init(dev);
 318
 319         ret = omap_modeset_init_properties(dev);
 320         if (ret < 0)
 321                 return ret;
 322
 323         /*
 324          * We usually don't want to create a CRTC for each manager, at least
 325          * not until we have a way to expose private planes to userspace.
 326          * Otherwise there would not be enough video pipes left for drm planes.
 327          * We use the num_crtc argument to limit the number of crtcs we create.
 328          */
 329         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 330         possible_crtcs = (1 << num_crtcs) - 1;
 331
 332         dssdev = NULL;
 333
 334         for_each_dss_dev(dssdev) {
 335                 struct drm_connector *connector;
 336                 struct drm_encoder *encoder;
 337                 enum omap_channel channel;
 338                 struct omap_dss_device *out;
 339
 340                 if (!omapdss_device_is_connected(dssdev))
 341                         continue;
 342
 343                 encoder = omap_encoder_init(dev, dssdev);
 344
 345                 if (!encoder) {
 346                         dev_err(dev->dev, "could not create encoder: %s\n",
 347                                         dssdev->name);
 348                         return -ENOMEM;
 349                 }
 350
 351                 connector = omap_connector_init(dev,
 352                                 get_connector_type(dssdev), dssdev, encoder);
 353
 354                 if (!connector) {
 355                         dev_err(dev->dev, "could not create connector: %s\n",
 356                                         dssdev->name);
 357                         return -ENOMEM;
 358                 }
 359
 360                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 361                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 362
 363                 priv->encoders[priv->num_encoders++] = encoder;
 364                 priv->connectors[priv->num_connectors++] = connector;
 365
 366                 drm_mode_connector_attach_encoder(connector, encoder);
 367
 368                 /*
 369                  * if we have reached the limit of the crtcs we are allowed to
 370                  * create, let's not try to look for a crtc for this
 371                  * panel/encoder and onwards, we will, of course, populate the
 372                  * the possible_crtcs field for all the encoders with the final
 373                  * set of crtcs we create
 374                  */
 375                 if (id == num_crtcs)
 376                         continue;
 377
 378                 /*
 379                  * get the recommended DISPC channel for this encoder. For now,
 380                  * we only try to get create a crtc out of the recommended, the
 381                  * other possible channels to which the encoder can connect are
 382                  * not considered.
 383                  */
 384
 385                 out = omapdss_find_output_from_display(dssdev);
 386                 channel = out->dispc_channel;
 387                 omap_dss_put_device(out);
 388
 389                 /*
 390                  * if this channel hasn't already been taken by a previously
 391                  * allocated crtc, we create a new crtc for it
 392                  */
 393                 if (!channel_used(dev, channel)) {
 394                         ret = omap_modeset_create_crtc(dev, id, channel,
 395                                 possible_crtcs);
 396                         if (ret < 0) {
 397                                 dev_err(dev->dev,
 398                                         "could not create CRTC (channel %u)\n",
 399                                         channel);
 400                                 return ret;
 401                         }
 402
 403                         id++;
 404                 }
 405         }
 406
 407         /*
 408          * we have allocated crtcs according to the need of the panels/encoders,
 409          * adding more crtcs here if needed
 410          */
 411         for (; id < num_crtcs; id++) {
 412
 413                 /* find a free manager for this crtc */
 414                 for (i = 0; i < num_mgrs; i++) {
 415                         if (!channel_used(dev, i))
 416                                 break;
 417                 }
 418
 419                 if (i == num_mgrs) {
 420                         /* this shouldn't really happen */
 421                         dev_err(dev->dev, "no managers left for crtc\n");
 422                         return -ENOMEM;
 423                 }
 424
 425                 ret = omap_modeset_create_crtc(dev, id, i,
 426                         possible_crtcs);
 427                 if (ret < 0) {
 428                         dev_err(dev->dev,
 429                                 "could not create CRTC (channel %u)\n", i);
 430                         return ret;
 431                 }
 432         }
 433
 434         /*
 435          * Create normal planes for the remaining overlays:
 436          */
 437         for (; id < num_ovls; id++) {
 438                 struct drm_plane *plane;
 439
 440                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY,
 441                         possible_crtcs);
 442                 if (IS_ERR(plane))
 443                         return PTR_ERR(plane);
 444
 445                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 446                 priv->planes[priv->num_planes++] = plane;
 447         }
 448
 449         for (i = 0; i < priv->num_encoders; i++) {
 450                 struct drm_encoder *encoder = priv->encoders[i];
 451                 struct omap_dss_device *dssdev =
 452                                         omap_encoder_get_dssdev(encoder);
 453                 struct omap_dss_device *output;
 454
 455                 output = omapdss_find_output_from_display(dssdev);
 456
 457                 /* figure out which crtc's we can connect the encoder to: */
 458                 encoder->possible_crtcs = 0;
 459                 for (id = 0; id < priv->num_crtcs; id++) {
 460                         struct drm_crtc *crtc = priv->crtcs[id];
 461                         enum omap_channel crtc_channel;
 462
 463                         crtc_channel = omap_crtc_channel(crtc);
 464
 465                         if (output->dispc_channel == crtc_channel) {
 466                                 encoder->possible_crtcs |= (1 << id);
 467                                 break;
 468                         }
 469                 }
 470
 471                 omap_dss_put_device(output);
 472         }
 473
 474         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 475                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 476                 priv->num_connectors);
 477
 478         dev->mode_config.min_width = 32;
 479         dev->mode_config.min_height = 32;
 480
 481         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 482          * to fill in these limits properly on different OMAP generations..
 483          */
 484         dev->mode_config.max_width = 2048;
 485         dev->mode_config.max_height = 2048;
 486
 487         dev->mode_config.funcs = &omap_mode_config_funcs;
 488
 489         drm_mode_config_reset(dev);
 490
 491         omap_drm_irq_install(dev);
 492
 493         return 0;
 494 }
 495
 496 /*
 497  * drm ioctl funcs
 498  */
 499
 500
 501 static int ioctl_get_param(struct drm_device *dev, void *data,
 502                 struct drm_file *file_priv)
 503 {
 504         struct omap_drm_private *priv = dev->dev_private;
 505         struct drm_omap_param *args = data;
 506
 507         DBG("%p: param=%llu", dev, args->param);
 508
 509         switch (args->param) {
 510         case OMAP_PARAM_CHIPSET_ID:
 511                 args->value = priv->omaprev;
 512                 break;
 513         default:
 514                 DBG("unknown parameter %lld", args->param);
 515                 return -EINVAL;
 516         }
 517
 518         return 0;
 519 }
 520
 521 static int ioctl_set_param(struct drm_device *dev, void *data,
 522                 struct drm_file *file_priv)
 523 {
 524         struct drm_omap_param *args = data;
 525
 526         switch (args->param) {
 527         default:
 528                 DBG("unknown parameter %lld", args->param);
 529                 return -EINVAL;
 530         }
 531
 532         return 0;
 533 }
 534
 535 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 536
 537 static int ioctl_gem_new(struct drm_device *dev, void *data,
 538                 struct drm_file *file_priv)
 539 {
 540         struct drm_omap_gem_new *args = data;
 541         u32 flags = args->flags & OMAP_BO_USER_MASK;
 542
 543         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 544              args->size.bytes, flags);
 545
 546         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 547                                    &args->handle);
 548 }
 549
 550 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 551                 struct drm_file *file_priv)
 552 {
 553         struct drm_omap_gem_cpu_prep *args = data;
 554         struct drm_gem_object *obj;
 555         int ret;
 556
 557         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 558
 559         obj = drm_gem_object_lookup(file_priv, args->handle);
 560         if (!obj)
 561                 return -ENOENT;
 562
 563         ret = omap_gem_op_sync(obj, args->op);
 564
 565         if (!ret)
 566                 ret = omap_gem_op_start(obj, args->op);
 567
 568         drm_gem_object_unreference_unlocked(obj);
 569
 570         return ret;
 571 }
 572
 573 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 574                 struct drm_file *file_priv)
 575 {
 576         struct drm_omap_gem_cpu_fini *args = data;
 577         struct drm_gem_object *obj;
 578         int ret;
 579
 580         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 581
 582         obj = drm_gem_object_lookup(file_priv, args->handle);
 583         if (!obj)
 584                 return -ENOENT;
 585
 586         /* XXX flushy, flushy */
 587         ret = 0;
 588
 589         if (!ret)
 590                 ret = omap_gem_op_finish(obj, args->op);
 591
 592         drm_gem_object_unreference_unlocked(obj);
 593
 594         return ret;
 595 }
 596
 597 static int ioctl_gem_info(struct drm_device *dev, void *data,
 598                 struct drm_file *file_priv)
 599 {
 600         struct drm_omap_gem_info *args = data;
 601         struct drm_gem_object *obj;
 602         int ret = 0;
 603
 604         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 605
 606         obj = drm_gem_object_lookup(file_priv, args->handle);
 607         if (!obj)
 608                 return -ENOENT;
 609
 610         args->size = omap_gem_mmap_size(obj);
 611         args->offset = omap_gem_mmap_offset(obj);
 612
 613         drm_gem_object_unreference_unlocked(obj);
 614
 615         return ret;
 616 }
 617
 618 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 619         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
 620         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 621         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
 622         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
 623         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
 624         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
 625 };
 626
 627 /*
 628  * drm driver funcs
 629  */
 630
 631 static int dev_open(struct drm_device *dev, struct drm_file *file)
 632 {
 633         file->driver_priv = NULL;
 634
 635         DBG("open: dev=%p, file=%p", dev, file);
 636
 637         return 0;
 638 }
 639
 640 /**
 641  * lastclose - clean up after all DRM clients have exited
 642  * @dev: DRM device
 643  *
 644  * Take care of cleaning up after all DRM clients have exited.  In the
 645  * mode setting case, we want to restore the kernel's initial mode (just
 646  * in case the last client left us in a bad state).
 647  */
 648 static void dev_lastclose(struct drm_device *dev)
 649 {
 650         int i;
 651
 652         /* we don't support vga_switcheroo.. so just make sure the fbdev
 653          * mode is active
 654          */
 655         struct omap_drm_private *priv = dev->dev_private;
 656         int ret;
 657
 658         DBG("lastclose: dev=%p", dev);
 659
 660         /* need to restore default rotation state.. not sure
 661          * if there is a cleaner way to restore properties to
 662          * default state?  Maybe a flag that properties should
 663          * automatically be restored to default state on
 664          * lastclose?
 665          */
 666         for (i = 0; i < priv->num_crtcs; i++) {
 667                 struct drm_crtc *crtc = priv->crtcs[i];
 668
 669                 if (!crtc->primary->rotation_property)
 670                         continue;
 671
 672                 drm_object_property_set_value(&crtc->base,
 673                                               crtc->primary->rotation_property,
 674                                               DRM_ROTATE_0);
 675         }
 676
 677         for (i = 0; i < priv->num_planes; i++) {
 678                 struct drm_plane *plane = priv->planes[i];
 679
 680                 if (!plane->rotation_property)
 681                         continue;
 682
 683                 drm_object_property_set_value(&plane->base,
 684                                               plane->rotation_property,
 685                                               DRM_ROTATE_0);
 686         }
 687
 688         if (priv->fbdev) {
 689                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 690                 if (ret)
 691                         DBG("failed to restore crtc mode");
 692         }
 693 }
 694
 695 static const struct vm_operations_struct omap_gem_vm_ops = {
 696         .fault = omap_gem_fault,
 697         .open = drm_gem_vm_open,
 698         .close = drm_gem_vm_close,
 699 };
 700
 701 static const struct file_operations omapdriver_fops = {
 702         .owner = THIS_MODULE,
 703         .open = drm_open,
 704         .unlocked_ioctl = drm_ioctl,
 705         .release = drm_release,
 706         .mmap = omap_gem_mmap,
 707         .poll = drm_poll,
 708         .read = drm_read,
 709         .llseek = noop_llseek,
 710 };
 711
 712 static struct drm_driver omap_drm_driver = {
 713         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 714                 DRIVER_ATOMIC,
 715         .open = dev_open,
 716         .lastclose = dev_lastclose,
 717         .get_vblank_counter = drm_vblank_no_hw_counter,
 718         .enable_vblank = omap_irq_enable_vblank,
 719         .disable_vblank = omap_irq_disable_vblank,
 720 #ifdef CONFIG_DEBUG_FS
 721         .debugfs_init = omap_debugfs_init,
 722 #endif
 723         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 724         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 725         .gem_prime_export = omap_gem_prime_export,
 726         .gem_prime_import = omap_gem_prime_import,
 727         .gem_free_object = omap_gem_free_object,
 728         .gem_vm_ops = &omap_gem_vm_ops,
 729         .dumb_create = omap_gem_dumb_create,
 730         .dumb_map_offset = omap_gem_dumb_map_offset,
 731         .dumb_destroy = drm_gem_dumb_destroy,
 732         .ioctls = ioctls,
 733         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 734         .fops = &omapdriver_fops,
 735         .name = DRIVER_NAME,
 736         .desc = DRIVER_DESC,
 737         .date = DRIVER_DATE,
 738         .major = DRIVER_MAJOR,
 739         .minor = DRIVER_MINOR,
 740         .patchlevel = DRIVER_PATCHLEVEL,
 741 };
 742
 743 static int pdev_probe(struct platform_device *pdev)
 744 {
 745         struct omap_drm_platform_data *pdata = pdev->dev.platform_data;
 746         struct omap_drm_private *priv;
 747         struct drm_device *ddev;
 748         unsigned int i;
 749         int ret;
 750
 751         DBG("%s", pdev->name);
 752
 753         if (omapdss_is_initialized() == false)
 754                 return -EPROBE_DEFER;
 755
 756         omap_crtc_pre_init();
 757
 758         ret = omap_connect_dssdevs();
 759         if (ret)
 760                 goto err_crtc_uninit;
 761
 762         /* Allocate and initialize the driver private structure. */
 763         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 764         if (!priv) {
 765                 ret = -ENOMEM;
 766                 goto err_disconnect_dssdevs;
 767         }
 768
 769         priv->omaprev = pdata->omaprev;
 770         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 771
 772         init_waitqueue_head(&priv->commit.wait);
 773         spin_lock_init(&priv->commit.lock);
 774         spin_lock_init(&priv->list_lock);
 775         INIT_LIST_HEAD(&priv->obj_list);
 776
 777         /* Allocate and initialize the DRM device. */
 778         ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
 779         if (IS_ERR(ddev)) {
 780                 ret = PTR_ERR(ddev);
 781                 goto err_free_priv;
 782         }
 783
 784         ddev->dev_private = priv;
 785         platform_set_drvdata(pdev, ddev);
 786
 787         omap_gem_init(ddev);
 788
 789         ret = omap_modeset_init(ddev);
 790         if (ret) {
 791                 dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 792                 goto err_free_drm_dev;
 793         }
 794
 795         /* Initialize vblank handling, start with all CRTCs disabled. */
 796         ret = drm_vblank_init(ddev, priv->num_crtcs);
 797         if (ret) {
 798                 dev_err(&pdev->dev, "could not init vblank\n");
 799                 goto err_cleanup_modeset;
 800         }
 801
 802         for (i = 0; i < priv->num_crtcs; i++)
 803                 drm_crtc_vblank_off(priv->crtcs[i]);
 804
 805         priv->fbdev = omap_fbdev_init(ddev);
 806
 807         drm_kms_helper_poll_init(ddev);
 808
 809         /*
 810          * Register the DRM device with the core and the connectors with
 811          * sysfs.
 812          */
 813         ret = drm_dev_register(ddev, 0);
 814         if (ret)
 815                 goto err_cleanup_helpers;
 816
 817         return 0;
 818
 819 err_cleanup_helpers:
 820         drm_kms_helper_poll_fini(ddev);
 821         if (priv->fbdev)
 822                 omap_fbdev_free(ddev);
 823 err_cleanup_modeset:
 824         drm_mode_config_cleanup(ddev);
 825         omap_drm_irq_uninstall(ddev);
 826 err_free_drm_dev:
 827         omap_gem_deinit(ddev);
 828         drm_dev_unref(ddev);
 829 err_free_priv:
 830         destroy_workqueue(priv->wq);
 831         kfree(priv);
 832 err_disconnect_dssdevs:
 833         omap_disconnect_dssdevs();
 834 err_crtc_uninit:
 835         omap_crtc_pre_uninit();
 836         return ret;
 837 }
 838
 839 static int pdev_remove(struct platform_device *pdev)
 840 {
 841         struct drm_device *ddev = platform_get_drvdata(pdev);
 842         struct omap_drm_private *priv = ddev->dev_private;
 843
 844         DBG("");
 845
 846         drm_dev_unregister(ddev);
 847
 848         drm_kms_helper_poll_fini(ddev);
 849
 850         if (priv->fbdev)
 851                 omap_fbdev_free(ddev);
 852
 853         drm_mode_config_cleanup(ddev);
 854
 855         omap_drm_irq_uninstall(ddev);
 856         omap_gem_deinit(ddev);
 857
 858         drm_dev_unref(ddev);
 859
 860         destroy_workqueue(priv->wq);
 861         kfree(priv);
 862
 863         omap_disconnect_dssdevs();
 864         omap_crtc_pre_uninit();
 865
 866         return 0;
 867 }
 868
 869 #ifdef CONFIG_PM_SLEEP
 870 static int omap_drm_suspend_all_displays(void)
 871 {
 872         struct omap_dss_device *dssdev = NULL;
 873
 874         for_each_dss_dev(dssdev) {
 875                 if (!dssdev->driver)
 876                         continue;
 877
 878                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
 879                         dssdev->driver->disable(dssdev);
 880                         dssdev->activate_after_resume = true;
 881                 } else {
 882                         dssdev->activate_after_resume = false;
 883                 }
 884         }
 885
 886         return 0;
 887 }
 888
 889 static int omap_drm_resume_all_displays(void)
 890 {
 891         struct omap_dss_device *dssdev = NULL;
 892
 893         for_each_dss_dev(dssdev) {
 894                 if (!dssdev->driver)
 895                         continue;
 896
 897                 if (dssdev->activate_after_resume) {
 898                         dssdev->driver->enable(dssdev);
 899                         dssdev->activate_after_resume = false;
 900                 }
 901         }
 902
 903         return 0;
 904 }
 905
 906 static int omap_drm_suspend(struct device *dev)
 907 {
 908         struct drm_device *drm_dev = dev_get_drvdata(dev);
 909
 910         drm_kms_helper_poll_disable(drm_dev);
 911
 912         drm_modeset_lock_all(drm_dev);
 913         omap_drm_suspend_all_displays();
 914         drm_modeset_unlock_all(drm_dev);
 915
 916         return 0;
 917 }
 918
 919 static int omap_drm_resume(struct device *dev)
 920 {
 921         struct drm_device *drm_dev = dev_get_drvdata(dev);
 922
 923         drm_modeset_lock_all(drm_dev);
 924         omap_drm_resume_all_displays();
 925         drm_modeset_unlock_all(drm_dev);
 926
 927         drm_kms_helper_poll_enable(drm_dev);
 928
 929         return omap_gem_resume(dev);
 930 }
 931 #endif
 932
 933 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 934
 935 static struct platform_driver pdev = {
 936         .driver = {
 937                 .name = DRIVER_NAME,
 938                 .pm = &omapdrm_pm_ops,
 939         },
 940         .probe = pdev_probe,
 941         .remove = pdev_remove,
 942 };
 943
 944 static struct platform_driver * const drivers[] = {
 945         &omap_dmm_driver,
 946         &pdev,
 947 };
 948
 949 static int __init omap_drm_init(void)
 950 {
 951         DBG("init");
 952
 953         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 954 }
 955
 956 static void __exit omap_drm_fini(void)
 957 {
 958         DBG("fini");
 959
 960         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 961 }
 962
 963 /* need late_initcall() so we load after dss_driver's are loaded */
 964 late_initcall(omap_drm_init);
 965 module_exit(omap_drm_fini);
 966
 967 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 968 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 969 MODULE_ALIAS("platform:" DRIVER_NAME);
 970 MODULE_LICENSE("GPL v2");