drivers/gpu/drm/omapdrm/omap_drv.c

   1 /*
   2  * drivers/gpu/drm/omapdrm/omap_drv.c
   3  *
   4  * Copyright (C) 2011 Texas Instruments
   5  * Author: Rob Clark <rob@ti.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify it
   8  * under the terms of the GNU General Public License version 2 as published by
   9  * the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful, but WITHOUT
  12  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14  * more details.
  15  *
  16  * You should have received a copy of the GNU General Public License along with
  17  * this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19
  20 #include <linux/wait.h>
  21
  22 #include <drm/drm_atomic.h>
  23 #include <drm/drm_atomic_helper.h>
  24 #include <drm/drm_crtc_helper.h>
  25 #include <drm/drm_fb_helper.h>
  26
  27 #include "omap_dmm_tiler.h"
  28 #include "omap_drv.h"
  29
  30 #define DRIVER_NAME             MODULE_NAME
  31 #define DRIVER_DESC             "OMAP DRM"
  32 #define DRIVER_DATE             "20110917"
  33 #define DRIVER_MAJOR            1
  34 #define DRIVER_MINOR            0
  35 #define DRIVER_PATCHLEVEL       0
  36
  37 static int num_crtc = CONFIG_DRM_OMAP_NUM_CRTCS;
  38
  39 MODULE_PARM_DESC(num_crtc, "Number of overlays to use as CRTCs");
  40 module_param(num_crtc, int, 0600);
  41
  42 /*
  43  * mode config funcs
  44  */
  45
  46 /* Notes about mapping DSS and DRM entities:
  47  *    CRTC:        overlay
  48  *    encoder:     manager.. with some extension to allow one primary CRTC
  49  *                 and zero or more video CRTC's to be mapped to one encoder?
  50  *    connector:   dssdev.. manager can be attached/detached from different
  51  *                 devices
  52  */
  53
  54 static void omap_fb_output_poll_changed(struct drm_device *dev)
  55 {
  56         struct omap_drm_private *priv = dev->dev_private;
  57         DBG("dev=%p", dev);
  58         if (priv->fbdev)
  59                 drm_fb_helper_hotplug_event(priv->fbdev);
  60 }
  61
  62 struct omap_atomic_state_commit {
  63         struct work_struct work;
  64         struct drm_device *dev;
  65         struct drm_atomic_state *state;
  66         u32 crtcs;
  67 };
  68
  69 static void omap_atomic_wait_for_completion(struct drm_device *dev,
  70                                             struct drm_atomic_state *old_state)
  71 {
  72         struct drm_crtc_state *old_crtc_state;
  73         struct drm_crtc *crtc;
  74         unsigned int i;
  75         int ret;
  76
  77         for_each_crtc_in_state(old_state, crtc, old_crtc_state, i) {
  78                 if (!crtc->state->enable)
  79                         continue;
  80
  81                 ret = omap_crtc_wait_pending(crtc);
  82
  83                 if (!ret)
  84                         dev_warn(dev->dev,
  85                                  "atomic complete timeout (pipe %u)!\n", i);
  86         }
  87 }
  88
  89 static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
  90 {
  91         struct drm_device *dev = commit->dev;
  92         struct omap_drm_private *priv = dev->dev_private;
  93         struct drm_atomic_state *old_state = commit->state;
  94
  95         /* Apply the atomic update. */
  96         dispc_runtime_get();
  97
  98         drm_atomic_helper_commit_modeset_disables(dev, old_state);
  99
 100         /* With the current dss dispc implementation we have to enable
 101          * the new modeset before we can commit planes. The dispc ovl
 102          * configuration relies on the video mode configuration been
 103          * written into the HW when the ovl configuration is
 104          * calculated.
 105          *
 106          * This approach is not ideal because after a mode change the
 107          * plane update is executed only after the first vblank
 108          * interrupt. The dispc implementation should be fixed so that
 109          * it is able use uncommitted drm state information.
 110          */
 111         drm_atomic_helper_commit_modeset_enables(dev, old_state);
 112         omap_atomic_wait_for_completion(dev, old_state);
 113
 114         drm_atomic_helper_commit_planes(dev, old_state, 0);
 115
 116         omap_atomic_wait_for_completion(dev, old_state);
 117
 118         drm_atomic_helper_cleanup_planes(dev, old_state);
 119
 120         dispc_runtime_put();
 121
 122         drm_atomic_state_put(old_state);
 123
 124         /* Complete the commit, wake up any waiter. */
 125         spin_lock(&priv->commit.lock);
 126         priv->commit.pending &= ~commit->crtcs;
 127         spin_unlock(&priv->commit.lock);
 128
 129         wake_up_all(&priv->commit.wait);
 130
 131         kfree(commit);
 132 }
 133
 134 static void omap_atomic_work(struct work_struct *work)
 135 {
 136         struct omap_atomic_state_commit *commit =
 137                 container_of(work, struct omap_atomic_state_commit, work);
 138
 139         omap_atomic_complete(commit);
 140 }
 141
 142 static bool omap_atomic_is_pending(struct omap_drm_private *priv,
 143                                    struct omap_atomic_state_commit *commit)
 144 {
 145         bool pending;
 146
 147         spin_lock(&priv->commit.lock);
 148         pending = priv->commit.pending & commit->crtcs;
 149         spin_unlock(&priv->commit.lock);
 150
 151         return pending;
 152 }
 153
 154 static int omap_atomic_commit(struct drm_device *dev,
 155                               struct drm_atomic_state *state, bool nonblock)
 156 {
 157         struct omap_drm_private *priv = dev->dev_private;
 158         struct omap_atomic_state_commit *commit;
 159         struct drm_crtc *crtc;
 160         struct drm_crtc_state *crtc_state;
 161         int i, ret;
 162
 163         ret = drm_atomic_helper_prepare_planes(dev, state);
 164         if (ret)
 165                 return ret;
 166
 167         /* Allocate the commit object. */
 168         commit = kzalloc(sizeof(*commit), GFP_KERNEL);
 169         if (commit == NULL) {
 170                 ret = -ENOMEM;
 171                 goto error;
 172         }
 173
 174         INIT_WORK(&commit->work, omap_atomic_work);
 175         commit->dev = dev;
 176         commit->state = state;
 177
 178         /* Wait until all affected CRTCs have completed previous commits and
 179          * mark them as pending.
 180          */
 181         for_each_crtc_in_state(state, crtc, crtc_state, i)
 182                 commit->crtcs |= drm_crtc_mask(crtc);
 183
 184         wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
 185
 186         spin_lock(&priv->commit.lock);
 187         priv->commit.pending |= commit->crtcs;
 188         spin_unlock(&priv->commit.lock);
 189
 190         /* Swap the state, this is the point of no return. */
 191         drm_atomic_helper_swap_state(state, true);
 192
 193         drm_atomic_state_get(state);
 194         if (nonblock)
 195                 schedule_work(&commit->work);
 196         else
 197                 omap_atomic_complete(commit);
 198
 199         return 0;
 200
 201 error:
 202         drm_atomic_helper_cleanup_planes(dev, state);
 203         return ret;
 204 }
 205
 206 static const struct drm_mode_config_funcs omap_mode_config_funcs = {
 207         .fb_create = omap_framebuffer_create,
 208         .output_poll_changed = omap_fb_output_poll_changed,
 209         .atomic_check = drm_atomic_helper_check,
 210         .atomic_commit = omap_atomic_commit,
 211 };
 212
 213 static int get_connector_type(struct omap_dss_device *dssdev)
 214 {
 215         switch (dssdev->type) {
 216         case OMAP_DISPLAY_TYPE_HDMI:
 217                 return DRM_MODE_CONNECTOR_HDMIA;
 218         case OMAP_DISPLAY_TYPE_DVI:
 219                 return DRM_MODE_CONNECTOR_DVID;
 220         case OMAP_DISPLAY_TYPE_DSI:
 221                 return DRM_MODE_CONNECTOR_DSI;
 222         default:
 223                 return DRM_MODE_CONNECTOR_Unknown;
 224         }
 225 }
 226
 227 static bool channel_used(struct drm_device *dev, enum omap_channel channel)
 228 {
 229         struct omap_drm_private *priv = dev->dev_private;
 230         int i;
 231
 232         for (i = 0; i < priv->num_crtcs; i++) {
 233                 struct drm_crtc *crtc = priv->crtcs[i];
 234
 235                 if (omap_crtc_channel(crtc) == channel)
 236                         return true;
 237         }
 238
 239         return false;
 240 }
 241 static void omap_disconnect_dssdevs(void)
 242 {
 243         struct omap_dss_device *dssdev = NULL;
 244
 245         for_each_dss_dev(dssdev)
 246                 dssdev->driver->disconnect(dssdev);
 247 }
 248
 249 static int omap_connect_dssdevs(void)
 250 {
 251         int r;
 252         struct omap_dss_device *dssdev = NULL;
 253         bool no_displays = true;
 254
 255         for_each_dss_dev(dssdev) {
 256                 r = dssdev->driver->connect(dssdev);
 257                 if (r == -EPROBE_DEFER) {
 258                         omap_dss_put_device(dssdev);
 259                         goto cleanup;
 260                 } else if (r) {
 261                         dev_warn(dssdev->dev, "could not connect display: %s\n",
 262                                 dssdev->name);
 263                 } else {
 264                         no_displays = false;
 265                 }
 266         }
 267
 268         if (no_displays)
 269                 return -EPROBE_DEFER;
 270
 271         return 0;
 272
 273 cleanup:
 274         /*
 275          * if we are deferring probe, we disconnect the devices we previously
 276          * connected
 277          */
 278         omap_disconnect_dssdevs();
 279
 280         return r;
 281 }
 282
 283 static int omap_modeset_create_crtc(struct drm_device *dev, int id,
 284                                     enum omap_channel channel,
 285                                     u32 possible_crtcs)
 286 {
 287         struct omap_drm_private *priv = dev->dev_private;
 288         struct drm_plane *plane;
 289         struct drm_crtc *crtc;
 290
 291         plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_PRIMARY,
 292                 possible_crtcs);
 293         if (IS_ERR(plane))
 294                 return PTR_ERR(plane);
 295
 296         crtc = omap_crtc_init(dev, plane, channel, id);
 297
 298         BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
 299         priv->crtcs[id] = crtc;
 300         priv->num_crtcs++;
 301
 302         priv->planes[id] = plane;
 303         priv->num_planes++;
 304
 305         return 0;
 306 }
 307
 308 static int omap_modeset_init_properties(struct drm_device *dev)
 309 {
 310         struct omap_drm_private *priv = dev->dev_private;
 311
 312         priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
 313         if (!priv->zorder_prop)
 314                 return -ENOMEM;
 315
 316         return 0;
 317 }
 318
 319 static int omap_modeset_init(struct drm_device *dev)
 320 {
 321         struct omap_drm_private *priv = dev->dev_private;
 322         struct omap_dss_device *dssdev = NULL;
 323         int num_ovls = dss_feat_get_num_ovls();
 324         int num_mgrs = dss_feat_get_num_mgrs();
 325         int num_crtcs;
 326         int i, id = 0;
 327         int ret;
 328         u32 possible_crtcs;
 329
 330         drm_mode_config_init(dev);
 331
 332         ret = omap_modeset_init_properties(dev);
 333         if (ret < 0)
 334                 return ret;
 335
 336         /*
 337          * We usually don't want to create a CRTC for each manager, at least
 338          * not until we have a way to expose private planes to userspace.
 339          * Otherwise there would not be enough video pipes left for drm planes.
 340          * We use the num_crtc argument to limit the number of crtcs we create.
 341          */
 342         num_crtcs = min3(num_crtc, num_mgrs, num_ovls);
 343         possible_crtcs = (1 << num_crtcs) - 1;
 344
 345         dssdev = NULL;
 346
 347         for_each_dss_dev(dssdev) {
 348                 struct drm_connector *connector;
 349                 struct drm_encoder *encoder;
 350                 enum omap_channel channel;
 351                 struct omap_dss_device *out;
 352
 353                 if (!omapdss_device_is_connected(dssdev))
 354                         continue;
 355
 356                 encoder = omap_encoder_init(dev, dssdev);
 357
 358                 if (!encoder) {
 359                         dev_err(dev->dev, "could not create encoder: %s\n",
 360                                         dssdev->name);
 361                         return -ENOMEM;
 362                 }
 363
 364                 connector = omap_connector_init(dev,
 365                                 get_connector_type(dssdev), dssdev, encoder);
 366
 367                 if (!connector) {
 368                         dev_err(dev->dev, "could not create connector: %s\n",
 369                                         dssdev->name);
 370                         return -ENOMEM;
 371                 }
 372
 373                 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
 374                 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
 375
 376                 priv->encoders[priv->num_encoders++] = encoder;
 377                 priv->connectors[priv->num_connectors++] = connector;
 378
 379                 drm_mode_connector_attach_encoder(connector, encoder);
 380
 381                 /*
 382                  * if we have reached the limit of the crtcs we are allowed to
 383                  * create, let's not try to look for a crtc for this
 384                  * panel/encoder and onwards, we will, of course, populate the
 385                  * the possible_crtcs field for all the encoders with the final
 386                  * set of crtcs we create
 387                  */
 388                 if (id == num_crtcs)
 389                         continue;
 390
 391                 /*
 392                  * get the recommended DISPC channel for this encoder. For now,
 393                  * we only try to get create a crtc out of the recommended, the
 394                  * other possible channels to which the encoder can connect are
 395                  * not considered.
 396                  */
 397
 398                 out = omapdss_find_output_from_display(dssdev);
 399                 channel = out->dispc_channel;
 400                 omap_dss_put_device(out);
 401
 402                 /*
 403                  * if this channel hasn't already been taken by a previously
 404                  * allocated crtc, we create a new crtc for it
 405                  */
 406                 if (!channel_used(dev, channel)) {
 407                         ret = omap_modeset_create_crtc(dev, id, channel,
 408                                 possible_crtcs);
 409                         if (ret < 0) {
 410                                 dev_err(dev->dev,
 411                                         "could not create CRTC (channel %u)\n",
 412                                         channel);
 413                                 return ret;
 414                         }
 415
 416                         id++;
 417                 }
 418         }
 419
 420         /*
 421          * we have allocated crtcs according to the need of the panels/encoders,
 422          * adding more crtcs here if needed
 423          */
 424         for (; id < num_crtcs; id++) {
 425
 426                 /* find a free manager for this crtc */
 427                 for (i = 0; i < num_mgrs; i++) {
 428                         if (!channel_used(dev, i))
 429                                 break;
 430                 }
 431
 432                 if (i == num_mgrs) {
 433                         /* this shouldn't really happen */
 434                         dev_err(dev->dev, "no managers left for crtc\n");
 435                         return -ENOMEM;
 436                 }
 437
 438                 ret = omap_modeset_create_crtc(dev, id, i,
 439                         possible_crtcs);
 440                 if (ret < 0) {
 441                         dev_err(dev->dev,
 442                                 "could not create CRTC (channel %u)\n", i);
 443                         return ret;
 444                 }
 445         }
 446
 447         /*
 448          * Create normal planes for the remaining overlays:
 449          */
 450         for (; id < num_ovls; id++) {
 451                 struct drm_plane *plane;
 452
 453                 plane = omap_plane_init(dev, id, DRM_PLANE_TYPE_OVERLAY,
 454                         possible_crtcs);
 455                 if (IS_ERR(plane))
 456                         return PTR_ERR(plane);
 457
 458                 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
 459                 priv->planes[priv->num_planes++] = plane;
 460         }
 461
 462         for (i = 0; i < priv->num_encoders; i++) {
 463                 struct drm_encoder *encoder = priv->encoders[i];
 464                 struct omap_dss_device *dssdev =
 465                                         omap_encoder_get_dssdev(encoder);
 466                 struct omap_dss_device *output;
 467
 468                 output = omapdss_find_output_from_display(dssdev);
 469
 470                 /* figure out which crtc's we can connect the encoder to: */
 471                 encoder->possible_crtcs = 0;
 472                 for (id = 0; id < priv->num_crtcs; id++) {
 473                         struct drm_crtc *crtc = priv->crtcs[id];
 474                         enum omap_channel crtc_channel;
 475
 476                         crtc_channel = omap_crtc_channel(crtc);
 477
 478                         if (output->dispc_channel == crtc_channel) {
 479                                 encoder->possible_crtcs |= (1 << id);
 480                                 break;
 481                         }
 482                 }
 483
 484                 omap_dss_put_device(output);
 485         }
 486
 487         DBG("registered %d planes, %d crtcs, %d encoders and %d connectors\n",
 488                 priv->num_planes, priv->num_crtcs, priv->num_encoders,
 489                 priv->num_connectors);
 490
 491         dev->mode_config.min_width = 32;
 492         dev->mode_config.min_height = 32;
 493
 494         /* note: eventually will need some cpu_is_omapXYZ() type stuff here
 495          * to fill in these limits properly on different OMAP generations..
 496          */
 497         dev->mode_config.max_width = 2048;
 498         dev->mode_config.max_height = 2048;
 499
 500         dev->mode_config.funcs = &omap_mode_config_funcs;
 501
 502         drm_mode_config_reset(dev);
 503
 504         omap_drm_irq_install(dev);
 505
 506         return 0;
 507 }
 508
 509 /*
 510  * drm ioctl funcs
 511  */
 512
 513
 514 static int ioctl_get_param(struct drm_device *dev, void *data,
 515                 struct drm_file *file_priv)
 516 {
 517         struct omap_drm_private *priv = dev->dev_private;
 518         struct drm_omap_param *args = data;
 519
 520         DBG("%p: param=%llu", dev, args->param);
 521
 522         switch (args->param) {
 523         case OMAP_PARAM_CHIPSET_ID:
 524                 args->value = priv->omaprev;
 525                 break;
 526         default:
 527                 DBG("unknown parameter %lld", args->param);
 528                 return -EINVAL;
 529         }
 530
 531         return 0;
 532 }
 533
 534 static int ioctl_set_param(struct drm_device *dev, void *data,
 535                 struct drm_file *file_priv)
 536 {
 537         struct drm_omap_param *args = data;
 538
 539         switch (args->param) {
 540         default:
 541                 DBG("unknown parameter %lld", args->param);
 542                 return -EINVAL;
 543         }
 544
 545         return 0;
 546 }
 547
 548 #define OMAP_BO_USER_MASK       0x00ffffff      /* flags settable by userspace */
 549
 550 static int ioctl_gem_new(struct drm_device *dev, void *data,
 551                 struct drm_file *file_priv)
 552 {
 553         struct drm_omap_gem_new *args = data;
 554         u32 flags = args->flags & OMAP_BO_USER_MASK;
 555
 556         VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
 557              args->size.bytes, flags);
 558
 559         return omap_gem_new_handle(dev, file_priv, args->size, flags,
 560                                    &args->handle);
 561 }
 562
 563 static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
 564                 struct drm_file *file_priv)
 565 {
 566         struct drm_omap_gem_cpu_prep *args = data;
 567         struct drm_gem_object *obj;
 568         int ret;
 569
 570         VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
 571
 572         obj = drm_gem_object_lookup(file_priv, args->handle);
 573         if (!obj)
 574                 return -ENOENT;
 575
 576         ret = omap_gem_op_sync(obj, args->op);
 577
 578         if (!ret)
 579                 ret = omap_gem_op_start(obj, args->op);
 580
 581         drm_gem_object_unreference_unlocked(obj);
 582
 583         return ret;
 584 }
 585
 586 static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
 587                 struct drm_file *file_priv)
 588 {
 589         struct drm_omap_gem_cpu_fini *args = data;
 590         struct drm_gem_object *obj;
 591         int ret;
 592
 593         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 594
 595         obj = drm_gem_object_lookup(file_priv, args->handle);
 596         if (!obj)
 597                 return -ENOENT;
 598
 599         /* XXX flushy, flushy */
 600         ret = 0;
 601
 602         if (!ret)
 603                 ret = omap_gem_op_finish(obj, args->op);
 604
 605         drm_gem_object_unreference_unlocked(obj);
 606
 607         return ret;
 608 }
 609
 610 static int ioctl_gem_info(struct drm_device *dev, void *data,
 611                 struct drm_file *file_priv)
 612 {
 613         struct drm_omap_gem_info *args = data;
 614         struct drm_gem_object *obj;
 615         int ret = 0;
 616
 617         VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
 618
 619         obj = drm_gem_object_lookup(file_priv, args->handle);
 620         if (!obj)
 621                 return -ENOENT;
 622
 623         args->size = omap_gem_mmap_size(obj);
 624         args->offset = omap_gem_mmap_offset(obj);
 625
 626         drm_gem_object_unreference_unlocked(obj);
 627
 628         return ret;
 629 }
 630
 631 static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] = {
 632         DRM_IOCTL_DEF_DRV(OMAP_GET_PARAM, ioctl_get_param, DRM_AUTH),
 633         DRM_IOCTL_DEF_DRV(OMAP_SET_PARAM, ioctl_set_param, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
 634         DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new, DRM_AUTH),
 635         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep, DRM_AUTH),
 636         DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini, DRM_AUTH),
 637         DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info, DRM_AUTH),
 638 };
 639
 640 /*
 641  * drm driver funcs
 642  */
 643
 644 static int dev_open(struct drm_device *dev, struct drm_file *file)
 645 {
 646         file->driver_priv = NULL;
 647
 648         DBG("open: dev=%p, file=%p", dev, file);
 649
 650         return 0;
 651 }
 652
 653 /**
 654  * lastclose - clean up after all DRM clients have exited
 655  * @dev: DRM device
 656  *
 657  * Take care of cleaning up after all DRM clients have exited.  In the
 658  * mode setting case, we want to restore the kernel's initial mode (just
 659  * in case the last client left us in a bad state).
 660  */
 661 static void dev_lastclose(struct drm_device *dev)
 662 {
 663         int i;
 664
 665         /* we don't support vga_switcheroo.. so just make sure the fbdev
 666          * mode is active
 667          */
 668         struct omap_drm_private *priv = dev->dev_private;
 669         int ret;
 670
 671         DBG("lastclose: dev=%p", dev);
 672
 673         /* need to restore default rotation state.. not sure
 674          * if there is a cleaner way to restore properties to
 675          * default state?  Maybe a flag that properties should
 676          * automatically be restored to default state on
 677          * lastclose?
 678          */
 679         for (i = 0; i < priv->num_crtcs; i++) {
 680                 struct drm_crtc *crtc = priv->crtcs[i];
 681
 682                 if (!crtc->primary->rotation_property)
 683                         continue;
 684
 685                 drm_object_property_set_value(&crtc->base,
 686                                               crtc->primary->rotation_property,
 687                                               DRM_ROTATE_0);
 688         }
 689
 690         for (i = 0; i < priv->num_planes; i++) {
 691                 struct drm_plane *plane = priv->planes[i];
 692
 693                 if (!plane->rotation_property)
 694                         continue;
 695
 696                 drm_object_property_set_value(&plane->base,
 697                                               plane->rotation_property,
 698                                               DRM_ROTATE_0);
 699         }
 700
 701         if (priv->fbdev) {
 702                 ret = drm_fb_helper_restore_fbdev_mode_unlocked(priv->fbdev);
 703                 if (ret)
 704                         DBG("failed to restore crtc mode");
 705         }
 706 }
 707
 708 static const struct vm_operations_struct omap_gem_vm_ops = {
 709         .fault = omap_gem_fault,
 710         .open = drm_gem_vm_open,
 711         .close = drm_gem_vm_close,
 712 };
 713
 714 static const struct file_operations omapdriver_fops = {
 715         .owner = THIS_MODULE,
 716         .open = drm_open,
 717         .unlocked_ioctl = drm_ioctl,
 718         .release = drm_release,
 719         .mmap = omap_gem_mmap,
 720         .poll = drm_poll,
 721         .read = drm_read,
 722         .llseek = noop_llseek,
 723 };
 724
 725 static struct drm_driver omap_drm_driver = {
 726         .driver_features = DRIVER_MODESET | DRIVER_GEM  | DRIVER_PRIME |
 727                 DRIVER_ATOMIC,
 728         .open = dev_open,
 729         .lastclose = dev_lastclose,
 730 #ifdef CONFIG_DEBUG_FS
 731         .debugfs_init = omap_debugfs_init,
 732 #endif
 733         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 734         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 735         .gem_prime_export = omap_gem_prime_export,
 736         .gem_prime_import = omap_gem_prime_import,
 737         .gem_free_object = omap_gem_free_object,
 738         .gem_vm_ops = &omap_gem_vm_ops,
 739         .dumb_create = omap_gem_dumb_create,
 740         .dumb_map_offset = omap_gem_dumb_map_offset,
 741         .dumb_destroy = drm_gem_dumb_destroy,
 742         .ioctls = ioctls,
 743         .num_ioctls = DRM_OMAP_NUM_IOCTLS,
 744         .fops = &omapdriver_fops,
 745         .name = DRIVER_NAME,
 746         .desc = DRIVER_DESC,
 747         .date = DRIVER_DATE,
 748         .major = DRIVER_MAJOR,
 749         .minor = DRIVER_MINOR,
 750         .patchlevel = DRIVER_PATCHLEVEL,
 751 };
 752
 753 static int pdev_probe(struct platform_device *pdev)
 754 {
 755         struct omap_drm_platform_data *pdata = pdev->dev.platform_data;
 756         struct omap_drm_private *priv;
 757         struct drm_device *ddev;
 758         unsigned int i;
 759         int ret;
 760
 761         DBG("%s", pdev->name);
 762
 763         if (omapdss_is_initialized() == false)
 764                 return -EPROBE_DEFER;
 765
 766         omap_crtc_pre_init();
 767
 768         ret = omap_connect_dssdevs();
 769         if (ret)
 770                 goto err_crtc_uninit;
 771
 772         /* Allocate and initialize the driver private structure. */
 773         priv = kzalloc(sizeof(*priv), GFP_KERNEL);
 774         if (!priv) {
 775                 ret = -ENOMEM;
 776                 goto err_disconnect_dssdevs;
 777         }
 778
 779         priv->omaprev = pdata->omaprev;
 780         priv->wq = alloc_ordered_workqueue("omapdrm", 0);
 781
 782         init_waitqueue_head(&priv->commit.wait);
 783         spin_lock_init(&priv->commit.lock);
 784         spin_lock_init(&priv->list_lock);
 785         INIT_LIST_HEAD(&priv->obj_list);
 786
 787         /* Allocate and initialize the DRM device. */
 788         ddev = drm_dev_alloc(&omap_drm_driver, &pdev->dev);
 789         if (IS_ERR(ddev)) {
 790                 ret = PTR_ERR(ddev);
 791                 goto err_free_priv;
 792         }
 793
 794         ddev->dev_private = priv;
 795         platform_set_drvdata(pdev, ddev);
 796
 797         omap_gem_init(ddev);
 798
 799         ret = omap_modeset_init(ddev);
 800         if (ret) {
 801                 dev_err(&pdev->dev, "omap_modeset_init failed: ret=%d\n", ret);
 802                 goto err_free_drm_dev;
 803         }
 804
 805         /* Initialize vblank handling, start with all CRTCs disabled. */
 806         ret = drm_vblank_init(ddev, priv->num_crtcs);
 807         if (ret) {
 808                 dev_err(&pdev->dev, "could not init vblank\n");
 809                 goto err_cleanup_modeset;
 810         }
 811
 812         for (i = 0; i < priv->num_crtcs; i++)
 813                 drm_crtc_vblank_off(priv->crtcs[i]);
 814
 815         priv->fbdev = omap_fbdev_init(ddev);
 816
 817         drm_kms_helper_poll_init(ddev);
 818
 819         /*
 820          * Register the DRM device with the core and the connectors with
 821          * sysfs.
 822          */
 823         ret = drm_dev_register(ddev, 0);
 824         if (ret)
 825                 goto err_cleanup_helpers;
 826
 827         return 0;
 828
 829 err_cleanup_helpers:
 830         drm_kms_helper_poll_fini(ddev);
 831         if (priv->fbdev)
 832                 omap_fbdev_free(ddev);
 833 err_cleanup_modeset:
 834         drm_mode_config_cleanup(ddev);
 835         omap_drm_irq_uninstall(ddev);
 836 err_free_drm_dev:
 837         omap_gem_deinit(ddev);
 838         drm_dev_unref(ddev);
 839 err_free_priv:
 840         destroy_workqueue(priv->wq);
 841         kfree(priv);
 842 err_disconnect_dssdevs:
 843         omap_disconnect_dssdevs();
 844 err_crtc_uninit:
 845         omap_crtc_pre_uninit();
 846         return ret;
 847 }
 848
 849 static int pdev_remove(struct platform_device *pdev)
 850 {
 851         struct drm_device *ddev = platform_get_drvdata(pdev);
 852         struct omap_drm_private *priv = ddev->dev_private;
 853
 854         DBG("");
 855
 856         drm_dev_unregister(ddev);
 857
 858         drm_kms_helper_poll_fini(ddev);
 859
 860         if (priv->fbdev)
 861                 omap_fbdev_free(ddev);
 862
 863         drm_mode_config_cleanup(ddev);
 864
 865         omap_drm_irq_uninstall(ddev);
 866         omap_gem_deinit(ddev);
 867
 868         drm_dev_unref(ddev);
 869
 870         destroy_workqueue(priv->wq);
 871         kfree(priv);
 872
 873         omap_disconnect_dssdevs();
 874         omap_crtc_pre_uninit();
 875
 876         return 0;
 877 }
 878
 879 #ifdef CONFIG_PM_SLEEP
 880 static int omap_drm_suspend_all_displays(void)
 881 {
 882         struct omap_dss_device *dssdev = NULL;
 883
 884         for_each_dss_dev(dssdev) {
 885                 if (!dssdev->driver)
 886                         continue;
 887
 888                 if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE) {
 889                         dssdev->driver->disable(dssdev);
 890                         dssdev->activate_after_resume = true;
 891                 } else {
 892                         dssdev->activate_after_resume = false;
 893                 }
 894         }
 895
 896         return 0;
 897 }
 898
 899 static int omap_drm_resume_all_displays(void)
 900 {
 901         struct omap_dss_device *dssdev = NULL;
 902
 903         for_each_dss_dev(dssdev) {
 904                 if (!dssdev->driver)
 905                         continue;
 906
 907                 if (dssdev->activate_after_resume) {
 908                         dssdev->driver->enable(dssdev);
 909                         dssdev->activate_after_resume = false;
 910                 }
 911         }
 912
 913         return 0;
 914 }
 915
 916 static int omap_drm_suspend(struct device *dev)
 917 {
 918         struct drm_device *drm_dev = dev_get_drvdata(dev);
 919
 920         drm_kms_helper_poll_disable(drm_dev);
 921
 922         drm_modeset_lock_all(drm_dev);
 923         omap_drm_suspend_all_displays();
 924         drm_modeset_unlock_all(drm_dev);
 925
 926         return 0;
 927 }
 928
 929 static int omap_drm_resume(struct device *dev)
 930 {
 931         struct drm_device *drm_dev = dev_get_drvdata(dev);
 932
 933         drm_modeset_lock_all(drm_dev);
 934         omap_drm_resume_all_displays();
 935         drm_modeset_unlock_all(drm_dev);
 936
 937         drm_kms_helper_poll_enable(drm_dev);
 938
 939         return omap_gem_resume(dev);
 940 }
 941 #endif
 942
 943 static SIMPLE_DEV_PM_OPS(omapdrm_pm_ops, omap_drm_suspend, omap_drm_resume);
 944
 945 static struct platform_driver pdev = {
 946         .driver = {
 947                 .name = DRIVER_NAME,
 948                 .pm = &omapdrm_pm_ops,
 949         },
 950         .probe = pdev_probe,
 951         .remove = pdev_remove,
 952 };
 953
 954 static struct platform_driver * const drivers[] = {
 955         &omap_dmm_driver,
 956         &pdev,
 957 };
 958
 959 static int __init omap_drm_init(void)
 960 {
 961         DBG("init");
 962
 963         return platform_register_drivers(drivers, ARRAY_SIZE(drivers));
 964 }
 965
 966 static void __exit omap_drm_fini(void)
 967 {
 968         DBG("fini");
 969
 970         platform_unregister_drivers(drivers, ARRAY_SIZE(drivers));
 971 }
 972
 973 /* need late_initcall() so we load after dss_driver's are loaded */
 974 late_initcall(omap_drm_init);
 975 module_exit(omap_drm_fini);
 976
 977 MODULE_AUTHOR("Rob Clark <rob@ti.com>");
 978 MODULE_DESCRIPTION("OMAP DRM Display Driver");
 979 MODULE_ALIAS("platform:" DRIVER_NAME);
 980 MODULE_LICENSE("GPL v2");