drivers/gpu/drm/omapdrm/dss/hdmi5.c

   1 /*
   2  * HDMI driver for OMAP5
   3  *
   4  * Copyright (C) 2014 Texas Instruments Incorporated
   5  *
   6  * Authors:
   7  *      Yong Zhi
   8  *      Mythri pk
   9  *      Archit Taneja <archit@ti.com>
  10  *      Tomi Valkeinen <tomi.valkeinen@ti.com>
  11  *
  12  * This program is free software; you can redistribute it and/or modify it
  13  * under the terms of the GNU General Public License version 2 as published by
  14  * the Free Software Foundation.
  15  *
  16  * This program is distributed in the hope that it will be useful, but WITHOUT
  17  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  19  * more details.
  20  *
  21  * You should have received a copy of the GNU General Public License along with
  22  * this program.  If not, see <http://www.gnu.org/licenses/>.
  23  */
  24
  25 #define DSS_SUBSYS_NAME "HDMI"
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/err.h>
  30 #include <linux/io.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/mutex.h>
  33 #include <linux/delay.h>
  34 #include <linux/string.h>
  35 #include <linux/platform_device.h>
  36 #include <linux/pm_runtime.h>
  37 #include <linux/clk.h>
  38 #include <linux/gpio.h>
  39 #include <linux/regulator/consumer.h>
  40 #include <linux/component.h>
  41 #include <linux/of.h>
  42 #include <sound/omap-hdmi-audio.h>
  43
  44 #include "omapdss.h"
  45 #include "hdmi5_core.h"
  46 #include "dss.h"
  47 #include "dss_features.h"
  48
  49 static struct omap_hdmi hdmi;
  50
  51 static int hdmi_runtime_get(void)
  52 {
  53         int r;
  54
  55         DSSDBG("hdmi_runtime_get\n");
  56
  57         r = pm_runtime_get_sync(&hdmi.pdev->dev);
  58         WARN_ON(r < 0);
  59         if (r < 0)
  60                 return r;
  61
  62         return 0;
  63 }
  64
  65 static void hdmi_runtime_put(void)
  66 {
  67         int r;
  68
  69         DSSDBG("hdmi_runtime_put\n");
  70
  71         r = pm_runtime_put_sync(&hdmi.pdev->dev);
  72         WARN_ON(r < 0 && r != -ENOSYS);
  73 }
  74
  75 static irqreturn_t hdmi_irq_handler(int irq, void *data)
  76 {
  77         struct hdmi_wp_data *wp = data;
  78         u32 irqstatus;
  79
  80         irqstatus = hdmi_wp_get_irqstatus(wp);
  81         hdmi_wp_set_irqstatus(wp, irqstatus);
  82
  83         if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  84                         irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  85                 u32 v;
  86                 /*
  87                  * If we get both connect and disconnect interrupts at the same
  88                  * time, turn off the PHY, clear interrupts, and restart, which
  89                  * raises connect interrupt if a cable is connected, or nothing
  90                  * if cable is not connected.
  91                  */
  92
  93                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  94
  95                 /*
  96                  * We always get bogus CONNECT & DISCONNECT interrupts when
  97                  * setting the PHY to LDOON. To ignore those, we force the RXDET
  98                  * line to 0 until the PHY power state has been changed.
  99                  */
 100                 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL);
 101                 v = FLD_MOD(v, 1, 15, 15); /* FORCE_RXDET_HIGH */
 102                 v = FLD_MOD(v, 0, 14, 7); /* RXDET_LINE */
 103                 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v);
 104
 105                 hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
 106                                 HDMI_IRQ_LINK_DISCONNECT);
 107
 108                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 109
 110                 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15);
 111
 112         } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
 113                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
 114         } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
 115                 hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
 116         }
 117
 118         return IRQ_HANDLED;
 119 }
 120
 121 static int hdmi_init_regulator(void)
 122 {
 123         int r;
 124         struct regulator *reg;
 125
 126         if (hdmi.vdda_reg != NULL)
 127                 return 0;
 128
 129         reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
 130         if (IS_ERR(reg)) {
 131                 DSSERR("can't get VDDA regulator\n");
 132                 return PTR_ERR(reg);
 133         }
 134
 135         hdmi.vdda_reg = reg;
 136
 137         return 0;
 138 }
 139
 140 static int hdmi_power_on_core(struct omap_dss_device *dssdev)
 141 {
 142         int r;
 143
 144         r = regulator_enable(hdmi.vdda_reg);
 145         if (r)
 146                 return r;
 147
 148         r = hdmi_runtime_get();
 149         if (r)
 150                 goto err_runtime_get;
 151
 152         /* Make selection of HDMI in DSS */
 153         dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
 154
 155         hdmi.core_enabled = true;
 156
 157         return 0;
 158
 159 err_runtime_get:
 160         regulator_disable(hdmi.vdda_reg);
 161
 162         return r;
 163 }
 164
 165 static void hdmi_power_off_core(struct omap_dss_device *dssdev)
 166 {
 167         hdmi.core_enabled = false;
 168
 169         hdmi_runtime_put();
 170         regulator_disable(hdmi.vdda_reg);
 171 }
 172
 173 static int hdmi_power_on_full(struct omap_dss_device *dssdev)
 174 {
 175         int r;
 176         struct omap_video_timings *p;
 177         enum omap_channel channel = dssdev->dispc_channel;
 178         struct dss_pll_clock_info hdmi_cinfo = { 0 };
 179         unsigned pc;
 180
 181         r = hdmi_power_on_core(dssdev);
 182         if (r)
 183                 return r;
 184
 185         p = &hdmi.cfg.timings;
 186
 187         DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
 188
 189         pc = p->pixelclock;
 190         if (p->double_pixel)
 191                 pc *= 2;
 192
 193         /* DSS_HDMI_TCLK is bitclk / 10 */
 194         pc *= 10;
 195
 196         dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
 197                 pc, &hdmi_cinfo);
 198
 199         /* disable and clear irqs */
 200         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 201         hdmi_wp_set_irqstatus(&hdmi.wp,
 202                         hdmi_wp_get_irqstatus(&hdmi.wp));
 203
 204         r = dss_pll_enable(&hdmi.pll.pll);
 205         if (r) {
 206                 DSSERR("Failed to enable PLL\n");
 207                 goto err_pll_enable;
 208         }
 209
 210         r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
 211         if (r) {
 212                 DSSERR("Failed to configure PLL\n");
 213                 goto err_pll_cfg;
 214         }
 215
 216         r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
 217                 hdmi_cinfo.clkout[0]);
 218         if (r) {
 219                 DSSDBG("Failed to start PHY\n");
 220                 goto err_phy_cfg;
 221         }
 222
 223         r = hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_LDOON);
 224         if (r)
 225                 goto err_phy_pwr;
 226
 227         hdmi5_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
 228
 229         /* tv size */
 230         dss_mgr_set_timings(channel, p);
 231
 232         r = dss_mgr_enable(channel);
 233         if (r)
 234                 goto err_mgr_enable;
 235
 236         r = hdmi_wp_video_start(&hdmi.wp);
 237         if (r)
 238                 goto err_vid_enable;
 239
 240         hdmi_wp_set_irqenable(&hdmi.wp,
 241                         HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
 242
 243         return 0;
 244
 245 err_vid_enable:
 246         dss_mgr_disable(channel);
 247 err_mgr_enable:
 248         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 249 err_phy_pwr:
 250 err_phy_cfg:
 251 err_pll_cfg:
 252         dss_pll_disable(&hdmi.pll.pll);
 253 err_pll_enable:
 254         hdmi_power_off_core(dssdev);
 255         return -EIO;
 256 }
 257
 258 static void hdmi_power_off_full(struct omap_dss_device *dssdev)
 259 {
 260         enum omap_channel channel = dssdev->dispc_channel;
 261
 262         hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
 263
 264         hdmi_wp_video_stop(&hdmi.wp);
 265
 266         dss_mgr_disable(channel);
 267
 268         hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
 269
 270         dss_pll_disable(&hdmi.pll.pll);
 271
 272         hdmi_power_off_core(dssdev);
 273 }
 274
 275 static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
 276                                         struct omap_video_timings *timings)
 277 {
 278         if (!dispc_mgr_timings_ok(dssdev->dispc_channel, timings))
 279                 return -EINVAL;
 280
 281         return 0;
 282 }
 283
 284 static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
 285                 struct omap_video_timings *timings)
 286 {
 287         mutex_lock(&hdmi.lock);
 288
 289         hdmi.cfg.timings = *timings;
 290
 291         dispc_set_tv_pclk(timings->pixelclock);
 292
 293         mutex_unlock(&hdmi.lock);
 294 }
 295
 296 static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
 297                 struct omap_video_timings *timings)
 298 {
 299         *timings = hdmi.cfg.timings;
 300 }
 301
 302 static void hdmi_dump_regs(struct seq_file *s)
 303 {
 304         mutex_lock(&hdmi.lock);
 305
 306         if (hdmi_runtime_get()) {
 307                 mutex_unlock(&hdmi.lock);
 308                 return;
 309         }
 310
 311         hdmi_wp_dump(&hdmi.wp, s);
 312         hdmi_pll_dump(&hdmi.pll, s);
 313         hdmi_phy_dump(&hdmi.phy, s);
 314         hdmi5_core_dump(&hdmi.core, s);
 315
 316         hdmi_runtime_put();
 317         mutex_unlock(&hdmi.lock);
 318 }
 319
 320 static int read_edid(u8 *buf, int len)
 321 {
 322         int r;
 323         int idlemode;
 324
 325         mutex_lock(&hdmi.lock);
 326
 327         r = hdmi_runtime_get();
 328         BUG_ON(r);
 329
 330         idlemode = REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 331         /* No-idle mode */
 332         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 333
 334         r = hdmi5_read_edid(&hdmi.core,  buf, len);
 335
 336         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, idlemode, 3, 2);
 337
 338         hdmi_runtime_put();
 339         mutex_unlock(&hdmi.lock);
 340
 341         return r;
 342 }
 343
 344 static void hdmi_start_audio_stream(struct omap_hdmi *hd)
 345 {
 346         REG_FLD_MOD(hdmi.wp.base, HDMI_WP_SYSCONFIG, 1, 3, 2);
 347         hdmi_wp_audio_enable(&hd->wp, true);
 348         hdmi_wp_audio_core_req_enable(&hd->wp, true);
 349 }
 350
 351 static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
 352 {
 353         hdmi_wp_audio_core_req_enable(&hd->wp, false);
 354         hdmi_wp_audio_enable(&hd->wp, false);
 355         REG_FLD_MOD(hd->wp.base, HDMI_WP_SYSCONFIG, hd->wp_idlemode, 3, 2);
 356 }
 357
 358 static int hdmi_display_enable(struct omap_dss_device *dssdev)
 359 {
 360         struct omap_dss_device *out = &hdmi.output;
 361         unsigned long flags;
 362         int r = 0;
 363
 364         DSSDBG("ENTER hdmi_display_enable\n");
 365
 366         mutex_lock(&hdmi.lock);
 367
 368         if (!out->dispc_channel_connected) {
 369                 DSSERR("failed to enable display: no output/manager\n");
 370                 r = -ENODEV;
 371                 goto err0;
 372         }
 373
 374         r = hdmi_power_on_full(dssdev);
 375         if (r) {
 376                 DSSERR("failed to power on device\n");
 377                 goto err0;
 378         }
 379
 380         if (hdmi.audio_configured) {
 381                 r = hdmi5_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
 382                                        hdmi.cfg.timings.pixelclock);
 383                 if (r) {
 384                         DSSERR("Error restoring audio configuration: %d", r);
 385                         hdmi.audio_abort_cb(&hdmi.pdev->dev);
 386                         hdmi.audio_configured = false;
 387                 }
 388         }
 389
 390         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 391         if (hdmi.audio_configured && hdmi.audio_playing)
 392                 hdmi_start_audio_stream(&hdmi);
 393         hdmi.display_enabled = true;
 394         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 395
 396         mutex_unlock(&hdmi.lock);
 397         return 0;
 398
 399 err0:
 400         mutex_unlock(&hdmi.lock);
 401         return r;
 402 }
 403
 404 static void hdmi_display_disable(struct omap_dss_device *dssdev)
 405 {
 406         unsigned long flags;
 407
 408         DSSDBG("Enter hdmi_display_disable\n");
 409
 410         mutex_lock(&hdmi.lock);
 411
 412         spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
 413         hdmi_stop_audio_stream(&hdmi);
 414         hdmi.display_enabled = false;
 415         spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
 416
 417         hdmi_power_off_full(dssdev);
 418
 419         mutex_unlock(&hdmi.lock);
 420 }
 421
 422 static int hdmi_core_enable(struct omap_dss_device *dssdev)
 423 {
 424         int r = 0;
 425
 426         DSSDBG("ENTER omapdss_hdmi_core_enable\n");
 427
 428         mutex_lock(&hdmi.lock);
 429
 430         r = hdmi_power_on_core(dssdev);
 431         if (r) {
 432                 DSSERR("failed to power on device\n");
 433                 goto err0;
 434         }
 435
 436         mutex_unlock(&hdmi.lock);
 437         return 0;
 438
 439 err0:
 440         mutex_unlock(&hdmi.lock);
 441         return r;
 442 }
 443
 444 static void hdmi_core_disable(struct omap_dss_device *dssdev)
 445 {
 446         DSSDBG("Enter omapdss_hdmi_core_disable\n");
 447
 448         mutex_lock(&hdmi.lock);
 449
 450         hdmi_power_off_core(dssdev);
 451
 452         mutex_unlock(&hdmi.lock);
 453 }
 454
 455 static int hdmi_connect(struct omap_dss_device *dssdev,
 456                 struct omap_dss_device *dst)
 457 {
 458         enum omap_channel channel = dssdev->dispc_channel;
 459         int r;
 460
 461         r = hdmi_init_regulator();
 462         if (r)
 463                 return r;
 464
 465         r = dss_mgr_connect(channel, dssdev);
 466         if (r)
 467                 return r;
 468
 469         r = omapdss_output_set_device(dssdev, dst);
 470         if (r) {
 471                 DSSERR("failed to connect output to new device: %s\n",
 472                                 dst->name);
 473                 dss_mgr_disconnect(channel, dssdev);
 474                 return r;
 475         }
 476
 477         return 0;
 478 }
 479
 480 static void hdmi_disconnect(struct omap_dss_device *dssdev,
 481                 struct omap_dss_device *dst)
 482 {
 483         enum omap_channel channel = dssdev->dispc_channel;
 484
 485         WARN_ON(dst != dssdev->dst);
 486
 487         if (dst != dssdev->dst)
 488                 return;
 489
 490         omapdss_output_unset_device(dssdev);
 491
 492         dss_mgr_disconnect(channel, dssdev);
 493 }
 494
 495 static int hdmi_read_edid(struct omap_dss_device *dssdev,
 496                 u8 *edid, int len)
 497 {
 498         bool need_enable;
 499         int r;
 500
 501         need_enable = hdmi.core_enabled == false;
 502
 503         if (need_enable) {
 504                 r = hdmi_core_enable(dssdev);
 505                 if (r)
 506                         return r;
 507         }
 508
 509         r = read_edid(edid, len);
 510
 511         if (need_enable)
 512                 hdmi_core_disable(dssdev);
 513
 514         return r;
 515 }
 516
 517 static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
 518                 const struct hdmi_avi_infoframe *avi)
 519 {
 520         hdmi.cfg.infoframe = *avi;
 521         return 0;
 522 }
 523
 524 static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
 525                 bool hdmi_mode)
 526 {
 527         hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
 528         return 0;
 529 }
 530
 531 static const struct omapdss_hdmi_ops hdmi_ops = {
 532         .connect                = hdmi_connect,
 533         .disconnect             = hdmi_disconnect,
 534
 535         .enable                 = hdmi_display_enable,
 536         .disable                = hdmi_display_disable,
 537
 538         .check_timings          = hdmi_display_check_timing,
 539         .set_timings            = hdmi_display_set_timing,
 540         .get_timings            = hdmi_display_get_timings,
 541
 542         .read_edid              = hdmi_read_edid,
 543         .set_infoframe          = hdmi_set_infoframe,
 544         .set_hdmi_mode          = hdmi_set_hdmi_mode,
 545 };
 546
 547 static void hdmi_init_output(struct platform_device *pdev)
 548 {
 549         struct omap_dss_device *out = &hdmi.output;
 550
 551         out->dev = &pdev->dev;
 552         out->id = OMAP_DSS_OUTPUT_HDMI;
 553         out->output_type = OMAP_DISPLAY_TYPE_HDMI;
 554         out->name = "hdmi.0";
 555         out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
 556         out->ops.hdmi = &hdmi_ops;
 557         out->owner = THIS_MODULE;
 558
 559         omapdss_register_output(out);
 560 }
 561
 562 static void hdmi_uninit_output(struct platform_device *pdev)
 563 {
 564         struct omap_dss_device *out = &hdmi.output;
 565
 566         omapdss_unregister_output(out);
 567 }
 568
 569 static int hdmi_probe_of(struct platform_device *pdev)
 570 {
 571         struct device_node *node = pdev->dev.of_node;
 572         struct device_node *ep;
 573         int r;
 574
 575         ep = omapdss_of_get_first_endpoint(node);
 576         if (!ep)
 577                 return 0;
 578
 579         r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
 580         if (r)
 581                 goto err;
 582
 583         of_node_put(ep);
 584         return 0;
 585
 586 err:
 587         of_node_put(ep);
 588         return r;
 589 }
 590
 591 /* Audio callbacks */
 592 static int hdmi_audio_startup(struct device *dev,
 593                               void (*abort_cb)(struct device *dev))
 594 {
 595         struct omap_hdmi *hd = dev_get_drvdata(dev);
 596         int ret = 0;
 597
 598         mutex_lock(&hd->lock);
 599
 600         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 601                 ret = -EPERM;
 602                 goto out;
 603         }
 604
 605         hd->audio_abort_cb = abort_cb;
 606
 607 out:
 608         mutex_unlock(&hd->lock);
 609
 610         return ret;
 611 }
 612
 613 static int hdmi_audio_shutdown(struct device *dev)
 614 {
 615         struct omap_hdmi *hd = dev_get_drvdata(dev);
 616
 617         mutex_lock(&hd->lock);
 618         hd->audio_abort_cb = NULL;
 619         hd->audio_configured = false;
 620         hd->audio_playing = false;
 621         mutex_unlock(&hd->lock);
 622
 623         return 0;
 624 }
 625
 626 static int hdmi_audio_start(struct device *dev)
 627 {
 628         struct omap_hdmi *hd = dev_get_drvdata(dev);
 629         unsigned long flags;
 630
 631         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 632
 633         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 634
 635         if (hd->display_enabled)
 636                 hdmi_start_audio_stream(hd);
 637         hd->audio_playing = true;
 638
 639         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 640         return 0;
 641 }
 642
 643 static void hdmi_audio_stop(struct device *dev)
 644 {
 645         struct omap_hdmi *hd = dev_get_drvdata(dev);
 646         unsigned long flags;
 647
 648         WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
 649
 650         spin_lock_irqsave(&hd->audio_playing_lock, flags);
 651
 652         if (hd->display_enabled)
 653                 hdmi_stop_audio_stream(hd);
 654         hd->audio_playing = false;
 655
 656         spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
 657 }
 658
 659 static int hdmi_audio_config(struct device *dev,
 660                              struct omap_dss_audio *dss_audio)
 661 {
 662         struct omap_hdmi *hd = dev_get_drvdata(dev);
 663         int ret;
 664
 665         mutex_lock(&hd->lock);
 666
 667         if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
 668                 ret = -EPERM;
 669                 goto out;
 670         }
 671
 672         ret = hdmi5_audio_config(&hd->core, &hd->wp, dss_audio,
 673                                  hd->cfg.timings.pixelclock);
 674
 675         if (!ret) {
 676                 hd->audio_configured = true;
 677                 hd->audio_config = *dss_audio;
 678         }
 679 out:
 680         mutex_unlock(&hd->lock);
 681
 682         return ret;
 683 }
 684
 685 static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
 686         .audio_startup = hdmi_audio_startup,
 687         .audio_shutdown = hdmi_audio_shutdown,
 688         .audio_start = hdmi_audio_start,
 689         .audio_stop = hdmi_audio_stop,
 690         .audio_config = hdmi_audio_config,
 691 };
 692
 693 static int hdmi_audio_register(struct device *dev)
 694 {
 695         struct omap_hdmi_audio_pdata pdata = {
 696                 .dev = dev,
 697                 .dss_version = omapdss_get_version(),
 698                 .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
 699                 .ops = &hdmi_audio_ops,
 700         };
 701
 702         hdmi.audio_pdev = platform_device_register_data(
 703                 dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
 704                 &pdata, sizeof(pdata));
 705
 706         if (IS_ERR(hdmi.audio_pdev))
 707                 return PTR_ERR(hdmi.audio_pdev);
 708
 709         hdmi_runtime_get();
 710         hdmi.wp_idlemode =
 711                 REG_GET(hdmi.wp.base, HDMI_WP_SYSCONFIG, 3, 2);
 712         hdmi_runtime_put();
 713
 714         return 0;
 715 }
 716
 717 /* HDMI HW IP initialisation */
 718 static int hdmi5_bind(struct device *dev, struct device *master, void *data)
 719 {
 720         struct platform_device *pdev = to_platform_device(dev);
 721         int r;
 722         int irq;
 723
 724         hdmi.pdev = pdev;
 725         dev_set_drvdata(&pdev->dev, &hdmi);
 726
 727         mutex_init(&hdmi.lock);
 728         spin_lock_init(&hdmi.audio_playing_lock);
 729
 730         if (pdev->dev.of_node) {
 731                 r = hdmi_probe_of(pdev);
 732                 if (r)
 733                         return r;
 734         }
 735
 736         r = hdmi_wp_init(pdev, &hdmi.wp);
 737         if (r)
 738                 return r;
 739
 740         r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
 741         if (r)
 742                 return r;
 743
 744         r = hdmi_phy_init(pdev, &hdmi.phy);
 745         if (r)
 746                 goto err;
 747
 748         r = hdmi5_core_init(pdev, &hdmi.core);
 749         if (r)
 750                 goto err;
 751
 752         irq = platform_get_irq(pdev, 0);
 753         if (irq < 0) {
 754                 DSSERR("platform_get_irq failed\n");
 755                 r = -ENODEV;
 756                 goto err;
 757         }
 758
 759         r = devm_request_threaded_irq(&pdev->dev, irq,
 760                         NULL, hdmi_irq_handler,
 761                         IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
 762         if (r) {
 763                 DSSERR("HDMI IRQ request failed\n");
 764                 goto err;
 765         }
 766
 767         pm_runtime_enable(&pdev->dev);
 768
 769         hdmi_init_output(pdev);
 770
 771         r = hdmi_audio_register(&pdev->dev);
 772         if (r) {
 773                 DSSERR("Registering HDMI audio failed %d\n", r);
 774                 hdmi_uninit_output(pdev);
 775                 pm_runtime_disable(&pdev->dev);
 776                 return r;
 777         }
 778
 779         dss_debugfs_create_file("hdmi", hdmi_dump_regs);
 780
 781         return 0;
 782 err:
 783         hdmi_pll_uninit(&hdmi.pll);
 784         return r;
 785 }
 786
 787 static void hdmi5_unbind(struct device *dev, struct device *master, void *data)
 788 {
 789         struct platform_device *pdev = to_platform_device(dev);
 790
 791         if (hdmi.audio_pdev)
 792                 platform_device_unregister(hdmi.audio_pdev);
 793
 794         hdmi_uninit_output(pdev);
 795
 796         hdmi_pll_uninit(&hdmi.pll);
 797
 798         pm_runtime_disable(&pdev->dev);
 799 }
 800
 801 static const struct component_ops hdmi5_component_ops = {
 802         .bind   = hdmi5_bind,
 803         .unbind = hdmi5_unbind,
 804 };
 805
 806 static int hdmi5_probe(struct platform_device *pdev)
 807 {
 808         return component_add(&pdev->dev, &hdmi5_component_ops);
 809 }
 810
 811 static int hdmi5_remove(struct platform_device *pdev)
 812 {
 813         component_del(&pdev->dev, &hdmi5_component_ops);
 814         return 0;
 815 }
 816
 817 static int hdmi_runtime_suspend(struct device *dev)
 818 {
 819         dispc_runtime_put();
 820
 821         return 0;
 822 }
 823
 824 static int hdmi_runtime_resume(struct device *dev)
 825 {
 826         int r;
 827
 828         r = dispc_runtime_get();
 829         if (r < 0)
 830                 return r;
 831
 832         return 0;
 833 }
 834
 835 static const struct dev_pm_ops hdmi_pm_ops = {
 836         .runtime_suspend = hdmi_runtime_suspend,
 837         .runtime_resume = hdmi_runtime_resume,
 838 };
 839
 840 static const struct of_device_id hdmi_of_match[] = {
 841         { .compatible = "ti,omap5-hdmi", },
 842         { .compatible = "ti,dra7-hdmi", },
 843         {},
 844 };
 845
 846 static struct platform_driver omapdss_hdmihw_driver = {
 847         .probe          = hdmi5_probe,
 848         .remove         = hdmi5_remove,
 849         .driver         = {
 850                 .name   = "omapdss_hdmi5",
 851                 .pm     = &hdmi_pm_ops,
 852                 .of_match_table = hdmi_of_match,
 853                 .suppress_bind_attrs = true,
 854         },
 855 };
 856
 857 int __init hdmi5_init_platform_driver(void)
 858 {
 859         return platform_driver_register(&omapdss_hdmihw_driver);
 860 }
 861
 862 void hdmi5_uninit_platform_driver(void)
 863 {
 864         platform_driver_unregister(&omapdss_hdmihw_driver);
 865 }