2 * Copyright (C) 2006 Ben Skeggs.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 * Ben Skeggs <darktama@iinet.net.au>
34 #include <drm/nouveau_drm.h>
35 #include "nouveau_drv.h"
36 #include "nouveau_reg.h"
37 #include "nouveau_ramht.h"
38 #include "nouveau_util.h"
41 nouveau_irq_preinstall(struct drm_device *dev)
44 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
48 nouveau_irq_postinstall(struct drm_device *dev)
50 struct drm_nouveau_private *dev_priv = dev->dev_private;
53 nv_wr32(dev, NV03_PMC_INTR_EN_0, NV_PMC_INTR_EN_0_MASTER_ENABLE);
54 if (dev_priv->msi_enabled)
55 nv_wr08(dev, 0x00088068, 0xff);
61 nouveau_irq_uninstall(struct drm_device *dev)
64 nv_wr32(dev, NV03_PMC_INTR_EN_0, 0);
68 nouveau_irq_handler(DRM_IRQ_ARGS)
70 struct drm_device *dev = (struct drm_device *)arg;
71 struct drm_nouveau_private *dev_priv = dev->dev_private;
76 stat = nv_rd32(dev, NV03_PMC_INTR_0);
77 if (stat == 0 || stat == ~0)
80 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
81 for (i = 0; i < 32 && stat; i++) {
82 if (!(stat & (1 << i)) || !dev_priv->irq_handler[i])
85 dev_priv->irq_handler[i](dev);
89 if (dev_priv->msi_enabled)
90 nv_wr08(dev, 0x00088068, 0xff);
91 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
93 if (stat && nouveau_ratelimit())
94 NV_ERROR(dev, "PMC - unhandled INTR 0x%08x\n", stat);
99 nouveau_irq_init(struct drm_device *dev)
101 struct drm_nouveau_private *dev_priv = dev->dev_private;
104 if (nouveau_msi != 0 && dev_priv->card_type >= NV_50) {
105 ret = pci_enable_msi(dev->pdev);
107 NV_INFO(dev, "enabled MSI\n");
108 dev_priv->msi_enabled = true;
112 return drm_irq_install(dev);
116 nouveau_irq_fini(struct drm_device *dev)
118 struct drm_nouveau_private *dev_priv = dev->dev_private;
120 drm_irq_uninstall(dev);
121 if (dev_priv->msi_enabled)
122 pci_disable_msi(dev->pdev);
126 nouveau_irq_register(struct drm_device *dev, int status_bit,
127 void (*handler)(struct drm_device *))
129 struct drm_nouveau_private *dev_priv = dev->dev_private;
132 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
133 dev_priv->irq_handler[status_bit] = handler;
134 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);
138 nouveau_irq_unregister(struct drm_device *dev, int status_bit)
140 struct drm_nouveau_private *dev_priv = dev->dev_private;
143 spin_lock_irqsave(&dev_priv->context_switch_lock, flags);
144 dev_priv->irq_handler[status_bit] = NULL;
145 spin_unlock_irqrestore(&dev_priv->context_switch_lock, flags);