drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include "drmP.h"
  31
  32 #include "nouveau_drm.h"
  33 #include "nouveau_drv.h"
  34 #include "nouveau_dma.h"
  35 #include "nouveau_mm.h"
  36 #include "nouveau_vm.h"
  37
  38 #include <linux/log2.h>
  39 #include <linux/slab.h>
  40
  41 static void
  42 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
  43 {
  44         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
  45         struct drm_device *dev = dev_priv->dev;
  46         struct nouveau_bo *nvbo = nouveau_bo(bo);
  47
  48         if (unlikely(nvbo->gem))
  49                 DRM_ERROR("bo %p still attached to GEM object\n", bo);
  50
  51         nv10_mem_put_tile_region(dev, nvbo->tile, NULL);
  52         kfree(nvbo);
  53 }
  54
  55 static void
  56 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, u32 flags,
  57                        int *align, int *size)
  58 {
  59         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
  60
  61         if (dev_priv->card_type < NV_50) {
  62                 if (nvbo->tile_mode) {
  63                         if (dev_priv->chipset >= 0x40) {
  64                                 *align = 65536;
  65                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  66
  67                         } else if (dev_priv->chipset >= 0x30) {
  68                                 *align = 32768;
  69                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  70
  71                         } else if (dev_priv->chipset >= 0x20) {
  72                                 *align = 16384;
  73                                 *size = roundup(*size, 64 * nvbo->tile_mode);
  74
  75                         } else if (dev_priv->chipset >= 0x10) {
  76                                 *align = 16384;
  77                                 *size = roundup(*size, 32 * nvbo->tile_mode);
  78                         }
  79                 }
  80         } else {
  81                 *size = roundup(*size, (1 << nvbo->page_shift));
  82                 *align = max((1 <<  nvbo->page_shift), *align);
  83         }
  84
  85         *size = roundup(*size, PAGE_SIZE);
  86 }
  87
  88 int
  89 nouveau_bo_new(struct drm_device *dev, int size, int align,
  90                uint32_t flags, uint32_t tile_mode, uint32_t tile_flags,
  91                struct nouveau_bo **pnvbo)
  92 {
  93         struct drm_nouveau_private *dev_priv = dev->dev_private;
  94         struct nouveau_bo *nvbo;
  95         int ret;
  96
  97         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
  98         if (!nvbo)
  99                 return -ENOMEM;
 100         INIT_LIST_HEAD(&nvbo->head);
 101         INIT_LIST_HEAD(&nvbo->entry);
 102         INIT_LIST_HEAD(&nvbo->vma_list);
 103         nvbo->tile_mode = tile_mode;
 104         nvbo->tile_flags = tile_flags;
 105         nvbo->bo.bdev = &dev_priv->ttm.bdev;
 106
 107         nvbo->page_shift = 12;
 108         if (dev_priv->bar1_vm) {
 109                 if (!(flags & TTM_PL_FLAG_TT) && size > 256 * 1024)
 110                         nvbo->page_shift = dev_priv->bar1_vm->lpg_shift;
 111         }
 112
 113         nouveau_bo_fixup_align(nvbo, flags, &align, &size);
 114         nvbo->bo.mem.num_pages = size >> PAGE_SHIFT;
 115         nouveau_bo_placement_set(nvbo, flags, 0);
 116
 117         ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
 118                           ttm_bo_type_device, &nvbo->placement,
 119                           align >> PAGE_SHIFT, 0, false, NULL, size,
 120                           nouveau_bo_del_ttm);
 121         if (ret) {
 122                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 123                 return ret;
 124         }
 125
 126         *pnvbo = nvbo;
 127         return 0;
 128 }
 129
 130 static void
 131 set_placement_list(uint32_t *pl, unsigned *n, uint32_t type, uint32_t flags)
 132 {
 133         *n = 0;
 134
 135         if (type & TTM_PL_FLAG_VRAM)
 136                 pl[(*n)++] = TTM_PL_FLAG_VRAM | flags;
 137         if (type & TTM_PL_FLAG_TT)
 138                 pl[(*n)++] = TTM_PL_FLAG_TT | flags;
 139         if (type & TTM_PL_FLAG_SYSTEM)
 140                 pl[(*n)++] = TTM_PL_FLAG_SYSTEM | flags;
 141 }
 142
 143 static void
 144 set_placement_range(struct nouveau_bo *nvbo, uint32_t type)
 145 {
 146         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 147         int vram_pages = dev_priv->vram_size >> PAGE_SHIFT;
 148
 149         if (dev_priv->card_type == NV_10 &&
 150             nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) &&
 151             nvbo->bo.mem.num_pages < vram_pages / 2) {
 152                 /*
 153                  * Make sure that the color and depth buffers are handled
 154                  * by independent memory controller units. Up to a 9x
 155                  * speed up when alpha-blending and depth-test are enabled
 156                  * at the same time.
 157                  */
 158                 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_ZETA) {
 159                         nvbo->placement.fpfn = vram_pages / 2;
 160                         nvbo->placement.lpfn = ~0;
 161                 } else {
 162                         nvbo->placement.fpfn = 0;
 163                         nvbo->placement.lpfn = vram_pages / 2;
 164                 }
 165         }
 166 }
 167
 168 void
 169 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t type, uint32_t busy)
 170 {
 171         struct ttm_placement *pl = &nvbo->placement;
 172         uint32_t flags = TTM_PL_MASK_CACHING |
 173                 (nvbo->pin_refcnt ? TTM_PL_FLAG_NO_EVICT : 0);
 174
 175         pl->placement = nvbo->placements;
 176         set_placement_list(nvbo->placements, &pl->num_placement,
 177                            type, flags);
 178
 179         pl->busy_placement = nvbo->busy_placements;
 180         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 181                            type | busy, flags);
 182
 183         set_placement_range(nvbo, type);
 184 }
 185
 186 int
 187 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t memtype)
 188 {
 189         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 190         struct ttm_buffer_object *bo = &nvbo->bo;
 191         int ret;
 192
 193         if (nvbo->pin_refcnt && !(memtype & (1 << bo->mem.mem_type))) {
 194                 NV_ERROR(nouveau_bdev(bo->bdev)->dev,
 195                          "bo %p pinned elsewhere: 0x%08x vs 0x%08x\n", bo,
 196                          1 << bo->mem.mem_type, memtype);
 197                 return -EINVAL;
 198         }
 199
 200         if (nvbo->pin_refcnt++)
 201                 return 0;
 202
 203         ret = ttm_bo_reserve(bo, false, false, false, 0);
 204         if (ret)
 205                 goto out;
 206
 207         nouveau_bo_placement_set(nvbo, memtype, 0);
 208
 209         ret = nouveau_bo_validate(nvbo, false, false, false);
 210         if (ret == 0) {
 211                 switch (bo->mem.mem_type) {
 212                 case TTM_PL_VRAM:
 213                         dev_priv->fb_aper_free -= bo->mem.size;
 214                         break;
 215                 case TTM_PL_TT:
 216                         dev_priv->gart_info.aper_free -= bo->mem.size;
 217                         break;
 218                 default:
 219                         break;
 220                 }
 221         }
 222         ttm_bo_unreserve(bo);
 223 out:
 224         if (unlikely(ret))
 225                 nvbo->pin_refcnt--;
 226         return ret;
 227 }
 228
 229 int
 230 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 231 {
 232         struct drm_nouveau_private *dev_priv = nouveau_bdev(nvbo->bo.bdev);
 233         struct ttm_buffer_object *bo = &nvbo->bo;
 234         int ret;
 235
 236         if (--nvbo->pin_refcnt)
 237                 return 0;
 238
 239         ret = ttm_bo_reserve(bo, false, false, false, 0);
 240         if (ret)
 241                 return ret;
 242
 243         nouveau_bo_placement_set(nvbo, bo->mem.placement, 0);
 244
 245         ret = nouveau_bo_validate(nvbo, false, false, false);
 246         if (ret == 0) {
 247                 switch (bo->mem.mem_type) {
 248                 case TTM_PL_VRAM:
 249                         dev_priv->fb_aper_free += bo->mem.size;
 250                         break;
 251                 case TTM_PL_TT:
 252                         dev_priv->gart_info.aper_free += bo->mem.size;
 253                         break;
 254                 default:
 255                         break;
 256                 }
 257         }
 258
 259         ttm_bo_unreserve(bo);
 260         return ret;
 261 }
 262
 263 int
 264 nouveau_bo_map(struct nouveau_bo *nvbo)
 265 {
 266         int ret;
 267
 268         ret = ttm_bo_reserve(&nvbo->bo, false, false, false, 0);
 269         if (ret)
 270                 return ret;
 271
 272         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.mem.num_pages, &nvbo->kmap);
 273         ttm_bo_unreserve(&nvbo->bo);
 274         return ret;
 275 }
 276
 277 void
 278 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 279 {
 280         if (nvbo)
 281                 ttm_bo_kunmap(&nvbo->kmap);
 282 }
 283
 284 int
 285 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 286                     bool no_wait_reserve, bool no_wait_gpu)
 287 {
 288         int ret;
 289
 290         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, interruptible,
 291                               no_wait_reserve, no_wait_gpu);
 292         if (ret)
 293                 return ret;
 294
 295         return 0;
 296 }
 297
 298 u16
 299 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index)
 300 {
 301         bool is_iomem;
 302         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 303         mem = &mem[index];
 304         if (is_iomem)
 305                 return ioread16_native((void __force __iomem *)mem);
 306         else
 307                 return *mem;
 308 }
 309
 310 void
 311 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 312 {
 313         bool is_iomem;
 314         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 315         mem = &mem[index];
 316         if (is_iomem)
 317                 iowrite16_native(val, (void __force __iomem *)mem);
 318         else
 319                 *mem = val;
 320 }
 321
 322 u32
 323 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 324 {
 325         bool is_iomem;
 326         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 327         mem = &mem[index];
 328         if (is_iomem)
 329                 return ioread32_native((void __force __iomem *)mem);
 330         else
 331                 return *mem;
 332 }
 333
 334 void
 335 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 336 {
 337         bool is_iomem;
 338         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 339         mem = &mem[index];
 340         if (is_iomem)
 341                 iowrite32_native(val, (void __force __iomem *)mem);
 342         else
 343                 *mem = val;
 344 }
 345
 346 static struct ttm_tt *
 347 nouveau_ttm_tt_create(struct ttm_bo_device *bdev,
 348                       unsigned long size, uint32_t page_flags,
 349                       struct page *dummy_read_page)
 350 {
 351         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 352         struct drm_device *dev = dev_priv->dev;
 353
 354         switch (dev_priv->gart_info.type) {
 355 #if __OS_HAS_AGP
 356         case NOUVEAU_GART_AGP:
 357                 return ttm_agp_tt_create(bdev, dev->agp->bridge,
 358                                          size, page_flags, dummy_read_page);
 359 #endif
 360         case NOUVEAU_GART_PDMA:
 361         case NOUVEAU_GART_HW:
 362                 return nouveau_sgdma_create_ttm(bdev, size, page_flags,
 363                                                 dummy_read_page);
 364         default:
 365                 NV_ERROR(dev, "Unknown GART type %d\n",
 366                          dev_priv->gart_info.type);
 367                 break;
 368         }
 369
 370         return NULL;
 371 }
 372
 373 static int
 374 nouveau_bo_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 375 {
 376         /* We'll do this from user space. */
 377         return 0;
 378 }
 379
 380 static int
 381 nouveau_bo_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 382                          struct ttm_mem_type_manager *man)
 383 {
 384         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 385         struct drm_device *dev = dev_priv->dev;
 386
 387         switch (type) {
 388         case TTM_PL_SYSTEM:
 389                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 390                 man->available_caching = TTM_PL_MASK_CACHING;
 391                 man->default_caching = TTM_PL_FLAG_CACHED;
 392                 break;
 393         case TTM_PL_VRAM:
 394                 if (dev_priv->card_type >= NV_50) {
 395                         man->func = &nouveau_vram_manager;
 396                         man->io_reserve_fastpath = false;
 397                         man->use_io_reserve_lru = true;
 398                 } else {
 399                         man->func = &ttm_bo_manager_func;
 400                 }
 401                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 402                              TTM_MEMTYPE_FLAG_MAPPABLE;
 403                 man->available_caching = TTM_PL_FLAG_UNCACHED |
 404                                          TTM_PL_FLAG_WC;
 405                 man->default_caching = TTM_PL_FLAG_WC;
 406                 break;
 407         case TTM_PL_TT:
 408                 if (dev_priv->card_type >= NV_50)
 409                         man->func = &nouveau_gart_manager;
 410                 else
 411                         man->func = &ttm_bo_manager_func;
 412                 switch (dev_priv->gart_info.type) {
 413                 case NOUVEAU_GART_AGP:
 414                         man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 415                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 416                                 TTM_PL_FLAG_WC;
 417                         man->default_caching = TTM_PL_FLAG_WC;
 418                         break;
 419                 case NOUVEAU_GART_PDMA:
 420                 case NOUVEAU_GART_HW:
 421                         man->flags = TTM_MEMTYPE_FLAG_MAPPABLE |
 422                                      TTM_MEMTYPE_FLAG_CMA;
 423                         man->available_caching = TTM_PL_MASK_CACHING;
 424                         man->default_caching = TTM_PL_FLAG_CACHED;
 425                         break;
 426                 default:
 427                         NV_ERROR(dev, "Unknown GART type: %d\n",
 428                                  dev_priv->gart_info.type);
 429                         return -EINVAL;
 430                 }
 431                 break;
 432         default:
 433                 NV_ERROR(dev, "Unsupported memory type %u\n", (unsigned)type);
 434                 return -EINVAL;
 435         }
 436         return 0;
 437 }
 438
 439 static void
 440 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 441 {
 442         struct nouveau_bo *nvbo = nouveau_bo(bo);
 443
 444         switch (bo->mem.mem_type) {
 445         case TTM_PL_VRAM:
 446                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_TT,
 447                                          TTM_PL_FLAG_SYSTEM);
 448                 break;
 449         default:
 450                 nouveau_bo_placement_set(nvbo, TTM_PL_FLAG_SYSTEM, 0);
 451                 break;
 452         }
 453
 454         *pl = nvbo->placement;
 455 }
 456
 457
 458 /* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
 459  * TTM_PL_{VRAM,TT} directly.
 460  */
 461
 462 static int
 463 nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
 464                               struct nouveau_bo *nvbo, bool evict,
 465                               bool no_wait_reserve, bool no_wait_gpu,
 466                               struct ttm_mem_reg *new_mem)
 467 {
 468         struct nouveau_fence *fence = NULL;
 469         int ret;
 470
 471         ret = nouveau_fence_new(chan, &fence, true);
 472         if (ret)
 473                 return ret;
 474
 475         ret = ttm_bo_move_accel_cleanup(&nvbo->bo, fence, NULL, evict,
 476                                         no_wait_reserve, no_wait_gpu, new_mem);
 477         nouveau_fence_unref(&fence);
 478         return ret;
 479 }
 480
 481 static int
 482 nvc0_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 483                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 484 {
 485         struct nouveau_mem *node = old_mem->mm_node;
 486         u64 src_offset = node->vma[0].offset;
 487         u64 dst_offset = node->vma[1].offset;
 488         u32 page_count = new_mem->num_pages;
 489         int ret;
 490
 491         page_count = new_mem->num_pages;
 492         while (page_count) {
 493                 int line_count = (page_count > 2047) ? 2047 : page_count;
 494
 495                 ret = RING_SPACE(chan, 12);
 496                 if (ret)
 497                         return ret;
 498
 499                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0238, 2);
 500                 OUT_RING  (chan, upper_32_bits(dst_offset));
 501                 OUT_RING  (chan, lower_32_bits(dst_offset));
 502                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x030c, 6);
 503                 OUT_RING  (chan, upper_32_bits(src_offset));
 504                 OUT_RING  (chan, lower_32_bits(src_offset));
 505                 OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
 506                 OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
 507                 OUT_RING  (chan, PAGE_SIZE); /* line_length */
 508                 OUT_RING  (chan, line_count);
 509                 BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0300, 1);
 510                 OUT_RING  (chan, 0x00100110);
 511
 512                 page_count -= line_count;
 513                 src_offset += (PAGE_SIZE * line_count);
 514                 dst_offset += (PAGE_SIZE * line_count);
 515         }
 516
 517         return 0;
 518 }
 519
 520 static int
 521 nv50_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 522                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 523 {
 524         struct nouveau_mem *node = old_mem->mm_node;
 525         struct nouveau_bo *nvbo = nouveau_bo(bo);
 526         u64 length = (new_mem->num_pages << PAGE_SHIFT);
 527         u64 src_offset = node->vma[0].offset;
 528         u64 dst_offset = node->vma[1].offset;
 529         int ret;
 530
 531         while (length) {
 532                 u32 amount, stride, height;
 533
 534                 amount  = min(length, (u64)(4 * 1024 * 1024));
 535                 stride  = 16 * 4;
 536                 height  = amount / stride;
 537
 538                 if (new_mem->mem_type == TTM_PL_VRAM &&
 539                     nouveau_bo_tile_layout(nvbo)) {
 540                         ret = RING_SPACE(chan, 8);
 541                         if (ret)
 542                                 return ret;
 543
 544                         BEGIN_RING(chan, NvSubM2MF, 0x0200, 7);
 545                         OUT_RING  (chan, 0);
 546                         OUT_RING  (chan, 0);
 547                         OUT_RING  (chan, stride);
 548                         OUT_RING  (chan, height);
 549                         OUT_RING  (chan, 1);
 550                         OUT_RING  (chan, 0);
 551                         OUT_RING  (chan, 0);
 552                 } else {
 553                         ret = RING_SPACE(chan, 2);
 554                         if (ret)
 555                                 return ret;
 556
 557                         BEGIN_RING(chan, NvSubM2MF, 0x0200, 1);
 558                         OUT_RING  (chan, 1);
 559                 }
 560                 if (old_mem->mem_type == TTM_PL_VRAM &&
 561                     nouveau_bo_tile_layout(nvbo)) {
 562                         ret = RING_SPACE(chan, 8);
 563                         if (ret)
 564                                 return ret;
 565
 566                         BEGIN_RING(chan, NvSubM2MF, 0x021c, 7);
 567                         OUT_RING  (chan, 0);
 568                         OUT_RING  (chan, 0);
 569                         OUT_RING  (chan, stride);
 570                         OUT_RING  (chan, height);
 571                         OUT_RING  (chan, 1);
 572                         OUT_RING  (chan, 0);
 573                         OUT_RING  (chan, 0);
 574                 } else {
 575                         ret = RING_SPACE(chan, 2);
 576                         if (ret)
 577                                 return ret;
 578
 579                         BEGIN_RING(chan, NvSubM2MF, 0x021c, 1);
 580                         OUT_RING  (chan, 1);
 581                 }
 582
 583                 ret = RING_SPACE(chan, 14);
 584                 if (ret)
 585                         return ret;
 586
 587                 BEGIN_RING(chan, NvSubM2MF, 0x0238, 2);
 588                 OUT_RING  (chan, upper_32_bits(src_offset));
 589                 OUT_RING  (chan, upper_32_bits(dst_offset));
 590                 BEGIN_RING(chan, NvSubM2MF, 0x030c, 8);
 591                 OUT_RING  (chan, lower_32_bits(src_offset));
 592                 OUT_RING  (chan, lower_32_bits(dst_offset));
 593                 OUT_RING  (chan, stride);
 594                 OUT_RING  (chan, stride);
 595                 OUT_RING  (chan, stride);
 596                 OUT_RING  (chan, height);
 597                 OUT_RING  (chan, 0x00000101);
 598                 OUT_RING  (chan, 0x00000000);
 599                 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
 600                 OUT_RING  (chan, 0);
 601
 602                 length -= amount;
 603                 src_offset += amount;
 604                 dst_offset += amount;
 605         }
 606
 607         return 0;
 608 }
 609
 610 static inline uint32_t
 611 nouveau_bo_mem_ctxdma(struct ttm_buffer_object *bo,
 612                       struct nouveau_channel *chan, struct ttm_mem_reg *mem)
 613 {
 614         if (mem->mem_type == TTM_PL_TT)
 615                 return chan->gart_handle;
 616         return chan->vram_handle;
 617 }
 618
 619 static int
 620 nv04_bo_move_m2mf(struct nouveau_channel *chan, struct ttm_buffer_object *bo,
 621                   struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
 622 {
 623         u32 src_offset = old_mem->start << PAGE_SHIFT;
 624         u32 dst_offset = new_mem->start << PAGE_SHIFT;
 625         u32 page_count = new_mem->num_pages;
 626         int ret;
 627
 628         ret = RING_SPACE(chan, 3);
 629         if (ret)
 630                 return ret;
 631
 632         BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_SOURCE, 2);
 633         OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, old_mem));
 634         OUT_RING  (chan, nouveau_bo_mem_ctxdma(bo, chan, new_mem));
 635
 636         page_count = new_mem->num_pages;
 637         while (page_count) {
 638                 int line_count = (page_count > 2047) ? 2047 : page_count;
 639
 640                 ret = RING_SPACE(chan, 11);
 641                 if (ret)
 642                         return ret;
 643
 644                 BEGIN_RING(chan, NvSubM2MF,
 645                                  NV_MEMORY_TO_MEMORY_FORMAT_OFFSET_IN, 8);
 646                 OUT_RING  (chan, src_offset);
 647                 OUT_RING  (chan, dst_offset);
 648                 OUT_RING  (chan, PAGE_SIZE); /* src_pitch */
 649                 OUT_RING  (chan, PAGE_SIZE); /* dst_pitch */
 650                 OUT_RING  (chan, PAGE_SIZE); /* line_length */
 651                 OUT_RING  (chan, line_count);
 652                 OUT_RING  (chan, 0x00000101);
 653                 OUT_RING  (chan, 0x00000000);
 654                 BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_NOP, 1);
 655                 OUT_RING  (chan, 0);
 656
 657                 page_count -= line_count;
 658                 src_offset += (PAGE_SIZE * line_count);
 659                 dst_offset += (PAGE_SIZE * line_count);
 660         }
 661
 662         return 0;
 663 }
 664
 665 static int
 666 nouveau_vma_getmap(struct nouveau_channel *chan, struct nouveau_bo *nvbo,
 667                    struct ttm_mem_reg *mem, struct nouveau_vma *vma)
 668 {
 669         struct nouveau_mem *node = mem->mm_node;
 670         int ret;
 671
 672         ret = nouveau_vm_get(chan->vm, mem->num_pages << PAGE_SHIFT,
 673                              node->page_shift, NV_MEM_ACCESS_RO, vma);
 674         if (ret)
 675                 return ret;
 676
 677         if (mem->mem_type == TTM_PL_VRAM)
 678                 nouveau_vm_map(vma, node);
 679         else
 680                 nouveau_vm_map_sg(vma, 0, mem->num_pages << PAGE_SHIFT,
 681                                   node, node->pages);
 682
 683         return 0;
 684 }
 685
 686 static int
 687 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
 688                      bool no_wait_reserve, bool no_wait_gpu,
 689                      struct ttm_mem_reg *new_mem)
 690 {
 691         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 692         struct nouveau_bo *nvbo = nouveau_bo(bo);
 693         struct ttm_mem_reg *old_mem = &bo->mem;
 694         struct nouveau_channel *chan;
 695         int ret;
 696
 697         chan = nvbo->channel;
 698         if (!chan) {
 699                 chan = dev_priv->channel;
 700                 mutex_lock_nested(&chan->mutex, NOUVEAU_KCHANNEL_MUTEX);
 701         }
 702
 703         /* create temporary vmas for the transfer and attach them to the
 704          * old nouveau_mem node, these will get cleaned up after ttm has
 705          * destroyed the ttm_mem_reg
 706          */
 707         if (dev_priv->card_type >= NV_50) {
 708                 struct nouveau_mem *node = old_mem->mm_node;
 709
 710                 ret = nouveau_vma_getmap(chan, nvbo, old_mem, &node->vma[0]);
 711                 if (ret)
 712                         goto out;
 713
 714                 ret = nouveau_vma_getmap(chan, nvbo, new_mem, &node->vma[1]);
 715                 if (ret)
 716                         goto out;
 717         }
 718
 719         if (dev_priv->card_type < NV_50)
 720                 ret = nv04_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 721         else
 722         if (dev_priv->card_type < NV_C0)
 723                 ret = nv50_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 724         else
 725                 ret = nvc0_bo_move_m2mf(chan, bo, &bo->mem, new_mem);
 726         if (ret == 0) {
 727                 ret = nouveau_bo_move_accel_cleanup(chan, nvbo, evict,
 728                                                     no_wait_reserve,
 729                                                     no_wait_gpu, new_mem);
 730         }
 731
 732 out:
 733         if (chan == dev_priv->channel)
 734                 mutex_unlock(&chan->mutex);
 735         return ret;
 736 }
 737
 738 static int
 739 nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
 740                       bool no_wait_reserve, bool no_wait_gpu,
 741                       struct ttm_mem_reg *new_mem)
 742 {
 743         u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
 744         struct ttm_placement placement;
 745         struct ttm_mem_reg tmp_mem;
 746         int ret;
 747
 748         placement.fpfn = placement.lpfn = 0;
 749         placement.num_placement = placement.num_busy_placement = 1;
 750         placement.placement = placement.busy_placement = &placement_memtype;
 751
 752         tmp_mem = *new_mem;
 753         tmp_mem.mm_node = NULL;
 754         ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
 755         if (ret)
 756                 return ret;
 757
 758         ret = ttm_tt_bind(bo->ttm, &tmp_mem);
 759         if (ret)
 760                 goto out;
 761
 762         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, &tmp_mem);
 763         if (ret)
 764                 goto out;
 765
 766         ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
 767 out:
 768         ttm_bo_mem_put(bo, &tmp_mem);
 769         return ret;
 770 }
 771
 772 static int
 773 nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
 774                       bool no_wait_reserve, bool no_wait_gpu,
 775                       struct ttm_mem_reg *new_mem)
 776 {
 777         u32 placement_memtype = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
 778         struct ttm_placement placement;
 779         struct ttm_mem_reg tmp_mem;
 780         int ret;
 781
 782         placement.fpfn = placement.lpfn = 0;
 783         placement.num_placement = placement.num_busy_placement = 1;
 784         placement.placement = placement.busy_placement = &placement_memtype;
 785
 786         tmp_mem = *new_mem;
 787         tmp_mem.mm_node = NULL;
 788         ret = ttm_bo_mem_space(bo, &placement, &tmp_mem, intr, no_wait_reserve, no_wait_gpu);
 789         if (ret)
 790                 return ret;
 791
 792         ret = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
 793         if (ret)
 794                 goto out;
 795
 796         ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait_reserve, no_wait_gpu, new_mem);
 797         if (ret)
 798                 goto out;
 799
 800 out:
 801         ttm_bo_mem_put(bo, &tmp_mem);
 802         return ret;
 803 }
 804
 805 static void
 806 nouveau_bo_move_ntfy(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem)
 807 {
 808         struct nouveau_mem *node = new_mem->mm_node;
 809         struct nouveau_bo *nvbo = nouveau_bo(bo);
 810         struct nouveau_vma *vma;
 811
 812         list_for_each_entry(vma, &nvbo->vma_list, head) {
 813                 if (new_mem->mem_type == TTM_PL_VRAM) {
 814                         nouveau_vm_map(vma, new_mem->mm_node);
 815                 } else
 816                 if (new_mem->mem_type == TTM_PL_TT &&
 817                     nvbo->page_shift == vma->vm->spg_shift) {
 818                         nouveau_vm_map_sg(vma, 0, new_mem->
 819                                           num_pages << PAGE_SHIFT,
 820                                           node, node->pages);
 821                 } else {
 822                         nouveau_vm_unmap(vma);
 823                 }
 824         }
 825 }
 826
 827 static int
 828 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
 829                    struct nouveau_tile_reg **new_tile)
 830 {
 831         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 832         struct drm_device *dev = dev_priv->dev;
 833         struct nouveau_bo *nvbo = nouveau_bo(bo);
 834         u64 offset = new_mem->start << PAGE_SHIFT;
 835
 836         *new_tile = NULL;
 837         if (new_mem->mem_type != TTM_PL_VRAM)
 838                 return 0;
 839
 840         if (dev_priv->card_type >= NV_10) {
 841                 *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
 842                                                 nvbo->tile_mode,
 843                                                 nvbo->tile_flags);
 844         }
 845
 846         return 0;
 847 }
 848
 849 static void
 850 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
 851                       struct nouveau_tile_reg *new_tile,
 852                       struct nouveau_tile_reg **old_tile)
 853 {
 854         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 855         struct drm_device *dev = dev_priv->dev;
 856
 857         nv10_mem_put_tile_region(dev, *old_tile, bo->sync_obj);
 858         *old_tile = new_tile;
 859 }
 860
 861 static int
 862 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
 863                 bool no_wait_reserve, bool no_wait_gpu,
 864                 struct ttm_mem_reg *new_mem)
 865 {
 866         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
 867         struct nouveau_bo *nvbo = nouveau_bo(bo);
 868         struct ttm_mem_reg *old_mem = &bo->mem;
 869         struct nouveau_tile_reg *new_tile = NULL;
 870         int ret = 0;
 871
 872         if (dev_priv->card_type < NV_50) {
 873                 ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
 874                 if (ret)
 875                         return ret;
 876         }
 877
 878         /* Fake bo copy. */
 879         if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
 880                 BUG_ON(bo->mem.mm_node != NULL);
 881                 bo->mem = *new_mem;
 882                 new_mem->mm_node = NULL;
 883                 goto out;
 884         }
 885
 886         /* Software copy if the card isn't up and running yet. */
 887         if (!dev_priv->channel) {
 888                 ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 889                 goto out;
 890         }
 891
 892         /* Hardware assisted copy. */
 893         if (new_mem->mem_type == TTM_PL_SYSTEM)
 894                 ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 895         else if (old_mem->mem_type == TTM_PL_SYSTEM)
 896                 ret = nouveau_bo_move_flips(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 897         else
 898                 ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait_reserve, no_wait_gpu, new_mem);
 899
 900         if (!ret)
 901                 goto out;
 902
 903         /* Fallback to software copy. */
 904         ret = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 905
 906 out:
 907         if (dev_priv->card_type < NV_50) {
 908                 if (ret)
 909                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
 910                 else
 911                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
 912         }
 913
 914         return ret;
 915 }
 916
 917 static int
 918 nouveau_bo_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 919 {
 920         return 0;
 921 }
 922
 923 static int
 924 nouveau_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 925 {
 926         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 927         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 928         struct drm_device *dev = dev_priv->dev;
 929         int ret;
 930
 931         mem->bus.addr = NULL;
 932         mem->bus.offset = 0;
 933         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 934         mem->bus.base = 0;
 935         mem->bus.is_iomem = false;
 936         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 937                 return -EINVAL;
 938         switch (mem->mem_type) {
 939         case TTM_PL_SYSTEM:
 940                 /* System memory */
 941                 return 0;
 942         case TTM_PL_TT:
 943 #if __OS_HAS_AGP
 944                 if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
 945                         mem->bus.offset = mem->start << PAGE_SHIFT;
 946                         mem->bus.base = dev_priv->gart_info.aper_base;
 947                         mem->bus.is_iomem = true;
 948                 }
 949 #endif
 950                 break;
 951         case TTM_PL_VRAM:
 952         {
 953                 struct nouveau_mem *node = mem->mm_node;
 954                 u8 page_shift;
 955
 956                 if (!dev_priv->bar1_vm) {
 957                         mem->bus.offset = mem->start << PAGE_SHIFT;
 958                         mem->bus.base = pci_resource_start(dev->pdev, 1);
 959                         mem->bus.is_iomem = true;
 960                         break;
 961                 }
 962
 963                 if (dev_priv->card_type >= NV_C0)
 964                         page_shift = node->page_shift;
 965                 else
 966                         page_shift = 12;
 967
 968                 ret = nouveau_vm_get(dev_priv->bar1_vm, mem->bus.size,
 969                                      page_shift, NV_MEM_ACCESS_RW,
 970                                      &node->bar_vma);
 971                 if (ret)
 972                         return ret;
 973
 974                 nouveau_vm_map(&node->bar_vma, node);
 975                 if (ret) {
 976                         nouveau_vm_put(&node->bar_vma);
 977                         return ret;
 978                 }
 979
 980                 mem->bus.offset = node->bar_vma.offset;
 981                 if (dev_priv->card_type == NV_50) /*XXX*/
 982                         mem->bus.offset -= 0x0020000000ULL;
 983                 mem->bus.base = pci_resource_start(dev->pdev, 1);
 984                 mem->bus.is_iomem = true;
 985         }
 986                 break;
 987         default:
 988                 return -EINVAL;
 989         }
 990         return 0;
 991 }
 992
 993 static void
 994 nouveau_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 995 {
 996         struct drm_nouveau_private *dev_priv = nouveau_bdev(bdev);
 997         struct nouveau_mem *node = mem->mm_node;
 998
 999         if (!dev_priv->bar1_vm || mem->mem_type != TTM_PL_VRAM)
1000                 return;
1001
1002         if (!node->bar_vma.node)
1003                 return;
1004
1005         nouveau_vm_unmap(&node->bar_vma);
1006         nouveau_vm_put(&node->bar_vma);
1007 }
1008
1009 static int
1010 nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1011 {
1012         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
1013         struct nouveau_bo *nvbo = nouveau_bo(bo);
1014
1015         /* as long as the bo isn't in vram, and isn't tiled, we've got
1016          * nothing to do here.
1017          */
1018         if (bo->mem.mem_type != TTM_PL_VRAM) {
1019                 if (dev_priv->card_type < NV_50 ||
1020                     !nouveau_bo_tile_layout(nvbo))
1021                         return 0;
1022         }
1023
1024         /* make sure bo is in mappable vram */
1025         if (bo->mem.start + bo->mem.num_pages < dev_priv->fb_mappable_pages)
1026                 return 0;
1027
1028
1029         nvbo->placement.fpfn = 0;
1030         nvbo->placement.lpfn = dev_priv->fb_mappable_pages;
1031         nouveau_bo_placement_set(nvbo, TTM_PL_VRAM, 0);
1032         return nouveau_bo_validate(nvbo, false, true, false);
1033 }
1034
1035 void
1036 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence)
1037 {
1038         struct nouveau_fence *old_fence;
1039
1040         if (likely(fence))
1041                 nouveau_fence_ref(fence);
1042
1043         spin_lock(&nvbo->bo.bdev->fence_lock);
1044         old_fence = nvbo->bo.sync_obj;
1045         nvbo->bo.sync_obj = fence;
1046         spin_unlock(&nvbo->bo.bdev->fence_lock);
1047
1048         nouveau_fence_unref(&old_fence);
1049 }
1050
1051 struct ttm_bo_driver nouveau_bo_driver = {
1052         .ttm_tt_create = &nouveau_ttm_tt_create,
1053         .invalidate_caches = nouveau_bo_invalidate_caches,
1054         .init_mem_type = nouveau_bo_init_mem_type,
1055         .evict_flags = nouveau_bo_evict_flags,
1056         .move_notify = nouveau_bo_move_ntfy,
1057         .move = nouveau_bo_move,
1058         .verify_access = nouveau_bo_verify_access,
1059         .sync_obj_signaled = __nouveau_fence_signalled,
1060         .sync_obj_wait = __nouveau_fence_wait,
1061         .sync_obj_flush = __nouveau_fence_flush,
1062         .sync_obj_unref = __nouveau_fence_unref,
1063         .sync_obj_ref = __nouveau_fence_ref,
1064         .fault_reserve_notify = &nouveau_ttm_fault_reserve_notify,
1065         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1066         .io_mem_free = &nouveau_ttm_io_mem_free,
1067 };
1068
1069 struct nouveau_vma *
1070 nouveau_bo_vma_find(struct nouveau_bo *nvbo, struct nouveau_vm *vm)
1071 {
1072         struct nouveau_vma *vma;
1073         list_for_each_entry(vma, &nvbo->vma_list, head) {
1074                 if (vma->vm == vm)
1075                         return vma;
1076         }
1077
1078         return NULL;
1079 }
1080
1081 int
1082 nouveau_bo_vma_add(struct nouveau_bo *nvbo, struct nouveau_vm *vm,
1083                    struct nouveau_vma *vma)
1084 {
1085         const u32 size = nvbo->bo.mem.num_pages << PAGE_SHIFT;
1086         struct nouveau_mem *node = nvbo->bo.mem.mm_node;
1087         int ret;
1088
1089         ret = nouveau_vm_get(vm, size, nvbo->page_shift,
1090                              NV_MEM_ACCESS_RW, vma);
1091         if (ret)
1092                 return ret;
1093
1094         if (nvbo->bo.mem.mem_type == TTM_PL_VRAM)
1095                 nouveau_vm_map(vma, nvbo->bo.mem.mm_node);
1096         else
1097         if (nvbo->bo.mem.mem_type == TTM_PL_TT)
1098                 nouveau_vm_map_sg(vma, 0, size, node, node->pages);
1099
1100         list_add_tail(&vma->head, &nvbo->vma_list);
1101         vma->refcount = 1;
1102         return 0;
1103 }
1104
1105 void
1106 nouveau_bo_vma_del(struct nouveau_bo *nvbo, struct nouveau_vma *vma)
1107 {
1108         if (vma->node) {
1109                 if (nvbo->bo.mem.mem_type != TTM_PL_SYSTEM) {
1110                         spin_lock(&nvbo->bo.bdev->fence_lock);
1111                         ttm_bo_wait(&nvbo->bo, false, false, false);
1112                         spin_unlock(&nvbo->bo.bdev->fence_lock);
1113                         nouveau_vm_unmap(vma);
1114                 }
1115
1116                 nouveau_vm_put(vma);
1117                 list_del(&vma->head);
1118         }
1119 }