drivers/gpu/drm/nouveau/nouveau_bo.c

   1 /*
   2  * Copyright 2007 Dave Airlied
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  */
  24 /*
  25  * Authors: Dave Airlied <airlied@linux.ie>
  26  *          Ben Skeggs   <darktama@iinet.net.au>
  27  *          Jeremy Kolb  <jkolb@brandeis.edu>
  28  */
  29
  30 #include <linux/dma-mapping.h>
  31
  32 #include "nouveau_drv.h"
  33 #include "nouveau_chan.h"
  34 #include "nouveau_fence.h"
  35
  36 #include "nouveau_bo.h"
  37 #include "nouveau_ttm.h"
  38 #include "nouveau_gem.h"
  39 #include "nouveau_mem.h"
  40 #include "nouveau_vmm.h"
  41
  42 #include <nvif/class.h>
  43 #include <nvif/if500b.h>
  44 #include <nvif/if900b.h>
  45
  46 static int nouveau_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
  47                                struct ttm_resource *reg);
  48 static void nouveau_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm);
  49
  50 /*
  51  * NV10-NV40 tiling helpers
  52  */
  53
  54 static void
  55 nv10_bo_update_tile_region(struct drm_device *dev, struct nouveau_drm_tile *reg,
  56                            u32 addr, u32 size, u32 pitch, u32 flags)
  57 {
  58         struct nouveau_drm *drm = nouveau_drm(dev);
  59         int i = reg - drm->tile.reg;
  60         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
  61         struct nvkm_fb_tile *tile = &fb->tile.region[i];
  62
  63         nouveau_fence_unref(&reg->fence);
  64
  65         if (tile->pitch)
  66                 nvkm_fb_tile_fini(fb, i, tile);
  67
  68         if (pitch)
  69                 nvkm_fb_tile_init(fb, i, addr, size, pitch, flags, tile);
  70
  71         nvkm_fb_tile_prog(fb, i, tile);
  72 }
  73
  74 static struct nouveau_drm_tile *
  75 nv10_bo_get_tile_region(struct drm_device *dev, int i)
  76 {
  77         struct nouveau_drm *drm = nouveau_drm(dev);
  78         struct nouveau_drm_tile *tile = &drm->tile.reg[i];
  79
  80         spin_lock(&drm->tile.lock);
  81
  82         if (!tile->used &&
  83             (!tile->fence || nouveau_fence_done(tile->fence)))
  84                 tile->used = true;
  85         else
  86                 tile = NULL;
  87
  88         spin_unlock(&drm->tile.lock);
  89         return tile;
  90 }
  91
  92 static void
  93 nv10_bo_put_tile_region(struct drm_device *dev, struct nouveau_drm_tile *tile,
  94                         struct dma_fence *fence)
  95 {
  96         struct nouveau_drm *drm = nouveau_drm(dev);
  97
  98         if (tile) {
  99                 spin_lock(&drm->tile.lock);
 100                 tile->fence = (struct nouveau_fence *)dma_fence_get(fence);
 101                 tile->used = false;
 102                 spin_unlock(&drm->tile.lock);
 103         }
 104 }
 105
 106 static struct nouveau_drm_tile *
 107 nv10_bo_set_tiling(struct drm_device *dev, u32 addr,
 108                    u32 size, u32 pitch, u32 zeta)
 109 {
 110         struct nouveau_drm *drm = nouveau_drm(dev);
 111         struct nvkm_fb *fb = nvxx_fb(&drm->client.device);
 112         struct nouveau_drm_tile *tile, *found = NULL;
 113         int i;
 114
 115         for (i = 0; i < fb->tile.regions; i++) {
 116                 tile = nv10_bo_get_tile_region(dev, i);
 117
 118                 if (pitch && !found) {
 119                         found = tile;
 120                         continue;
 121
 122                 } else if (tile && fb->tile.region[i].pitch) {
 123                         /* Kill an unused tile region. */
 124                         nv10_bo_update_tile_region(dev, tile, 0, 0, 0, 0);
 125                 }
 126
 127                 nv10_bo_put_tile_region(dev, tile, NULL);
 128         }
 129
 130         if (found)
 131                 nv10_bo_update_tile_region(dev, found, addr, size, pitch, zeta);
 132         return found;
 133 }
 134
 135 static void
 136 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 137 {
 138         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 139         struct drm_device *dev = drm->dev;
 140         struct nouveau_bo *nvbo = nouveau_bo(bo);
 141
 142         WARN_ON(nvbo->bo.pin_count > 0);
 143         nouveau_bo_del_io_reserve_lru(bo);
 144         nv10_bo_put_tile_region(dev, nvbo->tile, NULL);
 145
 146         /*
 147          * If nouveau_bo_new() allocated this buffer, the GEM object was never
 148          * initialized, so don't attempt to release it.
 149          */
 150         if (bo->base.dev)
 151                 drm_gem_object_release(&bo->base);
 152         else
 153                 dma_resv_fini(&bo->base._resv);
 154
 155         kfree(nvbo);
 156 }
 157
 158 static inline u64
 159 roundup_64(u64 x, u32 y)
 160 {
 161         x += y - 1;
 162         do_div(x, y);
 163         return x * y;
 164 }
 165
 166 static void
 167 nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *align, u64 *size)
 168 {
 169         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 170         struct nvif_device *device = &drm->client.device;
 171
 172         if (device->info.family < NV_DEVICE_INFO_V0_TESLA) {
 173                 if (nvbo->mode) {
 174                         if (device->info.chipset >= 0x40) {
 175                                 *align = 65536;
 176                                 *size = roundup_64(*size, 64 * nvbo->mode);
 177
 178                         } else if (device->info.chipset >= 0x30) {
 179                                 *align = 32768;
 180                                 *size = roundup_64(*size, 64 * nvbo->mode);
 181
 182                         } else if (device->info.chipset >= 0x20) {
 183                                 *align = 16384;
 184                                 *size = roundup_64(*size, 64 * nvbo->mode);
 185
 186                         } else if (device->info.chipset >= 0x10) {
 187                                 *align = 16384;
 188                                 *size = roundup_64(*size, 32 * nvbo->mode);
 189                         }
 190                 }
 191         } else {
 192                 *size = roundup_64(*size, (1 << nvbo->page));
 193                 *align = max((1 <<  nvbo->page), *align);
 194         }
 195
 196         *size = roundup_64(*size, PAGE_SIZE);
 197 }
 198
 199 struct nouveau_bo *
 200 nouveau_bo_alloc(struct nouveau_cli *cli, u64 *size, int *align, u32 domain,
 201                  u32 tile_mode, u32 tile_flags)
 202 {
 203         struct nouveau_drm *drm = cli->drm;
 204         struct nouveau_bo *nvbo;
 205         struct nvif_mmu *mmu = &cli->mmu;
 206         struct nvif_vmm *vmm = cli->svm.cli ? &cli->svm.vmm : &cli->vmm.vmm;
 207         int i, pi = -1;
 208
 209         if (!*size) {
 210                 NV_WARN(drm, "skipped size %016llx\n", *size);
 211                 return ERR_PTR(-EINVAL);
 212         }
 213
 214         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
 215         if (!nvbo)
 216                 return ERR_PTR(-ENOMEM);
 217         INIT_LIST_HEAD(&nvbo->head);
 218         INIT_LIST_HEAD(&nvbo->entry);
 219         INIT_LIST_HEAD(&nvbo->vma_list);
 220         nvbo->bo.bdev = &drm->ttm.bdev;
 221
 222         /* This is confusing, and doesn't actually mean we want an uncached
 223          * mapping, but is what NOUVEAU_GEM_DOMAIN_COHERENT gets translated
 224          * into in nouveau_gem_new().
 225          */
 226         if (domain & NOUVEAU_GEM_DOMAIN_COHERENT) {
 227                 /* Determine if we can get a cache-coherent map, forcing
 228                  * uncached mapping if we can't.
 229                  */
 230                 if (!nouveau_drm_use_coherent_gpu_mapping(drm))
 231                         nvbo->force_coherent = true;
 232         }
 233
 234         if (cli->device.info.family >= NV_DEVICE_INFO_V0_FERMI) {
 235                 nvbo->kind = (tile_flags & 0x0000ff00) >> 8;
 236                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 237                         kfree(nvbo);
 238                         return ERR_PTR(-EINVAL);
 239                 }
 240
 241                 nvbo->comp = mmu->kind[nvbo->kind] != nvbo->kind;
 242         } else
 243         if (cli->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 244                 nvbo->kind = (tile_flags & 0x00007f00) >> 8;
 245                 nvbo->comp = (tile_flags & 0x00030000) >> 16;
 246                 if (!nvif_mmu_kind_valid(mmu, nvbo->kind)) {
 247                         kfree(nvbo);
 248                         return ERR_PTR(-EINVAL);
 249                 }
 250         } else {
 251                 nvbo->zeta = (tile_flags & 0x00000007);
 252         }
 253         nvbo->mode = tile_mode;
 254         nvbo->contig = !(tile_flags & NOUVEAU_GEM_TILE_NONCONTIG);
 255
 256         /* Determine the desirable target GPU page size for the buffer. */
 257         for (i = 0; i < vmm->page_nr; i++) {
 258                 /* Because we cannot currently allow VMM maps to fail
 259                  * during buffer migration, we need to determine page
 260                  * size for the buffer up-front, and pre-allocate its
 261                  * page tables.
 262                  *
 263                  * Skip page sizes that can't support needed domains.
 264                  */
 265                 if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
 266                     (domain & NOUVEAU_GEM_DOMAIN_VRAM) && !vmm->page[i].vram)
 267                         continue;
 268                 if ((domain & NOUVEAU_GEM_DOMAIN_GART) &&
 269                     (!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
 270                         continue;
 271
 272                 /* Select this page size if it's the first that supports
 273                  * the potential memory domains, or when it's compatible
 274                  * with the requested compression settings.
 275                  */
 276                 if (pi < 0 || !nvbo->comp || vmm->page[i].comp)
 277                         pi = i;
 278
 279                 /* Stop once the buffer is larger than the current page size. */
 280                 if (*size >= 1ULL << vmm->page[i].shift)
 281                         break;
 282         }
 283
 284         if (WARN_ON(pi < 0)) {
 285                 kfree(nvbo);
 286                 return ERR_PTR(-EINVAL);
 287         }
 288
 289         /* Disable compression if suitable settings couldn't be found. */
 290         if (nvbo->comp && !vmm->page[pi].comp) {
 291                 if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
 292                         nvbo->kind = mmu->kind[nvbo->kind];
 293                 nvbo->comp = 0;
 294         }
 295         nvbo->page = vmm->page[pi].shift;
 296
 297         nouveau_bo_fixup_align(nvbo, align, size);
 298
 299         return nvbo;
 300 }
 301
 302 int
 303 nouveau_bo_init(struct nouveau_bo *nvbo, u64 size, int align, u32 domain,
 304                 struct sg_table *sg, struct dma_resv *robj)
 305 {
 306         int type = sg ? ttm_bo_type_sg : ttm_bo_type_device;
 307         int ret;
 308
 309         nouveau_bo_placement_set(nvbo, domain, 0);
 310         INIT_LIST_HEAD(&nvbo->io_reserve_lru);
 311
 312         ret = ttm_bo_init_validate(nvbo->bo.bdev, &nvbo->bo, type,
 313                                    &nvbo->placement, align >> PAGE_SHIFT, false,
 314                                    sg, robj, nouveau_bo_del_ttm);
 315         if (ret) {
 316                 /* ttm will call nouveau_bo_del_ttm if it fails.. */
 317                 return ret;
 318         }
 319
 320         return 0;
 321 }
 322
 323 int
 324 nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
 325                uint32_t domain, uint32_t tile_mode, uint32_t tile_flags,
 326                struct sg_table *sg, struct dma_resv *robj,
 327                struct nouveau_bo **pnvbo)
 328 {
 329         struct nouveau_bo *nvbo;
 330         int ret;
 331
 332         nvbo = nouveau_bo_alloc(cli, &size, &align, domain, tile_mode,
 333                                 tile_flags);
 334         if (IS_ERR(nvbo))
 335                 return PTR_ERR(nvbo);
 336
 337         nvbo->bo.base.size = size;
 338         dma_resv_init(&nvbo->bo.base._resv);
 339         drm_vma_node_reset(&nvbo->bo.base.vma_node);
 340
 341         ret = nouveau_bo_init(nvbo, size, align, domain, sg, robj);
 342         if (ret)
 343                 return ret;
 344
 345         *pnvbo = nvbo;
 346         return 0;
 347 }
 348
 349 static void
 350 set_placement_list(struct ttm_place *pl, unsigned *n, uint32_t domain)
 351 {
 352         *n = 0;
 353
 354         if (domain & NOUVEAU_GEM_DOMAIN_VRAM) {
 355                 pl[*n].mem_type = TTM_PL_VRAM;
 356                 pl[*n].flags = 0;
 357                 (*n)++;
 358         }
 359         if (domain & NOUVEAU_GEM_DOMAIN_GART) {
 360                 pl[*n].mem_type = TTM_PL_TT;
 361                 pl[*n].flags = 0;
 362                 (*n)++;
 363         }
 364         if (domain & NOUVEAU_GEM_DOMAIN_CPU) {
 365                 pl[*n].mem_type = TTM_PL_SYSTEM;
 366                 pl[(*n)++].flags = 0;
 367         }
 368 }
 369
 370 static void
 371 set_placement_range(struct nouveau_bo *nvbo, uint32_t domain)
 372 {
 373         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 374         u64 vram_size = drm->client.device.info.ram_size;
 375         unsigned i, fpfn, lpfn;
 376
 377         if (drm->client.device.info.family == NV_DEVICE_INFO_V0_CELSIUS &&
 378             nvbo->mode && (domain & NOUVEAU_GEM_DOMAIN_VRAM) &&
 379             nvbo->bo.base.size < vram_size / 4) {
 380                 /*
 381                  * Make sure that the color and depth buffers are handled
 382                  * by independent memory controller units. Up to a 9x
 383                  * speed up when alpha-blending and depth-test are enabled
 384                  * at the same time.
 385                  */
 386                 if (nvbo->zeta) {
 387                         fpfn = (vram_size / 2) >> PAGE_SHIFT;
 388                         lpfn = ~0;
 389                 } else {
 390                         fpfn = 0;
 391                         lpfn = (vram_size / 2) >> PAGE_SHIFT;
 392                 }
 393                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
 394                         nvbo->placements[i].fpfn = fpfn;
 395                         nvbo->placements[i].lpfn = lpfn;
 396                 }
 397                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
 398                         nvbo->busy_placements[i].fpfn = fpfn;
 399                         nvbo->busy_placements[i].lpfn = lpfn;
 400                 }
 401         }
 402 }
 403
 404 void
 405 nouveau_bo_placement_set(struct nouveau_bo *nvbo, uint32_t domain,
 406                          uint32_t busy)
 407 {
 408         struct ttm_placement *pl = &nvbo->placement;
 409
 410         pl->placement = nvbo->placements;
 411         set_placement_list(nvbo->placements, &pl->num_placement, domain);
 412
 413         pl->busy_placement = nvbo->busy_placements;
 414         set_placement_list(nvbo->busy_placements, &pl->num_busy_placement,
 415                            domain | busy);
 416
 417         set_placement_range(nvbo, domain);
 418 }
 419
 420 int
 421 nouveau_bo_pin(struct nouveau_bo *nvbo, uint32_t domain, bool contig)
 422 {
 423         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 424         struct ttm_buffer_object *bo = &nvbo->bo;
 425         bool force = false, evict = false;
 426         int ret;
 427
 428         ret = ttm_bo_reserve(bo, false, false, NULL);
 429         if (ret)
 430                 return ret;
 431
 432         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
 433             domain == NOUVEAU_GEM_DOMAIN_VRAM && contig) {
 434                 if (!nvbo->contig) {
 435                         nvbo->contig = true;
 436                         force = true;
 437                         evict = true;
 438                 }
 439         }
 440
 441         if (nvbo->bo.pin_count) {
 442                 bool error = evict;
 443
 444                 switch (bo->resource->mem_type) {
 445                 case TTM_PL_VRAM:
 446                         error |= !(domain & NOUVEAU_GEM_DOMAIN_VRAM);
 447                         break;
 448                 case TTM_PL_TT:
 449                         error |= !(domain & NOUVEAU_GEM_DOMAIN_GART);
 450                         break;
 451                 default:
 452                         break;
 453                 }
 454
 455                 if (error) {
 456                         NV_ERROR(drm, "bo %p pinned elsewhere: "
 457                                       "0x%08x vs 0x%08x\n", bo,
 458                                  bo->resource->mem_type, domain);
 459                         ret = -EBUSY;
 460                 }
 461                 ttm_bo_pin(&nvbo->bo);
 462                 goto out;
 463         }
 464
 465         if (evict) {
 466                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
 467                 ret = nouveau_bo_validate(nvbo, false, false);
 468                 if (ret)
 469                         goto out;
 470         }
 471
 472         nouveau_bo_placement_set(nvbo, domain, 0);
 473         ret = nouveau_bo_validate(nvbo, false, false);
 474         if (ret)
 475                 goto out;
 476
 477         ttm_bo_pin(&nvbo->bo);
 478
 479         switch (bo->resource->mem_type) {
 480         case TTM_PL_VRAM:
 481                 drm->gem.vram_available -= bo->base.size;
 482                 break;
 483         case TTM_PL_TT:
 484                 drm->gem.gart_available -= bo->base.size;
 485                 break;
 486         default:
 487                 break;
 488         }
 489
 490 out:
 491         if (force && ret)
 492                 nvbo->contig = false;
 493         ttm_bo_unreserve(bo);
 494         return ret;
 495 }
 496
 497 int
 498 nouveau_bo_unpin(struct nouveau_bo *nvbo)
 499 {
 500         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 501         struct ttm_buffer_object *bo = &nvbo->bo;
 502         int ret;
 503
 504         ret = ttm_bo_reserve(bo, false, false, NULL);
 505         if (ret)
 506                 return ret;
 507
 508         ttm_bo_unpin(&nvbo->bo);
 509         if (!nvbo->bo.pin_count) {
 510                 switch (bo->resource->mem_type) {
 511                 case TTM_PL_VRAM:
 512                         drm->gem.vram_available += bo->base.size;
 513                         break;
 514                 case TTM_PL_TT:
 515                         drm->gem.gart_available += bo->base.size;
 516                         break;
 517                 default:
 518                         break;
 519                 }
 520         }
 521
 522         ttm_bo_unreserve(bo);
 523         return 0;
 524 }
 525
 526 int
 527 nouveau_bo_map(struct nouveau_bo *nvbo)
 528 {
 529         int ret;
 530
 531         ret = ttm_bo_reserve(&nvbo->bo, false, false, NULL);
 532         if (ret)
 533                 return ret;
 534
 535         ret = ttm_bo_kmap(&nvbo->bo, 0, nvbo->bo.resource->num_pages, &nvbo->kmap);
 536
 537         ttm_bo_unreserve(&nvbo->bo);
 538         return ret;
 539 }
 540
 541 void
 542 nouveau_bo_unmap(struct nouveau_bo *nvbo)
 543 {
 544         if (!nvbo)
 545                 return;
 546
 547         ttm_bo_kunmap(&nvbo->kmap);
 548 }
 549
 550 void
 551 nouveau_bo_sync_for_device(struct nouveau_bo *nvbo)
 552 {
 553         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 554         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 555         int i, j;
 556
 557         if (!ttm_dma || !ttm_dma->dma_address)
 558                 return;
 559         if (!ttm_dma->pages) {
 560                 NV_DEBUG(drm, "ttm_dma 0x%p: pages NULL\n", ttm_dma);
 561                 return;
 562         }
 563
 564         /* Don't waste time looping if the object is coherent */
 565         if (nvbo->force_coherent)
 566                 return;
 567
 568         i = 0;
 569         while (i < ttm_dma->num_pages) {
 570                 struct page *p = ttm_dma->pages[i];
 571                 size_t num_pages = 1;
 572
 573                 for (j = i + 1; j < ttm_dma->num_pages; ++j) {
 574                         if (++p != ttm_dma->pages[j])
 575                                 break;
 576
 577                         ++num_pages;
 578                 }
 579                 dma_sync_single_for_device(drm->dev->dev,
 580                                            ttm_dma->dma_address[i],
 581                                            num_pages * PAGE_SIZE, DMA_TO_DEVICE);
 582                 i += num_pages;
 583         }
 584 }
 585
 586 void
 587 nouveau_bo_sync_for_cpu(struct nouveau_bo *nvbo)
 588 {
 589         struct nouveau_drm *drm = nouveau_bdev(nvbo->bo.bdev);
 590         struct ttm_tt *ttm_dma = (struct ttm_tt *)nvbo->bo.ttm;
 591         int i, j;
 592
 593         if (!ttm_dma || !ttm_dma->dma_address)
 594                 return;
 595         if (!ttm_dma->pages) {
 596                 NV_DEBUG(drm, "ttm_dma 0x%p: pages NULL\n", ttm_dma);
 597                 return;
 598         }
 599
 600         /* Don't waste time looping if the object is coherent */
 601         if (nvbo->force_coherent)
 602                 return;
 603
 604         i = 0;
 605         while (i < ttm_dma->num_pages) {
 606                 struct page *p = ttm_dma->pages[i];
 607                 size_t num_pages = 1;
 608
 609                 for (j = i + 1; j < ttm_dma->num_pages; ++j) {
 610                         if (++p != ttm_dma->pages[j])
 611                                 break;
 612
 613                         ++num_pages;
 614                 }
 615
 616                 dma_sync_single_for_cpu(drm->dev->dev, ttm_dma->dma_address[i],
 617                                         num_pages * PAGE_SIZE, DMA_FROM_DEVICE);
 618                 i += num_pages;
 619         }
 620 }
 621
 622 void nouveau_bo_add_io_reserve_lru(struct ttm_buffer_object *bo)
 623 {
 624         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 625         struct nouveau_bo *nvbo = nouveau_bo(bo);
 626
 627         mutex_lock(&drm->ttm.io_reserve_mutex);
 628         list_move_tail(&nvbo->io_reserve_lru, &drm->ttm.io_reserve_lru);
 629         mutex_unlock(&drm->ttm.io_reserve_mutex);
 630 }
 631
 632 void nouveau_bo_del_io_reserve_lru(struct ttm_buffer_object *bo)
 633 {
 634         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 635         struct nouveau_bo *nvbo = nouveau_bo(bo);
 636
 637         mutex_lock(&drm->ttm.io_reserve_mutex);
 638         list_del_init(&nvbo->io_reserve_lru);
 639         mutex_unlock(&drm->ttm.io_reserve_mutex);
 640 }
 641
 642 int
 643 nouveau_bo_validate(struct nouveau_bo *nvbo, bool interruptible,
 644                     bool no_wait_gpu)
 645 {
 646         struct ttm_operation_ctx ctx = { interruptible, no_wait_gpu };
 647         int ret;
 648
 649         ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, &ctx);
 650         if (ret)
 651                 return ret;
 652
 653         nouveau_bo_sync_for_device(nvbo);
 654
 655         return 0;
 656 }
 657
 658 void
 659 nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val)
 660 {
 661         bool is_iomem;
 662         u16 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 663
 664         mem += index;
 665
 666         if (is_iomem)
 667                 iowrite16_native(val, (void __force __iomem *)mem);
 668         else
 669                 *mem = val;
 670 }
 671
 672 u32
 673 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index)
 674 {
 675         bool is_iomem;
 676         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 677
 678         mem += index;
 679
 680         if (is_iomem)
 681                 return ioread32_native((void __force __iomem *)mem);
 682         else
 683                 return *mem;
 684 }
 685
 686 void
 687 nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val)
 688 {
 689         bool is_iomem;
 690         u32 *mem = ttm_kmap_obj_virtual(&nvbo->kmap, &is_iomem);
 691
 692         mem += index;
 693
 694         if (is_iomem)
 695                 iowrite32_native(val, (void __force __iomem *)mem);
 696         else
 697                 *mem = val;
 698 }
 699
 700 static struct ttm_tt *
 701 nouveau_ttm_tt_create(struct ttm_buffer_object *bo, uint32_t page_flags)
 702 {
 703 #if IS_ENABLED(CONFIG_AGP)
 704         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 705
 706         if (drm->agp.bridge) {
 707                 return ttm_agp_tt_create(bo, drm->agp.bridge, page_flags);
 708         }
 709 #endif
 710
 711         return nouveau_sgdma_create_ttm(bo, page_flags);
 712 }
 713
 714 static int
 715 nouveau_ttm_tt_bind(struct ttm_device *bdev, struct ttm_tt *ttm,
 716                     struct ttm_resource *reg)
 717 {
 718 #if IS_ENABLED(CONFIG_AGP)
 719         struct nouveau_drm *drm = nouveau_bdev(bdev);
 720 #endif
 721         if (!reg)
 722                 return -EINVAL;
 723 #if IS_ENABLED(CONFIG_AGP)
 724         if (drm->agp.bridge)
 725                 return ttm_agp_bind(ttm, reg);
 726 #endif
 727         return nouveau_sgdma_bind(bdev, ttm, reg);
 728 }
 729
 730 static void
 731 nouveau_ttm_tt_unbind(struct ttm_device *bdev, struct ttm_tt *ttm)
 732 {
 733 #if IS_ENABLED(CONFIG_AGP)
 734         struct nouveau_drm *drm = nouveau_bdev(bdev);
 735
 736         if (drm->agp.bridge) {
 737                 ttm_agp_unbind(ttm);
 738                 return;
 739         }
 740 #endif
 741         nouveau_sgdma_unbind(bdev, ttm);
 742 }
 743
 744 static void
 745 nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 746 {
 747         struct nouveau_bo *nvbo = nouveau_bo(bo);
 748
 749         switch (bo->resource->mem_type) {
 750         case TTM_PL_VRAM:
 751                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART,
 752                                          NOUVEAU_GEM_DOMAIN_CPU);
 753                 break;
 754         default:
 755                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_CPU, 0);
 756                 break;
 757         }
 758
 759         *pl = nvbo->placement;
 760 }
 761
 762 static int
 763 nouveau_bo_move_prep(struct nouveau_drm *drm, struct ttm_buffer_object *bo,
 764                      struct ttm_resource *reg)
 765 {
 766         struct nouveau_mem *old_mem = nouveau_mem(bo->resource);
 767         struct nouveau_mem *new_mem = nouveau_mem(reg);
 768         struct nvif_vmm *vmm = &drm->client.vmm.vmm;
 769         int ret;
 770
 771         ret = nvif_vmm_get(vmm, LAZY, false, old_mem->mem.page, 0,
 772                            old_mem->mem.size, &old_mem->vma[0]);
 773         if (ret)
 774                 return ret;
 775
 776         ret = nvif_vmm_get(vmm, LAZY, false, new_mem->mem.page, 0,
 777                            new_mem->mem.size, &old_mem->vma[1]);
 778         if (ret)
 779                 goto done;
 780
 781         ret = nouveau_mem_map(old_mem, vmm, &old_mem->vma[0]);
 782         if (ret)
 783                 goto done;
 784
 785         ret = nouveau_mem_map(new_mem, vmm, &old_mem->vma[1]);
 786 done:
 787         if (ret) {
 788                 nvif_vmm_put(vmm, &old_mem->vma[1]);
 789                 nvif_vmm_put(vmm, &old_mem->vma[0]);
 790         }
 791         return 0;
 792 }
 793
 794 static int
 795 nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict,
 796                      struct ttm_operation_ctx *ctx,
 797                      struct ttm_resource *new_reg)
 798 {
 799         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 800         struct nouveau_channel *chan = drm->ttm.chan;
 801         struct nouveau_cli *cli = (void *)chan->user.client;
 802         struct nouveau_fence *fence;
 803         int ret;
 804
 805         /* create temporary vmas for the transfer and attach them to the
 806          * old nvkm_mem node, these will get cleaned up after ttm has
 807          * destroyed the ttm_resource
 808          */
 809         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
 810                 ret = nouveau_bo_move_prep(drm, bo, new_reg);
 811                 if (ret)
 812                         return ret;
 813         }
 814
 815         if (drm_drv_uses_atomic_modeset(drm->dev))
 816                 mutex_lock(&cli->mutex);
 817         else
 818                 mutex_lock_nested(&cli->mutex, SINGLE_DEPTH_NESTING);
 819         ret = nouveau_fence_sync(nouveau_bo(bo), chan, true, ctx->interruptible);
 820         if (ret == 0) {
 821                 ret = drm->ttm.move(chan, bo, bo->resource, new_reg);
 822                 if (ret == 0) {
 823                         ret = nouveau_fence_new(chan, false, &fence);
 824                         if (ret == 0) {
 825                                 /* TODO: figure out a better solution here
 826                                  *
 827                                  * wait on the fence here explicitly as going through
 828                                  * ttm_bo_move_accel_cleanup somehow doesn't seem to do it.
 829                                  *
 830                                  * Without this the operation can timeout and we'll fallback to a
 831                                  * software copy, which might take several minutes to finish.
 832                                  */
 833                                 nouveau_fence_wait(fence, false, false);
 834                                 ret = ttm_bo_move_accel_cleanup(bo,
 835                                                                 &fence->base,
 836                                                                 evict, false,
 837                                                                 new_reg);
 838                                 nouveau_fence_unref(&fence);
 839                         }
 840                 }
 841         }
 842         mutex_unlock(&cli->mutex);
 843         return ret;
 844 }
 845
 846 void
 847 nouveau_bo_move_init(struct nouveau_drm *drm)
 848 {
 849         static const struct _method_table {
 850                 const char *name;
 851                 int engine;
 852                 s32 oclass;
 853                 int (*exec)(struct nouveau_channel *,
 854                             struct ttm_buffer_object *,
 855                             struct ttm_resource *, struct ttm_resource *);
 856                 int (*init)(struct nouveau_channel *, u32 handle);
 857         } _methods[] = {
 858                 {  "COPY", 4, 0xc7b5, nve0_bo_move_copy, nve0_bo_move_init },
 859                 {  "COPY", 4, 0xc5b5, nve0_bo_move_copy, nve0_bo_move_init },
 860                 {  "GRCE", 0, 0xc5b5, nve0_bo_move_copy, nvc0_bo_move_init },
 861                 {  "COPY", 4, 0xc3b5, nve0_bo_move_copy, nve0_bo_move_init },
 862                 {  "GRCE", 0, 0xc3b5, nve0_bo_move_copy, nvc0_bo_move_init },
 863                 {  "COPY", 4, 0xc1b5, nve0_bo_move_copy, nve0_bo_move_init },
 864                 {  "GRCE", 0, 0xc1b5, nve0_bo_move_copy, nvc0_bo_move_init },
 865                 {  "COPY", 4, 0xc0b5, nve0_bo_move_copy, nve0_bo_move_init },
 866                 {  "GRCE", 0, 0xc0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 867                 {  "COPY", 4, 0xb0b5, nve0_bo_move_copy, nve0_bo_move_init },
 868                 {  "GRCE", 0, 0xb0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 869                 {  "COPY", 4, 0xa0b5, nve0_bo_move_copy, nve0_bo_move_init },
 870                 {  "GRCE", 0, 0xa0b5, nve0_bo_move_copy, nvc0_bo_move_init },
 871                 { "COPY1", 5, 0x90b8, nvc0_bo_move_copy, nvc0_bo_move_init },
 872                 { "COPY0", 4, 0x90b5, nvc0_bo_move_copy, nvc0_bo_move_init },
 873                 {  "COPY", 0, 0x85b5, nva3_bo_move_copy, nv50_bo_move_init },
 874                 { "CRYPT", 0, 0x74c1, nv84_bo_move_exec, nv50_bo_move_init },
 875                 {  "M2MF", 0, 0x9039, nvc0_bo_move_m2mf, nvc0_bo_move_init },
 876                 {  "M2MF", 0, 0x5039, nv50_bo_move_m2mf, nv50_bo_move_init },
 877                 {  "M2MF", 0, 0x0039, nv04_bo_move_m2mf, nv04_bo_move_init },
 878                 {},
 879         };
 880         const struct _method_table *mthd = _methods;
 881         const char *name = "CPU";
 882         int ret;
 883
 884         do {
 885                 struct nouveau_channel *chan;
 886
 887                 if (mthd->engine)
 888                         chan = drm->cechan;
 889                 else
 890                         chan = drm->channel;
 891                 if (chan == NULL)
 892                         continue;
 893
 894                 ret = nvif_object_ctor(&chan->user, "ttmBoMove",
 895                                        mthd->oclass | (mthd->engine << 16),
 896                                        mthd->oclass, NULL, 0,
 897                                        &drm->ttm.copy);
 898                 if (ret == 0) {
 899                         ret = mthd->init(chan, drm->ttm.copy.handle);
 900                         if (ret) {
 901                                 nvif_object_dtor(&drm->ttm.copy);
 902                                 continue;
 903                         }
 904
 905                         drm->ttm.move = mthd->exec;
 906                         drm->ttm.chan = chan;
 907                         name = mthd->name;
 908                         break;
 909                 }
 910         } while ((++mthd)->exec);
 911
 912         NV_INFO(drm, "MM: using %s for buffer copies\n", name);
 913 }
 914
 915 static void nouveau_bo_move_ntfy(struct ttm_buffer_object *bo,
 916                                  struct ttm_resource *new_reg)
 917 {
 918         struct nouveau_mem *mem = new_reg ? nouveau_mem(new_reg) : NULL;
 919         struct nouveau_bo *nvbo = nouveau_bo(bo);
 920         struct nouveau_vma *vma;
 921
 922         /* ttm can now (stupidly) pass the driver bos it didn't create... */
 923         if (bo->destroy != nouveau_bo_del_ttm)
 924                 return;
 925
 926         nouveau_bo_del_io_reserve_lru(bo);
 927
 928         if (mem && new_reg->mem_type != TTM_PL_SYSTEM &&
 929             mem->mem.page == nvbo->page) {
 930                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 931                         nouveau_vma_map(vma, mem);
 932                 }
 933         } else {
 934                 list_for_each_entry(vma, &nvbo->vma_list, head) {
 935                         WARN_ON(ttm_bo_wait(bo, false, false));
 936                         nouveau_vma_unmap(vma);
 937                 }
 938         }
 939
 940         if (new_reg)
 941                 nvbo->offset = (new_reg->start << PAGE_SHIFT);
 942
 943 }
 944
 945 static int
 946 nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_resource *new_reg,
 947                    struct nouveau_drm_tile **new_tile)
 948 {
 949         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 950         struct drm_device *dev = drm->dev;
 951         struct nouveau_bo *nvbo = nouveau_bo(bo);
 952         u64 offset = new_reg->start << PAGE_SHIFT;
 953
 954         *new_tile = NULL;
 955         if (new_reg->mem_type != TTM_PL_VRAM)
 956                 return 0;
 957
 958         if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS) {
 959                 *new_tile = nv10_bo_set_tiling(dev, offset, bo->base.size,
 960                                                nvbo->mode, nvbo->zeta);
 961         }
 962
 963         return 0;
 964 }
 965
 966 static void
 967 nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
 968                       struct nouveau_drm_tile *new_tile,
 969                       struct nouveau_drm_tile **old_tile)
 970 {
 971         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 972         struct drm_device *dev = drm->dev;
 973         struct dma_fence *fence;
 974         int ret;
 975
 976         ret = dma_resv_get_singleton(bo->base.resv, DMA_RESV_USAGE_WRITE,
 977                                      &fence);
 978         if (ret)
 979                 dma_resv_wait_timeout(bo->base.resv, DMA_RESV_USAGE_WRITE,
 980                                       false, MAX_SCHEDULE_TIMEOUT);
 981
 982         nv10_bo_put_tile_region(dev, *old_tile, fence);
 983         *old_tile = new_tile;
 984 }
 985
 986 static int
 987 nouveau_bo_move(struct ttm_buffer_object *bo, bool evict,
 988                 struct ttm_operation_ctx *ctx,
 989                 struct ttm_resource *new_reg,
 990                 struct ttm_place *hop)
 991 {
 992         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
 993         struct nouveau_bo *nvbo = nouveau_bo(bo);
 994         struct ttm_resource *old_reg = bo->resource;
 995         struct nouveau_drm_tile *new_tile = NULL;
 996         int ret = 0;
 997
 998
 999         if (new_reg->mem_type == TTM_PL_TT) {
1000                 ret = nouveau_ttm_tt_bind(bo->bdev, bo->ttm, new_reg);
1001                 if (ret)
1002                         return ret;
1003         }
1004
1005         nouveau_bo_move_ntfy(bo, new_reg);
1006         ret = ttm_bo_wait_ctx(bo, ctx);
1007         if (ret)
1008                 goto out_ntfy;
1009
1010         if (nvbo->bo.pin_count)
1011                 NV_WARN(drm, "Moving pinned object %p!\n", nvbo);
1012
1013         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1014                 ret = nouveau_bo_vm_bind(bo, new_reg, &new_tile);
1015                 if (ret)
1016                         goto out_ntfy;
1017         }
1018
1019         /* Fake bo copy. */
1020         if (!old_reg || (old_reg->mem_type == TTM_PL_SYSTEM &&
1021                          !bo->ttm)) {
1022                 ttm_bo_move_null(bo, new_reg);
1023                 goto out;
1024         }
1025
1026         if (old_reg->mem_type == TTM_PL_SYSTEM &&
1027             new_reg->mem_type == TTM_PL_TT) {
1028                 ttm_bo_move_null(bo, new_reg);
1029                 goto out;
1030         }
1031
1032         if (old_reg->mem_type == TTM_PL_TT &&
1033             new_reg->mem_type == TTM_PL_SYSTEM) {
1034                 nouveau_ttm_tt_unbind(bo->bdev, bo->ttm);
1035                 ttm_resource_free(bo, &bo->resource);
1036                 ttm_bo_assign_mem(bo, new_reg);
1037                 goto out;
1038         }
1039
1040         /* Hardware assisted copy. */
1041         if (drm->ttm.move) {
1042                 if ((old_reg->mem_type == TTM_PL_SYSTEM &&
1043                      new_reg->mem_type == TTM_PL_VRAM) ||
1044                     (old_reg->mem_type == TTM_PL_VRAM &&
1045                      new_reg->mem_type == TTM_PL_SYSTEM)) {
1046                         hop->fpfn = 0;
1047                         hop->lpfn = 0;
1048                         hop->mem_type = TTM_PL_TT;
1049                         hop->flags = 0;
1050                         return -EMULTIHOP;
1051                 }
1052                 ret = nouveau_bo_move_m2mf(bo, evict, ctx,
1053                                            new_reg);
1054         } else
1055                 ret = -ENODEV;
1056
1057         if (ret) {
1058                 /* Fallback to software copy. */
1059                 ret = ttm_bo_move_memcpy(bo, ctx, new_reg);
1060         }
1061
1062 out:
1063         if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA) {
1064                 if (ret)
1065                         nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
1066                 else
1067                         nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
1068         }
1069 out_ntfy:
1070         if (ret) {
1071                 nouveau_bo_move_ntfy(bo, bo->resource);
1072         }
1073         return ret;
1074 }
1075
1076 static void
1077 nouveau_ttm_io_mem_free_locked(struct nouveau_drm *drm,
1078                                struct ttm_resource *reg)
1079 {
1080         struct nouveau_mem *mem = nouveau_mem(reg);
1081
1082         if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1083                 switch (reg->mem_type) {
1084                 case TTM_PL_TT:
1085                         if (mem->kind)
1086                                 nvif_object_unmap_handle(&mem->mem.object);
1087                         break;
1088                 case TTM_PL_VRAM:
1089                         nvif_object_unmap_handle(&mem->mem.object);
1090                         break;
1091                 default:
1092                         break;
1093                 }
1094         }
1095 }
1096
1097 static int
1098 nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
1099 {
1100         struct nouveau_drm *drm = nouveau_bdev(bdev);
1101         struct nvkm_device *device = nvxx_device(&drm->client.device);
1102         struct nouveau_mem *mem = nouveau_mem(reg);
1103         struct nvif_mmu *mmu = &drm->client.mmu;
1104         int ret;
1105
1106         mutex_lock(&drm->ttm.io_reserve_mutex);
1107 retry:
1108         switch (reg->mem_type) {
1109         case TTM_PL_SYSTEM:
1110                 /* System memory */
1111                 ret = 0;
1112                 goto out;
1113         case TTM_PL_TT:
1114 #if IS_ENABLED(CONFIG_AGP)
1115                 if (drm->agp.bridge) {
1116                         reg->bus.offset = (reg->start << PAGE_SHIFT) +
1117                                 drm->agp.base;
1118                         reg->bus.is_iomem = !drm->agp.cma;
1119                         reg->bus.caching = ttm_write_combined;
1120                 }
1121 #endif
1122                 if (drm->client.mem->oclass < NVIF_CLASS_MEM_NV50 ||
1123                     !mem->kind) {
1124                         /* untiled */
1125                         ret = 0;
1126                         break;
1127                 }
1128                 fallthrough;    /* tiled memory */
1129         case TTM_PL_VRAM:
1130                 reg->bus.offset = (reg->start << PAGE_SHIFT) +
1131                         device->func->resource_addr(device, 1);
1132                 reg->bus.is_iomem = true;
1133
1134                 /* Some BARs do not support being ioremapped WC */
1135                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
1136                     mmu->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED)
1137                         reg->bus.caching = ttm_uncached;
1138                 else
1139                         reg->bus.caching = ttm_write_combined;
1140
1141                 if (drm->client.mem->oclass >= NVIF_CLASS_MEM_NV50) {
1142                         union {
1143                                 struct nv50_mem_map_v0 nv50;
1144                                 struct gf100_mem_map_v0 gf100;
1145                         } args;
1146                         u64 handle, length;
1147                         u32 argc = 0;
1148
1149                         switch (mem->mem.object.oclass) {
1150                         case NVIF_CLASS_MEM_NV50:
1151                                 args.nv50.version = 0;
1152                                 args.nv50.ro = 0;
1153                                 args.nv50.kind = mem->kind;
1154                                 args.nv50.comp = mem->comp;
1155                                 argc = sizeof(args.nv50);
1156                                 break;
1157                         case NVIF_CLASS_MEM_GF100:
1158                                 args.gf100.version = 0;
1159                                 args.gf100.ro = 0;
1160                                 args.gf100.kind = mem->kind;
1161                                 argc = sizeof(args.gf100);
1162                                 break;
1163                         default:
1164                                 WARN_ON(1);
1165                                 break;
1166                         }
1167
1168                         ret = nvif_object_map_handle(&mem->mem.object,
1169                                                      &args, argc,
1170                                                      &handle, &length);
1171                         if (ret != 1) {
1172                                 if (WARN_ON(ret == 0))
1173                                         ret = -EINVAL;
1174                                 goto out;
1175                         }
1176
1177                         reg->bus.offset = handle;
1178                 }
1179                 ret = 0;
1180                 break;
1181         default:
1182                 ret = -EINVAL;
1183         }
1184
1185 out:
1186         if (ret == -ENOSPC) {
1187                 struct nouveau_bo *nvbo;
1188
1189                 nvbo = list_first_entry_or_null(&drm->ttm.io_reserve_lru,
1190                                                 typeof(*nvbo),
1191                                                 io_reserve_lru);
1192                 if (nvbo) {
1193                         list_del_init(&nvbo->io_reserve_lru);
1194                         drm_vma_node_unmap(&nvbo->bo.base.vma_node,
1195                                            bdev->dev_mapping);
1196                         nouveau_ttm_io_mem_free_locked(drm, nvbo->bo.resource);
1197                         goto retry;
1198                 }
1199
1200         }
1201         mutex_unlock(&drm->ttm.io_reserve_mutex);
1202         return ret;
1203 }
1204
1205 static void
1206 nouveau_ttm_io_mem_free(struct ttm_device *bdev, struct ttm_resource *reg)
1207 {
1208         struct nouveau_drm *drm = nouveau_bdev(bdev);
1209
1210         mutex_lock(&drm->ttm.io_reserve_mutex);
1211         nouveau_ttm_io_mem_free_locked(drm, reg);
1212         mutex_unlock(&drm->ttm.io_reserve_mutex);
1213 }
1214
1215 vm_fault_t nouveau_ttm_fault_reserve_notify(struct ttm_buffer_object *bo)
1216 {
1217         struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
1218         struct nouveau_bo *nvbo = nouveau_bo(bo);
1219         struct nvkm_device *device = nvxx_device(&drm->client.device);
1220         u32 mappable = device->func->resource_size(device, 1) >> PAGE_SHIFT;
1221         int i, ret;
1222
1223         /* as long as the bo isn't in vram, and isn't tiled, we've got
1224          * nothing to do here.
1225          */
1226         if (bo->resource->mem_type != TTM_PL_VRAM) {
1227                 if (drm->client.device.info.family < NV_DEVICE_INFO_V0_TESLA ||
1228                     !nvbo->kind)
1229                         return 0;
1230
1231                 if (bo->resource->mem_type != TTM_PL_SYSTEM)
1232                         return 0;
1233
1234                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_GART, 0);
1235
1236         } else {
1237                 /* make sure bo is in mappable vram */
1238                 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA ||
1239                     bo->resource->start + bo->resource->num_pages < mappable)
1240                         return 0;
1241
1242                 for (i = 0; i < nvbo->placement.num_placement; ++i) {
1243                         nvbo->placements[i].fpfn = 0;
1244                         nvbo->placements[i].lpfn = mappable;
1245                 }
1246
1247                 for (i = 0; i < nvbo->placement.num_busy_placement; ++i) {
1248                         nvbo->busy_placements[i].fpfn = 0;
1249                         nvbo->busy_placements[i].lpfn = mappable;
1250                 }
1251
1252                 nouveau_bo_placement_set(nvbo, NOUVEAU_GEM_DOMAIN_VRAM, 0);
1253         }
1254
1255         ret = nouveau_bo_validate(nvbo, false, false);
1256         if (unlikely(ret == -EBUSY || ret == -ERESTARTSYS))
1257                 return VM_FAULT_NOPAGE;
1258         else if (unlikely(ret))
1259                 return VM_FAULT_SIGBUS;
1260
1261         ttm_bo_move_to_lru_tail_unlocked(bo);
1262         return 0;
1263 }
1264
1265 static int
1266 nouveau_ttm_tt_populate(struct ttm_device *bdev,
1267                         struct ttm_tt *ttm, struct ttm_operation_ctx *ctx)
1268 {
1269         struct ttm_tt *ttm_dma = (void *)ttm;
1270         struct nouveau_drm *drm;
1271         bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
1272
1273         if (ttm_tt_is_populated(ttm))
1274                 return 0;
1275
1276         if (slave && ttm->sg) {
1277                 drm_prime_sg_to_dma_addr_array(ttm->sg, ttm_dma->dma_address,
1278                                                ttm->num_pages);
1279                 return 0;
1280         }
1281
1282         drm = nouveau_bdev(bdev);
1283
1284         return ttm_pool_alloc(&drm->ttm.bdev.pool, ttm, ctx);
1285 }
1286
1287 static void
1288 nouveau_ttm_tt_unpopulate(struct ttm_device *bdev,
1289                           struct ttm_tt *ttm)
1290 {
1291         struct nouveau_drm *drm;
1292         bool slave = !!(ttm->page_flags & TTM_TT_FLAG_EXTERNAL);
1293
1294         if (slave)
1295                 return;
1296
1297         nouveau_ttm_tt_unbind(bdev, ttm);
1298
1299         drm = nouveau_bdev(bdev);
1300
1301         return ttm_pool_free(&drm->ttm.bdev.pool, ttm);
1302 }
1303
1304 static void
1305 nouveau_ttm_tt_destroy(struct ttm_device *bdev,
1306                        struct ttm_tt *ttm)
1307 {
1308 #if IS_ENABLED(CONFIG_AGP)
1309         struct nouveau_drm *drm = nouveau_bdev(bdev);
1310         if (drm->agp.bridge) {
1311                 ttm_agp_destroy(ttm);
1312                 return;
1313         }
1314 #endif
1315         nouveau_sgdma_destroy(bdev, ttm);
1316 }
1317
1318 void
1319 nouveau_bo_fence(struct nouveau_bo *nvbo, struct nouveau_fence *fence, bool exclusive)
1320 {
1321         struct dma_resv *resv = nvbo->bo.base.resv;
1322
1323         if (!fence)
1324                 return;
1325
1326         dma_resv_add_fence(resv, &fence->base, exclusive ?
1327                            DMA_RESV_USAGE_WRITE : DMA_RESV_USAGE_READ);
1328 }
1329
1330 static void
1331 nouveau_bo_delete_mem_notify(struct ttm_buffer_object *bo)
1332 {
1333         nouveau_bo_move_ntfy(bo, NULL);
1334 }
1335
1336 struct ttm_device_funcs nouveau_bo_driver = {
1337         .ttm_tt_create = &nouveau_ttm_tt_create,
1338         .ttm_tt_populate = &nouveau_ttm_tt_populate,
1339         .ttm_tt_unpopulate = &nouveau_ttm_tt_unpopulate,
1340         .ttm_tt_destroy = &nouveau_ttm_tt_destroy,
1341         .eviction_valuable = ttm_bo_eviction_valuable,
1342         .evict_flags = nouveau_bo_evict_flags,
1343         .delete_mem_notify = nouveau_bo_delete_mem_notify,
1344         .move = nouveau_bo_move,
1345         .io_mem_reserve = &nouveau_ttm_io_mem_reserve,
1346         .io_mem_free = &nouveau_ttm_io_mem_free,
1347 };