drivers/gpu/drm/nouveau/core/subdev/device/base.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24
  25 #include <core/object.h>
  26 #include <core/device.h>
  27 #include <core/client.h>
  28 #include <core/option.h>
  29
  30 #include <core/class.h>
  31
  32 #include <subdev/device.h>
  33
  34 static DEFINE_MUTEX(nv_devices_mutex);
  35 static LIST_HEAD(nv_devices);
  36
  37 struct nouveau_device *
  38 nouveau_device_find(u64 name)
  39 {
  40         struct nouveau_device *device, *match = NULL;
  41         mutex_lock(&nv_devices_mutex);
  42         list_for_each_entry(device, &nv_devices, head) {
  43                 if (device->handle == name) {
  44                         match = device;
  45                         break;
  46                 }
  47         }
  48         mutex_unlock(&nv_devices_mutex);
  49         return match;
  50 }
  51
  52 /******************************************************************************
  53  * nouveau_devobj (0x0080): class implementation
  54  *****************************************************************************/
  55 struct nouveau_devobj {
  56         struct nouveau_parent base;
  57         struct nouveau_object *subdev[NVDEV_SUBDEV_NR];
  58         bool created;
  59 };
  60
  61 static const u64 disable_map[] = {
  62         [NVDEV_SUBDEV_VBIOS]    = NV_DEVICE_DISABLE_VBIOS,
  63         [NVDEV_SUBDEV_DEVINIT]  = NV_DEVICE_DISABLE_CORE,
  64         [NVDEV_SUBDEV_GPIO]     = NV_DEVICE_DISABLE_CORE,
  65         [NVDEV_SUBDEV_I2C]      = NV_DEVICE_DISABLE_CORE,
  66         [NVDEV_SUBDEV_CLOCK]    = NV_DEVICE_DISABLE_CORE,
  67         [NVDEV_SUBDEV_MXM]      = NV_DEVICE_DISABLE_CORE,
  68         [NVDEV_SUBDEV_MC]       = NV_DEVICE_DISABLE_CORE,
  69         [NVDEV_SUBDEV_TIMER]    = NV_DEVICE_DISABLE_CORE,
  70         [NVDEV_SUBDEV_FB]       = NV_DEVICE_DISABLE_CORE,
  71         [NVDEV_SUBDEV_LTCG]     = NV_DEVICE_DISABLE_CORE,
  72         [NVDEV_SUBDEV_IBUS]     = NV_DEVICE_DISABLE_CORE,
  73         [NVDEV_SUBDEV_INSTMEM]  = NV_DEVICE_DISABLE_CORE,
  74         [NVDEV_SUBDEV_VM]       = NV_DEVICE_DISABLE_CORE,
  75         [NVDEV_SUBDEV_BAR]      = NV_DEVICE_DISABLE_CORE,
  76         [NVDEV_SUBDEV_VOLT]     = NV_DEVICE_DISABLE_CORE,
  77         [NVDEV_SUBDEV_THERM]    = NV_DEVICE_DISABLE_CORE,
  78         [NVDEV_ENGINE_DMAOBJ]   = NV_DEVICE_DISABLE_CORE,
  79         [NVDEV_ENGINE_FIFO]     = NV_DEVICE_DISABLE_FIFO,
  80         [NVDEV_ENGINE_SW]       = NV_DEVICE_DISABLE_FIFO,
  81         [NVDEV_ENGINE_GR]       = NV_DEVICE_DISABLE_GRAPH,
  82         [NVDEV_ENGINE_MPEG]     = NV_DEVICE_DISABLE_MPEG,
  83         [NVDEV_ENGINE_ME]       = NV_DEVICE_DISABLE_ME,
  84         [NVDEV_ENGINE_VP]       = NV_DEVICE_DISABLE_VP,
  85         [NVDEV_ENGINE_CRYPT]    = NV_DEVICE_DISABLE_CRYPT,
  86         [NVDEV_ENGINE_BSP]      = NV_DEVICE_DISABLE_BSP,
  87         [NVDEV_ENGINE_PPP]      = NV_DEVICE_DISABLE_PPP,
  88         [NVDEV_ENGINE_COPY0]    = NV_DEVICE_DISABLE_COPY0,
  89         [NVDEV_ENGINE_COPY1]    = NV_DEVICE_DISABLE_COPY1,
  90         [NVDEV_ENGINE_UNK1C1]   = NV_DEVICE_DISABLE_UNK1C1,
  91         [NVDEV_ENGINE_VENC]     = NV_DEVICE_DISABLE_VENC,
  92         [NVDEV_ENGINE_DISP]     = NV_DEVICE_DISABLE_DISP,
  93         [NVDEV_SUBDEV_NR]       = 0,
  94 };
  95
  96 static int
  97 nouveau_devobj_ctor(struct nouveau_object *parent,
  98                     struct nouveau_object *engine,
  99                     struct nouveau_oclass *oclass, void *data, u32 size,
 100                     struct nouveau_object **pobject)
 101 {
 102         struct nouveau_client *client = nv_client(parent);
 103         struct nouveau_device *device;
 104         struct nouveau_devobj *devobj;
 105         struct nv_device_class *args = data;
 106         u64 disable, boot0, strap;
 107         u64 mmio_base, mmio_size;
 108         void __iomem *map;
 109         int ret, i, c;
 110
 111         if (size < sizeof(struct nv_device_class))
 112                 return -EINVAL;
 113
 114         /* find the device subdev that matches what the client requested */
 115         device = nv_device(client->device);
 116         if (args->device != ~0) {
 117                 device = nouveau_device_find(args->device);
 118                 if (!device)
 119                         return -ENODEV;
 120         }
 121
 122         ret = nouveau_parent_create(parent, nv_object(device), oclass, 0, NULL,
 123                                     (1ULL << NVDEV_ENGINE_DMAOBJ) |
 124                                     (1ULL << NVDEV_ENGINE_FIFO) |
 125                                     (1ULL << NVDEV_ENGINE_DISP), &devobj);
 126         *pobject = nv_object(devobj);
 127         if (ret)
 128                 return ret;
 129
 130         mmio_base = pci_resource_start(device->pdev, 0);
 131         mmio_size = pci_resource_len(device->pdev, 0);
 132
 133         /* translate api disable mask into internal mapping */
 134         disable = args->debug0;
 135         for (i = 0; i < NVDEV_SUBDEV_NR; i++) {
 136                 if (args->disable & disable_map[i])
 137                         disable |= (1ULL << i);
 138         }
 139
 140         /* identify the chipset, and determine classes of subdev/engines */
 141         if (!(args->disable & NV_DEVICE_DISABLE_IDENTIFY) &&
 142             !device->card_type) {
 143                 map = ioremap(mmio_base, 0x102000);
 144                 if (map == NULL)
 145                         return -ENOMEM;
 146
 147                 /* switch mmio to cpu's native endianness */
 148 #ifndef __BIG_ENDIAN
 149                 if (ioread32_native(map + 0x000004) != 0x00000000)
 150 #else
 151                 if (ioread32_native(map + 0x000004) == 0x00000000)
 152 #endif
 153                         iowrite32_native(0x01000001, map + 0x000004);
 154
 155                 /* read boot0 and strapping information */
 156                 boot0 = ioread32_native(map + 0x000000);
 157                 strap = ioread32_native(map + 0x101000);
 158                 iounmap(map);
 159
 160                 /* determine chipset and derive architecture from it */
 161                 if ((boot0 & 0x0f000000) > 0) {
 162                         device->chipset = (boot0 & 0xff00000) >> 20;
 163                         switch (device->chipset & 0xf0) {
 164                         case 0x10: device->card_type = NV_10; break;
 165                         case 0x20: device->card_type = NV_20; break;
 166                         case 0x30: device->card_type = NV_30; break;
 167                         case 0x40:
 168                         case 0x60: device->card_type = NV_40; break;
 169                         case 0x50:
 170                         case 0x80:
 171                         case 0x90:
 172                         case 0xa0: device->card_type = NV_50; break;
 173                         case 0xc0: device->card_type = NV_C0; break;
 174                         case 0xd0: device->card_type = NV_D0; break;
 175                         case 0xe0: device->card_type = NV_E0; break;
 176                         default:
 177                                 break;
 178                         }
 179                 } else
 180                 if ((boot0 & 0xff00fff0) == 0x20004000) {
 181                         if (boot0 & 0x00f00000)
 182                                 device->chipset = 0x05;
 183                         else
 184                                 device->chipset = 0x04;
 185                         device->card_type = NV_04;
 186                 }
 187
 188                 switch (device->card_type) {
 189                 case NV_04: ret = nv04_identify(device); break;
 190                 case NV_10: ret = nv10_identify(device); break;
 191                 case NV_20: ret = nv20_identify(device); break;
 192                 case NV_30: ret = nv30_identify(device); break;
 193                 case NV_40: ret = nv40_identify(device); break;
 194                 case NV_50: ret = nv50_identify(device); break;
 195                 case NV_C0:
 196                 case NV_D0: ret = nvc0_identify(device); break;
 197                 case NV_E0: ret = nve0_identify(device); break;
 198                 default:
 199                         ret = -EINVAL;
 200                         break;
 201                 }
 202
 203                 if (ret) {
 204                         nv_error(device, "unknown chipset, 0x%08x\n", boot0);
 205                         return ret;
 206                 }
 207
 208                 nv_info(device, "BOOT0  : 0x%08x\n", boot0);
 209                 nv_info(device, "Chipset: %s (NV%02X)\n",
 210                         device->cname, device->chipset);
 211                 nv_info(device, "Family : NV%02X\n", device->card_type);
 212
 213                 /* determine frequency of timing crystal */
 214                 if ( device->chipset < 0x17 ||
 215                     (device->chipset >= 0x20 && device->chipset < 0x25))
 216                         strap &= 0x00000040;
 217                 else
 218                         strap &= 0x00400040;
 219
 220                 switch (strap) {
 221                 case 0x00000000: device->crystal = 13500; break;
 222                 case 0x00000040: device->crystal = 14318; break;
 223                 case 0x00400000: device->crystal = 27000; break;
 224                 case 0x00400040: device->crystal = 25000; break;
 225                 }
 226
 227                 nv_debug(device, "crystal freq: %dKHz\n", device->crystal);
 228         }
 229
 230         if (!(args->disable & NV_DEVICE_DISABLE_MMIO) &&
 231             !nv_subdev(device)->mmio) {
 232                 nv_subdev(device)->mmio  = ioremap(mmio_base, mmio_size);
 233                 if (!nv_subdev(device)->mmio) {
 234                         nv_error(device, "unable to map device registers\n");
 235                         return -ENOMEM;
 236                 }
 237         }
 238
 239         /* ensure requested subsystems are available for use */
 240         for (i = 0, c = 0; i < NVDEV_SUBDEV_NR; i++) {
 241                 if (!(oclass = device->oclass[i]) || (disable & (1ULL << i)))
 242                         continue;
 243
 244                 if (!device->subdev[i]) {
 245                         ret = nouveau_object_ctor(nv_object(device), NULL,
 246                                                   oclass, NULL, i,
 247                                                   &devobj->subdev[i]);
 248                         if (ret == -ENODEV)
 249                                 continue;
 250                         if (ret)
 251                                 return ret;
 252
 253                         if (nv_iclass(devobj->subdev[i], NV_ENGINE_CLASS))
 254                                 nouveau_subdev_reset(devobj->subdev[i]);
 255                 } else {
 256                         nouveau_object_ref(device->subdev[i],
 257                                           &devobj->subdev[i]);
 258                 }
 259
 260                 /* note: can't init *any* subdevs until devinit has been run
 261                  * due to not knowing exactly what the vbios init tables will
 262                  * mess with.  devinit also can't be run until all of its
 263                  * dependencies have been created.
 264                  *
 265                  * this code delays init of any subdev until all of devinit's
 266                  * dependencies have been created, and then initialises each
 267                  * subdev in turn as they're created.
 268                  */
 269                 while (i >= NVDEV_SUBDEV_DEVINIT_LAST && c <= i) {
 270                         struct nouveau_object *subdev = devobj->subdev[c++];
 271                         if (subdev && !nv_iclass(subdev, NV_ENGINE_CLASS)) {
 272                                 ret = nouveau_object_inc(subdev);
 273                                 if (ret)
 274                                         return ret;
 275                         }
 276                 }
 277         }
 278
 279         return 0;
 280 }
 281
 282 static void
 283 nouveau_devobj_dtor(struct nouveau_object *object)
 284 {
 285         struct nouveau_devobj *devobj = (void *)object;
 286         int i;
 287
 288         for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--)
 289                 nouveau_object_ref(NULL, &devobj->subdev[i]);
 290
 291         nouveau_parent_destroy(&devobj->base);
 292 }
 293
 294 static int
 295 nouveau_devobj_init(struct nouveau_object *object)
 296 {
 297         struct nouveau_devobj *devobj = (void *)object;
 298         struct nouveau_object *subdev;
 299         int ret, i;
 300
 301         ret = nouveau_parent_init(&devobj->base);
 302         if (ret)
 303                 return ret;
 304
 305         for (i = 0; devobj->created && i < NVDEV_SUBDEV_NR; i++) {
 306                 if ((subdev = devobj->subdev[i])) {
 307                         if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
 308                                 ret = nouveau_object_inc(subdev);
 309                                 if (ret)
 310                                         goto fail;
 311                         }
 312                 }
 313         }
 314
 315         devobj->created = true;
 316         return 0;
 317
 318 fail:
 319         for (--i; i >= 0; i--) {
 320                 if ((subdev = devobj->subdev[i])) {
 321                         if (!nv_iclass(subdev, NV_ENGINE_CLASS))
 322                                 nouveau_object_dec(subdev, false);
 323                 }
 324         }
 325
 326         return ret;
 327 }
 328
 329 static int
 330 nouveau_devobj_fini(struct nouveau_object *object, bool suspend)
 331 {
 332         struct nouveau_devobj *devobj = (void *)object;
 333         struct nouveau_object *subdev;
 334         int ret, i;
 335
 336         for (i = NVDEV_SUBDEV_NR - 1; i >= 0; i--) {
 337                 if ((subdev = devobj->subdev[i])) {
 338                         if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
 339                                 ret = nouveau_object_dec(subdev, suspend);
 340                                 if (ret && suspend)
 341                                         goto fail;
 342                         }
 343                 }
 344         }
 345
 346         ret = nouveau_parent_fini(&devobj->base, suspend);
 347 fail:
 348         for (; ret && suspend && i < NVDEV_SUBDEV_NR; i++) {
 349                 if ((subdev = devobj->subdev[i])) {
 350                         if (!nv_iclass(subdev, NV_ENGINE_CLASS)) {
 351                                 ret = nouveau_object_inc(subdev);
 352                                 if (ret) {
 353                                         /* XXX */
 354                                 }
 355                         }
 356                 }
 357         }
 358
 359         return ret;
 360 }
 361
 362 static u8
 363 nouveau_devobj_rd08(struct nouveau_object *object, u64 addr)
 364 {
 365         return nv_rd08(object->engine, addr);
 366 }
 367
 368 static u16
 369 nouveau_devobj_rd16(struct nouveau_object *object, u64 addr)
 370 {
 371         return nv_rd16(object->engine, addr);
 372 }
 373
 374 static u32
 375 nouveau_devobj_rd32(struct nouveau_object *object, u64 addr)
 376 {
 377         return nv_rd32(object->engine, addr);
 378 }
 379
 380 static void
 381 nouveau_devobj_wr08(struct nouveau_object *object, u64 addr, u8 data)
 382 {
 383         nv_wr08(object->engine, addr, data);
 384 }
 385
 386 static void
 387 nouveau_devobj_wr16(struct nouveau_object *object, u64 addr, u16 data)
 388 {
 389         nv_wr16(object->engine, addr, data);
 390 }
 391
 392 static void
 393 nouveau_devobj_wr32(struct nouveau_object *object, u64 addr, u32 data)
 394 {
 395         nv_wr32(object->engine, addr, data);
 396 }
 397
 398 static struct nouveau_ofuncs
 399 nouveau_devobj_ofuncs = {
 400         .ctor = nouveau_devobj_ctor,
 401         .dtor = nouveau_devobj_dtor,
 402         .init = nouveau_devobj_init,
 403         .fini = nouveau_devobj_fini,
 404         .rd08 = nouveau_devobj_rd08,
 405         .rd16 = nouveau_devobj_rd16,
 406         .rd32 = nouveau_devobj_rd32,
 407         .wr08 = nouveau_devobj_wr08,
 408         .wr16 = nouveau_devobj_wr16,
 409         .wr32 = nouveau_devobj_wr32,
 410 };
 411
 412 /******************************************************************************
 413  * nouveau_device: engine functions
 414  *****************************************************************************/
 415 struct nouveau_oclass
 416 nouveau_device_sclass[] = {
 417         { 0x0080, &nouveau_devobj_ofuncs },
 418         {}
 419 };
 420
 421 static void
 422 nouveau_device_dtor(struct nouveau_object *object)
 423 {
 424         struct nouveau_device *device = (void *)object;
 425
 426         mutex_lock(&nv_devices_mutex);
 427         list_del(&device->head);
 428         mutex_unlock(&nv_devices_mutex);
 429
 430         if (device->base.mmio)
 431                 iounmap(device->base.mmio);
 432
 433         nouveau_subdev_destroy(&device->base);
 434 }
 435
 436 static struct nouveau_oclass
 437 nouveau_device_oclass = {
 438         .handle = NV_SUBDEV(DEVICE, 0x00),
 439         .ofuncs = &(struct nouveau_ofuncs) {
 440                 .dtor = nouveau_device_dtor,
 441         },
 442 };
 443
 444 int
 445 nouveau_device_create_(struct pci_dev *pdev, u64 name, const char *sname,
 446                        const char *cfg, const char *dbg,
 447                        int length, void **pobject)
 448 {
 449         struct nouveau_device *device;
 450         int ret = -EEXIST;
 451
 452         mutex_lock(&nv_devices_mutex);
 453         list_for_each_entry(device, &nv_devices, head) {
 454                 if (device->handle == name)
 455                         goto done;
 456         }
 457
 458         ret = nouveau_subdev_create_(NULL, NULL, &nouveau_device_oclass, 0,
 459                                      "DEVICE", "device", length, pobject);
 460         device = *pobject;
 461         if (ret)
 462                 goto done;
 463
 464         atomic_set(&nv_object(device)->usecount, 2);
 465         device->pdev = pdev;
 466         device->handle = name;
 467         device->cfgopt = cfg;
 468         device->dbgopt = dbg;
 469         device->name = sname;
 470
 471         nv_subdev(device)->debug = nouveau_dbgopt(device->dbgopt, "DEVICE");
 472         list_add(&device->head, &nv_devices);
 473 done:
 474         mutex_unlock(&nv_devices_mutex);
 475         return ret;
 476 }