2 * i.MX IPUv3 DP Overlay Planes
4 * Copyright (C) 2013 Philipp Zabel, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
17 #include <drm/drm_atomic.h>
18 #include <drm/drm_atomic_helper.h>
19 #include <drm/drm_fb_cma_helper.h>
20 #include <drm/drm_gem_cma_helper.h>
21 #include <drm/drm_gem_framebuffer_helper.h>
22 #include <drm/drm_plane_helper.h>
24 #include "video/imx-ipu-v3.h"
25 #include "ipuv3-plane.h"
27 struct ipu_plane_state {
28 struct drm_plane_state base;
32 static inline struct ipu_plane_state *
33 to_ipu_plane_state(struct drm_plane_state *p)
35 return container_of(p, struct ipu_plane_state, base);
38 static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
40 return container_of(p, struct ipu_plane, base);
43 static const uint32_t ipu_plane_formats[] = {
76 DRM_FORMAT_RGBX8888_A8,
77 DRM_FORMAT_BGRX8888_A8,
80 static const uint64_t ipu_format_modifiers[] = {
81 DRM_FORMAT_MOD_LINEAR,
82 DRM_FORMAT_MOD_INVALID
85 static const uint64_t pre_format_modifiers[] = {
86 DRM_FORMAT_MOD_LINEAR,
87 DRM_FORMAT_MOD_VIVANTE_TILED,
88 DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
89 DRM_FORMAT_MOD_INVALID
92 int ipu_plane_irq(struct ipu_plane *ipu_plane)
94 return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
98 static inline unsigned long
99 drm_plane_state_to_eba(struct drm_plane_state *state, int plane)
101 struct drm_framebuffer *fb = state->fb;
102 struct drm_gem_cma_object *cma_obj;
103 int x = state->src.x1 >> 16;
104 int y = state->src.y1 >> 16;
106 cma_obj = drm_fb_cma_get_gem_obj(fb, plane);
109 return cma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y +
110 fb->format->cpp[plane] * x;
113 static inline unsigned long
114 drm_plane_state_to_ubo(struct drm_plane_state *state)
116 struct drm_framebuffer *fb = state->fb;
117 struct drm_gem_cma_object *cma_obj;
118 unsigned long eba = drm_plane_state_to_eba(state, 0);
119 int x = state->src.x1 >> 16;
120 int y = state->src.y1 >> 16;
122 cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
125 x /= drm_format_horz_chroma_subsampling(fb->format->format);
126 y /= drm_format_vert_chroma_subsampling(fb->format->format);
128 return cma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y +
129 fb->format->cpp[1] * x - eba;
132 static inline unsigned long
133 drm_plane_state_to_vbo(struct drm_plane_state *state)
135 struct drm_framebuffer *fb = state->fb;
136 struct drm_gem_cma_object *cma_obj;
137 unsigned long eba = drm_plane_state_to_eba(state, 0);
138 int x = state->src.x1 >> 16;
139 int y = state->src.y1 >> 16;
141 cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
144 x /= drm_format_horz_chroma_subsampling(fb->format->format);
145 y /= drm_format_vert_chroma_subsampling(fb->format->format);
147 return cma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y +
148 fb->format->cpp[2] * x - eba;
151 void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
153 if (!IS_ERR_OR_NULL(ipu_plane->dp))
154 ipu_dp_put(ipu_plane->dp);
155 if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
156 ipu_dmfc_put(ipu_plane->dmfc);
157 if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
158 ipu_idmac_put(ipu_plane->ipu_ch);
159 if (!IS_ERR_OR_NULL(ipu_plane->alpha_ch))
160 ipu_idmac_put(ipu_plane->alpha_ch);
163 int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
168 ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
169 if (IS_ERR(ipu_plane->ipu_ch)) {
170 ret = PTR_ERR(ipu_plane->ipu_ch);
171 DRM_ERROR("failed to get idmac channel: %d\n", ret);
175 alpha_ch = ipu_channel_alpha_channel(ipu_plane->dma);
177 ipu_plane->alpha_ch = ipu_idmac_get(ipu_plane->ipu, alpha_ch);
178 if (IS_ERR(ipu_plane->alpha_ch)) {
179 ret = PTR_ERR(ipu_plane->alpha_ch);
180 DRM_ERROR("failed to get alpha idmac channel %d: %d\n",
186 ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
187 if (IS_ERR(ipu_plane->dmfc)) {
188 ret = PTR_ERR(ipu_plane->dmfc);
189 DRM_ERROR("failed to get dmfc: ret %d\n", ret);
193 if (ipu_plane->dp_flow >= 0) {
194 ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
195 if (IS_ERR(ipu_plane->dp)) {
196 ret = PTR_ERR(ipu_plane->dp);
197 DRM_ERROR("failed to get dp flow: %d\n", ret);
204 ipu_plane_put_resources(ipu_plane);
209 static bool ipu_plane_separate_alpha(struct ipu_plane *ipu_plane)
211 switch (ipu_plane->base.state->fb->format->format) {
212 case DRM_FORMAT_RGB565_A8:
213 case DRM_FORMAT_BGR565_A8:
214 case DRM_FORMAT_RGB888_A8:
215 case DRM_FORMAT_BGR888_A8:
216 case DRM_FORMAT_RGBX8888_A8:
217 case DRM_FORMAT_BGRX8888_A8:
224 static void ipu_plane_enable(struct ipu_plane *ipu_plane)
227 ipu_dp_enable(ipu_plane->ipu);
228 ipu_dmfc_enable_channel(ipu_plane->dmfc);
229 ipu_idmac_enable_channel(ipu_plane->ipu_ch);
230 if (ipu_plane_separate_alpha(ipu_plane))
231 ipu_idmac_enable_channel(ipu_plane->alpha_ch);
233 ipu_dp_enable_channel(ipu_plane->dp);
236 void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel)
238 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
240 ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
242 if (ipu_plane->dp && disable_dp_channel)
243 ipu_dp_disable_channel(ipu_plane->dp, false);
244 ipu_idmac_disable_channel(ipu_plane->ipu_ch);
245 if (ipu_plane->alpha_ch)
246 ipu_idmac_disable_channel(ipu_plane->alpha_ch);
247 ipu_dmfc_disable_channel(ipu_plane->dmfc);
249 ipu_dp_disable(ipu_plane->ipu);
250 if (ipu_prg_present(ipu_plane->ipu))
251 ipu_prg_channel_disable(ipu_plane->ipu_ch);
254 void ipu_plane_disable_deferred(struct drm_plane *plane)
256 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
258 if (ipu_plane->disabling) {
259 ipu_plane->disabling = false;
260 ipu_plane_disable(ipu_plane, false);
263 EXPORT_SYMBOL_GPL(ipu_plane_disable_deferred);
265 static void ipu_plane_destroy(struct drm_plane *plane)
267 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
269 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
271 drm_plane_cleanup(plane);
275 void ipu_plane_state_reset(struct drm_plane *plane)
277 struct ipu_plane_state *ipu_state;
280 ipu_state = to_ipu_plane_state(plane->state);
281 __drm_atomic_helper_plane_destroy_state(plane->state);
285 ipu_state = kzalloc(sizeof(*ipu_state), GFP_KERNEL);
288 ipu_state->base.plane = plane;
289 ipu_state->base.rotation = DRM_MODE_ROTATE_0;
292 plane->state = &ipu_state->base;
295 struct drm_plane_state *ipu_plane_duplicate_state(struct drm_plane *plane)
297 struct ipu_plane_state *state;
299 if (WARN_ON(!plane->state))
302 state = kmalloc(sizeof(*state), GFP_KERNEL);
304 __drm_atomic_helper_plane_duplicate_state(plane, &state->base);
309 void ipu_plane_destroy_state(struct drm_plane *plane,
310 struct drm_plane_state *state)
312 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
314 __drm_atomic_helper_plane_destroy_state(state);
318 static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
319 uint32_t format, uint64_t modifier)
321 struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
323 /* linear is supported for all planes and formats */
324 if (modifier == DRM_FORMAT_MOD_LINEAR)
327 /* without a PRG there are no supported modifiers */
328 if (!ipu_prg_present(ipu))
331 return ipu_prg_format_supported(ipu, format, modifier);
334 static const struct drm_plane_funcs ipu_plane_funcs = {
335 .update_plane = drm_atomic_helper_update_plane,
336 .disable_plane = drm_atomic_helper_disable_plane,
337 .destroy = ipu_plane_destroy,
338 .reset = ipu_plane_state_reset,
339 .atomic_duplicate_state = ipu_plane_duplicate_state,
340 .atomic_destroy_state = ipu_plane_destroy_state,
341 .format_mod_supported = ipu_plane_format_mod_supported,
344 static int ipu_plane_atomic_check(struct drm_plane *plane,
345 struct drm_plane_state *state)
347 struct drm_plane_state *old_state = plane->state;
348 struct drm_crtc_state *crtc_state;
349 struct device *dev = plane->dev->dev;
350 struct drm_framebuffer *fb = state->fb;
351 struct drm_framebuffer *old_fb = old_state->fb;
352 unsigned long eba, ubo, vbo, old_ubo, old_vbo, alpha_eba;
353 bool can_position = (plane->type == DRM_PLANE_TYPE_OVERLAY);
354 struct drm_rect clip;
366 drm_atomic_get_existing_crtc_state(state->state, state->crtc);
367 if (WARN_ON(!crtc_state))
372 clip.x2 = crtc_state->adjusted_mode.hdisplay;
373 clip.y2 = crtc_state->adjusted_mode.vdisplay;
374 ret = drm_atomic_helper_check_plane_state(state, crtc_state, &clip,
375 DRM_PLANE_HELPER_NO_SCALING,
376 DRM_PLANE_HELPER_NO_SCALING,
381 /* CRTC should be enabled */
382 if (!crtc_state->enable)
385 switch (plane->type) {
386 case DRM_PLANE_TYPE_PRIMARY:
387 /* full plane minimum width is 13 pixels */
388 if (drm_rect_width(&state->dst) < 13)
391 case DRM_PLANE_TYPE_OVERLAY:
394 dev_warn(dev, "Unsupported plane type %d\n", plane->type);
398 if (drm_rect_height(&state->dst) < 2)
402 * We support resizing active plane or changing its format by
403 * forcing CRTC mode change in plane's ->atomic_check callback
404 * and disabling all affected active planes in CRTC's ->atomic_disable
405 * callback. The planes will be reenabled in plane's ->atomic_update
409 (drm_rect_width(&state->dst) != drm_rect_width(&old_state->dst) ||
410 drm_rect_height(&state->dst) != drm_rect_height(&old_state->dst) ||
411 fb->format != old_fb->format))
412 crtc_state->mode_changed = true;
414 eba = drm_plane_state_to_eba(state, 0);
419 if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
422 if (old_fb && fb->pitches[0] != old_fb->pitches[0])
423 crtc_state->mode_changed = true;
425 switch (fb->format->format) {
426 case DRM_FORMAT_YUV420:
427 case DRM_FORMAT_YVU420:
428 case DRM_FORMAT_YUV422:
429 case DRM_FORMAT_YVU422:
430 case DRM_FORMAT_YUV444:
431 case DRM_FORMAT_YVU444:
433 * Multiplanar formats have to meet the following restrictions:
434 * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
435 * - EBA, UBO and VBO are a multiple of 8
436 * - UBO and VBO are unsigned and not larger than 0xfffff8
437 * - Only EBA may be changed while scanout is active
438 * - The strides of U and V planes must be identical.
440 vbo = drm_plane_state_to_vbo(state);
442 if (vbo & 0x7 || vbo > 0xfffff8)
445 if (old_fb && (fb->format == old_fb->format)) {
446 old_vbo = drm_plane_state_to_vbo(old_state);
448 crtc_state->mode_changed = true;
451 if (fb->pitches[1] != fb->pitches[2])
455 case DRM_FORMAT_NV12:
456 case DRM_FORMAT_NV16:
457 ubo = drm_plane_state_to_ubo(state);
459 if (ubo & 0x7 || ubo > 0xfffff8)
462 if (old_fb && (fb->format == old_fb->format)) {
463 old_ubo = drm_plane_state_to_ubo(old_state);
465 crtc_state->mode_changed = true;
468 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
471 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
472 crtc_state->mode_changed = true;
475 * The x/y offsets must be even in case of horizontal/vertical
476 * chroma subsampling.
478 hsub = drm_format_horz_chroma_subsampling(fb->format->format);
479 vsub = drm_format_vert_chroma_subsampling(fb->format->format);
480 if (((state->src.x1 >> 16) & (hsub - 1)) ||
481 ((state->src.y1 >> 16) & (vsub - 1)))
484 case DRM_FORMAT_RGB565_A8:
485 case DRM_FORMAT_BGR565_A8:
486 case DRM_FORMAT_RGB888_A8:
487 case DRM_FORMAT_BGR888_A8:
488 case DRM_FORMAT_RGBX8888_A8:
489 case DRM_FORMAT_BGRX8888_A8:
490 alpha_eba = drm_plane_state_to_eba(state, 1);
494 if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
497 if (old_fb && old_fb->pitches[1] != fb->pitches[1])
498 crtc_state->mode_changed = true;
505 static void ipu_plane_atomic_disable(struct drm_plane *plane,
506 struct drm_plane_state *old_state)
508 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
511 ipu_dp_disable_channel(ipu_plane->dp, true);
512 ipu_plane->disabling = true;
515 static int ipu_chan_assign_axi_id(int ipu_chan)
518 case IPUV3_CHANNEL_MEM_BG_SYNC:
520 case IPUV3_CHANNEL_MEM_FG_SYNC:
522 case IPUV3_CHANNEL_MEM_DC_SYNC:
529 static void ipu_calculate_bursts(u32 width, u32 cpp, u32 stride,
530 u8 *burstsize, u8 *num_bursts)
532 const unsigned int width_bytes = width * cpp;
533 unsigned int npb, bursts;
535 /* Maximum number of pixels per burst without overshooting stride */
536 for (npb = 64 / cpp; npb > 0; --npb) {
537 if (round_up(width_bytes, npb * cpp) <= stride)
542 /* Maximum number of consecutive bursts without overshooting stride */
543 for (bursts = 8; bursts > 1; bursts /= 2) {
544 if (round_up(width_bytes, npb * cpp * bursts) <= stride)
547 *num_bursts = bursts;
550 static void ipu_plane_atomic_update(struct drm_plane *plane,
551 struct drm_plane_state *old_state)
553 struct ipu_plane *ipu_plane = to_ipu_plane(plane);
554 struct drm_plane_state *state = plane->state;
555 struct ipu_plane_state *ipu_state = to_ipu_plane_state(state);
556 struct drm_crtc_state *crtc_state = state->crtc->state;
557 struct drm_framebuffer *fb = state->fb;
558 struct drm_rect *dst = &state->dst;
559 unsigned long eba, ubo, vbo;
560 unsigned long alpha_eba = 0;
561 enum ipu_color_space ics;
562 unsigned int axi_id = 0;
563 const struct drm_format_info *info;
564 u8 burstsize, num_bursts;
568 if (ipu_plane->dp_flow == IPU_DP_FLOW_SYNC_FG)
569 ipu_dp_set_window_pos(ipu_plane->dp, dst->x1, dst->y1);
571 eba = drm_plane_state_to_eba(state, 0);
574 * Configure PRG channel and attached PRE, this changes the EBA to an
575 * internal SRAM location.
577 if (ipu_state->use_pre) {
578 axi_id = ipu_chan_assign_axi_id(ipu_plane->dma);
579 ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
580 drm_rect_width(&state->src) >> 16,
581 drm_rect_height(&state->src) >> 16,
582 fb->pitches[0], fb->format->format,
586 if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
587 /* nothing to do if PRE is used */
588 if (ipu_state->use_pre)
590 active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
591 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
592 ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
593 if (ipu_plane_separate_alpha(ipu_plane)) {
594 active = ipu_idmac_get_current_buffer(ipu_plane->alpha_ch);
595 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, !active,
597 ipu_idmac_select_buffer(ipu_plane->alpha_ch, !active);
602 ics = ipu_drm_fourcc_to_colorspace(fb->format->format);
603 switch (ipu_plane->dp_flow) {
604 case IPU_DP_FLOW_SYNC_BG:
605 ipu_dp_setup_channel(ipu_plane->dp, ics, IPUV3_COLORSPACE_RGB);
606 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
608 case IPU_DP_FLOW_SYNC_FG:
609 ipu_dp_setup_channel(ipu_plane->dp, ics,
610 IPUV3_COLORSPACE_UNKNOWN);
611 /* Enable local alpha on partial plane */
612 switch (fb->format->format) {
613 case DRM_FORMAT_ARGB1555:
614 case DRM_FORMAT_ABGR1555:
615 case DRM_FORMAT_RGBA5551:
616 case DRM_FORMAT_BGRA5551:
617 case DRM_FORMAT_ARGB4444:
618 case DRM_FORMAT_ARGB8888:
619 case DRM_FORMAT_ABGR8888:
620 case DRM_FORMAT_RGBA8888:
621 case DRM_FORMAT_BGRA8888:
622 case DRM_FORMAT_RGB565_A8:
623 case DRM_FORMAT_BGR565_A8:
624 case DRM_FORMAT_RGB888_A8:
625 case DRM_FORMAT_BGR888_A8:
626 case DRM_FORMAT_RGBX8888_A8:
627 case DRM_FORMAT_BGRX8888_A8:
628 ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
631 ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
636 ipu_dmfc_config_wait4eot(ipu_plane->dmfc, drm_rect_width(dst));
638 width = drm_rect_width(&state->src) >> 16;
639 height = drm_rect_height(&state->src) >> 16;
640 info = drm_format_info(fb->format->format);
641 ipu_calculate_bursts(width, info->cpp[0], fb->pitches[0],
642 &burstsize, &num_bursts);
644 ipu_cpmem_zero(ipu_plane->ipu_ch);
645 ipu_cpmem_set_resolution(ipu_plane->ipu_ch, width, height);
646 ipu_cpmem_set_fmt(ipu_plane->ipu_ch, fb->format->format);
647 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, burstsize);
648 ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
649 ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
650 ipu_cpmem_set_stride(ipu_plane->ipu_ch, fb->pitches[0]);
651 ipu_cpmem_set_axi_id(ipu_plane->ipu_ch, axi_id);
653 switch (fb->format->format) {
654 case DRM_FORMAT_YUV420:
655 case DRM_FORMAT_YVU420:
656 case DRM_FORMAT_YUV422:
657 case DRM_FORMAT_YVU422:
658 case DRM_FORMAT_YUV444:
659 case DRM_FORMAT_YVU444:
660 ubo = drm_plane_state_to_ubo(state);
661 vbo = drm_plane_state_to_vbo(state);
662 if (fb->format->format == DRM_FORMAT_YVU420 ||
663 fb->format->format == DRM_FORMAT_YVU422 ||
664 fb->format->format == DRM_FORMAT_YVU444)
667 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
668 fb->pitches[1], ubo, vbo);
670 dev_dbg(ipu_plane->base.dev->dev,
671 "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
672 state->src.x1 >> 16, state->src.y1 >> 16);
674 case DRM_FORMAT_NV12:
675 case DRM_FORMAT_NV16:
676 ubo = drm_plane_state_to_ubo(state);
678 ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
679 fb->pitches[1], ubo, ubo);
681 dev_dbg(ipu_plane->base.dev->dev,
682 "phy = %lu %lu, x = %d, y = %d", eba, ubo,
683 state->src.x1 >> 16, state->src.y1 >> 16);
685 case DRM_FORMAT_RGB565_A8:
686 case DRM_FORMAT_BGR565_A8:
687 case DRM_FORMAT_RGB888_A8:
688 case DRM_FORMAT_BGR888_A8:
689 case DRM_FORMAT_RGBX8888_A8:
690 case DRM_FORMAT_BGRX8888_A8:
691 alpha_eba = drm_plane_state_to_eba(state, 1);
694 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu %lu, x = %d, y = %d",
695 eba, alpha_eba, state->src.x1 >> 16, state->src.y1 >> 16);
697 ipu_cpmem_set_burstsize(ipu_plane->ipu_ch, 16);
699 ipu_cpmem_zero(ipu_plane->alpha_ch);
700 ipu_cpmem_set_resolution(ipu_plane->alpha_ch,
701 drm_rect_width(&state->src) >> 16,
702 drm_rect_height(&state->src) >> 16);
703 ipu_cpmem_set_format_passthrough(ipu_plane->alpha_ch, 8);
704 ipu_cpmem_set_high_priority(ipu_plane->alpha_ch);
705 ipu_idmac_set_double_buffer(ipu_plane->alpha_ch, 1);
706 ipu_cpmem_set_stride(ipu_plane->alpha_ch, fb->pitches[1]);
707 ipu_cpmem_set_burstsize(ipu_plane->alpha_ch, 16);
708 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 0, alpha_eba);
709 ipu_cpmem_set_buffer(ipu_plane->alpha_ch, 1, alpha_eba);
712 dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
713 eba, state->src.x1 >> 16, state->src.y1 >> 16);
716 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
717 ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
718 ipu_idmac_lock_enable(ipu_plane->ipu_ch, num_bursts);
719 ipu_plane_enable(ipu_plane);
722 static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
723 .prepare_fb = drm_gem_fb_prepare_fb,
724 .atomic_check = ipu_plane_atomic_check,
725 .atomic_disable = ipu_plane_atomic_disable,
726 .atomic_update = ipu_plane_atomic_update,
729 int ipu_planes_assign_pre(struct drm_device *dev,
730 struct drm_atomic_state *state)
732 struct drm_crtc_state *old_crtc_state, *crtc_state;
733 struct drm_plane_state *plane_state;
734 struct ipu_plane_state *ipu_state;
735 struct ipu_plane *ipu_plane;
736 struct drm_plane *plane;
737 struct drm_crtc *crtc;
738 int available_pres = ipu_prg_max_active_channels();
741 for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
742 ret = drm_atomic_add_affected_planes(state, crtc);
748 * We are going over the planes in 2 passes: first we assign PREs to
749 * planes with a tiling modifier, which need the PREs to resolve into
750 * linear. Any failure to assign a PRE there is fatal. In the second
751 * pass we try to assign PREs to linear FBs, to improve memory access
752 * patterns for them. Failure at this point is non-fatal, as we can
753 * scan out linear FBs without a PRE.
755 for_each_new_plane_in_state(state, plane, plane_state, i) {
756 ipu_state = to_ipu_plane_state(plane_state);
757 ipu_plane = to_ipu_plane(plane);
759 if (!plane_state->fb) {
760 ipu_state->use_pre = false;
764 if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
765 plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
768 if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
771 if (!ipu_prg_format_supported(ipu_plane->ipu,
772 plane_state->fb->format->format,
773 plane_state->fb->modifier))
776 ipu_state->use_pre = true;
780 for_each_new_plane_in_state(state, plane, plane_state, i) {
781 ipu_state = to_ipu_plane_state(plane_state);
782 ipu_plane = to_ipu_plane(plane);
784 if (!plane_state->fb) {
785 ipu_state->use_pre = false;
789 if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
790 plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
793 /* make sure that modifier is initialized */
794 plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
796 if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
797 ipu_prg_format_supported(ipu_plane->ipu,
798 plane_state->fb->format->format,
799 plane_state->fb->modifier)) {
800 ipu_state->use_pre = true;
803 ipu_state->use_pre = false;
809 EXPORT_SYMBOL_GPL(ipu_planes_assign_pre);
811 struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
812 int dma, int dp, unsigned int possible_crtcs,
813 enum drm_plane_type type)
815 struct ipu_plane *ipu_plane;
816 const uint64_t *modifiers = ipu_format_modifiers;
819 DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
820 dma, dp, possible_crtcs);
822 ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
824 DRM_ERROR("failed to allocate plane\n");
825 return ERR_PTR(-ENOMEM);
828 ipu_plane->ipu = ipu;
829 ipu_plane->dma = dma;
830 ipu_plane->dp_flow = dp;
832 if (ipu_prg_present(ipu))
833 modifiers = pre_format_modifiers;
835 ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
836 &ipu_plane_funcs, ipu_plane_formats,
837 ARRAY_SIZE(ipu_plane_formats),
838 modifiers, type, NULL);
840 DRM_ERROR("failed to initialize plane\n");
845 drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);