drivers/gpu/drm/i915/selftests/i915_gem_context.c

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #include "../i915_selftest.h"
  26
  27 #include "mock_drm.h"
  28 #include "huge_gem_object.h"
  29
  30 #define DW_PER_PAGE (PAGE_SIZE / sizeof(u32))
  31
  32 static struct i915_vma *
  33 gpu_fill_dw(struct i915_vma *vma, u64 offset, unsigned long count, u32 value)
  34 {
  35         struct drm_i915_gem_object *obj;
  36         const int gen = INTEL_GEN(vma->vm->i915);
  37         unsigned long n, size;
  38         u32 *cmd;
  39         int err;
  40
  41         size = (4 * count + 1) * sizeof(u32);
  42         size = round_up(size, PAGE_SIZE);
  43         obj = i915_gem_object_create_internal(vma->vm->i915, size);
  44         if (IS_ERR(obj))
  45                 return ERR_CAST(obj);
  46
  47         cmd = i915_gem_object_pin_map(obj, I915_MAP_WB);
  48         if (IS_ERR(cmd)) {
  49                 err = PTR_ERR(cmd);
  50                 goto err;
  51         }
  52
  53         GEM_BUG_ON(offset + (count - 1) * PAGE_SIZE > vma->node.size);
  54         offset += vma->node.start;
  55
  56         for (n = 0; n < count; n++) {
  57                 if (gen >= 8) {
  58                         *cmd++ = MI_STORE_DWORD_IMM_GEN4;
  59                         *cmd++ = lower_32_bits(offset);
  60                         *cmd++ = upper_32_bits(offset);
  61                         *cmd++ = value;
  62                 } else if (gen >= 4) {
  63                         *cmd++ = MI_STORE_DWORD_IMM_GEN4 |
  64                                 (gen < 6 ? 1 << 22 : 0);
  65                         *cmd++ = 0;
  66                         *cmd++ = offset;
  67                         *cmd++ = value;
  68                 } else {
  69                         *cmd++ = MI_STORE_DWORD_IMM | 1 << 22;
  70                         *cmd++ = offset;
  71                         *cmd++ = value;
  72                 }
  73                 offset += PAGE_SIZE;
  74         }
  75         *cmd = MI_BATCH_BUFFER_END;
  76         i915_gem_object_unpin_map(obj);
  77
  78         err = i915_gem_object_set_to_gtt_domain(obj, false);
  79         if (err)
  80                 goto err;
  81
  82         vma = i915_vma_instance(obj, vma->vm, NULL);
  83         if (IS_ERR(vma)) {
  84                 err = PTR_ERR(vma);
  85                 goto err;
  86         }
  87
  88         err = i915_vma_pin(vma, 0, 0, PIN_USER);
  89         if (err)
  90                 goto err;
  91
  92         return vma;
  93
  94 err:
  95         i915_gem_object_put(obj);
  96         return ERR_PTR(err);
  97 }
  98
  99 static unsigned long real_page_count(struct drm_i915_gem_object *obj)
 100 {
 101         return huge_gem_object_phys_size(obj) >> PAGE_SHIFT;
 102 }
 103
 104 static unsigned long fake_page_count(struct drm_i915_gem_object *obj)
 105 {
 106         return huge_gem_object_dma_size(obj) >> PAGE_SHIFT;
 107 }
 108
 109 static int gpu_fill(struct drm_i915_gem_object *obj,
 110                     struct i915_gem_context *ctx,
 111                     struct intel_engine_cs *engine,
 112                     unsigned int dw)
 113 {
 114         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 115         struct i915_address_space *vm =
 116                 ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
 117         struct drm_i915_gem_request *rq;
 118         struct i915_vma *vma;
 119         struct i915_vma *batch;
 120         unsigned int flags;
 121         int err;
 122
 123         GEM_BUG_ON(obj->base.size > vm->total);
 124         GEM_BUG_ON(!intel_engine_can_store_dword(engine));
 125
 126         vma = i915_vma_instance(obj, vm, NULL);
 127         if (IS_ERR(vma))
 128                 return PTR_ERR(vma);
 129
 130         err = i915_gem_object_set_to_gtt_domain(obj, false);
 131         if (err)
 132                 return err;
 133
 134         err = i915_vma_pin(vma, 0, 0, PIN_HIGH | PIN_USER);
 135         if (err)
 136                 return err;
 137
 138         /* Within the GTT the huge objects maps every page onto
 139          * its 1024 real pages (using phys_pfn = dma_pfn % 1024).
 140          * We set the nth dword within the page using the nth
 141          * mapping via the GTT - this should exercise the GTT mapping
 142          * whilst checking that each context provides a unique view
 143          * into the object.
 144          */
 145         batch = gpu_fill_dw(vma,
 146                             (dw * real_page_count(obj)) << PAGE_SHIFT |
 147                             (dw * sizeof(u32)),
 148                             real_page_count(obj),
 149                             dw);
 150         if (IS_ERR(batch)) {
 151                 err = PTR_ERR(batch);
 152                 goto err_vma;
 153         }
 154
 155         rq = i915_gem_request_alloc(engine, ctx);
 156         if (IS_ERR(rq)) {
 157                 err = PTR_ERR(rq);
 158                 goto err_batch;
 159         }
 160
 161         err = i915_switch_context(rq);
 162         if (err)
 163                 goto err_request;
 164
 165         flags = 0;
 166         if (INTEL_GEN(vm->i915) <= 5)
 167                 flags |= I915_DISPATCH_SECURE;
 168
 169         err = engine->emit_bb_start(rq,
 170                                     batch->node.start, batch->node.size,
 171                                     flags);
 172         if (err)
 173                 goto err_request;
 174
 175         i915_vma_move_to_active(batch, rq, 0);
 176         i915_gem_object_set_active_reference(batch->obj);
 177         i915_vma_unpin(batch);
 178         i915_vma_close(batch);
 179
 180         i915_vma_move_to_active(vma, rq, 0);
 181         i915_vma_unpin(vma);
 182
 183         reservation_object_lock(obj->resv, NULL);
 184         reservation_object_add_excl_fence(obj->resv, &rq->fence);
 185         reservation_object_unlock(obj->resv);
 186
 187         __i915_add_request(rq, true);
 188
 189         return 0;
 190
 191 err_request:
 192         __i915_add_request(rq, false);
 193 err_batch:
 194         i915_vma_unpin(batch);
 195 err_vma:
 196         i915_vma_unpin(vma);
 197         return err;
 198 }
 199
 200 static int cpu_fill(struct drm_i915_gem_object *obj, u32 value)
 201 {
 202         const bool has_llc = HAS_LLC(to_i915(obj->base.dev));
 203         unsigned int n, m, need_flush;
 204         int err;
 205
 206         err = i915_gem_obj_prepare_shmem_write(obj, &need_flush);
 207         if (err)
 208                 return err;
 209
 210         for (n = 0; n < real_page_count(obj); n++) {
 211                 u32 *map;
 212
 213                 map = kmap_atomic(i915_gem_object_get_page(obj, n));
 214                 for (m = 0; m < DW_PER_PAGE; m++)
 215                         map[m] = value;
 216                 if (!has_llc)
 217                         drm_clflush_virt_range(map, PAGE_SIZE);
 218                 kunmap_atomic(map);
 219         }
 220
 221         i915_gem_obj_finish_shmem_access(obj);
 222         obj->base.read_domains = I915_GEM_DOMAIN_GTT | I915_GEM_DOMAIN_CPU;
 223         obj->base.write_domain = 0;
 224         return 0;
 225 }
 226
 227 static int cpu_check(struct drm_i915_gem_object *obj, unsigned int max)
 228 {
 229         unsigned int n, m, needs_flush;
 230         int err;
 231
 232         err = i915_gem_obj_prepare_shmem_read(obj, &needs_flush);
 233         if (err)
 234                 return err;
 235
 236         for (n = 0; n < real_page_count(obj); n++) {
 237                 u32 *map;
 238
 239                 map = kmap_atomic(i915_gem_object_get_page(obj, n));
 240                 if (needs_flush & CLFLUSH_BEFORE)
 241                         drm_clflush_virt_range(map, PAGE_SIZE);
 242
 243                 for (m = 0; m < max; m++) {
 244                         if (map[m] != m) {
 245                                 pr_err("Invalid value at page %d, offset %d: found %x expected %x\n",
 246                                        n, m, map[m], m);
 247                                 err = -EINVAL;
 248                                 goto out_unmap;
 249                         }
 250                 }
 251
 252                 for (; m < DW_PER_PAGE; m++) {
 253                         if (map[m] != 0xdeadbeef) {
 254                                 pr_err("Invalid value at page %d, offset %d: found %x expected %x\n",
 255                                        n, m, map[m], 0xdeadbeef);
 256                                 err = -EINVAL;
 257                                 goto out_unmap;
 258                         }
 259                 }
 260
 261 out_unmap:
 262                 kunmap_atomic(map);
 263                 if (err)
 264                         break;
 265         }
 266
 267         i915_gem_obj_finish_shmem_access(obj);
 268         return err;
 269 }
 270
 271 static struct drm_i915_gem_object *
 272 create_test_object(struct i915_gem_context *ctx,
 273                    struct drm_file *file,
 274                    struct list_head *objects)
 275 {
 276         struct drm_i915_gem_object *obj;
 277         struct i915_address_space *vm =
 278                 ctx->ppgtt ? &ctx->ppgtt->base : &ctx->i915->ggtt.base;
 279         u64 size;
 280         u32 handle;
 281         int err;
 282
 283         size = min(vm->total / 2, 1024ull * DW_PER_PAGE * PAGE_SIZE);
 284         size = round_down(size, DW_PER_PAGE * PAGE_SIZE);
 285
 286         obj = huge_gem_object(ctx->i915, DW_PER_PAGE * PAGE_SIZE, size);
 287         if (IS_ERR(obj))
 288                 return obj;
 289
 290         /* tie the handle to the drm_file for easy reaping */
 291         err = drm_gem_handle_create(file, &obj->base, &handle);
 292         i915_gem_object_put(obj);
 293         if (err)
 294                 return ERR_PTR(err);
 295
 296         err = cpu_fill(obj, 0xdeadbeef);
 297         if (err) {
 298                 pr_err("Failed to fill object with cpu, err=%d\n",
 299                        err);
 300                 return ERR_PTR(err);
 301         }
 302
 303         list_add_tail(&obj->st_link, objects);
 304         return obj;
 305 }
 306
 307 static unsigned long max_dwords(struct drm_i915_gem_object *obj)
 308 {
 309         unsigned long npages = fake_page_count(obj);
 310
 311         GEM_BUG_ON(!IS_ALIGNED(npages, DW_PER_PAGE));
 312         return npages / DW_PER_PAGE;
 313 }
 314
 315 static int igt_ctx_exec(void *arg)
 316 {
 317         struct drm_i915_private *i915 = arg;
 318         struct drm_i915_gem_object *obj = NULL;
 319         struct drm_file *file;
 320         IGT_TIMEOUT(end_time);
 321         LIST_HEAD(objects);
 322         unsigned long ncontexts, ndwords, dw;
 323         bool first_shared_gtt = true;
 324         int err = -ENODEV;
 325
 326         /* Create a few different contexts (with different mm) and write
 327          * through each ctx/mm using the GPU making sure those writes end
 328          * up in the expected pages of our obj.
 329          */
 330
 331         file = mock_file(i915);
 332         if (IS_ERR(file))
 333                 return PTR_ERR(file);
 334
 335         mutex_lock(&i915->drm.struct_mutex);
 336
 337         ncontexts = 0;
 338         ndwords = 0;
 339         dw = 0;
 340         while (!time_after(jiffies, end_time)) {
 341                 struct intel_engine_cs *engine;
 342                 struct i915_gem_context *ctx;
 343                 unsigned int id;
 344
 345                 if (first_shared_gtt) {
 346                         ctx = __create_hw_context(i915, file->driver_priv);
 347                         first_shared_gtt = false;
 348                 } else {
 349                         ctx = i915_gem_create_context(i915, file->driver_priv);
 350                 }
 351                 if (IS_ERR(ctx)) {
 352                         err = PTR_ERR(ctx);
 353                         goto out_unlock;
 354                 }
 355
 356                 for_each_engine(engine, i915, id) {
 357                         if (!intel_engine_can_store_dword(engine))
 358                                 continue;
 359
 360                         if (!obj) {
 361                                 obj = create_test_object(ctx, file, &objects);
 362                                 if (IS_ERR(obj)) {
 363                                         err = PTR_ERR(obj);
 364                                         goto out_unlock;
 365                                 }
 366                         }
 367
 368                         err = gpu_fill(obj, ctx, engine, dw);
 369                         if (err) {
 370                                 pr_err("Failed to fill dword %lu [%lu/%lu] with gpu (%s) in ctx %u [full-ppgtt? %s], err=%d\n",
 371                                        ndwords, dw, max_dwords(obj),
 372                                        engine->name, ctx->hw_id,
 373                                        yesno(!!ctx->ppgtt), err);
 374                                 goto out_unlock;
 375                         }
 376
 377                         if (++dw == max_dwords(obj)) {
 378                                 obj = NULL;
 379                                 dw = 0;
 380                         }
 381                         ndwords++;
 382                 }
 383                 ncontexts++;
 384         }
 385         pr_info("Submitted %lu contexts (across %u engines), filling %lu dwords\n",
 386                 ncontexts, INTEL_INFO(i915)->num_rings, ndwords);
 387
 388         dw = 0;
 389         list_for_each_entry(obj, &objects, st_link) {
 390                 unsigned int rem =
 391                         min_t(unsigned int, ndwords - dw, max_dwords(obj));
 392
 393                 err = cpu_check(obj, rem);
 394                 if (err)
 395                         break;
 396
 397                 dw += rem;
 398         }
 399
 400 out_unlock:
 401         mutex_unlock(&i915->drm.struct_mutex);
 402
 403         mock_file_free(i915, file);
 404         return err;
 405 }
 406
 407 static int fake_aliasing_ppgtt_enable(struct drm_i915_private *i915)
 408 {
 409         struct drm_i915_gem_object *obj;
 410         int err;
 411
 412         err = i915_gem_init_aliasing_ppgtt(i915);
 413         if (err)
 414                 return err;
 415
 416         list_for_each_entry(obj, &i915->mm.bound_list, mm.link) {
 417                 struct i915_vma *vma;
 418
 419                 vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
 420                 if (IS_ERR(vma))
 421                         continue;
 422
 423                 vma->flags &= ~I915_VMA_LOCAL_BIND;
 424         }
 425
 426         return 0;
 427 }
 428
 429 static void fake_aliasing_ppgtt_disable(struct drm_i915_private *i915)
 430 {
 431         i915_gem_fini_aliasing_ppgtt(i915);
 432 }
 433
 434 int i915_gem_context_live_selftests(struct drm_i915_private *dev_priv)
 435 {
 436         static const struct i915_subtest tests[] = {
 437                 SUBTEST(igt_ctx_exec),
 438         };
 439         bool fake_alias = false;
 440         int err;
 441
 442         /* Install a fake aliasing gtt for exercise */
 443         if (USES_PPGTT(dev_priv) && !dev_priv->mm.aliasing_ppgtt) {
 444                 mutex_lock(&dev_priv->drm.struct_mutex);
 445                 err = fake_aliasing_ppgtt_enable(dev_priv);
 446                 mutex_unlock(&dev_priv->drm.struct_mutex);
 447                 if (err)
 448                         return err;
 449
 450                 GEM_BUG_ON(!dev_priv->mm.aliasing_ppgtt);
 451                 fake_alias = true;
 452         }
 453
 454         err = i915_subtests(tests, dev_priv);
 455
 456         if (fake_alias) {
 457                 mutex_lock(&dev_priv->drm.struct_mutex);
 458                 fake_aliasing_ppgtt_disable(dev_priv);
 459                 mutex_unlock(&dev_priv->drm.struct_mutex);
 460         }
 461
 462         return err;
 463 }