2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
35 #include "intel_drv.h"
38 #include "intel_sdvo_regs.h"
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 static const char *tv_format_names[] = {
54 "NTSC_M" , "NTSC_J" , "NTSC_443",
55 "PAL_B" , "PAL_D" , "PAL_G" ,
56 "PAL_H" , "PAL_I" , "PAL_M" ,
57 "PAL_N" , "PAL_NC" , "PAL_60" ,
58 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
59 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
63 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66 struct intel_encoder base;
68 struct i2c_adapter *i2c;
71 struct i2c_adapter ddc;
73 /* Register for the SDVO device: SDVOB or SDVOC */
76 /* Active outputs controlled by this SDVO output */
77 uint16_t controlled_output;
80 * Capabilities of the SDVO device returned by
81 * i830_sdvo_get_capabilities()
83 struct intel_sdvo_caps caps;
85 /* Pixel clock limitations reported by the SDVO device, in kHz */
86 int pixel_clock_min, pixel_clock_max;
89 * For multiple function SDVO device,
90 * this is for current attached outputs.
92 uint16_t attached_output;
95 * This is set if we're going to treat the device as TV-out.
97 * While we have these nice friendly flags for output types that ought
98 * to decide this for us, the S-Video output on our HDMI+S-Video card
99 * shows up as RGB1 (VGA).
103 /* This is for current tv format name */
107 * This is set if we treat the device as HDMI, instead of DVI.
110 bool has_hdmi_monitor;
114 * This is set if we detect output of sdvo device as LVDS and
115 * have a valid fixed mode to use with the panel.
120 * This is sdvo fixed pannel mode pointer
122 struct drm_display_mode *sdvo_lvds_fixed_mode;
124 /* DDC bus used by this SDVO encoder */
127 /* Input timings for adjusted_mode */
128 struct intel_sdvo_dtd input_dtd;
131 struct intel_sdvo_connector {
132 struct intel_connector base;
134 /* Mark the type of connector */
135 uint16_t output_flag;
139 /* This contains all current supported TV format */
140 u8 tv_format_supported[TV_FORMAT_NUM];
141 int format_supported_num;
142 struct drm_property *tv_format;
144 struct drm_property *force_audio_property;
146 /* add the property for the SDVO-TV */
147 struct drm_property *left;
148 struct drm_property *right;
149 struct drm_property *top;
150 struct drm_property *bottom;
151 struct drm_property *hpos;
152 struct drm_property *vpos;
153 struct drm_property *contrast;
154 struct drm_property *saturation;
155 struct drm_property *hue;
156 struct drm_property *sharpness;
157 struct drm_property *flicker_filter;
158 struct drm_property *flicker_filter_adaptive;
159 struct drm_property *flicker_filter_2d;
160 struct drm_property *tv_chroma_filter;
161 struct drm_property *tv_luma_filter;
162 struct drm_property *dot_crawl;
164 /* add the property for the SDVO-TV/LVDS */
165 struct drm_property *brightness;
167 /* Add variable to record current setting for the above property */
168 u32 left_margin, right_margin, top_margin, bottom_margin;
170 /* this is to get the range of margin.*/
171 u32 max_hscan, max_vscan;
172 u32 max_hpos, cur_hpos;
173 u32 max_vpos, cur_vpos;
174 u32 cur_brightness, max_brightness;
175 u32 cur_contrast, max_contrast;
176 u32 cur_saturation, max_saturation;
177 u32 cur_hue, max_hue;
178 u32 cur_sharpness, max_sharpness;
179 u32 cur_flicker_filter, max_flicker_filter;
180 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
181 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
182 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
183 u32 cur_tv_luma_filter, max_tv_luma_filter;
184 u32 cur_dot_crawl, max_dot_crawl;
187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
189 return container_of(encoder, struct intel_sdvo, base.base);
192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
194 return container_of(intel_attached_encoder(connector),
195 struct intel_sdvo, base);
198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
200 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
207 struct intel_sdvo_connector *intel_sdvo_connector,
210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
211 struct intel_sdvo_connector *intel_sdvo_connector);
214 * Writes the SDVOB or SDVOC with the given value, but always writes both
215 * SDVOB and SDVOC to work around apparent hardware issues (according to
216 * comments in the BIOS).
218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
220 struct drm_device *dev = intel_sdvo->base.base.dev;
221 struct drm_i915_private *dev_priv = dev->dev_private;
222 u32 bval = val, cval = val;
225 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
226 I915_WRITE(intel_sdvo->sdvo_reg, val);
227 I915_READ(intel_sdvo->sdvo_reg);
231 if (intel_sdvo->sdvo_reg == SDVOB) {
232 cval = I915_READ(SDVOC);
234 bval = I915_READ(SDVOB);
237 * Write the registers twice for luck. Sometimes,
238 * writing them only once doesn't appear to 'stick'.
239 * The BIOS does this too. Yay, magic
241 for (i = 0; i < 2; i++)
243 I915_WRITE(SDVOB, bval);
245 I915_WRITE(SDVOC, cval);
250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
252 struct i2c_msg msgs[] = {
254 .addr = intel_sdvo->slave_addr,
260 .addr = intel_sdvo->slave_addr,
268 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
271 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
276 /** Mapping of command numbers to names, for debug output */
277 static const struct _sdvo_cmd_name {
280 } sdvo_cmd_names[] = {
281 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
282 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
283 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
284 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
325 /* Add the op code for SDVO enhancements */
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
394 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
398 const void *args, int args_len)
402 DRM_DEBUG_KMS("%s: W: %02X ",
403 SDVO_NAME(intel_sdvo), cmd);
404 for (i = 0; i < args_len; i++)
405 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
408 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
409 if (cmd == sdvo_cmd_names[i].cmd) {
410 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
414 if (i == ARRAY_SIZE(sdvo_cmd_names))
415 DRM_LOG_KMS("(%02X)", cmd);
419 static const char *cmd_status_names[] = {
425 "Target not specified",
426 "Scaling not supported"
429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
430 const void *args, int args_len)
432 u8 buf[args_len*2 + 2], status;
433 struct i2c_msg msgs[args_len + 3];
436 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
438 for (i = 0; i < args_len; i++) {
439 msgs[i].addr = intel_sdvo->slave_addr;
442 msgs[i].buf = buf + 2 *i;
443 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
444 buf[2*i + 1] = ((u8*)args)[i];
446 msgs[i].addr = intel_sdvo->slave_addr;
449 msgs[i].buf = buf + 2*i;
450 buf[2*i + 0] = SDVO_I2C_OPCODE;
453 /* the following two are to read the response */
454 status = SDVO_I2C_CMD_STATUS;
455 msgs[i+1].addr = intel_sdvo->slave_addr;
458 msgs[i+1].buf = &status;
460 msgs[i+2].addr = intel_sdvo->slave_addr;
461 msgs[i+2].flags = I2C_M_RD;
463 msgs[i+2].buf = &status;
465 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
467 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
471 /* failure in I2C transfer */
472 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
479 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
480 void *response, int response_len)
486 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
489 * The documentation states that all commands will be
490 * processed within 15µs, and that we need only poll
491 * the status byte a maximum of 3 times in order for the
492 * command to be complete.
494 * Check 5 times in case the hardware failed to read the docs.
496 if (!intel_sdvo_read_byte(intel_sdvo,
501 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
503 if (!intel_sdvo_read_byte(intel_sdvo,
509 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
510 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
512 DRM_LOG_KMS("(??? %d)", status);
514 if (status != SDVO_CMD_STATUS_SUCCESS)
517 /* Read the command response */
518 for (i = 0; i < response_len; i++) {
519 if (!intel_sdvo_read_byte(intel_sdvo,
520 SDVO_I2C_RETURN_0 + i,
521 &((u8 *)response)[i]))
523 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
529 DRM_LOG_KMS("... failed\n");
533 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
535 if (mode->clock >= 100000)
537 else if (mode->clock >= 50000)
543 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
546 /* This must be the immediately preceding write before the i2c xfer */
547 return intel_sdvo_write_cmd(intel_sdvo,
548 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
552 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
554 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
557 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
561 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
563 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
566 return intel_sdvo_read_response(intel_sdvo, value, len);
569 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
571 struct intel_sdvo_set_target_input_args targets = {0};
572 return intel_sdvo_set_value(intel_sdvo,
573 SDVO_CMD_SET_TARGET_INPUT,
574 &targets, sizeof(targets));
578 * Return whether each input is trained.
580 * This function is making an assumption about the layout of the response,
581 * which should be checked against the docs.
583 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
585 struct intel_sdvo_get_trained_inputs_response response;
587 BUILD_BUG_ON(sizeof(response) != 1);
588 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
589 &response, sizeof(response)))
592 *input_1 = response.input0_trained;
593 *input_2 = response.input1_trained;
597 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
600 return intel_sdvo_set_value(intel_sdvo,
601 SDVO_CMD_SET_ACTIVE_OUTPUTS,
602 &outputs, sizeof(outputs));
605 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
608 u8 state = SDVO_ENCODER_STATE_ON;
611 case DRM_MODE_DPMS_ON:
612 state = SDVO_ENCODER_STATE_ON;
614 case DRM_MODE_DPMS_STANDBY:
615 state = SDVO_ENCODER_STATE_STANDBY;
617 case DRM_MODE_DPMS_SUSPEND:
618 state = SDVO_ENCODER_STATE_SUSPEND;
620 case DRM_MODE_DPMS_OFF:
621 state = SDVO_ENCODER_STATE_OFF;
625 return intel_sdvo_set_value(intel_sdvo,
626 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
629 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
633 struct intel_sdvo_pixel_clock_range clocks;
635 BUILD_BUG_ON(sizeof(clocks) != 4);
636 if (!intel_sdvo_get_value(intel_sdvo,
637 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
638 &clocks, sizeof(clocks)))
641 /* Convert the values from units of 10 kHz to kHz. */
642 *clock_min = clocks.min * 10;
643 *clock_max = clocks.max * 10;
647 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
650 return intel_sdvo_set_value(intel_sdvo,
651 SDVO_CMD_SET_TARGET_OUTPUT,
652 &outputs, sizeof(outputs));
655 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
656 struct intel_sdvo_dtd *dtd)
658 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
659 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
662 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
663 struct intel_sdvo_dtd *dtd)
665 return intel_sdvo_set_timing(intel_sdvo,
666 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
669 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
670 struct intel_sdvo_dtd *dtd)
672 return intel_sdvo_set_timing(intel_sdvo,
673 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
677 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
682 struct intel_sdvo_preferred_input_timing_args args;
684 memset(&args, 0, sizeof(args));
687 args.height = height;
690 if (intel_sdvo->is_lvds &&
691 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
692 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
695 return intel_sdvo_set_value(intel_sdvo,
696 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
697 &args, sizeof(args));
700 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
701 struct intel_sdvo_dtd *dtd)
703 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
704 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
705 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
706 &dtd->part1, sizeof(dtd->part1)) &&
707 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
708 &dtd->part2, sizeof(dtd->part2));
711 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
713 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
716 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
717 const struct drm_display_mode *mode)
719 uint16_t width, height;
720 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
721 uint16_t h_sync_offset, v_sync_offset;
723 width = mode->crtc_hdisplay;
724 height = mode->crtc_vdisplay;
726 /* do some mode translations */
727 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
728 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
730 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
731 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
733 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
734 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
736 dtd->part1.clock = mode->clock / 10;
737 dtd->part1.h_active = width & 0xff;
738 dtd->part1.h_blank = h_blank_len & 0xff;
739 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
740 ((h_blank_len >> 8) & 0xf);
741 dtd->part1.v_active = height & 0xff;
742 dtd->part1.v_blank = v_blank_len & 0xff;
743 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
744 ((v_blank_len >> 8) & 0xf);
746 dtd->part2.h_sync_off = h_sync_offset & 0xff;
747 dtd->part2.h_sync_width = h_sync_len & 0xff;
748 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
750 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
751 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
752 ((v_sync_len & 0x30) >> 4);
754 dtd->part2.dtd_flags = 0x18;
755 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
756 dtd->part2.dtd_flags |= 0x2;
757 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
758 dtd->part2.dtd_flags |= 0x4;
760 dtd->part2.sdvo_flags = 0;
761 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
762 dtd->part2.reserved = 0;
765 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
766 const struct intel_sdvo_dtd *dtd)
768 mode->hdisplay = dtd->part1.h_active;
769 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
770 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
771 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
772 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
773 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
774 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
775 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
777 mode->vdisplay = dtd->part1.v_active;
778 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
779 mode->vsync_start = mode->vdisplay;
780 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
781 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
782 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
783 mode->vsync_end = mode->vsync_start +
784 (dtd->part2.v_sync_off_width & 0xf);
785 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
786 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
787 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
789 mode->clock = dtd->part1.clock * 10;
791 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
792 if (dtd->part2.dtd_flags & 0x2)
793 mode->flags |= DRM_MODE_FLAG_PHSYNC;
794 if (dtd->part2.dtd_flags & 0x4)
795 mode->flags |= DRM_MODE_FLAG_PVSYNC;
798 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
800 struct intel_sdvo_encode encode;
802 BUILD_BUG_ON(sizeof(encode) != 2);
803 return intel_sdvo_get_value(intel_sdvo,
804 SDVO_CMD_GET_SUPP_ENCODE,
805 &encode, sizeof(encode));
808 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
811 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
814 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
817 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
821 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
824 uint8_t set_buf_index[2];
830 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
832 for (i = 0; i <= av_split; i++) {
833 set_buf_index[0] = i; set_buf_index[1] = 0;
834 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
836 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
837 intel_sdvo_read_response(encoder, &buf_size, 1);
840 for (j = 0; j <= buf_size; j += 8) {
841 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
843 intel_sdvo_read_response(encoder, pos, 8);
850 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
852 struct dip_infoframe avi_if = {
853 .type = DIP_TYPE_AVI,
854 .ver = DIP_VERSION_AVI,
857 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
858 uint8_t set_buf_index[2] = { 1, 0 };
859 uint64_t *data = (uint64_t *)&avi_if;
862 intel_dip_infoframe_csum(&avi_if);
864 if (!intel_sdvo_set_value(intel_sdvo,
865 SDVO_CMD_SET_HBUF_INDEX,
869 for (i = 0; i < sizeof(avi_if); i += 8) {
870 if (!intel_sdvo_set_value(intel_sdvo,
871 SDVO_CMD_SET_HBUF_DATA,
877 return intel_sdvo_set_value(intel_sdvo,
878 SDVO_CMD_SET_HBUF_TXRATE,
882 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
884 struct intel_sdvo_tv_format format;
887 format_map = 1 << intel_sdvo->tv_format_index;
888 memset(&format, 0, sizeof(format));
889 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
891 BUILD_BUG_ON(sizeof(format) != 6);
892 return intel_sdvo_set_value(intel_sdvo,
893 SDVO_CMD_SET_TV_FORMAT,
894 &format, sizeof(format));
898 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
899 struct drm_display_mode *mode)
901 struct intel_sdvo_dtd output_dtd;
903 if (!intel_sdvo_set_target_output(intel_sdvo,
904 intel_sdvo->attached_output))
907 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
908 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
915 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
916 struct drm_display_mode *mode,
917 struct drm_display_mode *adjusted_mode)
919 /* Reset the input timing to the screen. Assume always input 0. */
920 if (!intel_sdvo_set_target_input(intel_sdvo))
923 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
929 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
930 &intel_sdvo->input_dtd))
933 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
935 drm_mode_set_crtcinfo(adjusted_mode, 0);
939 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
940 struct drm_display_mode *mode,
941 struct drm_display_mode *adjusted_mode)
943 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
946 /* We need to construct preferred input timings based on our
947 * output timings. To do that, we have to set the output
948 * timings, even though this isn't really the right place in
949 * the sequence to do it. Oh well.
951 if (intel_sdvo->is_tv) {
952 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
955 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
958 } else if (intel_sdvo->is_lvds) {
959 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
960 intel_sdvo->sdvo_lvds_fixed_mode))
963 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
968 /* Make the CRTC code factor in the SDVO pixel multiplier. The
969 * SDVO device will factor out the multiplier during mode_set.
971 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
972 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
977 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
978 struct drm_display_mode *mode,
979 struct drm_display_mode *adjusted_mode)
981 struct drm_device *dev = encoder->dev;
982 struct drm_i915_private *dev_priv = dev->dev_private;
983 struct drm_crtc *crtc = encoder->crtc;
984 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
985 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
987 struct intel_sdvo_in_out_map in_out;
988 struct intel_sdvo_dtd input_dtd;
989 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
995 /* First, set the input mapping for the first input to our controlled
996 * output. This is only correct if we're a single-input device, in
997 * which case the first input is the output from the appropriate SDVO
998 * channel on the motherboard. In a two-input device, the first input
999 * will be SDVOB and the second SDVOC.
1001 in_out.in0 = intel_sdvo->attached_output;
1004 intel_sdvo_set_value(intel_sdvo,
1005 SDVO_CMD_SET_IN_OUT_MAP,
1006 &in_out, sizeof(in_out));
1008 /* Set the output timings to the screen */
1009 if (!intel_sdvo_set_target_output(intel_sdvo,
1010 intel_sdvo->attached_output))
1013 /* We have tried to get input timing in mode_fixup, and filled into
1016 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1017 input_dtd = intel_sdvo->input_dtd;
1019 /* Set the output timing to the screen */
1020 if (!intel_sdvo_set_target_output(intel_sdvo,
1021 intel_sdvo->attached_output))
1024 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1025 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1028 /* Set the input timing to the screen. Assume always input 0. */
1029 if (!intel_sdvo_set_target_input(intel_sdvo))
1032 if (intel_sdvo->has_hdmi_monitor) {
1033 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1034 intel_sdvo_set_colorimetry(intel_sdvo,
1035 SDVO_COLORIMETRY_RGB256);
1036 intel_sdvo_set_avi_infoframe(intel_sdvo);
1038 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1040 if (intel_sdvo->is_tv &&
1041 !intel_sdvo_set_tv_format(intel_sdvo))
1044 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1046 switch (pixel_multiplier) {
1048 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1049 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1050 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1052 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1055 /* Set the SDVO control regs. */
1056 if (INTEL_INFO(dev)->gen >= 4) {
1058 if (INTEL_INFO(dev)->gen < 5)
1059 sdvox |= SDVO_BORDER_ENABLE;
1060 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1061 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1062 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1063 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1065 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1066 switch (intel_sdvo->sdvo_reg) {
1068 sdvox &= SDVOB_PRESERVE_MASK;
1071 sdvox &= SDVOC_PRESERVE_MASK;
1074 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1076 if (intel_crtc->pipe == 1)
1077 sdvox |= SDVO_PIPE_B_SELECT;
1078 if (intel_sdvo->has_hdmi_audio)
1079 sdvox |= SDVO_AUDIO_ENABLE;
1081 if (INTEL_INFO(dev)->gen >= 4) {
1082 /* done in crtc_mode_set as the dpll_md reg must be written early */
1083 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1084 /* done in crtc_mode_set as it lives inside the dpll register */
1086 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1089 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1090 INTEL_INFO(dev)->gen < 5)
1091 sdvox |= SDVO_STALL_SELECT;
1092 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1095 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1097 struct drm_device *dev = encoder->dev;
1098 struct drm_i915_private *dev_priv = dev->dev_private;
1099 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1100 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1103 if (mode != DRM_MODE_DPMS_ON) {
1104 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1106 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1108 if (mode == DRM_MODE_DPMS_OFF) {
1109 temp = I915_READ(intel_sdvo->sdvo_reg);
1110 if ((temp & SDVO_ENABLE) != 0) {
1111 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1115 bool input1, input2;
1119 temp = I915_READ(intel_sdvo->sdvo_reg);
1120 if ((temp & SDVO_ENABLE) == 0)
1121 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1122 for (i = 0; i < 2; i++)
1123 intel_wait_for_vblank(dev, intel_crtc->pipe);
1125 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1126 /* Warn if the device reported failure to sync.
1127 * A lot of SDVO devices fail to notify of sync, but it's
1128 * a given it the status is a success, we succeeded.
1130 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1131 DRM_DEBUG_KMS("First %s output reported failure to "
1132 "sync\n", SDVO_NAME(intel_sdvo));
1136 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1137 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1142 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1143 struct drm_display_mode *mode)
1145 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1147 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1148 return MODE_NO_DBLESCAN;
1150 if (intel_sdvo->pixel_clock_min > mode->clock)
1151 return MODE_CLOCK_LOW;
1153 if (intel_sdvo->pixel_clock_max < mode->clock)
1154 return MODE_CLOCK_HIGH;
1156 if (intel_sdvo->is_lvds) {
1157 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1160 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1167 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1169 BUILD_BUG_ON(sizeof(*caps) != 8);
1170 if (!intel_sdvo_get_value(intel_sdvo,
1171 SDVO_CMD_GET_DEVICE_CAPS,
1172 caps, sizeof(*caps)))
1175 DRM_DEBUG_KMS("SDVO capabilities:\n"
1178 " device_rev_id: %d\n"
1179 " sdvo_version_major: %d\n"
1180 " sdvo_version_minor: %d\n"
1181 " sdvo_inputs_mask: %d\n"
1182 " smooth_scaling: %d\n"
1183 " sharp_scaling: %d\n"
1185 " down_scaling: %d\n"
1186 " stall_support: %d\n"
1187 " output_flags: %d\n",
1190 caps->device_rev_id,
1191 caps->sdvo_version_major,
1192 caps->sdvo_version_minor,
1193 caps->sdvo_inputs_mask,
1194 caps->smooth_scaling,
1195 caps->sharp_scaling,
1198 caps->stall_support,
1199 caps->output_flags);
1206 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1208 struct drm_connector *connector = NULL;
1209 struct intel_sdvo *iout = NULL;
1210 struct intel_sdvo *sdvo;
1212 /* find the sdvo connector */
1213 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1214 iout = to_intel_sdvo(connector);
1216 if (iout->type != INTEL_OUTPUT_SDVO)
1219 sdvo = iout->dev_priv;
1221 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1224 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1232 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1236 struct intel_sdvo *intel_sdvo;
1237 DRM_DEBUG_KMS("\n");
1242 intel_sdvo = to_intel_sdvo(connector);
1244 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1245 &response, 2) && response[0];
1248 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1252 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1254 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1255 intel_sdvo_read_response(intel_sdvo, &response, 2);
1258 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1259 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1261 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1265 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1268 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1269 intel_sdvo_read_response(intel_sdvo, &response, 2);
1274 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1276 /* Is there more than one type of output? */
1277 int caps = intel_sdvo->caps.output_flags & 0xf;
1278 return caps & -caps;
1281 static struct edid *
1282 intel_sdvo_get_edid(struct drm_connector *connector)
1284 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1285 return drm_get_edid(connector, &sdvo->ddc);
1288 /* Mac mini hack -- use the same DDC as the analog connector */
1289 static struct edid *
1290 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1292 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1294 return drm_get_edid(connector,
1295 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1298 enum drm_connector_status
1299 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1301 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1302 enum drm_connector_status status;
1305 edid = intel_sdvo_get_edid(connector);
1307 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1308 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1311 * Don't use the 1 as the argument of DDC bus switch to get
1312 * the EDID. It is used for SDVO SPD ROM.
1314 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1315 intel_sdvo->ddc_bus = ddc;
1316 edid = intel_sdvo_get_edid(connector);
1321 * If we found the EDID on the other bus,
1322 * assume that is the correct DDC bus.
1325 intel_sdvo->ddc_bus = saved_ddc;
1329 * When there is no edid and no monitor is connected with VGA
1330 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1333 edid = intel_sdvo_get_analog_edid(connector);
1335 status = connector_status_unknown;
1337 /* DDC bus is shared, match EDID to connector type */
1338 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1339 status = connector_status_connected;
1340 if (intel_sdvo->is_hdmi) {
1341 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1342 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1345 connector->display_info.raw_edid = NULL;
1349 if (status == connector_status_connected) {
1350 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1351 if (intel_sdvo_connector->force_audio)
1352 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1358 static enum drm_connector_status
1359 intel_sdvo_detect(struct drm_connector *connector, bool force)
1362 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1363 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1364 enum drm_connector_status ret;
1366 if (!intel_sdvo_write_cmd(intel_sdvo,
1367 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1368 return connector_status_unknown;
1370 /* add 30ms delay when the output type might be TV */
1371 if (intel_sdvo->caps.output_flags &
1372 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1375 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1376 return connector_status_unknown;
1378 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1379 response & 0xff, response >> 8,
1380 intel_sdvo_connector->output_flag);
1383 return connector_status_disconnected;
1385 intel_sdvo->attached_output = response;
1387 intel_sdvo->has_hdmi_monitor = false;
1388 intel_sdvo->has_hdmi_audio = false;
1390 if ((intel_sdvo_connector->output_flag & response) == 0)
1391 ret = connector_status_disconnected;
1392 else if (response & SDVO_TMDS_MASK)
1393 ret = intel_sdvo_hdmi_sink_detect(connector);
1395 ret = connector_status_connected;
1397 /* May update encoder flag for like clock for SDVO TV, etc.*/
1398 if (ret == connector_status_connected) {
1399 intel_sdvo->is_tv = false;
1400 intel_sdvo->is_lvds = false;
1401 intel_sdvo->base.needs_tv_clock = false;
1403 if (response & SDVO_TV_MASK) {
1404 intel_sdvo->is_tv = true;
1405 intel_sdvo->base.needs_tv_clock = true;
1407 if (response & SDVO_LVDS_MASK)
1408 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1414 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1418 /* set the bus switch and get the modes */
1419 edid = intel_sdvo_get_edid(connector);
1422 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1423 * link between analog and digital outputs. So, if the regular SDVO
1424 * DDC fails, check to see if the analog output is disconnected, in
1425 * which case we'll look there for the digital DDC data.
1428 edid = intel_sdvo_get_analog_edid(connector);
1431 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1432 drm_mode_connector_update_edid_property(connector, edid);
1433 drm_add_edid_modes(connector, edid);
1435 connector->display_info.raw_edid = NULL;
1441 * Set of SDVO TV modes.
1442 * Note! This is in reply order (see loop in get_tv_modes).
1443 * XXX: all 60Hz refresh?
1445 struct drm_display_mode sdvo_tv_modes[] = {
1446 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1447 416, 0, 200, 201, 232, 233, 0,
1448 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1449 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1450 416, 0, 240, 241, 272, 273, 0,
1451 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1453 496, 0, 300, 301, 332, 333, 0,
1454 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1455 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1456 736, 0, 350, 351, 382, 383, 0,
1457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1458 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1459 736, 0, 400, 401, 432, 433, 0,
1460 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1461 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1462 736, 0, 480, 481, 512, 513, 0,
1463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1464 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1465 800, 0, 480, 481, 512, 513, 0,
1466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1468 800, 0, 576, 577, 608, 609, 0,
1469 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1471 816, 0, 350, 351, 382, 383, 0,
1472 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1474 816, 0, 400, 401, 432, 433, 0,
1475 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1477 816, 0, 480, 481, 512, 513, 0,
1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1480 816, 0, 540, 541, 572, 573, 0,
1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1483 816, 0, 576, 577, 608, 609, 0,
1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1486 864, 0, 576, 577, 608, 609, 0,
1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1489 896, 0, 600, 601, 632, 633, 0,
1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1492 928, 0, 624, 625, 656, 657, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1495 1016, 0, 766, 767, 798, 799, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1498 1120, 0, 768, 769, 800, 801, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1501 1376, 0, 1024, 1025, 1056, 1057, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1505 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1507 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1508 struct intel_sdvo_sdtv_resolution_request tv_res;
1509 uint32_t reply = 0, format_map = 0;
1512 /* Read the list of supported input resolutions for the selected TV
1515 format_map = 1 << intel_sdvo->tv_format_index;
1516 memcpy(&tv_res, &format_map,
1517 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1519 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1522 BUILD_BUG_ON(sizeof(tv_res) != 3);
1523 if (!intel_sdvo_write_cmd(intel_sdvo,
1524 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1525 &tv_res, sizeof(tv_res)))
1527 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1530 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1531 if (reply & (1 << i)) {
1532 struct drm_display_mode *nmode;
1533 nmode = drm_mode_duplicate(connector->dev,
1536 drm_mode_probed_add(connector, nmode);
1540 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1542 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1543 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1544 struct drm_display_mode *newmode;
1547 * Attempt to get the mode list from DDC.
1548 * Assume that the preferred modes are
1549 * arranged in priority order.
1551 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1552 if (list_empty(&connector->probed_modes) == false)
1555 /* Fetch modes from VBT */
1556 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1557 newmode = drm_mode_duplicate(connector->dev,
1558 dev_priv->sdvo_lvds_vbt_mode);
1559 if (newmode != NULL) {
1560 /* Guarantee the mode is preferred */
1561 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1562 DRM_MODE_TYPE_DRIVER);
1563 drm_mode_probed_add(connector, newmode);
1568 list_for_each_entry(newmode, &connector->probed_modes, head) {
1569 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1570 intel_sdvo->sdvo_lvds_fixed_mode =
1571 drm_mode_duplicate(connector->dev, newmode);
1573 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1576 intel_sdvo->is_lvds = true;
1583 static int intel_sdvo_get_modes(struct drm_connector *connector)
1585 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1587 if (IS_TV(intel_sdvo_connector))
1588 intel_sdvo_get_tv_modes(connector);
1589 else if (IS_LVDS(intel_sdvo_connector))
1590 intel_sdvo_get_lvds_modes(connector);
1592 intel_sdvo_get_ddc_modes(connector);
1594 return !list_empty(&connector->probed_modes);
1598 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1600 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1601 struct drm_device *dev = connector->dev;
1603 if (intel_sdvo_connector->left)
1604 drm_property_destroy(dev, intel_sdvo_connector->left);
1605 if (intel_sdvo_connector->right)
1606 drm_property_destroy(dev, intel_sdvo_connector->right);
1607 if (intel_sdvo_connector->top)
1608 drm_property_destroy(dev, intel_sdvo_connector->top);
1609 if (intel_sdvo_connector->bottom)
1610 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1611 if (intel_sdvo_connector->hpos)
1612 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1613 if (intel_sdvo_connector->vpos)
1614 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1615 if (intel_sdvo_connector->saturation)
1616 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1617 if (intel_sdvo_connector->contrast)
1618 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1619 if (intel_sdvo_connector->hue)
1620 drm_property_destroy(dev, intel_sdvo_connector->hue);
1621 if (intel_sdvo_connector->sharpness)
1622 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1623 if (intel_sdvo_connector->flicker_filter)
1624 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1625 if (intel_sdvo_connector->flicker_filter_2d)
1626 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1627 if (intel_sdvo_connector->flicker_filter_adaptive)
1628 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1629 if (intel_sdvo_connector->tv_luma_filter)
1630 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1631 if (intel_sdvo_connector->tv_chroma_filter)
1632 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1633 if (intel_sdvo_connector->dot_crawl)
1634 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1635 if (intel_sdvo_connector->brightness)
1636 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1639 static void intel_sdvo_destroy(struct drm_connector *connector)
1641 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1643 if (intel_sdvo_connector->tv_format)
1644 drm_property_destroy(connector->dev,
1645 intel_sdvo_connector->tv_format);
1647 intel_sdvo_destroy_enhance_property(connector);
1648 drm_sysfs_connector_remove(connector);
1649 drm_connector_cleanup(connector);
1654 intel_sdvo_set_property(struct drm_connector *connector,
1655 struct drm_property *property,
1658 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1659 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1660 uint16_t temp_value;
1664 ret = drm_connector_property_set_value(connector, property, val);
1668 if (property == intel_sdvo_connector->force_audio_property) {
1669 if (val == intel_sdvo_connector->force_audio)
1672 intel_sdvo_connector->force_audio = val;
1674 if (val > 0 && intel_sdvo->has_hdmi_audio)
1676 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1679 intel_sdvo->has_hdmi_audio = val > 0;
1683 #define CHECK_PROPERTY(name, NAME) \
1684 if (intel_sdvo_connector->name == property) { \
1685 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1686 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1687 cmd = SDVO_CMD_SET_##NAME; \
1688 intel_sdvo_connector->cur_##name = temp_value; \
1692 if (property == intel_sdvo_connector->tv_format) {
1693 if (val >= TV_FORMAT_NUM)
1696 if (intel_sdvo->tv_format_index ==
1697 intel_sdvo_connector->tv_format_supported[val])
1700 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1702 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1704 if (intel_sdvo_connector->left == property) {
1705 drm_connector_property_set_value(connector,
1706 intel_sdvo_connector->right, val);
1707 if (intel_sdvo_connector->left_margin == temp_value)
1710 intel_sdvo_connector->left_margin = temp_value;
1711 intel_sdvo_connector->right_margin = temp_value;
1712 temp_value = intel_sdvo_connector->max_hscan -
1713 intel_sdvo_connector->left_margin;
1714 cmd = SDVO_CMD_SET_OVERSCAN_H;
1716 } else if (intel_sdvo_connector->right == property) {
1717 drm_connector_property_set_value(connector,
1718 intel_sdvo_connector->left, val);
1719 if (intel_sdvo_connector->right_margin == temp_value)
1722 intel_sdvo_connector->left_margin = temp_value;
1723 intel_sdvo_connector->right_margin = temp_value;
1724 temp_value = intel_sdvo_connector->max_hscan -
1725 intel_sdvo_connector->left_margin;
1726 cmd = SDVO_CMD_SET_OVERSCAN_H;
1728 } else if (intel_sdvo_connector->top == property) {
1729 drm_connector_property_set_value(connector,
1730 intel_sdvo_connector->bottom, val);
1731 if (intel_sdvo_connector->top_margin == temp_value)
1734 intel_sdvo_connector->top_margin = temp_value;
1735 intel_sdvo_connector->bottom_margin = temp_value;
1736 temp_value = intel_sdvo_connector->max_vscan -
1737 intel_sdvo_connector->top_margin;
1738 cmd = SDVO_CMD_SET_OVERSCAN_V;
1740 } else if (intel_sdvo_connector->bottom == property) {
1741 drm_connector_property_set_value(connector,
1742 intel_sdvo_connector->top, val);
1743 if (intel_sdvo_connector->bottom_margin == temp_value)
1746 intel_sdvo_connector->top_margin = temp_value;
1747 intel_sdvo_connector->bottom_margin = temp_value;
1748 temp_value = intel_sdvo_connector->max_vscan -
1749 intel_sdvo_connector->top_margin;
1750 cmd = SDVO_CMD_SET_OVERSCAN_V;
1753 CHECK_PROPERTY(hpos, HPOS)
1754 CHECK_PROPERTY(vpos, VPOS)
1755 CHECK_PROPERTY(saturation, SATURATION)
1756 CHECK_PROPERTY(contrast, CONTRAST)
1757 CHECK_PROPERTY(hue, HUE)
1758 CHECK_PROPERTY(brightness, BRIGHTNESS)
1759 CHECK_PROPERTY(sharpness, SHARPNESS)
1760 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1761 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1762 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1763 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1764 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1765 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1768 return -EINVAL; /* unknown property */
1771 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1776 if (intel_sdvo->base.base.crtc) {
1777 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1778 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1783 #undef CHECK_PROPERTY
1786 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1787 .dpms = intel_sdvo_dpms,
1788 .mode_fixup = intel_sdvo_mode_fixup,
1789 .prepare = intel_encoder_prepare,
1790 .mode_set = intel_sdvo_mode_set,
1791 .commit = intel_encoder_commit,
1794 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1795 .dpms = drm_helper_connector_dpms,
1796 .detect = intel_sdvo_detect,
1797 .fill_modes = drm_helper_probe_single_connector_modes,
1798 .set_property = intel_sdvo_set_property,
1799 .destroy = intel_sdvo_destroy,
1802 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1803 .get_modes = intel_sdvo_get_modes,
1804 .mode_valid = intel_sdvo_mode_valid,
1805 .best_encoder = intel_best_encoder,
1808 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1810 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1812 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1813 drm_mode_destroy(encoder->dev,
1814 intel_sdvo->sdvo_lvds_fixed_mode);
1816 i2c_del_adapter(&intel_sdvo->ddc);
1817 intel_encoder_destroy(encoder);
1820 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1821 .destroy = intel_sdvo_enc_destroy,
1825 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1828 unsigned int num_bits;
1830 /* Make a mask of outputs less than or equal to our own priority in the
1833 switch (sdvo->controlled_output) {
1834 case SDVO_OUTPUT_LVDS1:
1835 mask |= SDVO_OUTPUT_LVDS1;
1836 case SDVO_OUTPUT_LVDS0:
1837 mask |= SDVO_OUTPUT_LVDS0;
1838 case SDVO_OUTPUT_TMDS1:
1839 mask |= SDVO_OUTPUT_TMDS1;
1840 case SDVO_OUTPUT_TMDS0:
1841 mask |= SDVO_OUTPUT_TMDS0;
1842 case SDVO_OUTPUT_RGB1:
1843 mask |= SDVO_OUTPUT_RGB1;
1844 case SDVO_OUTPUT_RGB0:
1845 mask |= SDVO_OUTPUT_RGB0;
1849 /* Count bits to find what number we are in the priority list. */
1850 mask &= sdvo->caps.output_flags;
1851 num_bits = hweight16(mask);
1852 /* If more than 3 outputs, default to DDC bus 3 for now. */
1856 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1857 sdvo->ddc_bus = 1 << num_bits;
1861 * Choose the appropriate DDC bus for control bus switch command for this
1862 * SDVO output based on the controlled output.
1864 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1865 * outputs, then LVDS outputs.
1868 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1869 struct intel_sdvo *sdvo, u32 reg)
1871 struct sdvo_device_mapping *mapping;
1874 mapping = &(dev_priv->sdvo_mappings[0]);
1876 mapping = &(dev_priv->sdvo_mappings[1]);
1878 if (mapping->initialized)
1879 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1881 intel_sdvo_guess_ddc_bus(sdvo);
1885 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1886 struct intel_sdvo *sdvo, u32 reg)
1888 struct sdvo_device_mapping *mapping;
1892 mapping = &dev_priv->sdvo_mappings[0];
1894 mapping = &dev_priv->sdvo_mappings[1];
1896 pin = GMBUS_PORT_DPB;
1897 speed = GMBUS_RATE_1MHZ >> 8;
1898 if (mapping->initialized) {
1899 pin = mapping->i2c_pin;
1900 speed = mapping->i2c_speed;
1903 if (pin < GMBUS_NUM_PORTS) {
1904 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1905 intel_gmbus_set_speed(sdvo->i2c, speed);
1906 intel_gmbus_force_bit(sdvo->i2c, true);
1908 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1912 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1914 return intel_sdvo_check_supp_encode(intel_sdvo);
1918 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1920 struct drm_i915_private *dev_priv = dev->dev_private;
1921 struct sdvo_device_mapping *my_mapping, *other_mapping;
1923 if (IS_SDVOB(sdvo_reg)) {
1924 my_mapping = &dev_priv->sdvo_mappings[0];
1925 other_mapping = &dev_priv->sdvo_mappings[1];
1927 my_mapping = &dev_priv->sdvo_mappings[1];
1928 other_mapping = &dev_priv->sdvo_mappings[0];
1931 /* If the BIOS described our SDVO device, take advantage of it. */
1932 if (my_mapping->slave_addr)
1933 return my_mapping->slave_addr;
1935 /* If the BIOS only described a different SDVO device, use the
1936 * address that it isn't using.
1938 if (other_mapping->slave_addr) {
1939 if (other_mapping->slave_addr == 0x70)
1945 /* No SDVO device info is found for another DVO port,
1946 * so use mapping assumption we had before BIOS parsing.
1948 if (IS_SDVOB(sdvo_reg))
1955 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1956 struct intel_sdvo *encoder)
1958 drm_connector_init(encoder->base.base.dev,
1959 &connector->base.base,
1960 &intel_sdvo_connector_funcs,
1961 connector->base.base.connector_type);
1963 drm_connector_helper_add(&connector->base.base,
1964 &intel_sdvo_connector_helper_funcs);
1966 connector->base.base.interlace_allowed = 0;
1967 connector->base.base.doublescan_allowed = 0;
1968 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1970 intel_connector_attach_encoder(&connector->base, &encoder->base);
1971 drm_sysfs_connector_add(&connector->base.base);
1975 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1977 struct drm_device *dev = connector->base.base.dev;
1979 connector->force_audio_property =
1980 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
1981 if (connector->force_audio_property) {
1982 connector->force_audio_property->values[0] = -1;
1983 connector->force_audio_property->values[1] = 1;
1984 drm_connector_attach_property(&connector->base.base,
1985 connector->force_audio_property, 0);
1990 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
1992 struct drm_encoder *encoder = &intel_sdvo->base.base;
1993 struct drm_connector *connector;
1994 struct intel_connector *intel_connector;
1995 struct intel_sdvo_connector *intel_sdvo_connector;
1997 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
1998 if (!intel_sdvo_connector)
2002 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2003 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2004 } else if (device == 1) {
2005 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2006 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2009 intel_connector = &intel_sdvo_connector->base;
2010 connector = &intel_connector->base;
2011 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2012 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2013 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2015 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2016 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2017 intel_sdvo->is_hdmi = true;
2019 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2020 (1 << INTEL_ANALOG_CLONE_BIT));
2022 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2023 if (intel_sdvo->is_hdmi)
2024 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2030 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2032 struct drm_encoder *encoder = &intel_sdvo->base.base;
2033 struct drm_connector *connector;
2034 struct intel_connector *intel_connector;
2035 struct intel_sdvo_connector *intel_sdvo_connector;
2037 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2038 if (!intel_sdvo_connector)
2041 intel_connector = &intel_sdvo_connector->base;
2042 connector = &intel_connector->base;
2043 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2044 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2046 intel_sdvo->controlled_output |= type;
2047 intel_sdvo_connector->output_flag = type;
2049 intel_sdvo->is_tv = true;
2050 intel_sdvo->base.needs_tv_clock = true;
2051 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2053 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2055 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2058 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2064 intel_sdvo_destroy(connector);
2069 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2071 struct drm_encoder *encoder = &intel_sdvo->base.base;
2072 struct drm_connector *connector;
2073 struct intel_connector *intel_connector;
2074 struct intel_sdvo_connector *intel_sdvo_connector;
2076 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2077 if (!intel_sdvo_connector)
2080 intel_connector = &intel_sdvo_connector->base;
2081 connector = &intel_connector->base;
2082 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2083 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2084 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2087 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2088 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2089 } else if (device == 1) {
2090 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2091 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2094 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2095 (1 << INTEL_ANALOG_CLONE_BIT));
2097 intel_sdvo_connector_init(intel_sdvo_connector,
2103 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2105 struct drm_encoder *encoder = &intel_sdvo->base.base;
2106 struct drm_connector *connector;
2107 struct intel_connector *intel_connector;
2108 struct intel_sdvo_connector *intel_sdvo_connector;
2110 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2111 if (!intel_sdvo_connector)
2114 intel_connector = &intel_sdvo_connector->base;
2115 connector = &intel_connector->base;
2116 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2117 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2120 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2121 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2122 } else if (device == 1) {
2123 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2124 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2127 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2128 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2130 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2131 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2137 intel_sdvo_destroy(connector);
2142 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2144 intel_sdvo->is_tv = false;
2145 intel_sdvo->base.needs_tv_clock = false;
2146 intel_sdvo->is_lvds = false;
2148 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2150 if (flags & SDVO_OUTPUT_TMDS0)
2151 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2154 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2155 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2158 /* TV has no XXX1 function block */
2159 if (flags & SDVO_OUTPUT_SVID0)
2160 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2163 if (flags & SDVO_OUTPUT_CVBS0)
2164 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2167 if (flags & SDVO_OUTPUT_RGB0)
2168 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2171 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2172 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2175 if (flags & SDVO_OUTPUT_LVDS0)
2176 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2179 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2180 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2183 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2184 unsigned char bytes[2];
2186 intel_sdvo->controlled_output = 0;
2187 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2188 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2189 SDVO_NAME(intel_sdvo),
2190 bytes[0], bytes[1]);
2193 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2198 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2199 struct intel_sdvo_connector *intel_sdvo_connector,
2202 struct drm_device *dev = intel_sdvo->base.base.dev;
2203 struct intel_sdvo_tv_format format;
2204 uint32_t format_map, i;
2206 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2209 BUILD_BUG_ON(sizeof(format) != 6);
2210 if (!intel_sdvo_get_value(intel_sdvo,
2211 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2212 &format, sizeof(format)))
2215 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2217 if (format_map == 0)
2220 intel_sdvo_connector->format_supported_num = 0;
2221 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2222 if (format_map & (1 << i))
2223 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2226 intel_sdvo_connector->tv_format =
2227 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2228 "mode", intel_sdvo_connector->format_supported_num);
2229 if (!intel_sdvo_connector->tv_format)
2232 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2233 drm_property_add_enum(
2234 intel_sdvo_connector->tv_format, i,
2235 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2237 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2238 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2239 intel_sdvo_connector->tv_format, 0);
2244 #define ENHANCEMENT(name, NAME) do { \
2245 if (enhancements.name) { \
2246 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2247 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2249 intel_sdvo_connector->max_##name = data_value[0]; \
2250 intel_sdvo_connector->cur_##name = response; \
2251 intel_sdvo_connector->name = \
2252 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2253 if (!intel_sdvo_connector->name) return false; \
2254 intel_sdvo_connector->name->values[0] = 0; \
2255 intel_sdvo_connector->name->values[1] = data_value[0]; \
2256 drm_connector_attach_property(connector, \
2257 intel_sdvo_connector->name, \
2258 intel_sdvo_connector->cur_##name); \
2259 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2260 data_value[0], data_value[1], response); \
2265 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2266 struct intel_sdvo_connector *intel_sdvo_connector,
2267 struct intel_sdvo_enhancements_reply enhancements)
2269 struct drm_device *dev = intel_sdvo->base.base.dev;
2270 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2271 uint16_t response, data_value[2];
2273 /* when horizontal overscan is supported, Add the left/right property */
2274 if (enhancements.overscan_h) {
2275 if (!intel_sdvo_get_value(intel_sdvo,
2276 SDVO_CMD_GET_MAX_OVERSCAN_H,
2280 if (!intel_sdvo_get_value(intel_sdvo,
2281 SDVO_CMD_GET_OVERSCAN_H,
2285 intel_sdvo_connector->max_hscan = data_value[0];
2286 intel_sdvo_connector->left_margin = data_value[0] - response;
2287 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2288 intel_sdvo_connector->left =
2289 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2291 if (!intel_sdvo_connector->left)
2294 intel_sdvo_connector->left->values[0] = 0;
2295 intel_sdvo_connector->left->values[1] = data_value[0];
2296 drm_connector_attach_property(connector,
2297 intel_sdvo_connector->left,
2298 intel_sdvo_connector->left_margin);
2300 intel_sdvo_connector->right =
2301 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2303 if (!intel_sdvo_connector->right)
2306 intel_sdvo_connector->right->values[0] = 0;
2307 intel_sdvo_connector->right->values[1] = data_value[0];
2308 drm_connector_attach_property(connector,
2309 intel_sdvo_connector->right,
2310 intel_sdvo_connector->right_margin);
2311 DRM_DEBUG_KMS("h_overscan: max %d, "
2312 "default %d, current %d\n",
2313 data_value[0], data_value[1], response);
2316 if (enhancements.overscan_v) {
2317 if (!intel_sdvo_get_value(intel_sdvo,
2318 SDVO_CMD_GET_MAX_OVERSCAN_V,
2322 if (!intel_sdvo_get_value(intel_sdvo,
2323 SDVO_CMD_GET_OVERSCAN_V,
2327 intel_sdvo_connector->max_vscan = data_value[0];
2328 intel_sdvo_connector->top_margin = data_value[0] - response;
2329 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2330 intel_sdvo_connector->top =
2331 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2333 if (!intel_sdvo_connector->top)
2336 intel_sdvo_connector->top->values[0] = 0;
2337 intel_sdvo_connector->top->values[1] = data_value[0];
2338 drm_connector_attach_property(connector,
2339 intel_sdvo_connector->top,
2340 intel_sdvo_connector->top_margin);
2342 intel_sdvo_connector->bottom =
2343 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2344 "bottom_margin", 2);
2345 if (!intel_sdvo_connector->bottom)
2348 intel_sdvo_connector->bottom->values[0] = 0;
2349 intel_sdvo_connector->bottom->values[1] = data_value[0];
2350 drm_connector_attach_property(connector,
2351 intel_sdvo_connector->bottom,
2352 intel_sdvo_connector->bottom_margin);
2353 DRM_DEBUG_KMS("v_overscan: max %d, "
2354 "default %d, current %d\n",
2355 data_value[0], data_value[1], response);
2358 ENHANCEMENT(hpos, HPOS);
2359 ENHANCEMENT(vpos, VPOS);
2360 ENHANCEMENT(saturation, SATURATION);
2361 ENHANCEMENT(contrast, CONTRAST);
2362 ENHANCEMENT(hue, HUE);
2363 ENHANCEMENT(sharpness, SHARPNESS);
2364 ENHANCEMENT(brightness, BRIGHTNESS);
2365 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2366 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2367 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2368 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2369 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2371 if (enhancements.dot_crawl) {
2372 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2375 intel_sdvo_connector->max_dot_crawl = 1;
2376 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2377 intel_sdvo_connector->dot_crawl =
2378 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2379 if (!intel_sdvo_connector->dot_crawl)
2382 intel_sdvo_connector->dot_crawl->values[0] = 0;
2383 intel_sdvo_connector->dot_crawl->values[1] = 1;
2384 drm_connector_attach_property(connector,
2385 intel_sdvo_connector->dot_crawl,
2386 intel_sdvo_connector->cur_dot_crawl);
2387 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2394 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2395 struct intel_sdvo_connector *intel_sdvo_connector,
2396 struct intel_sdvo_enhancements_reply enhancements)
2398 struct drm_device *dev = intel_sdvo->base.base.dev;
2399 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2400 uint16_t response, data_value[2];
2402 ENHANCEMENT(brightness, BRIGHTNESS);
2408 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2409 struct intel_sdvo_connector *intel_sdvo_connector)
2412 struct intel_sdvo_enhancements_reply reply;
2416 BUILD_BUG_ON(sizeof(enhancements) != 2);
2418 enhancements.response = 0;
2419 intel_sdvo_get_value(intel_sdvo,
2420 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2421 &enhancements, sizeof(enhancements));
2422 if (enhancements.response == 0) {
2423 DRM_DEBUG_KMS("No enhancement is supported\n");
2427 if (IS_TV(intel_sdvo_connector))
2428 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2429 else if(IS_LVDS(intel_sdvo_connector))
2430 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2435 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2436 struct i2c_msg *msgs,
2439 struct intel_sdvo *sdvo = adapter->algo_data;
2441 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2444 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2447 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2449 struct intel_sdvo *sdvo = adapter->algo_data;
2450 return sdvo->i2c->algo->functionality(sdvo->i2c);
2453 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2454 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2455 .functionality = intel_sdvo_ddc_proxy_func
2459 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2460 struct drm_device *dev)
2462 sdvo->ddc.owner = THIS_MODULE;
2463 sdvo->ddc.class = I2C_CLASS_DDC;
2464 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2465 sdvo->ddc.dev.parent = &dev->pdev->dev;
2466 sdvo->ddc.algo_data = sdvo;
2467 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2469 return i2c_add_adapter(&sdvo->ddc) == 0;
2472 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2474 struct drm_i915_private *dev_priv = dev->dev_private;
2475 struct intel_encoder *intel_encoder;
2476 struct intel_sdvo *intel_sdvo;
2479 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2483 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2488 intel_sdvo->sdvo_reg = sdvo_reg;
2490 intel_encoder = &intel_sdvo->base;
2491 intel_encoder->type = INTEL_OUTPUT_SDVO;
2492 /* encoder type will be decided later */
2493 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2495 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2496 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2498 /* Read the regs to test if we can talk to the device */
2499 for (i = 0; i < 0x40; i++) {
2502 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2503 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2504 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2509 if (IS_SDVOB(sdvo_reg))
2510 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2512 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2514 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2516 /* In default case sdvo lvds is false */
2517 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2520 if (intel_sdvo_output_setup(intel_sdvo,
2521 intel_sdvo->caps.output_flags) != true) {
2522 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2523 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2527 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2529 /* Set the input timing to the screen. Assume always input 0. */
2530 if (!intel_sdvo_set_target_input(intel_sdvo))
2533 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2534 &intel_sdvo->pixel_clock_min,
2535 &intel_sdvo->pixel_clock_max))
2538 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2539 "clock range %dMHz - %dMHz, "
2540 "input 1: %c, input 2: %c, "
2541 "output 1: %c, output 2: %c\n",
2542 SDVO_NAME(intel_sdvo),
2543 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2544 intel_sdvo->caps.device_rev_id,
2545 intel_sdvo->pixel_clock_min / 1000,
2546 intel_sdvo->pixel_clock_max / 1000,
2547 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2548 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2549 /* check currently supported outputs */
2550 intel_sdvo->caps.output_flags &
2551 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2552 intel_sdvo->caps.output_flags &
2553 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2557 drm_encoder_cleanup(&intel_encoder->base);
2558 i2c_del_adapter(&intel_sdvo->ddc);