Merge tag 'ntfs3_for_5.19' of https://github.com/Paragon-Software-Group/linux-ntfs3
[linux-block.git] / drivers / gpu / drm / i915 / intel_pch.c
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright 2019 Intel Corporation.
4  */
5
6 #include "i915_drv.h"
7 #include "i915_utils.h"
8 #include "intel_pch.h"
9
10 /* Map PCH device id to PCH type, or PCH_NONE if unknown. */
11 static enum intel_pch
12 intel_pch_type(const struct drm_i915_private *dev_priv, unsigned short id)
13 {
14         switch (id) {
15         case INTEL_PCH_IBX_DEVICE_ID_TYPE:
16                 drm_dbg_kms(&dev_priv->drm, "Found Ibex Peak PCH\n");
17                 drm_WARN_ON(&dev_priv->drm, GRAPHICS_VER(dev_priv) != 5);
18                 return PCH_IBX;
19         case INTEL_PCH_CPT_DEVICE_ID_TYPE:
20                 drm_dbg_kms(&dev_priv->drm, "Found CougarPoint PCH\n");
21                 drm_WARN_ON(&dev_priv->drm,
22                             GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
23                 return PCH_CPT;
24         case INTEL_PCH_PPT_DEVICE_ID_TYPE:
25                 drm_dbg_kms(&dev_priv->drm, "Found PantherPoint PCH\n");
26                 drm_WARN_ON(&dev_priv->drm,
27                             GRAPHICS_VER(dev_priv) != 6 && !IS_IVYBRIDGE(dev_priv));
28                 /* PantherPoint is CPT compatible */
29                 return PCH_CPT;
30         case INTEL_PCH_LPT_DEVICE_ID_TYPE:
31                 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint PCH\n");
32                 drm_WARN_ON(&dev_priv->drm,
33                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
34                 drm_WARN_ON(&dev_priv->drm,
35                             IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
36                 return PCH_LPT;
37         case INTEL_PCH_LPT_LP_DEVICE_ID_TYPE:
38                 drm_dbg_kms(&dev_priv->drm, "Found LynxPoint LP PCH\n");
39                 drm_WARN_ON(&dev_priv->drm,
40                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
41                 drm_WARN_ON(&dev_priv->drm,
42                             !IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
43                 return PCH_LPT;
44         case INTEL_PCH_WPT_DEVICE_ID_TYPE:
45                 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint PCH\n");
46                 drm_WARN_ON(&dev_priv->drm,
47                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
48                 drm_WARN_ON(&dev_priv->drm,
49                             IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv));
50                 /* WildcatPoint is LPT compatible */
51                 return PCH_LPT;
52         case INTEL_PCH_WPT_LP_DEVICE_ID_TYPE:
53                 drm_dbg_kms(&dev_priv->drm, "Found WildcatPoint LP PCH\n");
54                 drm_WARN_ON(&dev_priv->drm,
55                             !IS_HASWELL(dev_priv) && !IS_BROADWELL(dev_priv));
56                 drm_WARN_ON(&dev_priv->drm,
57                             !IS_HSW_ULT(dev_priv) && !IS_BDW_ULT(dev_priv));
58                 /* WildcatPoint is LPT compatible */
59                 return PCH_LPT;
60         case INTEL_PCH_SPT_DEVICE_ID_TYPE:
61                 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint PCH\n");
62                 drm_WARN_ON(&dev_priv->drm,
63                             !IS_SKYLAKE(dev_priv) && !IS_KABYLAKE(dev_priv));
64                 return PCH_SPT;
65         case INTEL_PCH_SPT_LP_DEVICE_ID_TYPE:
66                 drm_dbg_kms(&dev_priv->drm, "Found SunrisePoint LP PCH\n");
67                 drm_WARN_ON(&dev_priv->drm,
68                             !IS_SKYLAKE(dev_priv) &&
69                             !IS_KABYLAKE(dev_priv) &&
70                             !IS_COFFEELAKE(dev_priv) &&
71                             !IS_COMETLAKE(dev_priv));
72                 return PCH_SPT;
73         case INTEL_PCH_KBP_DEVICE_ID_TYPE:
74                 drm_dbg_kms(&dev_priv->drm, "Found Kaby Lake PCH (KBP)\n");
75                 drm_WARN_ON(&dev_priv->drm,
76                             !IS_SKYLAKE(dev_priv) &&
77                             !IS_KABYLAKE(dev_priv) &&
78                             !IS_COFFEELAKE(dev_priv) &&
79                             !IS_COMETLAKE(dev_priv));
80                 /* KBP is SPT compatible */
81                 return PCH_SPT;
82         case INTEL_PCH_CNP_DEVICE_ID_TYPE:
83                 drm_dbg_kms(&dev_priv->drm, "Found Cannon Lake PCH (CNP)\n");
84                 drm_WARN_ON(&dev_priv->drm,
85                             !IS_COFFEELAKE(dev_priv) &&
86                             !IS_COMETLAKE(dev_priv));
87                 return PCH_CNP;
88         case INTEL_PCH_CNP_LP_DEVICE_ID_TYPE:
89                 drm_dbg_kms(&dev_priv->drm,
90                             "Found Cannon Lake LP PCH (CNP-LP)\n");
91                 drm_WARN_ON(&dev_priv->drm,
92                             !IS_COFFEELAKE(dev_priv) &&
93                             !IS_COMETLAKE(dev_priv));
94                 return PCH_CNP;
95         case INTEL_PCH_CMP_DEVICE_ID_TYPE:
96         case INTEL_PCH_CMP2_DEVICE_ID_TYPE:
97                 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake PCH (CMP)\n");
98                 drm_WARN_ON(&dev_priv->drm,
99                             !IS_COFFEELAKE(dev_priv) &&
100                             !IS_COMETLAKE(dev_priv) &&
101                             !IS_ROCKETLAKE(dev_priv));
102                 /* CometPoint is CNP Compatible */
103                 return PCH_CNP;
104         case INTEL_PCH_CMP_V_DEVICE_ID_TYPE:
105                 drm_dbg_kms(&dev_priv->drm, "Found Comet Lake V PCH (CMP-V)\n");
106                 drm_WARN_ON(&dev_priv->drm,
107                             !IS_COFFEELAKE(dev_priv) &&
108                             !IS_COMETLAKE(dev_priv));
109                 /* Comet Lake V PCH is based on KBP, which is SPT compatible */
110                 return PCH_SPT;
111         case INTEL_PCH_ICP_DEVICE_ID_TYPE:
112         case INTEL_PCH_ICP2_DEVICE_ID_TYPE:
113                 drm_dbg_kms(&dev_priv->drm, "Found Ice Lake PCH\n");
114                 drm_WARN_ON(&dev_priv->drm, !IS_ICELAKE(dev_priv));
115                 return PCH_ICP;
116         case INTEL_PCH_MCC_DEVICE_ID_TYPE:
117                 drm_dbg_kms(&dev_priv->drm, "Found Mule Creek Canyon PCH\n");
118                 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));
119                 return PCH_MCC;
120         case INTEL_PCH_TGP_DEVICE_ID_TYPE:
121         case INTEL_PCH_TGP2_DEVICE_ID_TYPE:
122                 drm_dbg_kms(&dev_priv->drm, "Found Tiger Lake LP PCH\n");
123                 drm_WARN_ON(&dev_priv->drm, !IS_TIGERLAKE(dev_priv) &&
124                             !IS_ROCKETLAKE(dev_priv) &&
125                             !IS_GEN9_BC(dev_priv));
126                 return PCH_TGP;
127         case INTEL_PCH_JSP_DEVICE_ID_TYPE:
128                 drm_dbg_kms(&dev_priv->drm, "Found Jasper Lake PCH\n");
129                 drm_WARN_ON(&dev_priv->drm, !IS_JSL_EHL(dev_priv));
130                 return PCH_JSP;
131         case INTEL_PCH_ADP_DEVICE_ID_TYPE:
132         case INTEL_PCH_ADP2_DEVICE_ID_TYPE:
133         case INTEL_PCH_ADP3_DEVICE_ID_TYPE:
134         case INTEL_PCH_ADP4_DEVICE_ID_TYPE:
135                 drm_dbg_kms(&dev_priv->drm, "Found Alder Lake PCH\n");
136                 drm_WARN_ON(&dev_priv->drm, !IS_ALDERLAKE_S(dev_priv) &&
137                             !IS_ALDERLAKE_P(dev_priv));
138                 return PCH_ADP;
139         default:
140                 return PCH_NONE;
141         }
142 }
143
144 static bool intel_is_virt_pch(unsigned short id,
145                               unsigned short svendor, unsigned short sdevice)
146 {
147         return (id == INTEL_PCH_P2X_DEVICE_ID_TYPE ||
148                 id == INTEL_PCH_P3X_DEVICE_ID_TYPE ||
149                 (id == INTEL_PCH_QEMU_DEVICE_ID_TYPE &&
150                  svendor == PCI_SUBVENDOR_ID_REDHAT_QUMRANET &&
151                  sdevice == PCI_SUBDEVICE_ID_QEMU));
152 }
153
154 static void
155 intel_virt_detect_pch(const struct drm_i915_private *dev_priv,
156                       unsigned short *pch_id, enum intel_pch *pch_type)
157 {
158         unsigned short id = 0;
159
160         /*
161          * In a virtualized passthrough environment we can be in a
162          * setup where the ISA bridge is not able to be passed through.
163          * In this case, a south bridge can be emulated and we have to
164          * make an educated guess as to which PCH is really there.
165          */
166
167         if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv))
168                 id = INTEL_PCH_ADP_DEVICE_ID_TYPE;
169         else if (IS_TIGERLAKE(dev_priv) || IS_ROCKETLAKE(dev_priv))
170                 id = INTEL_PCH_TGP_DEVICE_ID_TYPE;
171         else if (IS_JSL_EHL(dev_priv))
172                 id = INTEL_PCH_MCC_DEVICE_ID_TYPE;
173         else if (IS_ICELAKE(dev_priv))
174                 id = INTEL_PCH_ICP_DEVICE_ID_TYPE;
175         else if (IS_COFFEELAKE(dev_priv) ||
176                  IS_COMETLAKE(dev_priv))
177                 id = INTEL_PCH_CNP_DEVICE_ID_TYPE;
178         else if (IS_KABYLAKE(dev_priv) || IS_SKYLAKE(dev_priv))
179                 id = INTEL_PCH_SPT_DEVICE_ID_TYPE;
180         else if (IS_HSW_ULT(dev_priv) || IS_BDW_ULT(dev_priv))
181                 id = INTEL_PCH_LPT_LP_DEVICE_ID_TYPE;
182         else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
183                 id = INTEL_PCH_LPT_DEVICE_ID_TYPE;
184         else if (GRAPHICS_VER(dev_priv) == 6 || IS_IVYBRIDGE(dev_priv))
185                 id = INTEL_PCH_CPT_DEVICE_ID_TYPE;
186         else if (GRAPHICS_VER(dev_priv) == 5)
187                 id = INTEL_PCH_IBX_DEVICE_ID_TYPE;
188
189         if (id)
190                 drm_dbg_kms(&dev_priv->drm, "Assuming PCH ID %04x\n", id);
191         else
192                 drm_dbg_kms(&dev_priv->drm, "Assuming no PCH\n");
193
194         *pch_type = intel_pch_type(dev_priv, id);
195
196         /* Sanity check virtual PCH id */
197         if (drm_WARN_ON(&dev_priv->drm,
198                         id && *pch_type == PCH_NONE))
199                 id = 0;
200
201         *pch_id = id;
202 }
203
204 void intel_detect_pch(struct drm_i915_private *dev_priv)
205 {
206         struct pci_dev *pch = NULL;
207         unsigned short id;
208         enum intel_pch pch_type;
209
210         /* DG1 has south engine display on the same PCI device */
211         if (IS_DG1(dev_priv)) {
212                 dev_priv->pch_type = PCH_DG1;
213                 return;
214         } else if (IS_DG2(dev_priv)) {
215                 dev_priv->pch_type = PCH_DG2;
216                 return;
217         }
218
219         /*
220          * The reason to probe ISA bridge instead of Dev31:Fun0 is to
221          * make graphics device passthrough work easy for VMM, that only
222          * need to expose ISA bridge to let driver know the real hardware
223          * underneath. This is a requirement from virtualization team.
224          *
225          * In some virtualized environments (e.g. XEN), there is irrelevant
226          * ISA bridge in the system. To work reliably, we should scan trhough
227          * all the ISA bridge devices and check for the first match, instead
228          * of only checking the first one.
229          */
230         while ((pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, pch))) {
231                 if (pch->vendor != PCI_VENDOR_ID_INTEL)
232                         continue;
233
234                 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
235
236                 pch_type = intel_pch_type(dev_priv, id);
237                 if (pch_type != PCH_NONE) {
238                         dev_priv->pch_type = pch_type;
239                         dev_priv->pch_id = id;
240                         break;
241                 } else if (intel_is_virt_pch(id, pch->subsystem_vendor,
242                                              pch->subsystem_device)) {
243                         intel_virt_detect_pch(dev_priv, &id, &pch_type);
244                         dev_priv->pch_type = pch_type;
245                         dev_priv->pch_id = id;
246                         break;
247                 }
248         }
249
250         /*
251          * Use PCH_NOP (PCH but no South Display) for PCH platforms without
252          * display.
253          */
254         if (pch && !HAS_DISPLAY(dev_priv)) {
255                 drm_dbg_kms(&dev_priv->drm,
256                             "Display disabled, reverting to NOP PCH\n");
257                 dev_priv->pch_type = PCH_NOP;
258                 dev_priv->pch_id = 0;
259         } else if (!pch) {
260                 if (i915_run_as_guest() && HAS_DISPLAY(dev_priv)) {
261                         intel_virt_detect_pch(dev_priv, &id, &pch_type);
262                         dev_priv->pch_type = pch_type;
263                         dev_priv->pch_id = id;
264                 } else {
265                         drm_dbg_kms(&dev_priv->drm, "No PCH found.\n");
266                 }
267         }
268
269         pci_dev_put(pch);
270 }