2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
37 #include "intel_drv.h"
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_priv {
50 * Sets the backlight level.
52 * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
54 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
56 struct drm_i915_private *dev_priv = dev->dev_private;
59 if (HAS_PCH_SPLIT(dev))
60 reg = BLC_PWM_CPU_CTL;
64 blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
65 I915_WRITE(reg, (blc_pwm_ctl |
66 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
70 * Returns the maximum level of the backlight duty cycle field.
72 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
74 struct drm_i915_private *dev_priv = dev->dev_private;
77 if (HAS_PCH_SPLIT(dev))
78 reg = BLC_PWM_PCH_CTL2;
82 return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
83 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
87 * Sets the power state for the panel.
89 static void intel_lvds_set_power(struct drm_device *dev, bool on)
91 struct drm_i915_private *dev_priv = dev->dev_private;
92 u32 pp_status, ctl_reg, status_reg, lvds_reg;
94 if (HAS_PCH_SPLIT(dev)) {
95 ctl_reg = PCH_PP_CONTROL;
96 status_reg = PCH_PP_STATUS;
100 status_reg = PP_STATUS;
105 I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
106 POSTING_READ(lvds_reg);
108 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
111 pp_status = I915_READ(status_reg);
112 } while ((pp_status & PP_ON) == 0);
114 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
116 intel_lvds_set_backlight(dev, 0);
118 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
121 pp_status = I915_READ(status_reg);
122 } while (pp_status & PP_ON);
124 I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
125 POSTING_READ(lvds_reg);
129 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
131 struct drm_device *dev = encoder->dev;
133 if (mode == DRM_MODE_DPMS_ON)
134 intel_lvds_set_power(dev, true);
136 intel_lvds_set_power(dev, false);
138 /* XXX: We never power down the LVDS pairs. */
141 static void intel_lvds_save(struct drm_connector *connector)
143 struct drm_device *dev = connector->dev;
144 struct drm_i915_private *dev_priv = dev->dev_private;
145 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
148 if (HAS_PCH_SPLIT(dev)) {
149 pp_on_reg = PCH_PP_ON_DELAYS;
150 pp_off_reg = PCH_PP_OFF_DELAYS;
151 pp_ctl_reg = PCH_PP_CONTROL;
152 pp_div_reg = PCH_PP_DIVISOR;
153 pwm_ctl_reg = BLC_PWM_CPU_CTL;
155 pp_on_reg = PP_ON_DELAYS;
156 pp_off_reg = PP_OFF_DELAYS;
157 pp_ctl_reg = PP_CONTROL;
158 pp_div_reg = PP_DIVISOR;
159 pwm_ctl_reg = BLC_PWM_CTL;
162 dev_priv->savePP_ON = I915_READ(pp_on_reg);
163 dev_priv->savePP_OFF = I915_READ(pp_off_reg);
164 dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
165 dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
166 dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
167 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
168 BACKLIGHT_DUTY_CYCLE_MASK);
171 * If the light is off at server startup, just make it full brightness
173 if (dev_priv->backlight_duty_cycle == 0)
174 dev_priv->backlight_duty_cycle =
175 intel_lvds_get_max_backlight(dev);
178 static void intel_lvds_restore(struct drm_connector *connector)
180 struct drm_device *dev = connector->dev;
181 struct drm_i915_private *dev_priv = dev->dev_private;
182 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
185 if (HAS_PCH_SPLIT(dev)) {
186 pp_on_reg = PCH_PP_ON_DELAYS;
187 pp_off_reg = PCH_PP_OFF_DELAYS;
188 pp_ctl_reg = PCH_PP_CONTROL;
189 pp_div_reg = PCH_PP_DIVISOR;
190 pwm_ctl_reg = BLC_PWM_CPU_CTL;
192 pp_on_reg = PP_ON_DELAYS;
193 pp_off_reg = PP_OFF_DELAYS;
194 pp_ctl_reg = PP_CONTROL;
195 pp_div_reg = PP_DIVISOR;
196 pwm_ctl_reg = BLC_PWM_CTL;
199 I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
200 I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
201 I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
202 I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
203 I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
204 if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
205 intel_lvds_set_power(dev, true);
207 intel_lvds_set_power(dev, false);
210 static int intel_lvds_mode_valid(struct drm_connector *connector,
211 struct drm_display_mode *mode)
213 struct drm_device *dev = connector->dev;
214 struct drm_i915_private *dev_priv = dev->dev_private;
215 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
218 if (mode->hdisplay > fixed_mode->hdisplay)
220 if (mode->vdisplay > fixed_mode->vdisplay)
227 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
228 struct drm_display_mode *mode,
229 struct drm_display_mode *adjusted_mode)
232 * float point operation is not supported . So the PANEL_RATIO_FACTOR
233 * is defined, which can avoid the float point computation when
234 * calculating the panel ratio.
236 #define PANEL_RATIO_FACTOR 8192
237 struct drm_device *dev = encoder->dev;
238 struct drm_i915_private *dev_priv = dev->dev_private;
239 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
240 struct drm_encoder *tmp_encoder;
241 struct intel_output *intel_output = enc_to_intel_output(encoder);
242 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
243 u32 pfit_control = 0, pfit_pgm_ratios = 0;
244 int left_border = 0, right_border = 0, top_border = 0;
245 int bottom_border = 0;
247 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
248 int horiz_ratio, vert_ratio;
249 u32 hsync_width, vsync_width;
250 u32 hblank_width, vblank_width;
251 u32 hsync_pos, vsync_pos;
253 /* Should never happen!! */
254 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
255 DRM_ERROR("Can't support LVDS on pipe A\n");
259 /* Should never happen!! */
260 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
261 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
262 DRM_ERROR("Can't enable LVDS and another "
263 "encoder on the same pipe\n");
267 /* If we don't have a panel mode, there is nothing we can do */
268 if (dev_priv->panel_fixed_mode == NULL)
271 * If we have timings from the BIOS for the panel, put them in
272 * to the adjusted mode. The CRTC will be set up for this mode,
273 * with the panel scaling set up to source from the H/VDisplay
274 * of the original mode.
276 if (dev_priv->panel_fixed_mode != NULL) {
277 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
278 adjusted_mode->hsync_start =
279 dev_priv->panel_fixed_mode->hsync_start;
280 adjusted_mode->hsync_end =
281 dev_priv->panel_fixed_mode->hsync_end;
282 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
283 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
284 adjusted_mode->vsync_start =
285 dev_priv->panel_fixed_mode->vsync_start;
286 adjusted_mode->vsync_end =
287 dev_priv->panel_fixed_mode->vsync_end;
288 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
289 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
290 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
293 /* Make sure pre-965s set dither correctly */
294 if (!IS_I965G(dev)) {
295 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
296 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
299 /* Native modes don't need fitting */
300 if (adjusted_mode->hdisplay == mode->hdisplay &&
301 adjusted_mode->vdisplay == mode->vdisplay) {
307 /* full screen scale for now */
308 if (HAS_PCH_SPLIT(dev))
311 /* 965+ wants fuzzy fitting */
313 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
316 hsync_width = adjusted_mode->crtc_hsync_end -
317 adjusted_mode->crtc_hsync_start;
318 vsync_width = adjusted_mode->crtc_vsync_end -
319 adjusted_mode->crtc_vsync_start;
320 hblank_width = adjusted_mode->crtc_hblank_end -
321 adjusted_mode->crtc_hblank_start;
322 vblank_width = adjusted_mode->crtc_vblank_end -
323 adjusted_mode->crtc_vblank_start;
325 * Deal with panel fitting options. Figure out how to stretch the
326 * image based on its aspect ratio & the current panel fitting mode.
328 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
329 adjusted_mode->vdisplay;
330 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
333 * Enable automatic panel scaling for non-native modes so that they fill
334 * the screen. Should be enabled before the pipe is enabled, according
335 * to register description and PRM.
336 * Change the value here to see the borders for debugging
338 if (!HAS_PCH_SPLIT(dev)) {
339 I915_WRITE(BCLRPAT_A, 0);
340 I915_WRITE(BCLRPAT_B, 0);
343 switch (lvds_priv->fitting_mode) {
344 case DRM_MODE_SCALE_CENTER:
346 * For centered modes, we have to calculate border widths &
347 * heights and modify the values programmed into the CRTC.
349 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
350 right_border = left_border;
351 if (mode->hdisplay & 1)
353 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
354 bottom_border = top_border;
355 if (mode->vdisplay & 1)
357 /* Set active & border values */
358 adjusted_mode->crtc_hdisplay = mode->hdisplay;
359 /* Keep the boder be even */
360 if (right_border & 1)
362 /* use the border directly instead of border minuse one */
363 adjusted_mode->crtc_hblank_start = mode->hdisplay +
365 /* keep the blank width constant */
366 adjusted_mode->crtc_hblank_end =
367 adjusted_mode->crtc_hblank_start + hblank_width;
368 /* get the hsync pos relative to hblank start */
369 hsync_pos = (hblank_width - hsync_width) / 2;
370 /* keep the hsync pos be even */
373 adjusted_mode->crtc_hsync_start =
374 adjusted_mode->crtc_hblank_start + hsync_pos;
375 /* keep the hsync width constant */
376 adjusted_mode->crtc_hsync_end =
377 adjusted_mode->crtc_hsync_start + hsync_width;
378 adjusted_mode->crtc_vdisplay = mode->vdisplay;
379 /* use the border instead of border minus one */
380 adjusted_mode->crtc_vblank_start = mode->vdisplay +
382 /* keep the vblank width constant */
383 adjusted_mode->crtc_vblank_end =
384 adjusted_mode->crtc_vblank_start + vblank_width;
385 /* get the vsync start postion relative to vblank start */
386 vsync_pos = (vblank_width - vsync_width) / 2;
387 adjusted_mode->crtc_vsync_start =
388 adjusted_mode->crtc_vblank_start + vsync_pos;
389 /* keep the vsync width constant */
390 adjusted_mode->crtc_vsync_end =
391 adjusted_mode->crtc_vsync_start + vsync_width;
394 case DRM_MODE_SCALE_ASPECT:
395 /* Scale but preserve the spect ratio */
396 pfit_control |= PFIT_ENABLE;
398 /* 965+ is easy, it does everything in hw */
399 if (panel_ratio > desired_ratio)
400 pfit_control |= PFIT_SCALING_PILLAR;
401 else if (panel_ratio < desired_ratio)
402 pfit_control |= PFIT_SCALING_LETTER;
404 pfit_control |= PFIT_SCALING_AUTO;
407 * For earlier chips we have to calculate the scaling
408 * ratio by hand and program it into the
409 * PFIT_PGM_RATIO register
411 u32 horiz_bits, vert_bits, bits = 12;
412 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
413 adjusted_mode->hdisplay;
414 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
415 adjusted_mode->vdisplay;
416 horiz_scale = adjusted_mode->hdisplay *
417 PANEL_RATIO_FACTOR / mode->hdisplay;
418 vert_scale = adjusted_mode->vdisplay *
419 PANEL_RATIO_FACTOR / mode->vdisplay;
421 /* retain aspect ratio */
422 if (panel_ratio > desired_ratio) { /* Pillar */
424 scaled_width = mode->hdisplay * vert_scale /
426 horiz_ratio = vert_ratio;
427 pfit_control |= (VERT_AUTO_SCALE |
428 VERT_INTERP_BILINEAR |
429 HORIZ_INTERP_BILINEAR);
430 /* Pillar will have left/right borders */
431 left_border = (adjusted_mode->hdisplay -
433 right_border = left_border;
434 if (mode->hdisplay & 1) /* odd resolutions */
436 /* keep the border be even */
437 if (right_border & 1)
439 adjusted_mode->crtc_hdisplay = scaled_width;
440 /* use border instead of border minus one */
441 adjusted_mode->crtc_hblank_start =
442 scaled_width + right_border;
443 /* keep the hblank width constant */
444 adjusted_mode->crtc_hblank_end =
445 adjusted_mode->crtc_hblank_start +
448 * get the hsync start pos relative to
451 hsync_pos = (hblank_width - hsync_width) / 2;
452 /* keep the hsync_pos be even */
455 adjusted_mode->crtc_hsync_start =
456 adjusted_mode->crtc_hblank_start +
458 /* keept hsync width constant */
459 adjusted_mode->crtc_hsync_end =
460 adjusted_mode->crtc_hsync_start +
463 } else if (panel_ratio < desired_ratio) { /* letter */
464 u32 scaled_height = mode->vdisplay *
465 horiz_scale / PANEL_RATIO_FACTOR;
466 vert_ratio = horiz_ratio;
467 pfit_control |= (HORIZ_AUTO_SCALE |
468 VERT_INTERP_BILINEAR |
469 HORIZ_INTERP_BILINEAR);
470 /* Letterbox will have top/bottom border */
471 top_border = (adjusted_mode->vdisplay -
473 bottom_border = top_border;
474 if (mode->vdisplay & 1)
476 adjusted_mode->crtc_vdisplay = scaled_height;
477 /* use border instead of border minus one */
478 adjusted_mode->crtc_vblank_start =
479 scaled_height + bottom_border;
480 /* keep the vblank width constant */
481 adjusted_mode->crtc_vblank_end =
482 adjusted_mode->crtc_vblank_start +
485 * get the vsync start pos relative to
488 vsync_pos = (vblank_width - vsync_width) / 2;
489 adjusted_mode->crtc_vsync_start =
490 adjusted_mode->crtc_vblank_start +
492 /* keep the vsync width constant */
493 adjusted_mode->crtc_vsync_end =
494 adjusted_mode->crtc_vsync_start +
498 /* Aspects match, Let hw scale both directions */
499 pfit_control |= (VERT_AUTO_SCALE |
501 VERT_INTERP_BILINEAR |
502 HORIZ_INTERP_BILINEAR);
504 horiz_bits = (1 << bits) * horiz_ratio /
506 vert_bits = (1 << bits) * vert_ratio /
509 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
510 PFIT_VERT_SCALE_MASK) |
511 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
512 PFIT_HORIZ_SCALE_MASK);
516 case DRM_MODE_SCALE_FULLSCREEN:
518 * Full scaling, even if it changes the aspect ratio.
519 * Fortunately this is all done for us in hw.
521 pfit_control |= PFIT_ENABLE;
523 pfit_control |= PFIT_SCALING_AUTO;
525 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
526 VERT_INTERP_BILINEAR |
527 HORIZ_INTERP_BILINEAR);
534 lvds_priv->pfit_control = pfit_control;
535 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
537 * When there exists the border, it means that the LVDS_BORDR
541 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
543 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
545 * XXX: It would be nice to support lower refresh rates on the
546 * panels to reduce power consumption, and perhaps match the
547 * user's requested refresh rate.
553 static void intel_lvds_prepare(struct drm_encoder *encoder)
555 struct drm_device *dev = encoder->dev;
556 struct drm_i915_private *dev_priv = dev->dev_private;
559 if (HAS_PCH_SPLIT(dev))
560 reg = BLC_PWM_CPU_CTL;
564 dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
565 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
566 BACKLIGHT_DUTY_CYCLE_MASK);
568 intel_lvds_set_power(dev, false);
571 static void intel_lvds_commit( struct drm_encoder *encoder)
573 struct drm_device *dev = encoder->dev;
574 struct drm_i915_private *dev_priv = dev->dev_private;
576 if (dev_priv->backlight_duty_cycle == 0)
577 dev_priv->backlight_duty_cycle =
578 intel_lvds_get_max_backlight(dev);
580 intel_lvds_set_power(dev, true);
583 static void intel_lvds_mode_set(struct drm_encoder *encoder,
584 struct drm_display_mode *mode,
585 struct drm_display_mode *adjusted_mode)
587 struct drm_device *dev = encoder->dev;
588 struct drm_i915_private *dev_priv = dev->dev_private;
589 struct intel_output *intel_output = enc_to_intel_output(encoder);
590 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
593 * The LVDS pin pair will already have been turned on in the
594 * intel_crtc_mode_set since it has a large impact on the DPLL
598 if (HAS_PCH_SPLIT(dev))
602 * Enable automatic panel scaling so that non-native modes fill the
603 * screen. Should be enabled before the pipe is enabled, according to
604 * register description and PRM.
606 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
607 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
611 * Detect the LVDS connection.
613 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
614 * connected and closed means disconnected. We also send hotplug events as
615 * needed, using lid status notification from the input layer.
617 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
619 struct drm_device *dev = connector->dev;
620 enum drm_connector_status status = connector_status_connected;
622 /* ACPI lid methods were generally unreliable in this generation, so
625 if (IS_GEN2(dev) || IS_GEN3(dev))
626 return connector_status_connected;
632 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
634 static int intel_lvds_get_modes(struct drm_connector *connector)
636 struct drm_device *dev = connector->dev;
637 struct intel_output *intel_output = to_intel_output(connector);
638 struct drm_i915_private *dev_priv = dev->dev_private;
641 ret = intel_ddc_get_modes(intel_output);
646 /* Didn't get an EDID, so
647 * Set wide sync ranges so we get all modes
648 * handed to valid_mode for checking
650 connector->display_info.min_vfreq = 0;
651 connector->display_info.max_vfreq = 200;
652 connector->display_info.min_hfreq = 0;
653 connector->display_info.max_hfreq = 200;
655 if (dev_priv->panel_fixed_mode != NULL) {
656 struct drm_display_mode *mode;
658 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
659 drm_mode_probed_add(connector, mode);
668 * Lid events. Note the use of 'modeset_on_lid':
669 * - we set it on lid close, and reset it on open
670 * - we use it as a "only once" bit (ie we ignore
671 * duplicate events where it was already properly
673 * - the suspend/resume paths will also set it to
674 * zero, since they restore the mode ("lid open").
676 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
679 struct drm_i915_private *dev_priv =
680 container_of(nb, struct drm_i915_private, lid_notifier);
681 struct drm_device *dev = dev_priv->dev;
682 struct drm_connector *connector = dev_priv->int_lvds_connector;
685 * check and update the status of LVDS connector after receiving
686 * the LID nofication event.
689 connector->status = connector->funcs->detect(connector);
690 if (!acpi_lid_open()) {
691 dev_priv->modeset_on_lid = 1;
695 if (!dev_priv->modeset_on_lid)
698 dev_priv->modeset_on_lid = 0;
700 mutex_lock(&dev->mode_config.mutex);
701 drm_helper_resume_force_mode(dev);
702 mutex_unlock(&dev->mode_config.mutex);
708 * intel_lvds_destroy - unregister and free LVDS structures
709 * @connector: connector to free
711 * Unregister the DDC bus for this connector then free the driver private
714 static void intel_lvds_destroy(struct drm_connector *connector)
716 struct drm_device *dev = connector->dev;
717 struct intel_output *intel_output = to_intel_output(connector);
718 struct drm_i915_private *dev_priv = dev->dev_private;
720 if (intel_output->ddc_bus)
721 intel_i2c_destroy(intel_output->ddc_bus);
722 if (dev_priv->lid_notifier.notifier_call)
723 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
724 drm_sysfs_connector_remove(connector);
725 drm_connector_cleanup(connector);
729 static int intel_lvds_set_property(struct drm_connector *connector,
730 struct drm_property *property,
733 struct drm_device *dev = connector->dev;
734 struct intel_output *intel_output =
735 to_intel_output(connector);
737 if (property == dev->mode_config.scaling_mode_property &&
738 connector->encoder) {
739 struct drm_crtc *crtc = connector->encoder->crtc;
740 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
741 if (value == DRM_MODE_SCALE_NONE) {
742 DRM_DEBUG_KMS("no scaling not supported\n");
745 if (lvds_priv->fitting_mode == value) {
746 /* the LVDS scaling property is not changed */
749 lvds_priv->fitting_mode = value;
750 if (crtc && crtc->enabled) {
752 * If the CRTC is enabled, the display will be changed
753 * according to the new panel fitting mode.
755 drm_crtc_helper_set_mode(crtc, &crtc->mode,
756 crtc->x, crtc->y, crtc->fb);
763 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
764 .dpms = intel_lvds_dpms,
765 .mode_fixup = intel_lvds_mode_fixup,
766 .prepare = intel_lvds_prepare,
767 .mode_set = intel_lvds_mode_set,
768 .commit = intel_lvds_commit,
771 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
772 .get_modes = intel_lvds_get_modes,
773 .mode_valid = intel_lvds_mode_valid,
774 .best_encoder = intel_best_encoder,
777 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
778 .dpms = drm_helper_connector_dpms,
779 .save = intel_lvds_save,
780 .restore = intel_lvds_restore,
781 .detect = intel_lvds_detect,
782 .fill_modes = drm_helper_probe_single_connector_modes,
783 .set_property = intel_lvds_set_property,
784 .destroy = intel_lvds_destroy,
788 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
790 drm_encoder_cleanup(encoder);
793 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
794 .destroy = intel_lvds_enc_destroy,
797 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
799 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
803 /* These systems claim to have LVDS, but really don't */
804 static const struct dmi_system_id intel_no_lvds[] = {
806 .callback = intel_no_lvds_dmi_callback,
807 .ident = "Apple Mac Mini (Core series)",
809 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
810 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
814 .callback = intel_no_lvds_dmi_callback,
815 .ident = "Apple Mac Mini (Core 2 series)",
817 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
818 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
822 .callback = intel_no_lvds_dmi_callback,
823 .ident = "MSI IM-945GSE-A",
825 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
826 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
830 .callback = intel_no_lvds_dmi_callback,
831 .ident = "Dell Studio Hybrid",
833 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
834 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
838 .callback = intel_no_lvds_dmi_callback,
839 .ident = "AOpen Mini PC",
841 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
842 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
846 .callback = intel_no_lvds_dmi_callback,
847 .ident = "AOpen Mini PC MP915",
849 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
850 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
854 .callback = intel_no_lvds_dmi_callback,
855 .ident = "Aopen i945GTt-VFA",
857 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
861 { } /* terminating entry */
865 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
867 * @connector: LVDS connector
869 * Find the reduced downclock for LVDS in EDID.
871 static void intel_find_lvds_downclock(struct drm_device *dev,
872 struct drm_connector *connector)
874 struct drm_i915_private *dev_priv = dev->dev_private;
875 struct drm_display_mode *scan, *panel_fixed_mode;
878 panel_fixed_mode = dev_priv->panel_fixed_mode;
879 temp_downclock = panel_fixed_mode->clock;
881 mutex_lock(&dev->mode_config.mutex);
882 list_for_each_entry(scan, &connector->probed_modes, head) {
884 * If one mode has the same resolution with the fixed_panel
885 * mode while they have the different refresh rate, it means
886 * that the reduced downclock is found for the LVDS. In such
887 * case we can set the different FPx0/1 to dynamically select
888 * between low and high frequency.
890 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
891 scan->hsync_start == panel_fixed_mode->hsync_start &&
892 scan->hsync_end == panel_fixed_mode->hsync_end &&
893 scan->htotal == panel_fixed_mode->htotal &&
894 scan->vdisplay == panel_fixed_mode->vdisplay &&
895 scan->vsync_start == panel_fixed_mode->vsync_start &&
896 scan->vsync_end == panel_fixed_mode->vsync_end &&
897 scan->vtotal == panel_fixed_mode->vtotal) {
898 if (scan->clock < temp_downclock) {
900 * The downclock is already found. But we
901 * expect to find the lower downclock.
903 temp_downclock = scan->clock;
907 mutex_unlock(&dev->mode_config.mutex);
908 if (temp_downclock < panel_fixed_mode->clock &&
909 i915_lvds_downclock) {
910 /* We found the downclock for LVDS. */
911 dev_priv->lvds_downclock_avail = 1;
912 dev_priv->lvds_downclock = temp_downclock;
913 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
914 "Normal clock %dKhz, downclock %dKhz\n",
915 panel_fixed_mode->clock, temp_downclock);
921 * Enumerate the child dev array parsed from VBT to check whether
922 * the LVDS is present.
923 * If it is present, return 1.
924 * If it is not present, return false.
925 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
926 * Note: The addin_offset should also be checked for LVDS panel.
927 * Only when it is non-zero, it is assumed that it is present.
929 static int lvds_is_present_in_vbt(struct drm_device *dev)
931 struct drm_i915_private *dev_priv = dev->dev_private;
932 struct child_device_config *p_child;
935 if (!dev_priv->child_dev_num)
939 for (i = 0; i < dev_priv->child_dev_num; i++) {
940 p_child = dev_priv->child_dev + i;
942 * If the device type is not LFP, continue.
943 * If the device type is 0x22, it is also regarded as LFP.
945 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
946 p_child->device_type != DEVICE_TYPE_LFP)
949 /* The addin_offset should be checked. Only when it is
950 * non-zero, it is regarded as present.
952 if (p_child->addin_offset) {
961 * intel_lvds_init - setup LVDS connectors on this device
964 * Create the connector, register the LVDS DDC bus, and try to figure out what
965 * modes we can display on the LVDS panel (if present).
967 void intel_lvds_init(struct drm_device *dev)
969 struct drm_i915_private *dev_priv = dev->dev_private;
970 struct intel_output *intel_output;
971 struct drm_connector *connector;
972 struct drm_encoder *encoder;
973 struct drm_display_mode *scan; /* *modes, *bios_mode; */
974 struct drm_crtc *crtc;
975 struct intel_lvds_priv *lvds_priv;
977 int pipe, gpio = GPIOC;
979 /* Skip init on machines we know falsely report LVDS */
980 if (dmi_check_system(intel_no_lvds))
983 if (!lvds_is_present_in_vbt(dev)) {
984 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
988 if (HAS_PCH_SPLIT(dev)) {
989 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
991 if (dev_priv->edp_support) {
992 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
998 intel_output = kzalloc(sizeof(struct intel_output) +
999 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1000 if (!intel_output) {
1004 connector = &intel_output->base;
1005 encoder = &intel_output->enc;
1006 drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
1007 DRM_MODE_CONNECTOR_LVDS);
1009 drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
1010 DRM_MODE_ENCODER_LVDS);
1012 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1013 intel_output->type = INTEL_OUTPUT_LVDS;
1015 intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1016 intel_output->crtc_mask = (1 << 1);
1017 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1018 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1019 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1020 connector->interlace_allowed = false;
1021 connector->doublescan_allowed = false;
1023 lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
1024 intel_output->dev_priv = lvds_priv;
1025 /* create the scaling mode property */
1026 drm_mode_create_scaling_mode_property(dev);
1028 * the initial panel fitting mode will be FULL_SCREEN.
1031 drm_connector_attach_property(&intel_output->base,
1032 dev->mode_config.scaling_mode_property,
1033 DRM_MODE_SCALE_FULLSCREEN);
1034 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1037 * 1) check for EDID on DDC
1038 * 2) check for VBT data
1039 * 3) check to see if LVDS is already on
1040 * if none of the above, no panel
1041 * 4) make sure lid is open
1042 * if closed, act like it's not there for now
1045 /* Set up the DDC bus. */
1046 intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1047 if (!intel_output->ddc_bus) {
1048 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1054 * Attempt to get the fixed panel mode from DDC. Assume that the
1055 * preferred mode is the right one.
1057 intel_ddc_get_modes(intel_output);
1059 list_for_each_entry(scan, &connector->probed_modes, head) {
1060 mutex_lock(&dev->mode_config.mutex);
1061 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1062 dev_priv->panel_fixed_mode =
1063 drm_mode_duplicate(dev, scan);
1064 mutex_unlock(&dev->mode_config.mutex);
1065 intel_find_lvds_downclock(dev, connector);
1068 mutex_unlock(&dev->mode_config.mutex);
1071 /* Failed to get EDID, what about VBT? */
1072 if (dev_priv->lfp_lvds_vbt_mode) {
1073 mutex_lock(&dev->mode_config.mutex);
1074 dev_priv->panel_fixed_mode =
1075 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1076 mutex_unlock(&dev->mode_config.mutex);
1077 if (dev_priv->panel_fixed_mode) {
1078 dev_priv->panel_fixed_mode->type |=
1079 DRM_MODE_TYPE_PREFERRED;
1085 * If we didn't get EDID, try checking if the panel is already turned
1086 * on. If so, assume that whatever is currently programmed is the
1090 /* Ironlake: FIXME if still fail, not try pipe mode now */
1091 if (HAS_PCH_SPLIT(dev))
1094 lvds = I915_READ(LVDS);
1095 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1096 crtc = intel_get_crtc_from_pipe(dev, pipe);
1098 if (crtc && (lvds & LVDS_PORT_EN)) {
1099 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1100 if (dev_priv->panel_fixed_mode) {
1101 dev_priv->panel_fixed_mode->type |=
1102 DRM_MODE_TYPE_PREFERRED;
1107 /* If we still don't have a mode after all that, give up. */
1108 if (!dev_priv->panel_fixed_mode)
1112 if (HAS_PCH_SPLIT(dev)) {
1114 /* make sure PWM is enabled */
1115 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1116 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1117 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1119 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1120 pwm |= PWM_PCH_ENABLE;
1121 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1123 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1124 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1125 DRM_DEBUG_KMS("lid notifier registration failed\n");
1126 dev_priv->lid_notifier.notifier_call = NULL;
1128 /* keep the LVDS connector */
1129 dev_priv->int_lvds_connector = connector;
1130 drm_sysfs_connector_add(connector);
1134 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1135 if (intel_output->ddc_bus)
1136 intel_i2c_destroy(intel_output->ddc_bus);
1137 drm_connector_cleanup(connector);
1138 drm_encoder_cleanup(encoder);
1139 kfree(intel_output);