2 * Copyright © 2006-2007 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
30 #include <acpi/button.h>
31 #include <linux/dmi.h>
32 #include <linux/i2c.h>
37 #include "intel_drv.h"
40 #include <linux/acpi.h>
42 /* Private structure for the integrated LVDS support */
43 struct intel_lvds_priv {
50 * Sets the backlight level.
52 * \param level backlight level, from 0 to intel_lvds_get_max_backlight().
54 static void intel_lvds_set_backlight(struct drm_device *dev, int level)
56 struct drm_i915_private *dev_priv = dev->dev_private;
60 reg = BLC_PWM_CPU_CTL;
64 blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK;
65 I915_WRITE(reg, (blc_pwm_ctl |
66 (level << BACKLIGHT_DUTY_CYCLE_SHIFT)));
70 * Returns the maximum level of the backlight duty cycle field.
72 static u32 intel_lvds_get_max_backlight(struct drm_device *dev)
74 struct drm_i915_private *dev_priv = dev->dev_private;
78 reg = BLC_PWM_PCH_CTL2;
82 return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >>
83 BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
87 * Sets the power state for the panel.
89 static void intel_lvds_set_power(struct drm_device *dev, bool on)
91 struct drm_i915_private *dev_priv = dev->dev_private;
92 u32 pp_status, ctl_reg, status_reg;
94 if (IS_IRONLAKE(dev)) {
95 ctl_reg = PCH_PP_CONTROL;
96 status_reg = PCH_PP_STATUS;
99 status_reg = PP_STATUS;
103 I915_WRITE(ctl_reg, I915_READ(ctl_reg) |
106 pp_status = I915_READ(status_reg);
107 } while ((pp_status & PP_ON) == 0);
109 intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle);
111 intel_lvds_set_backlight(dev, 0);
113 I915_WRITE(ctl_reg, I915_READ(ctl_reg) &
116 pp_status = I915_READ(status_reg);
117 } while (pp_status & PP_ON);
121 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
123 struct drm_device *dev = encoder->dev;
125 if (mode == DRM_MODE_DPMS_ON)
126 intel_lvds_set_power(dev, true);
128 intel_lvds_set_power(dev, false);
130 /* XXX: We never power down the LVDS pairs. */
133 static void intel_lvds_save(struct drm_connector *connector)
135 struct drm_device *dev = connector->dev;
136 struct drm_i915_private *dev_priv = dev->dev_private;
137 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
140 if (IS_IRONLAKE(dev)) {
141 pp_on_reg = PCH_PP_ON_DELAYS;
142 pp_off_reg = PCH_PP_OFF_DELAYS;
143 pp_ctl_reg = PCH_PP_CONTROL;
144 pp_div_reg = PCH_PP_DIVISOR;
145 pwm_ctl_reg = BLC_PWM_CPU_CTL;
147 pp_on_reg = PP_ON_DELAYS;
148 pp_off_reg = PP_OFF_DELAYS;
149 pp_ctl_reg = PP_CONTROL;
150 pp_div_reg = PP_DIVISOR;
151 pwm_ctl_reg = BLC_PWM_CTL;
154 dev_priv->savePP_ON = I915_READ(pp_on_reg);
155 dev_priv->savePP_OFF = I915_READ(pp_off_reg);
156 dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg);
157 dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg);
158 dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg);
159 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
160 BACKLIGHT_DUTY_CYCLE_MASK);
163 * If the light is off at server startup, just make it full brightness
165 if (dev_priv->backlight_duty_cycle == 0)
166 dev_priv->backlight_duty_cycle =
167 intel_lvds_get_max_backlight(dev);
170 static void intel_lvds_restore(struct drm_connector *connector)
172 struct drm_device *dev = connector->dev;
173 struct drm_i915_private *dev_priv = dev->dev_private;
174 u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg;
177 if (IS_IRONLAKE(dev)) {
178 pp_on_reg = PCH_PP_ON_DELAYS;
179 pp_off_reg = PCH_PP_OFF_DELAYS;
180 pp_ctl_reg = PCH_PP_CONTROL;
181 pp_div_reg = PCH_PP_DIVISOR;
182 pwm_ctl_reg = BLC_PWM_CPU_CTL;
184 pp_on_reg = PP_ON_DELAYS;
185 pp_off_reg = PP_OFF_DELAYS;
186 pp_ctl_reg = PP_CONTROL;
187 pp_div_reg = PP_DIVISOR;
188 pwm_ctl_reg = BLC_PWM_CTL;
191 I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL);
192 I915_WRITE(pp_on_reg, dev_priv->savePP_ON);
193 I915_WRITE(pp_off_reg, dev_priv->savePP_OFF);
194 I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR);
195 I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL);
196 if (dev_priv->savePP_CONTROL & POWER_TARGET_ON)
197 intel_lvds_set_power(dev, true);
199 intel_lvds_set_power(dev, false);
202 static int intel_lvds_mode_valid(struct drm_connector *connector,
203 struct drm_display_mode *mode)
205 struct drm_device *dev = connector->dev;
206 struct drm_i915_private *dev_priv = dev->dev_private;
207 struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode;
210 if (mode->hdisplay > fixed_mode->hdisplay)
212 if (mode->vdisplay > fixed_mode->vdisplay)
219 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
220 struct drm_display_mode *mode,
221 struct drm_display_mode *adjusted_mode)
224 * float point operation is not supported . So the PANEL_RATIO_FACTOR
225 * is defined, which can avoid the float point computation when
226 * calculating the panel ratio.
228 #define PANEL_RATIO_FACTOR 8192
229 struct drm_device *dev = encoder->dev;
230 struct drm_i915_private *dev_priv = dev->dev_private;
231 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
232 struct drm_encoder *tmp_encoder;
233 struct intel_output *intel_output = enc_to_intel_output(encoder);
234 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
235 u32 pfit_control = 0, pfit_pgm_ratios = 0;
236 int left_border = 0, right_border = 0, top_border = 0;
237 int bottom_border = 0;
239 int panel_ratio, desired_ratio, vert_scale, horiz_scale;
240 int horiz_ratio, vert_ratio;
241 u32 hsync_width, vsync_width;
242 u32 hblank_width, vblank_width;
243 u32 hsync_pos, vsync_pos;
245 /* Should never happen!! */
246 if (!IS_I965G(dev) && intel_crtc->pipe == 0) {
247 DRM_ERROR("Can't support LVDS on pipe A\n");
251 /* Should never happen!! */
252 list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
253 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
254 DRM_ERROR("Can't enable LVDS and another "
255 "encoder on the same pipe\n");
259 /* If we don't have a panel mode, there is nothing we can do */
260 if (dev_priv->panel_fixed_mode == NULL)
263 * If we have timings from the BIOS for the panel, put them in
264 * to the adjusted mode. The CRTC will be set up for this mode,
265 * with the panel scaling set up to source from the H/VDisplay
266 * of the original mode.
268 if (dev_priv->panel_fixed_mode != NULL) {
269 adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay;
270 adjusted_mode->hsync_start =
271 dev_priv->panel_fixed_mode->hsync_start;
272 adjusted_mode->hsync_end =
273 dev_priv->panel_fixed_mode->hsync_end;
274 adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal;
275 adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay;
276 adjusted_mode->vsync_start =
277 dev_priv->panel_fixed_mode->vsync_start;
278 adjusted_mode->vsync_end =
279 dev_priv->panel_fixed_mode->vsync_end;
280 adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal;
281 adjusted_mode->clock = dev_priv->panel_fixed_mode->clock;
282 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
285 /* Make sure pre-965s set dither correctly */
286 if (!IS_I965G(dev)) {
287 if (dev_priv->panel_wants_dither || dev_priv->lvds_dither)
288 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
291 /* Native modes don't need fitting */
292 if (adjusted_mode->hdisplay == mode->hdisplay &&
293 adjusted_mode->vdisplay == mode->vdisplay) {
299 /* full screen scale for now */
300 if (IS_IRONLAKE(dev))
303 /* 965+ wants fuzzy fitting */
305 pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) |
308 hsync_width = adjusted_mode->crtc_hsync_end -
309 adjusted_mode->crtc_hsync_start;
310 vsync_width = adjusted_mode->crtc_vsync_end -
311 adjusted_mode->crtc_vsync_start;
312 hblank_width = adjusted_mode->crtc_hblank_end -
313 adjusted_mode->crtc_hblank_start;
314 vblank_width = adjusted_mode->crtc_vblank_end -
315 adjusted_mode->crtc_vblank_start;
317 * Deal with panel fitting options. Figure out how to stretch the
318 * image based on its aspect ratio & the current panel fitting mode.
320 panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR /
321 adjusted_mode->vdisplay;
322 desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR /
325 * Enable automatic panel scaling for non-native modes so that they fill
326 * the screen. Should be enabled before the pipe is enabled, according
327 * to register description and PRM.
328 * Change the value here to see the borders for debugging
330 if (!IS_IRONLAKE(dev)) {
331 I915_WRITE(BCLRPAT_A, 0);
332 I915_WRITE(BCLRPAT_B, 0);
335 switch (lvds_priv->fitting_mode) {
336 case DRM_MODE_SCALE_CENTER:
338 * For centered modes, we have to calculate border widths &
339 * heights and modify the values programmed into the CRTC.
341 left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2;
342 right_border = left_border;
343 if (mode->hdisplay & 1)
345 top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2;
346 bottom_border = top_border;
347 if (mode->vdisplay & 1)
349 /* Set active & border values */
350 adjusted_mode->crtc_hdisplay = mode->hdisplay;
351 /* Keep the boder be even */
352 if (right_border & 1)
354 /* use the border directly instead of border minuse one */
355 adjusted_mode->crtc_hblank_start = mode->hdisplay +
357 /* keep the blank width constant */
358 adjusted_mode->crtc_hblank_end =
359 adjusted_mode->crtc_hblank_start + hblank_width;
360 /* get the hsync pos relative to hblank start */
361 hsync_pos = (hblank_width - hsync_width) / 2;
362 /* keep the hsync pos be even */
365 adjusted_mode->crtc_hsync_start =
366 adjusted_mode->crtc_hblank_start + hsync_pos;
367 /* keep the hsync width constant */
368 adjusted_mode->crtc_hsync_end =
369 adjusted_mode->crtc_hsync_start + hsync_width;
370 adjusted_mode->crtc_vdisplay = mode->vdisplay;
371 /* use the border instead of border minus one */
372 adjusted_mode->crtc_vblank_start = mode->vdisplay +
374 /* keep the vblank width constant */
375 adjusted_mode->crtc_vblank_end =
376 adjusted_mode->crtc_vblank_start + vblank_width;
377 /* get the vsync start postion relative to vblank start */
378 vsync_pos = (vblank_width - vsync_width) / 2;
379 adjusted_mode->crtc_vsync_start =
380 adjusted_mode->crtc_vblank_start + vsync_pos;
381 /* keep the vsync width constant */
382 adjusted_mode->crtc_vsync_end =
383 adjusted_mode->crtc_vsync_start + vsync_width;
386 case DRM_MODE_SCALE_ASPECT:
387 /* Scale but preserve the spect ratio */
388 pfit_control |= PFIT_ENABLE;
390 /* 965+ is easy, it does everything in hw */
391 if (panel_ratio > desired_ratio)
392 pfit_control |= PFIT_SCALING_PILLAR;
393 else if (panel_ratio < desired_ratio)
394 pfit_control |= PFIT_SCALING_LETTER;
396 pfit_control |= PFIT_SCALING_AUTO;
399 * For earlier chips we have to calculate the scaling
400 * ratio by hand and program it into the
401 * PFIT_PGM_RATIO register
403 u32 horiz_bits, vert_bits, bits = 12;
404 horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/
405 adjusted_mode->hdisplay;
406 vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/
407 adjusted_mode->vdisplay;
408 horiz_scale = adjusted_mode->hdisplay *
409 PANEL_RATIO_FACTOR / mode->hdisplay;
410 vert_scale = adjusted_mode->vdisplay *
411 PANEL_RATIO_FACTOR / mode->vdisplay;
413 /* retain aspect ratio */
414 if (panel_ratio > desired_ratio) { /* Pillar */
416 scaled_width = mode->hdisplay * vert_scale /
418 horiz_ratio = vert_ratio;
419 pfit_control |= (VERT_AUTO_SCALE |
420 VERT_INTERP_BILINEAR |
421 HORIZ_INTERP_BILINEAR);
422 /* Pillar will have left/right borders */
423 left_border = (adjusted_mode->hdisplay -
425 right_border = left_border;
426 if (mode->hdisplay & 1) /* odd resolutions */
428 /* keep the border be even */
429 if (right_border & 1)
431 adjusted_mode->crtc_hdisplay = scaled_width;
432 /* use border instead of border minus one */
433 adjusted_mode->crtc_hblank_start =
434 scaled_width + right_border;
435 /* keep the hblank width constant */
436 adjusted_mode->crtc_hblank_end =
437 adjusted_mode->crtc_hblank_start +
440 * get the hsync start pos relative to
443 hsync_pos = (hblank_width - hsync_width) / 2;
444 /* keep the hsync_pos be even */
447 adjusted_mode->crtc_hsync_start =
448 adjusted_mode->crtc_hblank_start +
450 /* keept hsync width constant */
451 adjusted_mode->crtc_hsync_end =
452 adjusted_mode->crtc_hsync_start +
455 } else if (panel_ratio < desired_ratio) { /* letter */
456 u32 scaled_height = mode->vdisplay *
457 horiz_scale / PANEL_RATIO_FACTOR;
458 vert_ratio = horiz_ratio;
459 pfit_control |= (HORIZ_AUTO_SCALE |
460 VERT_INTERP_BILINEAR |
461 HORIZ_INTERP_BILINEAR);
462 /* Letterbox will have top/bottom border */
463 top_border = (adjusted_mode->vdisplay -
465 bottom_border = top_border;
466 if (mode->vdisplay & 1)
468 adjusted_mode->crtc_vdisplay = scaled_height;
469 /* use border instead of border minus one */
470 adjusted_mode->crtc_vblank_start =
471 scaled_height + bottom_border;
472 /* keep the vblank width constant */
473 adjusted_mode->crtc_vblank_end =
474 adjusted_mode->crtc_vblank_start +
477 * get the vsync start pos relative to
480 vsync_pos = (vblank_width - vsync_width) / 2;
481 adjusted_mode->crtc_vsync_start =
482 adjusted_mode->crtc_vblank_start +
484 /* keep the vsync width constant */
485 adjusted_mode->crtc_vsync_end =
486 adjusted_mode->crtc_vsync_start +
490 /* Aspects match, Let hw scale both directions */
491 pfit_control |= (VERT_AUTO_SCALE |
493 VERT_INTERP_BILINEAR |
494 HORIZ_INTERP_BILINEAR);
496 horiz_bits = (1 << bits) * horiz_ratio /
498 vert_bits = (1 << bits) * vert_ratio /
501 ((vert_bits << PFIT_VERT_SCALE_SHIFT) &
502 PFIT_VERT_SCALE_MASK) |
503 ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) &
504 PFIT_HORIZ_SCALE_MASK);
508 case DRM_MODE_SCALE_FULLSCREEN:
510 * Full scaling, even if it changes the aspect ratio.
511 * Fortunately this is all done for us in hw.
513 pfit_control |= PFIT_ENABLE;
515 pfit_control |= PFIT_SCALING_AUTO;
517 pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
518 VERT_INTERP_BILINEAR |
519 HORIZ_INTERP_BILINEAR);
526 lvds_priv->pfit_control = pfit_control;
527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
529 * When there exists the border, it means that the LVDS_BORDR
533 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
535 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
537 * XXX: It would be nice to support lower refresh rates on the
538 * panels to reduce power consumption, and perhaps match the
539 * user's requested refresh rate.
545 static void intel_lvds_prepare(struct drm_encoder *encoder)
547 struct drm_device *dev = encoder->dev;
548 struct drm_i915_private *dev_priv = dev->dev_private;
551 if (IS_IRONLAKE(dev))
552 reg = BLC_PWM_CPU_CTL;
556 dev_priv->saveBLC_PWM_CTL = I915_READ(reg);
557 dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL &
558 BACKLIGHT_DUTY_CYCLE_MASK);
560 intel_lvds_set_power(dev, false);
563 static void intel_lvds_commit( struct drm_encoder *encoder)
565 struct drm_device *dev = encoder->dev;
566 struct drm_i915_private *dev_priv = dev->dev_private;
568 if (dev_priv->backlight_duty_cycle == 0)
569 dev_priv->backlight_duty_cycle =
570 intel_lvds_get_max_backlight(dev);
572 intel_lvds_set_power(dev, true);
575 static void intel_lvds_mode_set(struct drm_encoder *encoder,
576 struct drm_display_mode *mode,
577 struct drm_display_mode *adjusted_mode)
579 struct drm_device *dev = encoder->dev;
580 struct drm_i915_private *dev_priv = dev->dev_private;
581 struct intel_output *intel_output = enc_to_intel_output(encoder);
582 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
585 * The LVDS pin pair will already have been turned on in the
586 * intel_crtc_mode_set since it has a large impact on the DPLL
590 if (IS_IRONLAKE(dev))
594 * Enable automatic panel scaling so that non-native modes fill the
595 * screen. Should be enabled before the pipe is enabled, according to
596 * register description and PRM.
598 I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios);
599 I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control);
602 /* Some lid devices report incorrect lid status, assume they're connected */
603 static const struct dmi_system_id bad_lid_status[] = {
605 .ident = "Compaq nx9020",
607 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
608 DMI_MATCH(DMI_BOARD_NAME, "3084"),
612 .ident = "Samsung SX20S",
614 DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
615 DMI_MATCH(DMI_BOARD_NAME, "SX20S"),
619 .ident = "Aspire One",
621 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
622 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
626 .ident = "Aspire 1810T",
628 DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
629 DMI_MATCH(DMI_PRODUCT_NAME, "Aspire 1810T"),
635 DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
636 DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
643 * Detect the LVDS connection.
645 * Since LVDS doesn't have hotlug, we use the lid as a proxy. Open means
646 * connected and closed means disconnected. We also send hotplug events as
647 * needed, using lid status notification from the input layer.
649 static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector)
651 enum drm_connector_status status = connector_status_connected;
653 if (!dmi_check_system(bad_lid_status) && !acpi_lid_open())
654 status = connector_status_disconnected;
660 * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
662 static int intel_lvds_get_modes(struct drm_connector *connector)
664 struct drm_device *dev = connector->dev;
665 struct intel_output *intel_output = to_intel_output(connector);
666 struct drm_i915_private *dev_priv = dev->dev_private;
669 ret = intel_ddc_get_modes(intel_output);
674 /* Didn't get an EDID, so
675 * Set wide sync ranges so we get all modes
676 * handed to valid_mode for checking
678 connector->display_info.min_vfreq = 0;
679 connector->display_info.max_vfreq = 200;
680 connector->display_info.min_hfreq = 0;
681 connector->display_info.max_hfreq = 200;
683 if (dev_priv->panel_fixed_mode != NULL) {
684 struct drm_display_mode *mode;
686 mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode);
687 drm_mode_probed_add(connector, mode);
696 * Lid events. Note the use of 'modeset_on_lid':
697 * - we set it on lid close, and reset it on open
698 * - we use it as a "only once" bit (ie we ignore
699 * duplicate events where it was already properly
701 * - the suspend/resume paths will also set it to
702 * zero, since they restore the mode ("lid open").
704 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
707 struct drm_i915_private *dev_priv =
708 container_of(nb, struct drm_i915_private, lid_notifier);
709 struct drm_device *dev = dev_priv->dev;
710 struct drm_connector *connector = dev_priv->int_lvds_connector;
713 * check and update the status of LVDS connector after receiving
714 * the LID nofication event.
717 connector->status = connector->funcs->detect(connector);
718 if (!acpi_lid_open()) {
719 dev_priv->modeset_on_lid = 1;
723 if (!dev_priv->modeset_on_lid)
726 dev_priv->modeset_on_lid = 0;
728 mutex_lock(&dev->mode_config.mutex);
729 drm_helper_resume_force_mode(dev);
730 mutex_unlock(&dev->mode_config.mutex);
736 * intel_lvds_destroy - unregister and free LVDS structures
737 * @connector: connector to free
739 * Unregister the DDC bus for this connector then free the driver private
742 static void intel_lvds_destroy(struct drm_connector *connector)
744 struct drm_device *dev = connector->dev;
745 struct intel_output *intel_output = to_intel_output(connector);
746 struct drm_i915_private *dev_priv = dev->dev_private;
748 if (intel_output->ddc_bus)
749 intel_i2c_destroy(intel_output->ddc_bus);
750 if (dev_priv->lid_notifier.notifier_call)
751 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
752 drm_sysfs_connector_remove(connector);
753 drm_connector_cleanup(connector);
757 static int intel_lvds_set_property(struct drm_connector *connector,
758 struct drm_property *property,
761 struct drm_device *dev = connector->dev;
762 struct intel_output *intel_output =
763 to_intel_output(connector);
765 if (property == dev->mode_config.scaling_mode_property &&
766 connector->encoder) {
767 struct drm_crtc *crtc = connector->encoder->crtc;
768 struct intel_lvds_priv *lvds_priv = intel_output->dev_priv;
769 if (value == DRM_MODE_SCALE_NONE) {
770 DRM_DEBUG_KMS("no scaling not supported\n");
773 if (lvds_priv->fitting_mode == value) {
774 /* the LVDS scaling property is not changed */
777 lvds_priv->fitting_mode = value;
778 if (crtc && crtc->enabled) {
780 * If the CRTC is enabled, the display will be changed
781 * according to the new panel fitting mode.
783 drm_crtc_helper_set_mode(crtc, &crtc->mode,
784 crtc->x, crtc->y, crtc->fb);
791 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
792 .dpms = intel_lvds_dpms,
793 .mode_fixup = intel_lvds_mode_fixup,
794 .prepare = intel_lvds_prepare,
795 .mode_set = intel_lvds_mode_set,
796 .commit = intel_lvds_commit,
799 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
800 .get_modes = intel_lvds_get_modes,
801 .mode_valid = intel_lvds_mode_valid,
802 .best_encoder = intel_best_encoder,
805 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
806 .dpms = drm_helper_connector_dpms,
807 .save = intel_lvds_save,
808 .restore = intel_lvds_restore,
809 .detect = intel_lvds_detect,
810 .fill_modes = drm_helper_probe_single_connector_modes,
811 .set_property = intel_lvds_set_property,
812 .destroy = intel_lvds_destroy,
816 static void intel_lvds_enc_destroy(struct drm_encoder *encoder)
818 drm_encoder_cleanup(encoder);
821 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
822 .destroy = intel_lvds_enc_destroy,
825 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
827 DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
831 /* These systems claim to have LVDS, but really don't */
832 static const struct dmi_system_id intel_no_lvds[] = {
834 .callback = intel_no_lvds_dmi_callback,
835 .ident = "Apple Mac Mini (Core series)",
837 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
838 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
842 .callback = intel_no_lvds_dmi_callback,
843 .ident = "Apple Mac Mini (Core 2 series)",
845 DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
846 DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
850 .callback = intel_no_lvds_dmi_callback,
851 .ident = "MSI IM-945GSE-A",
853 DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
854 DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
858 .callback = intel_no_lvds_dmi_callback,
859 .ident = "Dell Studio Hybrid",
861 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
862 DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
866 .callback = intel_no_lvds_dmi_callback,
867 .ident = "AOpen Mini PC",
869 DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
870 DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
874 .callback = intel_no_lvds_dmi_callback,
875 .ident = "AOpen Mini PC MP915",
877 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
878 DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
882 .callback = intel_no_lvds_dmi_callback,
883 .ident = "Aopen i945GTt-VFA",
885 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
889 { } /* terminating entry */
893 * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
895 * @connector: LVDS connector
897 * Find the reduced downclock for LVDS in EDID.
899 static void intel_find_lvds_downclock(struct drm_device *dev,
900 struct drm_connector *connector)
902 struct drm_i915_private *dev_priv = dev->dev_private;
903 struct drm_display_mode *scan, *panel_fixed_mode;
906 panel_fixed_mode = dev_priv->panel_fixed_mode;
907 temp_downclock = panel_fixed_mode->clock;
909 mutex_lock(&dev->mode_config.mutex);
910 list_for_each_entry(scan, &connector->probed_modes, head) {
912 * If one mode has the same resolution with the fixed_panel
913 * mode while they have the different refresh rate, it means
914 * that the reduced downclock is found for the LVDS. In such
915 * case we can set the different FPx0/1 to dynamically select
916 * between low and high frequency.
918 if (scan->hdisplay == panel_fixed_mode->hdisplay &&
919 scan->hsync_start == panel_fixed_mode->hsync_start &&
920 scan->hsync_end == panel_fixed_mode->hsync_end &&
921 scan->htotal == panel_fixed_mode->htotal &&
922 scan->vdisplay == panel_fixed_mode->vdisplay &&
923 scan->vsync_start == panel_fixed_mode->vsync_start &&
924 scan->vsync_end == panel_fixed_mode->vsync_end &&
925 scan->vtotal == panel_fixed_mode->vtotal) {
926 if (scan->clock < temp_downclock) {
928 * The downclock is already found. But we
929 * expect to find the lower downclock.
931 temp_downclock = scan->clock;
935 mutex_unlock(&dev->mode_config.mutex);
936 if (temp_downclock < panel_fixed_mode->clock &&
937 i915_lvds_downclock) {
938 /* We found the downclock for LVDS. */
939 dev_priv->lvds_downclock_avail = 1;
940 dev_priv->lvds_downclock = temp_downclock;
941 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
942 "Normal clock %dKhz, downclock %dKhz\n",
943 panel_fixed_mode->clock, temp_downclock);
949 * Enumerate the child dev array parsed from VBT to check whether
950 * the LVDS is present.
951 * If it is present, return 1.
952 * If it is not present, return false.
953 * If no child dev is parsed from VBT, it assumes that the LVDS is present.
954 * Note: The addin_offset should also be checked for LVDS panel.
955 * Only when it is non-zero, it is assumed that it is present.
957 static int lvds_is_present_in_vbt(struct drm_device *dev)
959 struct drm_i915_private *dev_priv = dev->dev_private;
960 struct child_device_config *p_child;
963 if (!dev_priv->child_dev_num)
967 for (i = 0; i < dev_priv->child_dev_num; i++) {
968 p_child = dev_priv->child_dev + i;
970 * If the device type is not LFP, continue.
971 * If the device type is 0x22, it is also regarded as LFP.
973 if (p_child->device_type != DEVICE_TYPE_INT_LFP &&
974 p_child->device_type != DEVICE_TYPE_LFP)
977 /* The addin_offset should be checked. Only when it is
978 * non-zero, it is regarded as present.
980 if (p_child->addin_offset) {
989 * intel_lvds_init - setup LVDS connectors on this device
992 * Create the connector, register the LVDS DDC bus, and try to figure out what
993 * modes we can display on the LVDS panel (if present).
995 void intel_lvds_init(struct drm_device *dev)
997 struct drm_i915_private *dev_priv = dev->dev_private;
998 struct intel_output *intel_output;
999 struct drm_connector *connector;
1000 struct drm_encoder *encoder;
1001 struct drm_display_mode *scan; /* *modes, *bios_mode; */
1002 struct drm_crtc *crtc;
1003 struct intel_lvds_priv *lvds_priv;
1005 int pipe, gpio = GPIOC;
1007 /* Skip init on machines we know falsely report LVDS */
1008 if (dmi_check_system(intel_no_lvds))
1011 if (!lvds_is_present_in_vbt(dev)) {
1012 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
1016 if (IS_IRONLAKE(dev)) {
1017 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
1019 if (dev_priv->edp_support) {
1020 DRM_DEBUG_KMS("disable LVDS for eDP support\n");
1026 intel_output = kzalloc(sizeof(struct intel_output) +
1027 sizeof(struct intel_lvds_priv), GFP_KERNEL);
1028 if (!intel_output) {
1032 connector = &intel_output->base;
1033 encoder = &intel_output->enc;
1034 drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs,
1035 DRM_MODE_CONNECTOR_LVDS);
1037 drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs,
1038 DRM_MODE_ENCODER_LVDS);
1040 drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc);
1041 intel_output->type = INTEL_OUTPUT_LVDS;
1043 intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
1044 intel_output->crtc_mask = (1 << 1);
1045 drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
1046 drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
1047 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
1048 connector->interlace_allowed = false;
1049 connector->doublescan_allowed = false;
1051 lvds_priv = (struct intel_lvds_priv *)(intel_output + 1);
1052 intel_output->dev_priv = lvds_priv;
1053 /* create the scaling mode property */
1054 drm_mode_create_scaling_mode_property(dev);
1056 * the initial panel fitting mode will be FULL_SCREEN.
1059 drm_connector_attach_property(&intel_output->base,
1060 dev->mode_config.scaling_mode_property,
1061 DRM_MODE_SCALE_FULLSCREEN);
1062 lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN;
1065 * 1) check for EDID on DDC
1066 * 2) check for VBT data
1067 * 3) check to see if LVDS is already on
1068 * if none of the above, no panel
1069 * 4) make sure lid is open
1070 * if closed, act like it's not there for now
1073 /* Set up the DDC bus. */
1074 intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C");
1075 if (!intel_output->ddc_bus) {
1076 dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
1082 * Attempt to get the fixed panel mode from DDC. Assume that the
1083 * preferred mode is the right one.
1085 intel_ddc_get_modes(intel_output);
1087 list_for_each_entry(scan, &connector->probed_modes, head) {
1088 mutex_lock(&dev->mode_config.mutex);
1089 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1090 dev_priv->panel_fixed_mode =
1091 drm_mode_duplicate(dev, scan);
1092 mutex_unlock(&dev->mode_config.mutex);
1093 intel_find_lvds_downclock(dev, connector);
1096 mutex_unlock(&dev->mode_config.mutex);
1099 /* Failed to get EDID, what about VBT? */
1100 if (dev_priv->lfp_lvds_vbt_mode) {
1101 mutex_lock(&dev->mode_config.mutex);
1102 dev_priv->panel_fixed_mode =
1103 drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1104 mutex_unlock(&dev->mode_config.mutex);
1105 if (dev_priv->panel_fixed_mode) {
1106 dev_priv->panel_fixed_mode->type |=
1107 DRM_MODE_TYPE_PREFERRED;
1113 * If we didn't get EDID, try checking if the panel is already turned
1114 * on. If so, assume that whatever is currently programmed is the
1118 /* Ironlake: FIXME if still fail, not try pipe mode now */
1119 if (IS_IRONLAKE(dev))
1122 lvds = I915_READ(LVDS);
1123 pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1124 crtc = intel_get_crtc_from_pipe(dev, pipe);
1126 if (crtc && (lvds & LVDS_PORT_EN)) {
1127 dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc);
1128 if (dev_priv->panel_fixed_mode) {
1129 dev_priv->panel_fixed_mode->type |=
1130 DRM_MODE_TYPE_PREFERRED;
1135 /* If we still don't have a mode after all that, give up. */
1136 if (!dev_priv->panel_fixed_mode)
1140 if (IS_IRONLAKE(dev)) {
1142 /* make sure PWM is enabled */
1143 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1144 pwm |= (PWM_ENABLE | PWM_PIPE_B);
1145 I915_WRITE(BLC_PWM_CPU_CTL2, pwm);
1147 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1148 pwm |= PWM_PCH_ENABLE;
1149 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1151 dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1152 if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1153 DRM_DEBUG_KMS("lid notifier registration failed\n");
1154 dev_priv->lid_notifier.notifier_call = NULL;
1156 /* keep the LVDS connector */
1157 dev_priv->int_lvds_connector = connector;
1158 drm_sysfs_connector_add(connector);
1162 DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1163 if (intel_output->ddc_bus)
1164 intel_i2c_destroy(intel_output->ddc_bus);
1165 drm_connector_cleanup(connector);
1166 drm_encoder_cleanup(encoder);
1167 kfree(intel_output);