drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include "drmP.h"
  35 #include "drm.h"
  36 #include "drm_crtc.h"
  37 #include "drm_edid.h"
  38 #include "intel_drv.h"
  39 #include "i915_drm.h"
  40 #include "i915_drv.h"
  41 #include <linux/acpi.h>
  42
  43 /* Private structure for the integrated LVDS support */
  44 struct intel_lvds {
  45         struct intel_encoder base;
  46
  47         struct edid *edid;
  48
  49         int fitting_mode;
  50         u32 pfit_control;
  51         u32 pfit_pgm_ratios;
  52         bool pfit_dirty;
  53
  54         struct drm_display_mode *fixed_mode;
  55 };
  56
  57 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  58 {
  59         return container_of(encoder, struct intel_lvds, base.base);
  60 }
  61
  62 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  63 {
  64         return container_of(intel_attached_encoder(connector),
  65                             struct intel_lvds, base);
  66 }
  67
  68 /**
  69  * Sets the power state for the panel.
  70  */
  71 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  72 {
  73         struct drm_device *dev = intel_lvds->base.base.dev;
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg, stat_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80                 stat_reg = PCH_PP_STATUS;
  81         } else {
  82                 ctl_reg = PP_CONTROL;
  83                 lvds_reg = LVDS;
  84                 stat_reg = PP_STATUS;
  85         }
  86
  87         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  88
  89         if (intel_lvds->pfit_dirty) {
  90                 /*
  91                  * Enable automatic panel scaling so that non-native modes
  92                  * fill the screen.  The panel fitter should only be
  93                  * adjusted whilst the pipe is disabled, according to
  94                  * register description and PRM.
  95                  */
  96                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  97                               intel_lvds->pfit_control,
  98                               intel_lvds->pfit_pgm_ratios);
  99
 100                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                 intel_lvds->pfit_dirty = false;
 103         }
 104
 105         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 106         POSTING_READ(lvds_reg);
 107         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 108                 DRM_ERROR("timed out waiting for panel to power on\n");
 109
 110         intel_panel_enable_backlight(dev);
 111 }
 112
 113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 114 {
 115         struct drm_device *dev = intel_lvds->base.base.dev;
 116         struct drm_i915_private *dev_priv = dev->dev_private;
 117         u32 ctl_reg, lvds_reg, stat_reg;
 118
 119         if (HAS_PCH_SPLIT(dev)) {
 120                 ctl_reg = PCH_PP_CONTROL;
 121                 lvds_reg = PCH_LVDS;
 122                 stat_reg = PCH_PP_STATUS;
 123         } else {
 124                 ctl_reg = PP_CONTROL;
 125                 lvds_reg = LVDS;
 126                 stat_reg = PP_STATUS;
 127         }
 128
 129         intel_panel_disable_backlight(dev);
 130
 131         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 132         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 133                 DRM_ERROR("timed out waiting for panel to power off\n");
 134
 135         if (intel_lvds->pfit_control) {
 136                 I915_WRITE(PFIT_CONTROL, 0);
 137                 intel_lvds->pfit_dirty = true;
 138         }
 139
 140         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 141         POSTING_READ(lvds_reg);
 142 }
 143
 144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 145 {
 146         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 147
 148         if (mode == DRM_MODE_DPMS_ON)
 149                 intel_lvds_enable(intel_lvds);
 150         else
 151                 intel_lvds_disable(intel_lvds);
 152
 153         /* XXX: We never power down the LVDS pairs. */
 154 }
 155
 156 static int intel_lvds_mode_valid(struct drm_connector *connector,
 157                                  struct drm_display_mode *mode)
 158 {
 159         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 160         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 161
 162         if (mode->hdisplay > fixed_mode->hdisplay)
 163                 return MODE_PANEL;
 164         if (mode->vdisplay > fixed_mode->vdisplay)
 165                 return MODE_PANEL;
 166
 167         return MODE_OK;
 168 }
 169
 170 static void
 171 centre_horizontally(struct drm_display_mode *mode,
 172                     int width)
 173 {
 174         u32 border, sync_pos, blank_width, sync_width;
 175
 176         /* keep the hsync and hblank widths constant */
 177         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 178         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 179         sync_pos = (blank_width - sync_width + 1) / 2;
 180
 181         border = (mode->hdisplay - width + 1) / 2;
 182         border += border & 1; /* make the border even */
 183
 184         mode->crtc_hdisplay = width;
 185         mode->crtc_hblank_start = width + border;
 186         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 187
 188         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 189         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 190 }
 191
 192 static void
 193 centre_vertically(struct drm_display_mode *mode,
 194                   int height)
 195 {
 196         u32 border, sync_pos, blank_width, sync_width;
 197
 198         /* keep the vsync and vblank widths constant */
 199         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 200         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 201         sync_pos = (blank_width - sync_width + 1) / 2;
 202
 203         border = (mode->vdisplay - height + 1) / 2;
 204
 205         mode->crtc_vdisplay = height;
 206         mode->crtc_vblank_start = height + border;
 207         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 208
 209         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 210         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 211 }
 212
 213 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 214 {
 215         /*
 216          * Floating point operation is not supported. So the FACTOR
 217          * is defined, which can avoid the floating point computation
 218          * when calculating the panel ratio.
 219          */
 220 #define ACCURACY 12
 221 #define FACTOR (1 << ACCURACY)
 222         u32 ratio = source * FACTOR / target;
 223         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 224 }
 225
 226 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 227                                   struct drm_display_mode *mode,
 228                                   struct drm_display_mode *adjusted_mode)
 229 {
 230         struct drm_device *dev = encoder->dev;
 231         struct drm_i915_private *dev_priv = dev->dev_private;
 232         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 233         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 234         struct drm_encoder *tmp_encoder;
 235         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 236         int pipe;
 237
 238         /* Should never happen!! */
 239         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 240                 DRM_ERROR("Can't support LVDS on pipe A\n");
 241                 return false;
 242         }
 243
 244         /* Should never happen!! */
 245         list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) {
 246                 if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) {
 247                         DRM_ERROR("Can't enable LVDS and another "
 248                                "encoder on the same pipe\n");
 249                         return false;
 250                 }
 251         }
 252
 253         /*
 254          * We have timings from the BIOS for the panel, put them in
 255          * to the adjusted mode.  The CRTC will be set up for this mode,
 256          * with the panel scaling set up to source from the H/VDisplay
 257          * of the original mode.
 258          */
 259         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 260
 261         if (HAS_PCH_SPLIT(dev)) {
 262                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 263                                         mode, adjusted_mode);
 264                 return true;
 265         }
 266
 267         /* Native modes don't need fitting */
 268         if (adjusted_mode->hdisplay == mode->hdisplay &&
 269             adjusted_mode->vdisplay == mode->vdisplay)
 270                 goto out;
 271
 272         /* 965+ wants fuzzy fitting */
 273         if (INTEL_INFO(dev)->gen >= 4)
 274                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 275                                  PFIT_FILTER_FUZZY);
 276
 277         /*
 278          * Enable automatic panel scaling for non-native modes so that they fill
 279          * the screen.  Should be enabled before the pipe is enabled, according
 280          * to register description and PRM.
 281          * Change the value here to see the borders for debugging
 282          */
 283         for_each_pipe(pipe)
 284                 I915_WRITE(BCLRPAT(pipe), 0);
 285
 286         switch (intel_lvds->fitting_mode) {
 287         case DRM_MODE_SCALE_CENTER:
 288                 /*
 289                  * For centered modes, we have to calculate border widths &
 290                  * heights and modify the values programmed into the CRTC.
 291                  */
 292                 centre_horizontally(adjusted_mode, mode->hdisplay);
 293                 centre_vertically(adjusted_mode, mode->vdisplay);
 294                 border = LVDS_BORDER_ENABLE;
 295                 break;
 296
 297         case DRM_MODE_SCALE_ASPECT:
 298                 /* Scale but preserve the aspect ratio */
 299                 if (INTEL_INFO(dev)->gen >= 4) {
 300                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 301                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 302
 303                         /* 965+ is easy, it does everything in hw */
 304                         if (scaled_width > scaled_height)
 305                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 306                         else if (scaled_width < scaled_height)
 307                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 308                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 309                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 310                 } else {
 311                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 312                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 313                         /*
 314                          * For earlier chips we have to calculate the scaling
 315                          * ratio by hand and program it into the
 316                          * PFIT_PGM_RATIO register
 317                          */
 318                         if (scaled_width > scaled_height) { /* pillar */
 319                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 320
 321                                 border = LVDS_BORDER_ENABLE;
 322                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 323                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 324                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 325                                                             bits << PFIT_VERT_SCALE_SHIFT);
 326                                         pfit_control |= (PFIT_ENABLE |
 327                                                          VERT_INTERP_BILINEAR |
 328                                                          HORIZ_INTERP_BILINEAR);
 329                                 }
 330                         } else if (scaled_width < scaled_height) { /* letter */
 331                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 332
 333                                 border = LVDS_BORDER_ENABLE;
 334                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 335                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 336                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 337                                                             bits << PFIT_VERT_SCALE_SHIFT);
 338                                         pfit_control |= (PFIT_ENABLE |
 339                                                          VERT_INTERP_BILINEAR |
 340                                                          HORIZ_INTERP_BILINEAR);
 341                                 }
 342                         } else
 343                                 /* Aspects match, Let hw scale both directions */
 344                                 pfit_control |= (PFIT_ENABLE |
 345                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 346                                                  VERT_INTERP_BILINEAR |
 347                                                  HORIZ_INTERP_BILINEAR);
 348                 }
 349                 break;
 350
 351         case DRM_MODE_SCALE_FULLSCREEN:
 352                 /*
 353                  * Full scaling, even if it changes the aspect ratio.
 354                  * Fortunately this is all done for us in hw.
 355                  */
 356                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 357                     mode->hdisplay != adjusted_mode->hdisplay) {
 358                         pfit_control |= PFIT_ENABLE;
 359                         if (INTEL_INFO(dev)->gen >= 4)
 360                                 pfit_control |= PFIT_SCALING_AUTO;
 361                         else
 362                                 pfit_control |= (VERT_AUTO_SCALE |
 363                                                  VERT_INTERP_BILINEAR |
 364                                                  HORIZ_AUTO_SCALE |
 365                                                  HORIZ_INTERP_BILINEAR);
 366                 }
 367                 break;
 368
 369         default:
 370                 break;
 371         }
 372
 373 out:
 374         /* If not enabling scaling, be consistent and always use 0. */
 375         if ((pfit_control & PFIT_ENABLE) == 0) {
 376                 pfit_control = 0;
 377                 pfit_pgm_ratios = 0;
 378         }
 379
 380         /* Make sure pre-965 set dither correctly */
 381         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 382                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 383
 384         if (pfit_control != intel_lvds->pfit_control ||
 385             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 386                 intel_lvds->pfit_control = pfit_control;
 387                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 388                 intel_lvds->pfit_dirty = true;
 389         }
 390         dev_priv->lvds_border_bits = border;
 391
 392         /*
 393          * XXX: It would be nice to support lower refresh rates on the
 394          * panels to reduce power consumption, and perhaps match the
 395          * user's requested refresh rate.
 396          */
 397
 398         return true;
 399 }
 400
 401 static void intel_lvds_prepare(struct drm_encoder *encoder)
 402 {
 403         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 404
 405         /*
 406          * Prior to Ironlake, we must disable the pipe if we want to adjust
 407          * the panel fitter. However at all other times we can just reset
 408          * the registers regardless.
 409          */
 410         if (!HAS_PCH_SPLIT(encoder->dev) && intel_lvds->pfit_dirty)
 411                 intel_lvds_disable(intel_lvds);
 412 }
 413
 414 static void intel_lvds_commit(struct drm_encoder *encoder)
 415 {
 416         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 417
 418         /* Always do a full power on as we do not know what state
 419          * we were left in.
 420          */
 421         intel_lvds_enable(intel_lvds);
 422 }
 423
 424 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 425                                 struct drm_display_mode *mode,
 426                                 struct drm_display_mode *adjusted_mode)
 427 {
 428         /*
 429          * The LVDS pin pair will already have been turned on in the
 430          * intel_crtc_mode_set since it has a large impact on the DPLL
 431          * settings.
 432          */
 433 }
 434
 435 /**
 436  * Detect the LVDS connection.
 437  *
 438  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 439  * connected and closed means disconnected.  We also send hotplug events as
 440  * needed, using lid status notification from the input layer.
 441  */
 442 static enum drm_connector_status
 443 intel_lvds_detect(struct drm_connector *connector, bool force)
 444 {
 445         struct drm_device *dev = connector->dev;
 446         enum drm_connector_status status;
 447
 448         status = intel_panel_detect(dev);
 449         if (status != connector_status_unknown)
 450                 return status;
 451
 452         return connector_status_connected;
 453 }
 454
 455 /**
 456  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 457  */
 458 static int intel_lvds_get_modes(struct drm_connector *connector)
 459 {
 460         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 461         struct drm_device *dev = connector->dev;
 462         struct drm_display_mode *mode;
 463
 464         if (intel_lvds->edid)
 465                 return drm_add_edid_modes(connector, intel_lvds->edid);
 466
 467         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 468         if (mode == NULL)
 469                 return 0;
 470
 471         drm_mode_probed_add(connector, mode);
 472         return 1;
 473 }
 474
 475 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 476 {
 477         DRM_DEBUG_KMS("Skipping forced modeset for %s\n", id->ident);
 478         return 1;
 479 }
 480
 481 /* The GPU hangs up on these systems if modeset is performed on LID open */
 482 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 483         {
 484                 .callback = intel_no_modeset_on_lid_dmi_callback,
 485                 .ident = "Toshiba Tecra A11",
 486                 .matches = {
 487                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 488                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 489                 },
 490         },
 491
 492         { }     /* terminating entry */
 493 };
 494
 495 /*
 496  * Lid events. Note the use of 'modeset_on_lid':
 497  *  - we set it on lid close, and reset it on open
 498  *  - we use it as a "only once" bit (ie we ignore
 499  *    duplicate events where it was already properly
 500  *    set/reset)
 501  *  - the suspend/resume paths will also set it to
 502  *    zero, since they restore the mode ("lid open").
 503  */
 504 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 505                             void *unused)
 506 {
 507         struct drm_i915_private *dev_priv =
 508                 container_of(nb, struct drm_i915_private, lid_notifier);
 509         struct drm_device *dev = dev_priv->dev;
 510         struct drm_connector *connector = dev_priv->int_lvds_connector;
 511
 512         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 513                 return NOTIFY_OK;
 514
 515         /*
 516          * check and update the status of LVDS connector after receiving
 517          * the LID nofication event.
 518          */
 519         if (connector)
 520                 connector->status = connector->funcs->detect(connector,
 521                                                              false);
 522
 523         /* Don't force modeset on machines where it causes a GPU lockup */
 524         if (dmi_check_system(intel_no_modeset_on_lid))
 525                 return NOTIFY_OK;
 526         if (!acpi_lid_open()) {
 527                 dev_priv->modeset_on_lid = 1;
 528                 return NOTIFY_OK;
 529         }
 530
 531         if (!dev_priv->modeset_on_lid)
 532                 return NOTIFY_OK;
 533
 534         dev_priv->modeset_on_lid = 0;
 535
 536         mutex_lock(&dev->mode_config.mutex);
 537         drm_helper_resume_force_mode(dev);
 538         mutex_unlock(&dev->mode_config.mutex);
 539
 540         return NOTIFY_OK;
 541 }
 542
 543 /**
 544  * intel_lvds_destroy - unregister and free LVDS structures
 545  * @connector: connector to free
 546  *
 547  * Unregister the DDC bus for this connector then free the driver private
 548  * structure.
 549  */
 550 static void intel_lvds_destroy(struct drm_connector *connector)
 551 {
 552         struct drm_device *dev = connector->dev;
 553         struct drm_i915_private *dev_priv = dev->dev_private;
 554
 555         if (dev_priv->lid_notifier.notifier_call)
 556                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 557         drm_sysfs_connector_remove(connector);
 558         drm_connector_cleanup(connector);
 559         kfree(connector);
 560 }
 561
 562 static int intel_lvds_set_property(struct drm_connector *connector,
 563                                    struct drm_property *property,
 564                                    uint64_t value)
 565 {
 566         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 567         struct drm_device *dev = connector->dev;
 568
 569         if (property == dev->mode_config.scaling_mode_property) {
 570                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 571
 572                 if (value == DRM_MODE_SCALE_NONE) {
 573                         DRM_DEBUG_KMS("no scaling not supported\n");
 574                         return -EINVAL;
 575                 }
 576
 577                 if (intel_lvds->fitting_mode == value) {
 578                         /* the LVDS scaling property is not changed */
 579                         return 0;
 580                 }
 581                 intel_lvds->fitting_mode = value;
 582                 if (crtc && crtc->enabled) {
 583                         /*
 584                          * If the CRTC is enabled, the display will be changed
 585                          * according to the new panel fitting mode.
 586                          */
 587                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 588                                 crtc->x, crtc->y, crtc->fb);
 589                 }
 590         }
 591
 592         return 0;
 593 }
 594
 595 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 596         .dpms = intel_lvds_dpms,
 597         .mode_fixup = intel_lvds_mode_fixup,
 598         .prepare = intel_lvds_prepare,
 599         .mode_set = intel_lvds_mode_set,
 600         .commit = intel_lvds_commit,
 601 };
 602
 603 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 604         .get_modes = intel_lvds_get_modes,
 605         .mode_valid = intel_lvds_mode_valid,
 606         .best_encoder = intel_best_encoder,
 607 };
 608
 609 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 610         .dpms = drm_helper_connector_dpms,
 611         .detect = intel_lvds_detect,
 612         .fill_modes = drm_helper_probe_single_connector_modes,
 613         .set_property = intel_lvds_set_property,
 614         .destroy = intel_lvds_destroy,
 615 };
 616
 617 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 618         .destroy = intel_encoder_destroy,
 619 };
 620
 621 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 622 {
 623         DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident);
 624         return 1;
 625 }
 626
 627 /* These systems claim to have LVDS, but really don't */
 628 static const struct dmi_system_id intel_no_lvds[] = {
 629         {
 630                 .callback = intel_no_lvds_dmi_callback,
 631                 .ident = "Apple Mac Mini (Core series)",
 632                 .matches = {
 633                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 634                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 635                 },
 636         },
 637         {
 638                 .callback = intel_no_lvds_dmi_callback,
 639                 .ident = "Apple Mac Mini (Core 2 series)",
 640                 .matches = {
 641                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 642                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 643                 },
 644         },
 645         {
 646                 .callback = intel_no_lvds_dmi_callback,
 647                 .ident = "MSI IM-945GSE-A",
 648                 .matches = {
 649                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 650                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 651                 },
 652         },
 653         {
 654                 .callback = intel_no_lvds_dmi_callback,
 655                 .ident = "Dell Studio Hybrid",
 656                 .matches = {
 657                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 658                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 659                 },
 660         },
 661         {
 662                 .callback = intel_no_lvds_dmi_callback,
 663                 .ident = "Dell OptiPlex FX170",
 664                 .matches = {
 665                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 666                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 667                 },
 668         },
 669         {
 670                 .callback = intel_no_lvds_dmi_callback,
 671                 .ident = "AOpen Mini PC",
 672                 .matches = {
 673                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 674                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 675                 },
 676         },
 677         {
 678                 .callback = intel_no_lvds_dmi_callback,
 679                 .ident = "AOpen Mini PC MP915",
 680                 .matches = {
 681                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 682                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 683                 },
 684         },
 685         {
 686                 .callback = intel_no_lvds_dmi_callback,
 687                 .ident = "AOpen i915GMm-HFS",
 688                 .matches = {
 689                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 690                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 691                 },
 692         },
 693         {
 694                 .callback = intel_no_lvds_dmi_callback,
 695                 .ident = "Aopen i945GTt-VFA",
 696                 .matches = {
 697                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 698                 },
 699         },
 700         {
 701                 .callback = intel_no_lvds_dmi_callback,
 702                 .ident = "Clientron U800",
 703                 .matches = {
 704                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 705                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 706                 },
 707         },
 708         {
 709                 .callback = intel_no_lvds_dmi_callback,
 710                 .ident = "Asus EeeBox PC EB1007",
 711                 .matches = {
 712                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 713                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 714                 },
 715         },
 716
 717         { }     /* terminating entry */
 718 };
 719
 720 /**
 721  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 722  * @dev: drm device
 723  * @connector: LVDS connector
 724  *
 725  * Find the reduced downclock for LVDS in EDID.
 726  */
 727 static void intel_find_lvds_downclock(struct drm_device *dev,
 728                                       struct drm_display_mode *fixed_mode,
 729                                       struct drm_connector *connector)
 730 {
 731         struct drm_i915_private *dev_priv = dev->dev_private;
 732         struct drm_display_mode *scan;
 733         int temp_downclock;
 734
 735         temp_downclock = fixed_mode->clock;
 736         list_for_each_entry(scan, &connector->probed_modes, head) {
 737                 /*
 738                  * If one mode has the same resolution with the fixed_panel
 739                  * mode while they have the different refresh rate, it means
 740                  * that the reduced downclock is found for the LVDS. In such
 741                  * case we can set the different FPx0/1 to dynamically select
 742                  * between low and high frequency.
 743                  */
 744                 if (scan->hdisplay == fixed_mode->hdisplay &&
 745                     scan->hsync_start == fixed_mode->hsync_start &&
 746                     scan->hsync_end == fixed_mode->hsync_end &&
 747                     scan->htotal == fixed_mode->htotal &&
 748                     scan->vdisplay == fixed_mode->vdisplay &&
 749                     scan->vsync_start == fixed_mode->vsync_start &&
 750                     scan->vsync_end == fixed_mode->vsync_end &&
 751                     scan->vtotal == fixed_mode->vtotal) {
 752                         if (scan->clock < temp_downclock) {
 753                                 /*
 754                                  * The downclock is already found. But we
 755                                  * expect to find the lower downclock.
 756                                  */
 757                                 temp_downclock = scan->clock;
 758                         }
 759                 }
 760         }
 761         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 762                 /* We found the downclock for LVDS. */
 763                 dev_priv->lvds_downclock_avail = 1;
 764                 dev_priv->lvds_downclock = temp_downclock;
 765                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 766                               "Normal clock %dKhz, downclock %dKhz\n",
 767                               fixed_mode->clock, temp_downclock);
 768         }
 769 }
 770
 771 /*
 772  * Enumerate the child dev array parsed from VBT to check whether
 773  * the LVDS is present.
 774  * If it is present, return 1.
 775  * If it is not present, return false.
 776  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 777  */
 778 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 779                                    u8 *i2c_pin)
 780 {
 781         struct drm_i915_private *dev_priv = dev->dev_private;
 782         int i;
 783
 784         if (!dev_priv->child_dev_num)
 785                 return true;
 786
 787         for (i = 0; i < dev_priv->child_dev_num; i++) {
 788                 struct child_device_config *child = dev_priv->child_dev + i;
 789
 790                 /* If the device type is not LFP, continue.
 791                  * We have to check both the new identifiers as well as the
 792                  * old for compatibility with some BIOSes.
 793                  */
 794                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 795                     child->device_type != DEVICE_TYPE_LFP)
 796                         continue;
 797
 798                 if (child->i2c_pin)
 799                     *i2c_pin = child->i2c_pin;
 800
 801                 /* However, we cannot trust the BIOS writers to populate
 802                  * the VBT correctly.  Since LVDS requires additional
 803                  * information from AIM blocks, a non-zero addin offset is
 804                  * a good indicator that the LVDS is actually present.
 805                  */
 806                 if (child->addin_offset)
 807                         return true;
 808
 809                 /* But even then some BIOS writers perform some black magic
 810                  * and instantiate the device without reference to any
 811                  * additional data.  Trust that if the VBT was written into
 812                  * the OpRegion then they have validated the LVDS's existence.
 813                  */
 814                 if (dev_priv->opregion.vbt)
 815                         return true;
 816         }
 817
 818         return false;
 819 }
 820
 821 /**
 822  * intel_lvds_init - setup LVDS connectors on this device
 823  * @dev: drm device
 824  *
 825  * Create the connector, register the LVDS DDC bus, and try to figure out what
 826  * modes we can display on the LVDS panel (if present).
 827  */
 828 bool intel_lvds_init(struct drm_device *dev)
 829 {
 830         struct drm_i915_private *dev_priv = dev->dev_private;
 831         struct intel_lvds *intel_lvds;
 832         struct intel_encoder *intel_encoder;
 833         struct intel_connector *intel_connector;
 834         struct drm_connector *connector;
 835         struct drm_encoder *encoder;
 836         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 837         struct drm_crtc *crtc;
 838         u32 lvds;
 839         int pipe;
 840         u8 pin;
 841
 842         /* Skip init on machines we know falsely report LVDS */
 843         if (dmi_check_system(intel_no_lvds))
 844                 return false;
 845
 846         pin = GMBUS_PORT_PANEL;
 847         if (!lvds_is_present_in_vbt(dev, &pin)) {
 848                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 849                 return false;
 850         }
 851
 852         if (HAS_PCH_SPLIT(dev)) {
 853                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 854                         return false;
 855                 if (dev_priv->edp.support) {
 856                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 857                         return false;
 858                 }
 859         }
 860
 861         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 862         if (!intel_lvds) {
 863                 return false;
 864         }
 865
 866         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 867         if (!intel_connector) {
 868                 kfree(intel_lvds);
 869                 return false;
 870         }
 871
 872         if (!HAS_PCH_SPLIT(dev)) {
 873                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 874         }
 875
 876         intel_encoder = &intel_lvds->base;
 877         encoder = &intel_encoder->base;
 878         connector = &intel_connector->base;
 879         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 880                            DRM_MODE_CONNECTOR_LVDS);
 881
 882         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 883                          DRM_MODE_ENCODER_LVDS);
 884
 885         intel_connector_attach_encoder(intel_connector, intel_encoder);
 886         intel_encoder->type = INTEL_OUTPUT_LVDS;
 887
 888         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 889         intel_encoder->crtc_mask = (1 << 1);
 890         if (INTEL_INFO(dev)->gen >= 5)
 891                 intel_encoder->crtc_mask |= (1 << 0);
 892         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 893         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 894         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 895         connector->interlace_allowed = false;
 896         connector->doublescan_allowed = false;
 897
 898         /* create the scaling mode property */
 899         drm_mode_create_scaling_mode_property(dev);
 900         /*
 901          * the initial panel fitting mode will be FULL_SCREEN.
 902          */
 903
 904         drm_connector_attach_property(&intel_connector->base,
 905                                       dev->mode_config.scaling_mode_property,
 906                                       DRM_MODE_SCALE_ASPECT);
 907         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
 908         /*
 909          * LVDS discovery:
 910          * 1) check for EDID on DDC
 911          * 2) check for VBT data
 912          * 3) check to see if LVDS is already on
 913          *    if none of the above, no panel
 914          * 4) make sure lid is open
 915          *    if closed, act like it's not there for now
 916          */
 917
 918         /*
 919          * Attempt to get the fixed panel mode from DDC.  Assume that the
 920          * preferred mode is the right one.
 921          */
 922         intel_lvds->edid = drm_get_edid(connector,
 923                                         &dev_priv->gmbus[pin].adapter);
 924         if (intel_lvds->edid) {
 925                 if (drm_add_edid_modes(connector,
 926                                        intel_lvds->edid)) {
 927                         drm_mode_connector_update_edid_property(connector,
 928                                                                 intel_lvds->edid);
 929                 } else {
 930                         kfree(intel_lvds->edid);
 931                         intel_lvds->edid = NULL;
 932                 }
 933         }
 934         if (!intel_lvds->edid) {
 935                 /* Didn't get an EDID, so
 936                  * Set wide sync ranges so we get all modes
 937                  * handed to valid_mode for checking
 938                  */
 939                 connector->display_info.min_vfreq = 0;
 940                 connector->display_info.max_vfreq = 200;
 941                 connector->display_info.min_hfreq = 0;
 942                 connector->display_info.max_hfreq = 200;
 943         }
 944
 945         list_for_each_entry(scan, &connector->probed_modes, head) {
 946                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
 947                         intel_lvds->fixed_mode =
 948                                 drm_mode_duplicate(dev, scan);
 949                         intel_find_lvds_downclock(dev,
 950                                                   intel_lvds->fixed_mode,
 951                                                   connector);
 952                         goto out;
 953                 }
 954         }
 955
 956         /* Failed to get EDID, what about VBT? */
 957         if (dev_priv->lfp_lvds_vbt_mode) {
 958                 intel_lvds->fixed_mode =
 959                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
 960                 if (intel_lvds->fixed_mode) {
 961                         intel_lvds->fixed_mode->type |=
 962                                 DRM_MODE_TYPE_PREFERRED;
 963                         goto out;
 964                 }
 965         }
 966
 967         /*
 968          * If we didn't get EDID, try checking if the panel is already turned
 969          * on.  If so, assume that whatever is currently programmed is the
 970          * correct mode.
 971          */
 972
 973         /* Ironlake: FIXME if still fail, not try pipe mode now */
 974         if (HAS_PCH_SPLIT(dev))
 975                 goto failed;
 976
 977         lvds = I915_READ(LVDS);
 978         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
 979         crtc = intel_get_crtc_for_pipe(dev, pipe);
 980
 981         if (crtc && (lvds & LVDS_PORT_EN)) {
 982                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
 983                 if (intel_lvds->fixed_mode) {
 984                         intel_lvds->fixed_mode->type |=
 985                                 DRM_MODE_TYPE_PREFERRED;
 986                         goto out;
 987                 }
 988         }
 989
 990         /* If we still don't have a mode after all that, give up. */
 991         if (!intel_lvds->fixed_mode)
 992                 goto failed;
 993
 994 out:
 995         if (HAS_PCH_SPLIT(dev)) {
 996                 u32 pwm;
 997
 998                 pipe = (I915_READ(PCH_LVDS) & LVDS_PIPEB_SELECT) ? 1 : 0;
 999
1000                 /* make sure PWM is enabled and locked to the LVDS pipe */
1001                 pwm = I915_READ(BLC_PWM_CPU_CTL2);
1002                 if (pipe == 0 && (pwm & PWM_PIPE_B))
1003                         I915_WRITE(BLC_PWM_CPU_CTL2, pwm & ~PWM_ENABLE);
1004                 if (pipe)
1005                         pwm |= PWM_PIPE_B;
1006                 else
1007                         pwm &= ~PWM_PIPE_B;
1008                 I915_WRITE(BLC_PWM_CPU_CTL2, pwm | PWM_ENABLE);
1009
1010                 pwm = I915_READ(BLC_PWM_PCH_CTL1);
1011                 pwm |= PWM_PCH_ENABLE;
1012                 I915_WRITE(BLC_PWM_PCH_CTL1, pwm);
1013                 /*
1014                  * Unlock registers and just
1015                  * leave them unlocked
1016                  */
1017                 I915_WRITE(PCH_PP_CONTROL,
1018                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1019         } else {
1020                 /*
1021                  * Unlock registers and just
1022                  * leave them unlocked
1023                  */
1024                 I915_WRITE(PP_CONTROL,
1025                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1026         }
1027         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1028         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1029                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1030                 dev_priv->lid_notifier.notifier_call = NULL;
1031         }
1032         /* keep the LVDS connector */
1033         dev_priv->int_lvds_connector = connector;
1034         drm_sysfs_connector_add(connector);
1035         return true;
1036
1037 failed:
1038         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1039         drm_connector_cleanup(connector);
1040         drm_encoder_cleanup(encoder);
1041         kfree(intel_lvds);
1042         kfree(intel_connector);
1043         return false;
1044 }