drivers/gpu/drm/i915/intel_lvds.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22  * DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors:
  25  *      Eric Anholt <eric@anholt.net>
  26  *      Dave Airlie <airlied@linux.ie>
  27  *      Jesse Barnes <jesse.barnes@intel.com>
  28  */
  29
  30 #include <acpi/button.h>
  31 #include <linux/dmi.h>
  32 #include <linux/i2c.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include <drm/drm_crtc.h>
  36 #include <drm/drm_edid.h>
  37 #include "intel_drv.h"
  38 #include <drm/i915_drm.h>
  39 #include "i915_drv.h"
  40 #include <linux/acpi.h>
  41
  42 /* Private structure for the integrated LVDS support */
  43 struct intel_lvds {
  44         struct intel_encoder base;
  45
  46         struct edid *edid;
  47
  48         int fitting_mode;
  49         u32 pfit_control;
  50         u32 pfit_pgm_ratios;
  51         bool pfit_dirty;
  52
  53         struct drm_display_mode *fixed_mode;
  54 };
  55
  56 static struct intel_lvds *to_intel_lvds(struct drm_encoder *encoder)
  57 {
  58         return container_of(encoder, struct intel_lvds, base.base);
  59 }
  60
  61 static struct intel_lvds *intel_attached_lvds(struct drm_connector *connector)
  62 {
  63         return container_of(intel_attached_encoder(connector),
  64                             struct intel_lvds, base);
  65 }
  66
  67 /**
  68  * Sets the power state for the panel.
  69  */
  70 static void intel_lvds_enable(struct intel_lvds *intel_lvds)
  71 {
  72         struct drm_device *dev = intel_lvds->base.base.dev;
  73         struct intel_crtc *intel_crtc = to_intel_crtc(intel_lvds->base.base.crtc);
  74         struct drm_i915_private *dev_priv = dev->dev_private;
  75         u32 ctl_reg, lvds_reg, stat_reg;
  76
  77         if (HAS_PCH_SPLIT(dev)) {
  78                 ctl_reg = PCH_PP_CONTROL;
  79                 lvds_reg = PCH_LVDS;
  80                 stat_reg = PCH_PP_STATUS;
  81         } else {
  82                 ctl_reg = PP_CONTROL;
  83                 lvds_reg = LVDS;
  84                 stat_reg = PP_STATUS;
  85         }
  86
  87         I915_WRITE(lvds_reg, I915_READ(lvds_reg) | LVDS_PORT_EN);
  88
  89         if (intel_lvds->pfit_dirty) {
  90                 /*
  91                  * Enable automatic panel scaling so that non-native modes
  92                  * fill the screen.  The panel fitter should only be
  93                  * adjusted whilst the pipe is disabled, according to
  94                  * register description and PRM.
  95                  */
  96                 DRM_DEBUG_KMS("applying panel-fitter: %x, %x\n",
  97                               intel_lvds->pfit_control,
  98                               intel_lvds->pfit_pgm_ratios);
  99
 100                 I915_WRITE(PFIT_PGM_RATIOS, intel_lvds->pfit_pgm_ratios);
 101                 I915_WRITE(PFIT_CONTROL, intel_lvds->pfit_control);
 102                 intel_lvds->pfit_dirty = false;
 103         }
 104
 105         I915_WRITE(ctl_reg, I915_READ(ctl_reg) | POWER_TARGET_ON);
 106         POSTING_READ(lvds_reg);
 107         if (wait_for((I915_READ(stat_reg) & PP_ON) != 0, 1000))
 108                 DRM_ERROR("timed out waiting for panel to power on\n");
 109
 110         intel_panel_enable_backlight(dev, intel_crtc->pipe);
 111 }
 112
 113 static void intel_lvds_disable(struct intel_lvds *intel_lvds)
 114 {
 115         struct drm_device *dev = intel_lvds->base.base.dev;
 116         struct drm_i915_private *dev_priv = dev->dev_private;
 117         u32 ctl_reg, lvds_reg, stat_reg;
 118
 119         if (HAS_PCH_SPLIT(dev)) {
 120                 ctl_reg = PCH_PP_CONTROL;
 121                 lvds_reg = PCH_LVDS;
 122                 stat_reg = PCH_PP_STATUS;
 123         } else {
 124                 ctl_reg = PP_CONTROL;
 125                 lvds_reg = LVDS;
 126                 stat_reg = PP_STATUS;
 127         }
 128
 129         intel_panel_disable_backlight(dev);
 130
 131         I915_WRITE(ctl_reg, I915_READ(ctl_reg) & ~POWER_TARGET_ON);
 132         if (wait_for((I915_READ(stat_reg) & PP_ON) == 0, 1000))
 133                 DRM_ERROR("timed out waiting for panel to power off\n");
 134
 135         if (intel_lvds->pfit_control) {
 136                 I915_WRITE(PFIT_CONTROL, 0);
 137                 intel_lvds->pfit_dirty = true;
 138         }
 139
 140         I915_WRITE(lvds_reg, I915_READ(lvds_reg) & ~LVDS_PORT_EN);
 141         POSTING_READ(lvds_reg);
 142 }
 143
 144 static void intel_lvds_dpms(struct drm_encoder *encoder, int mode)
 145 {
 146         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 147
 148         if (mode == DRM_MODE_DPMS_ON)
 149                 intel_lvds_enable(intel_lvds);
 150         else
 151                 intel_lvds_disable(intel_lvds);
 152
 153         /* XXX: We never power down the LVDS pairs. */
 154 }
 155
 156 static int intel_lvds_mode_valid(struct drm_connector *connector,
 157                                  struct drm_display_mode *mode)
 158 {
 159         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 160         struct drm_display_mode *fixed_mode = intel_lvds->fixed_mode;
 161
 162         if (mode->hdisplay > fixed_mode->hdisplay)
 163                 return MODE_PANEL;
 164         if (mode->vdisplay > fixed_mode->vdisplay)
 165                 return MODE_PANEL;
 166
 167         return MODE_OK;
 168 }
 169
 170 static void
 171 centre_horizontally(struct drm_display_mode *mode,
 172                     int width)
 173 {
 174         u32 border, sync_pos, blank_width, sync_width;
 175
 176         /* keep the hsync and hblank widths constant */
 177         sync_width = mode->crtc_hsync_end - mode->crtc_hsync_start;
 178         blank_width = mode->crtc_hblank_end - mode->crtc_hblank_start;
 179         sync_pos = (blank_width - sync_width + 1) / 2;
 180
 181         border = (mode->hdisplay - width + 1) / 2;
 182         border += border & 1; /* make the border even */
 183
 184         mode->crtc_hdisplay = width;
 185         mode->crtc_hblank_start = width + border;
 186         mode->crtc_hblank_end = mode->crtc_hblank_start + blank_width;
 187
 188         mode->crtc_hsync_start = mode->crtc_hblank_start + sync_pos;
 189         mode->crtc_hsync_end = mode->crtc_hsync_start + sync_width;
 190
 191         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 192 }
 193
 194 static void
 195 centre_vertically(struct drm_display_mode *mode,
 196                   int height)
 197 {
 198         u32 border, sync_pos, blank_width, sync_width;
 199
 200         /* keep the vsync and vblank widths constant */
 201         sync_width = mode->crtc_vsync_end - mode->crtc_vsync_start;
 202         blank_width = mode->crtc_vblank_end - mode->crtc_vblank_start;
 203         sync_pos = (blank_width - sync_width + 1) / 2;
 204
 205         border = (mode->vdisplay - height + 1) / 2;
 206
 207         mode->crtc_vdisplay = height;
 208         mode->crtc_vblank_start = height + border;
 209         mode->crtc_vblank_end = mode->crtc_vblank_start + blank_width;
 210
 211         mode->crtc_vsync_start = mode->crtc_vblank_start + sync_pos;
 212         mode->crtc_vsync_end = mode->crtc_vsync_start + sync_width;
 213
 214         mode->private_flags |= INTEL_MODE_CRTC_TIMINGS_SET;
 215 }
 216
 217 static inline u32 panel_fitter_scaling(u32 source, u32 target)
 218 {
 219         /*
 220          * Floating point operation is not supported. So the FACTOR
 221          * is defined, which can avoid the floating point computation
 222          * when calculating the panel ratio.
 223          */
 224 #define ACCURACY 12
 225 #define FACTOR (1 << ACCURACY)
 226         u32 ratio = source * FACTOR / target;
 227         return (FACTOR * ratio + FACTOR/2) / FACTOR;
 228 }
 229
 230 static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
 231                                   const struct drm_display_mode *mode,
 232                                   struct drm_display_mode *adjusted_mode)
 233 {
 234         struct drm_device *dev = encoder->dev;
 235         struct drm_i915_private *dev_priv = dev->dev_private;
 236         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
 237         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 238         struct intel_encoder *tmp_encoder;
 239         u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
 240         int pipe;
 241
 242         /* Should never happen!! */
 243         if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) {
 244                 DRM_ERROR("Can't support LVDS on pipe A\n");
 245                 return false;
 246         }
 247
 248         /* Should never happen!! */
 249         for_each_encoder_on_crtc(dev, encoder->crtc, tmp_encoder) {
 250                 if (&tmp_encoder->base != encoder) {
 251                         DRM_ERROR("Can't enable LVDS and another "
 252                                "encoder on the same pipe\n");
 253                         return false;
 254                 }
 255         }
 256
 257         /*
 258          * We have timings from the BIOS for the panel, put them in
 259          * to the adjusted mode.  The CRTC will be set up for this mode,
 260          * with the panel scaling set up to source from the H/VDisplay
 261          * of the original mode.
 262          */
 263         intel_fixed_panel_mode(intel_lvds->fixed_mode, adjusted_mode);
 264
 265         if (HAS_PCH_SPLIT(dev)) {
 266                 intel_pch_panel_fitting(dev, intel_lvds->fitting_mode,
 267                                         mode, adjusted_mode);
 268                 return true;
 269         }
 270
 271         /* Native modes don't need fitting */
 272         if (adjusted_mode->hdisplay == mode->hdisplay &&
 273             adjusted_mode->vdisplay == mode->vdisplay)
 274                 goto out;
 275
 276         /* 965+ wants fuzzy fitting */
 277         if (INTEL_INFO(dev)->gen >= 4)
 278                 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
 279                                  PFIT_FILTER_FUZZY);
 280
 281         /*
 282          * Enable automatic panel scaling for non-native modes so that they fill
 283          * the screen.  Should be enabled before the pipe is enabled, according
 284          * to register description and PRM.
 285          * Change the value here to see the borders for debugging
 286          */
 287         for_each_pipe(pipe)
 288                 I915_WRITE(BCLRPAT(pipe), 0);
 289
 290         drm_mode_set_crtcinfo(adjusted_mode, 0);
 291
 292         switch (intel_lvds->fitting_mode) {
 293         case DRM_MODE_SCALE_CENTER:
 294                 /*
 295                  * For centered modes, we have to calculate border widths &
 296                  * heights and modify the values programmed into the CRTC.
 297                  */
 298                 centre_horizontally(adjusted_mode, mode->hdisplay);
 299                 centre_vertically(adjusted_mode, mode->vdisplay);
 300                 border = LVDS_BORDER_ENABLE;
 301                 break;
 302
 303         case DRM_MODE_SCALE_ASPECT:
 304                 /* Scale but preserve the aspect ratio */
 305                 if (INTEL_INFO(dev)->gen >= 4) {
 306                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 307                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 308
 309                         /* 965+ is easy, it does everything in hw */
 310                         if (scaled_width > scaled_height)
 311                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_PILLAR;
 312                         else if (scaled_width < scaled_height)
 313                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_LETTER;
 314                         else if (adjusted_mode->hdisplay != mode->hdisplay)
 315                                 pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
 316                 } else {
 317                         u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
 318                         u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
 319                         /*
 320                          * For earlier chips we have to calculate the scaling
 321                          * ratio by hand and program it into the
 322                          * PFIT_PGM_RATIO register
 323                          */
 324                         if (scaled_width > scaled_height) { /* pillar */
 325                                 centre_horizontally(adjusted_mode, scaled_height / mode->vdisplay);
 326
 327                                 border = LVDS_BORDER_ENABLE;
 328                                 if (mode->vdisplay != adjusted_mode->vdisplay) {
 329                                         u32 bits = panel_fitter_scaling(mode->vdisplay, adjusted_mode->vdisplay);
 330                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 331                                                             bits << PFIT_VERT_SCALE_SHIFT);
 332                                         pfit_control |= (PFIT_ENABLE |
 333                                                          VERT_INTERP_BILINEAR |
 334                                                          HORIZ_INTERP_BILINEAR);
 335                                 }
 336                         } else if (scaled_width < scaled_height) { /* letter */
 337                                 centre_vertically(adjusted_mode, scaled_width / mode->hdisplay);
 338
 339                                 border = LVDS_BORDER_ENABLE;
 340                                 if (mode->hdisplay != adjusted_mode->hdisplay) {
 341                                         u32 bits = panel_fitter_scaling(mode->hdisplay, adjusted_mode->hdisplay);
 342                                         pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
 343                                                             bits << PFIT_VERT_SCALE_SHIFT);
 344                                         pfit_control |= (PFIT_ENABLE |
 345                                                          VERT_INTERP_BILINEAR |
 346                                                          HORIZ_INTERP_BILINEAR);
 347                                 }
 348                         } else
 349                                 /* Aspects match, Let hw scale both directions */
 350                                 pfit_control |= (PFIT_ENABLE |
 351                                                  VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
 352                                                  VERT_INTERP_BILINEAR |
 353                                                  HORIZ_INTERP_BILINEAR);
 354                 }
 355                 break;
 356
 357         case DRM_MODE_SCALE_FULLSCREEN:
 358                 /*
 359                  * Full scaling, even if it changes the aspect ratio.
 360                  * Fortunately this is all done for us in hw.
 361                  */
 362                 if (mode->vdisplay != adjusted_mode->vdisplay ||
 363                     mode->hdisplay != adjusted_mode->hdisplay) {
 364                         pfit_control |= PFIT_ENABLE;
 365                         if (INTEL_INFO(dev)->gen >= 4)
 366                                 pfit_control |= PFIT_SCALING_AUTO;
 367                         else
 368                                 pfit_control |= (VERT_AUTO_SCALE |
 369                                                  VERT_INTERP_BILINEAR |
 370                                                  HORIZ_AUTO_SCALE |
 371                                                  HORIZ_INTERP_BILINEAR);
 372                 }
 373                 break;
 374
 375         default:
 376                 break;
 377         }
 378
 379 out:
 380         /* If not enabling scaling, be consistent and always use 0. */
 381         if ((pfit_control & PFIT_ENABLE) == 0) {
 382                 pfit_control = 0;
 383                 pfit_pgm_ratios = 0;
 384         }
 385
 386         /* Make sure pre-965 set dither correctly */
 387         if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither)
 388                 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
 389
 390         if (pfit_control != intel_lvds->pfit_control ||
 391             pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) {
 392                 intel_lvds->pfit_control = pfit_control;
 393                 intel_lvds->pfit_pgm_ratios = pfit_pgm_ratios;
 394                 intel_lvds->pfit_dirty = true;
 395         }
 396         dev_priv->lvds_border_bits = border;
 397
 398         /*
 399          * XXX: It would be nice to support lower refresh rates on the
 400          * panels to reduce power consumption, and perhaps match the
 401          * user's requested refresh rate.
 402          */
 403
 404         return true;
 405 }
 406
 407 static void intel_lvds_prepare(struct drm_encoder *encoder)
 408 {
 409         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 410
 411         intel_lvds_disable(intel_lvds);
 412 }
 413
 414 static void intel_lvds_commit(struct drm_encoder *encoder)
 415 {
 416         struct intel_lvds *intel_lvds = to_intel_lvds(encoder);
 417
 418         /* Always do a full power on as we do not know what state
 419          * we were left in.
 420          */
 421         intel_lvds_enable(intel_lvds);
 422 }
 423
 424 static void intel_lvds_mode_set(struct drm_encoder *encoder,
 425                                 struct drm_display_mode *mode,
 426                                 struct drm_display_mode *adjusted_mode)
 427 {
 428         /*
 429          * The LVDS pin pair will already have been turned on in the
 430          * intel_crtc_mode_set since it has a large impact on the DPLL
 431          * settings.
 432          */
 433 }
 434
 435 /**
 436  * Detect the LVDS connection.
 437  *
 438  * Since LVDS doesn't have hotlug, we use the lid as a proxy.  Open means
 439  * connected and closed means disconnected.  We also send hotplug events as
 440  * needed, using lid status notification from the input layer.
 441  */
 442 static enum drm_connector_status
 443 intel_lvds_detect(struct drm_connector *connector, bool force)
 444 {
 445         struct drm_device *dev = connector->dev;
 446         enum drm_connector_status status;
 447
 448         status = intel_panel_detect(dev);
 449         if (status != connector_status_unknown)
 450                 return status;
 451
 452         return connector_status_connected;
 453 }
 454
 455 /**
 456  * Return the list of DDC modes if available, or the BIOS fixed mode otherwise.
 457  */
 458 static int intel_lvds_get_modes(struct drm_connector *connector)
 459 {
 460         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 461         struct drm_device *dev = connector->dev;
 462         struct drm_display_mode *mode;
 463
 464         if (intel_lvds->edid)
 465                 return drm_add_edid_modes(connector, intel_lvds->edid);
 466
 467         mode = drm_mode_duplicate(dev, intel_lvds->fixed_mode);
 468         if (mode == NULL)
 469                 return 0;
 470
 471         drm_mode_probed_add(connector, mode);
 472         return 1;
 473 }
 474
 475 static int intel_no_modeset_on_lid_dmi_callback(const struct dmi_system_id *id)
 476 {
 477         DRM_INFO("Skipping forced modeset for %s\n", id->ident);
 478         return 1;
 479 }
 480
 481 /* The GPU hangs up on these systems if modeset is performed on LID open */
 482 static const struct dmi_system_id intel_no_modeset_on_lid[] = {
 483         {
 484                 .callback = intel_no_modeset_on_lid_dmi_callback,
 485                 .ident = "Toshiba Tecra A11",
 486                 .matches = {
 487                         DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
 488                         DMI_MATCH(DMI_PRODUCT_NAME, "TECRA A11"),
 489                 },
 490         },
 491
 492         { }     /* terminating entry */
 493 };
 494
 495 /*
 496  * Lid events. Note the use of 'modeset_on_lid':
 497  *  - we set it on lid close, and reset it on open
 498  *  - we use it as a "only once" bit (ie we ignore
 499  *    duplicate events where it was already properly
 500  *    set/reset)
 501  *  - the suspend/resume paths will also set it to
 502  *    zero, since they restore the mode ("lid open").
 503  */
 504 static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
 505                             void *unused)
 506 {
 507         struct drm_i915_private *dev_priv =
 508                 container_of(nb, struct drm_i915_private, lid_notifier);
 509         struct drm_device *dev = dev_priv->dev;
 510         struct drm_connector *connector = dev_priv->int_lvds_connector;
 511
 512         if (dev->switch_power_state != DRM_SWITCH_POWER_ON)
 513                 return NOTIFY_OK;
 514
 515         /*
 516          * check and update the status of LVDS connector after receiving
 517          * the LID nofication event.
 518          */
 519         if (connector)
 520                 connector->status = connector->funcs->detect(connector,
 521                                                              false);
 522
 523         /* Don't force modeset on machines where it causes a GPU lockup */
 524         if (dmi_check_system(intel_no_modeset_on_lid))
 525                 return NOTIFY_OK;
 526         if (!acpi_lid_open()) {
 527                 dev_priv->modeset_on_lid = 1;
 528                 return NOTIFY_OK;
 529         }
 530
 531         if (!dev_priv->modeset_on_lid)
 532                 return NOTIFY_OK;
 533
 534         dev_priv->modeset_on_lid = 0;
 535
 536         mutex_lock(&dev->mode_config.mutex);
 537         drm_helper_resume_force_mode(dev);
 538         mutex_unlock(&dev->mode_config.mutex);
 539
 540         return NOTIFY_OK;
 541 }
 542
 543 /**
 544  * intel_lvds_destroy - unregister and free LVDS structures
 545  * @connector: connector to free
 546  *
 547  * Unregister the DDC bus for this connector then free the driver private
 548  * structure.
 549  */
 550 static void intel_lvds_destroy(struct drm_connector *connector)
 551 {
 552         struct drm_device *dev = connector->dev;
 553         struct drm_i915_private *dev_priv = dev->dev_private;
 554
 555         intel_panel_destroy_backlight(dev);
 556
 557         if (dev_priv->lid_notifier.notifier_call)
 558                 acpi_lid_notifier_unregister(&dev_priv->lid_notifier);
 559         drm_sysfs_connector_remove(connector);
 560         drm_connector_cleanup(connector);
 561         kfree(connector);
 562 }
 563
 564 static int intel_lvds_set_property(struct drm_connector *connector,
 565                                    struct drm_property *property,
 566                                    uint64_t value)
 567 {
 568         struct intel_lvds *intel_lvds = intel_attached_lvds(connector);
 569         struct drm_device *dev = connector->dev;
 570
 571         if (property == dev->mode_config.scaling_mode_property) {
 572                 struct drm_crtc *crtc = intel_lvds->base.base.crtc;
 573
 574                 if (value == DRM_MODE_SCALE_NONE) {
 575                         DRM_DEBUG_KMS("no scaling not supported\n");
 576                         return -EINVAL;
 577                 }
 578
 579                 if (intel_lvds->fitting_mode == value) {
 580                         /* the LVDS scaling property is not changed */
 581                         return 0;
 582                 }
 583                 intel_lvds->fitting_mode = value;
 584                 if (crtc && crtc->enabled) {
 585                         /*
 586                          * If the CRTC is enabled, the display will be changed
 587                          * according to the new panel fitting mode.
 588                          */
 589                         drm_crtc_helper_set_mode(crtc, &crtc->mode,
 590                                 crtc->x, crtc->y, crtc->fb);
 591                 }
 592         }
 593
 594         return 0;
 595 }
 596
 597 static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = {
 598         .dpms = intel_lvds_dpms,
 599         .mode_fixup = intel_lvds_mode_fixup,
 600         .prepare = intel_lvds_prepare,
 601         .mode_set = intel_lvds_mode_set,
 602         .commit = intel_lvds_commit,
 603 };
 604
 605 static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = {
 606         .get_modes = intel_lvds_get_modes,
 607         .mode_valid = intel_lvds_mode_valid,
 608         .best_encoder = intel_best_encoder,
 609 };
 610
 611 static const struct drm_connector_funcs intel_lvds_connector_funcs = {
 612         .dpms = drm_helper_connector_dpms,
 613         .detect = intel_lvds_detect,
 614         .fill_modes = drm_helper_probe_single_connector_modes,
 615         .set_property = intel_lvds_set_property,
 616         .destroy = intel_lvds_destroy,
 617 };
 618
 619 static const struct drm_encoder_funcs intel_lvds_enc_funcs = {
 620         .destroy = intel_encoder_destroy,
 621 };
 622
 623 static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id)
 624 {
 625         DRM_INFO("Skipping LVDS initialization for %s\n", id->ident);
 626         return 1;
 627 }
 628
 629 /* These systems claim to have LVDS, but really don't */
 630 static const struct dmi_system_id intel_no_lvds[] = {
 631         {
 632                 .callback = intel_no_lvds_dmi_callback,
 633                 .ident = "Apple Mac Mini (Core series)",
 634                 .matches = {
 635                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 636                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"),
 637                 },
 638         },
 639         {
 640                 .callback = intel_no_lvds_dmi_callback,
 641                 .ident = "Apple Mac Mini (Core 2 series)",
 642                 .matches = {
 643                         DMI_MATCH(DMI_SYS_VENDOR, "Apple"),
 644                         DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"),
 645                 },
 646         },
 647         {
 648                 .callback = intel_no_lvds_dmi_callback,
 649                 .ident = "MSI IM-945GSE-A",
 650                 .matches = {
 651                         DMI_MATCH(DMI_SYS_VENDOR, "MSI"),
 652                         DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"),
 653                 },
 654         },
 655         {
 656                 .callback = intel_no_lvds_dmi_callback,
 657                 .ident = "Dell Studio Hybrid",
 658                 .matches = {
 659                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 660                         DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"),
 661                 },
 662         },
 663         {
 664                 .callback = intel_no_lvds_dmi_callback,
 665                 .ident = "Dell OptiPlex FX170",
 666                 .matches = {
 667                         DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
 668                         DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex FX170"),
 669                 },
 670         },
 671         {
 672                 .callback = intel_no_lvds_dmi_callback,
 673                 .ident = "AOpen Mini PC",
 674                 .matches = {
 675                         DMI_MATCH(DMI_SYS_VENDOR, "AOpen"),
 676                         DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"),
 677                 },
 678         },
 679         {
 680                 .callback = intel_no_lvds_dmi_callback,
 681                 .ident = "AOpen Mini PC MP915",
 682                 .matches = {
 683                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 684                         DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"),
 685                 },
 686         },
 687         {
 688                 .callback = intel_no_lvds_dmi_callback,
 689                 .ident = "AOpen i915GMm-HFS",
 690                 .matches = {
 691                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 692                         DMI_MATCH(DMI_BOARD_NAME, "i915GMm-HFS"),
 693                 },
 694         },
 695         {
 696                 .callback = intel_no_lvds_dmi_callback,
 697                 .ident = "AOpen i45GMx-I",
 698                 .matches = {
 699                         DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
 700                         DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
 701                 },
 702         },
 703         {
 704                 .callback = intel_no_lvds_dmi_callback,
 705                 .ident = "Aopen i945GTt-VFA",
 706                 .matches = {
 707                         DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
 708                 },
 709         },
 710         {
 711                 .callback = intel_no_lvds_dmi_callback,
 712                 .ident = "Clientron U800",
 713                 .matches = {
 714                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 715                         DMI_MATCH(DMI_PRODUCT_NAME, "U800"),
 716                 },
 717         },
 718         {
 719                 .callback = intel_no_lvds_dmi_callback,
 720                 .ident = "Clientron E830",
 721                 .matches = {
 722                         DMI_MATCH(DMI_SYS_VENDOR, "Clientron"),
 723                         DMI_MATCH(DMI_PRODUCT_NAME, "E830"),
 724                 },
 725         },
 726         {
 727                 .callback = intel_no_lvds_dmi_callback,
 728                 .ident = "Asus EeeBox PC EB1007",
 729                 .matches = {
 730                         DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."),
 731                         DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"),
 732                 },
 733         },
 734         {
 735                 .callback = intel_no_lvds_dmi_callback,
 736                 .ident = "Asus AT5NM10T-I",
 737                 .matches = {
 738                         DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
 739                         DMI_MATCH(DMI_BOARD_NAME, "AT5NM10T-I"),
 740                 },
 741         },
 742         {
 743                 .callback = intel_no_lvds_dmi_callback,
 744                 .ident = "Hewlett-Packard HP t5740e Thin Client",
 745                 .matches = {
 746                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 747                         DMI_MATCH(DMI_PRODUCT_NAME, "HP t5740e Thin Client"),
 748                 },
 749         },
 750         {
 751                 .callback = intel_no_lvds_dmi_callback,
 752                 .ident = "Hewlett-Packard t5745",
 753                 .matches = {
 754                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 755                         DMI_MATCH(DMI_PRODUCT_NAME, "hp t5745"),
 756                 },
 757         },
 758         {
 759                 .callback = intel_no_lvds_dmi_callback,
 760                 .ident = "Hewlett-Packard st5747",
 761                 .matches = {
 762                         DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
 763                         DMI_MATCH(DMI_PRODUCT_NAME, "hp st5747"),
 764                 },
 765         },
 766         {
 767                 .callback = intel_no_lvds_dmi_callback,
 768                 .ident = "MSI Wind Box DC500",
 769                 .matches = {
 770                         DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
 771                         DMI_MATCH(DMI_BOARD_NAME, "MS-7469"),
 772                 },
 773         },
 774         {
 775                 .callback = intel_no_lvds_dmi_callback,
 776                 .ident = "ZOTAC ZBOXSD-ID12/ID13",
 777                 .matches = {
 778                         DMI_MATCH(DMI_BOARD_VENDOR, "ZOTAC"),
 779                         DMI_MATCH(DMI_BOARD_NAME, "ZBOXSD-ID12/ID13"),
 780                 },
 781         },
 782         {
 783                 .callback = intel_no_lvds_dmi_callback,
 784                 .ident = "Gigabyte GA-D525TUD",
 785                 .matches = {
 786                         DMI_MATCH(DMI_BOARD_VENDOR, "Gigabyte Technology Co., Ltd."),
 787                         DMI_MATCH(DMI_BOARD_NAME, "D525TUD"),
 788                 },
 789         },
 790
 791         { }     /* terminating entry */
 792 };
 793
 794 /**
 795  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
 796  * @dev: drm device
 797  * @connector: LVDS connector
 798  *
 799  * Find the reduced downclock for LVDS in EDID.
 800  */
 801 static void intel_find_lvds_downclock(struct drm_device *dev,
 802                                       struct drm_display_mode *fixed_mode,
 803                                       struct drm_connector *connector)
 804 {
 805         struct drm_i915_private *dev_priv = dev->dev_private;
 806         struct drm_display_mode *scan;
 807         int temp_downclock;
 808
 809         temp_downclock = fixed_mode->clock;
 810         list_for_each_entry(scan, &connector->probed_modes, head) {
 811                 /*
 812                  * If one mode has the same resolution with the fixed_panel
 813                  * mode while they have the different refresh rate, it means
 814                  * that the reduced downclock is found for the LVDS. In such
 815                  * case we can set the different FPx0/1 to dynamically select
 816                  * between low and high frequency.
 817                  */
 818                 if (scan->hdisplay == fixed_mode->hdisplay &&
 819                     scan->hsync_start == fixed_mode->hsync_start &&
 820                     scan->hsync_end == fixed_mode->hsync_end &&
 821                     scan->htotal == fixed_mode->htotal &&
 822                     scan->vdisplay == fixed_mode->vdisplay &&
 823                     scan->vsync_start == fixed_mode->vsync_start &&
 824                     scan->vsync_end == fixed_mode->vsync_end &&
 825                     scan->vtotal == fixed_mode->vtotal) {
 826                         if (scan->clock < temp_downclock) {
 827                                 /*
 828                                  * The downclock is already found. But we
 829                                  * expect to find the lower downclock.
 830                                  */
 831                                 temp_downclock = scan->clock;
 832                         }
 833                 }
 834         }
 835         if (temp_downclock < fixed_mode->clock && i915_lvds_downclock) {
 836                 /* We found the downclock for LVDS. */
 837                 dev_priv->lvds_downclock_avail = 1;
 838                 dev_priv->lvds_downclock = temp_downclock;
 839                 DRM_DEBUG_KMS("LVDS downclock is found in EDID. "
 840                               "Normal clock %dKhz, downclock %dKhz\n",
 841                               fixed_mode->clock, temp_downclock);
 842         }
 843 }
 844
 845 /*
 846  * Enumerate the child dev array parsed from VBT to check whether
 847  * the LVDS is present.
 848  * If it is present, return 1.
 849  * If it is not present, return false.
 850  * If no child dev is parsed from VBT, it assumes that the LVDS is present.
 851  */
 852 static bool lvds_is_present_in_vbt(struct drm_device *dev,
 853                                    u8 *i2c_pin)
 854 {
 855         struct drm_i915_private *dev_priv = dev->dev_private;
 856         int i;
 857
 858         if (!dev_priv->child_dev_num)
 859                 return true;
 860
 861         for (i = 0; i < dev_priv->child_dev_num; i++) {
 862                 struct child_device_config *child = dev_priv->child_dev + i;
 863
 864                 /* If the device type is not LFP, continue.
 865                  * We have to check both the new identifiers as well as the
 866                  * old for compatibility with some BIOSes.
 867                  */
 868                 if (child->device_type != DEVICE_TYPE_INT_LFP &&
 869                     child->device_type != DEVICE_TYPE_LFP)
 870                         continue;
 871
 872                 if (intel_gmbus_is_port_valid(child->i2c_pin))
 873                         *i2c_pin = child->i2c_pin;
 874
 875                 /* However, we cannot trust the BIOS writers to populate
 876                  * the VBT correctly.  Since LVDS requires additional
 877                  * information from AIM blocks, a non-zero addin offset is
 878                  * a good indicator that the LVDS is actually present.
 879                  */
 880                 if (child->addin_offset)
 881                         return true;
 882
 883                 /* But even then some BIOS writers perform some black magic
 884                  * and instantiate the device without reference to any
 885                  * additional data.  Trust that if the VBT was written into
 886                  * the OpRegion then they have validated the LVDS's existence.
 887                  */
 888                 if (dev_priv->opregion.vbt)
 889                         return true;
 890         }
 891
 892         return false;
 893 }
 894
 895 static bool intel_lvds_supported(struct drm_device *dev)
 896 {
 897         /* With the introduction of the PCH we gained a dedicated
 898          * LVDS presence pin, use it. */
 899         if (HAS_PCH_SPLIT(dev))
 900                 return true;
 901
 902         /* Otherwise LVDS was only attached to mobile products,
 903          * except for the inglorious 830gm */
 904         return IS_MOBILE(dev) && !IS_I830(dev);
 905 }
 906
 907 /**
 908  * intel_lvds_init - setup LVDS connectors on this device
 909  * @dev: drm device
 910  *
 911  * Create the connector, register the LVDS DDC bus, and try to figure out what
 912  * modes we can display on the LVDS panel (if present).
 913  */
 914 bool intel_lvds_init(struct drm_device *dev)
 915 {
 916         struct drm_i915_private *dev_priv = dev->dev_private;
 917         struct intel_lvds *intel_lvds;
 918         struct intel_encoder *intel_encoder;
 919         struct intel_connector *intel_connector;
 920         struct drm_connector *connector;
 921         struct drm_encoder *encoder;
 922         struct drm_display_mode *scan; /* *modes, *bios_mode; */
 923         struct drm_crtc *crtc;
 924         u32 lvds;
 925         int pipe;
 926         u8 pin;
 927
 928         if (!intel_lvds_supported(dev))
 929                 return false;
 930
 931         /* Skip init on machines we know falsely report LVDS */
 932         if (dmi_check_system(intel_no_lvds))
 933                 return false;
 934
 935         pin = GMBUS_PORT_PANEL;
 936         if (!lvds_is_present_in_vbt(dev, &pin)) {
 937                 DRM_DEBUG_KMS("LVDS is not present in VBT\n");
 938                 return false;
 939         }
 940
 941         if (HAS_PCH_SPLIT(dev)) {
 942                 if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
 943                         return false;
 944                 if (dev_priv->edp.support) {
 945                         DRM_DEBUG_KMS("disable LVDS for eDP support\n");
 946                         return false;
 947                 }
 948         }
 949
 950         intel_lvds = kzalloc(sizeof(struct intel_lvds), GFP_KERNEL);
 951         if (!intel_lvds) {
 952                 return false;
 953         }
 954
 955         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 956         if (!intel_connector) {
 957                 kfree(intel_lvds);
 958                 return false;
 959         }
 960
 961         if (!HAS_PCH_SPLIT(dev)) {
 962                 intel_lvds->pfit_control = I915_READ(PFIT_CONTROL);
 963         }
 964
 965         intel_encoder = &intel_lvds->base;
 966         encoder = &intel_encoder->base;
 967         connector = &intel_connector->base;
 968         drm_connector_init(dev, &intel_connector->base, &intel_lvds_connector_funcs,
 969                            DRM_MODE_CONNECTOR_LVDS);
 970
 971         drm_encoder_init(dev, &intel_encoder->base, &intel_lvds_enc_funcs,
 972                          DRM_MODE_ENCODER_LVDS);
 973
 974         intel_connector_attach_encoder(intel_connector, intel_encoder);
 975         intel_encoder->type = INTEL_OUTPUT_LVDS;
 976
 977         intel_encoder->clone_mask = (1 << INTEL_LVDS_CLONE_BIT);
 978         if (HAS_PCH_SPLIT(dev))
 979                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
 980         else if (IS_GEN4(dev))
 981                 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
 982         else
 983                 intel_encoder->crtc_mask = (1 << 1);
 984
 985         drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs);
 986         drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs);
 987         connector->display_info.subpixel_order = SubPixelHorizontalRGB;
 988         connector->interlace_allowed = false;
 989         connector->doublescan_allowed = false;
 990
 991         /* create the scaling mode property */
 992         drm_mode_create_scaling_mode_property(dev);
 993         /*
 994          * the initial panel fitting mode will be FULL_SCREEN.
 995          */
 996
 997         drm_connector_attach_property(&intel_connector->base,
 998                                       dev->mode_config.scaling_mode_property,
 999                                       DRM_MODE_SCALE_ASPECT);
1000         intel_lvds->fitting_mode = DRM_MODE_SCALE_ASPECT;
1001         /*
1002          * LVDS discovery:
1003          * 1) check for EDID on DDC
1004          * 2) check for VBT data
1005          * 3) check to see if LVDS is already on
1006          *    if none of the above, no panel
1007          * 4) make sure lid is open
1008          *    if closed, act like it's not there for now
1009          */
1010
1011         /*
1012          * Attempt to get the fixed panel mode from DDC.  Assume that the
1013          * preferred mode is the right one.
1014          */
1015         intel_lvds->edid = drm_get_edid(connector,
1016                                         intel_gmbus_get_adapter(dev_priv,
1017                                                                 pin));
1018         if (intel_lvds->edid) {
1019                 if (drm_add_edid_modes(connector,
1020                                        intel_lvds->edid)) {
1021                         drm_mode_connector_update_edid_property(connector,
1022                                                                 intel_lvds->edid);
1023                 } else {
1024                         kfree(intel_lvds->edid);
1025                         intel_lvds->edid = NULL;
1026                 }
1027         }
1028         if (!intel_lvds->edid) {
1029                 /* Didn't get an EDID, so
1030                  * Set wide sync ranges so we get all modes
1031                  * handed to valid_mode for checking
1032                  */
1033                 connector->display_info.min_vfreq = 0;
1034                 connector->display_info.max_vfreq = 200;
1035                 connector->display_info.min_hfreq = 0;
1036                 connector->display_info.max_hfreq = 200;
1037         }
1038
1039         list_for_each_entry(scan, &connector->probed_modes, head) {
1040                 if (scan->type & DRM_MODE_TYPE_PREFERRED) {
1041                         intel_lvds->fixed_mode =
1042                                 drm_mode_duplicate(dev, scan);
1043                         intel_find_lvds_downclock(dev,
1044                                                   intel_lvds->fixed_mode,
1045                                                   connector);
1046                         goto out;
1047                 }
1048         }
1049
1050         /* Failed to get EDID, what about VBT? */
1051         if (dev_priv->lfp_lvds_vbt_mode) {
1052                 intel_lvds->fixed_mode =
1053                         drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
1054                 if (intel_lvds->fixed_mode) {
1055                         intel_lvds->fixed_mode->type |=
1056                                 DRM_MODE_TYPE_PREFERRED;
1057                         goto out;
1058                 }
1059         }
1060
1061         /*
1062          * If we didn't get EDID, try checking if the panel is already turned
1063          * on.  If so, assume that whatever is currently programmed is the
1064          * correct mode.
1065          */
1066
1067         /* Ironlake: FIXME if still fail, not try pipe mode now */
1068         if (HAS_PCH_SPLIT(dev))
1069                 goto failed;
1070
1071         lvds = I915_READ(LVDS);
1072         pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
1073         crtc = intel_get_crtc_for_pipe(dev, pipe);
1074
1075         if (crtc && (lvds & LVDS_PORT_EN)) {
1076                 intel_lvds->fixed_mode = intel_crtc_mode_get(dev, crtc);
1077                 if (intel_lvds->fixed_mode) {
1078                         intel_lvds->fixed_mode->type |=
1079                                 DRM_MODE_TYPE_PREFERRED;
1080                         goto out;
1081                 }
1082         }
1083
1084         /* If we still don't have a mode after all that, give up. */
1085         if (!intel_lvds->fixed_mode)
1086                 goto failed;
1087
1088 out:
1089         /*
1090          * Unlock registers and just
1091          * leave them unlocked
1092          */
1093         if (HAS_PCH_SPLIT(dev)) {
1094                 I915_WRITE(PCH_PP_CONTROL,
1095                            I915_READ(PCH_PP_CONTROL) | PANEL_UNLOCK_REGS);
1096         } else {
1097                 I915_WRITE(PP_CONTROL,
1098                            I915_READ(PP_CONTROL) | PANEL_UNLOCK_REGS);
1099         }
1100         dev_priv->lid_notifier.notifier_call = intel_lid_notify;
1101         if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) {
1102                 DRM_DEBUG_KMS("lid notifier registration failed\n");
1103                 dev_priv->lid_notifier.notifier_call = NULL;
1104         }
1105         /* keep the LVDS connector */
1106         dev_priv->int_lvds_connector = connector;
1107         drm_sysfs_connector_add(connector);
1108
1109         intel_panel_setup_backlight(dev);
1110
1111         return true;
1112
1113 failed:
1114         DRM_DEBUG_KMS("No LVDS modes found, disabling.\n");
1115         drm_connector_cleanup(connector);
1116         drm_encoder_cleanup(encoder);
1117         kfree(intel_lvds);
1118         kfree(intel_connector);
1119         return false;
1120 }