drivers/gpu/drm/i915/intel_crt.c

   1 /*
   2  * Copyright © 2006-2007 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *      Eric Anholt <eric@anholt.net>
  25  */
  26
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include "drmP.h"
  30 #include "drm.h"
  31 #include "drm_crtc.h"
  32 #include "drm_crtc_helper.h"
  33 #include "drm_edid.h"
  34 #include "intel_drv.h"
  35 #include "i915_drm.h"
  36 #include "i915_drv.h"
  37
  38 /* Here's the desired hotplug mode */
  39 #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |                \
  40                            ADPA_CRT_HOTPLUG_WARMUP_10MS |               \
  41                            ADPA_CRT_HOTPLUG_SAMPLE_4S |                 \
  42                            ADPA_CRT_HOTPLUG_VOLTAGE_50 |                \
  43                            ADPA_CRT_HOTPLUG_VOLREF_325MV |              \
  44                            ADPA_CRT_HOTPLUG_ENABLE)
  45
  46 struct intel_crt {
  47         struct intel_encoder base;
  48         bool force_hotplug_required;
  49 };
  50
  51 static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
  52 {
  53         return container_of(intel_attached_encoder(connector),
  54                             struct intel_crt, base);
  55 }
  56
  57 static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  58 {
  59         struct drm_device *dev = encoder->dev;
  60         struct drm_i915_private *dev_priv = dev->dev_private;
  61         u32 temp, reg;
  62
  63         if (HAS_PCH_SPLIT(dev))
  64                 reg = PCH_ADPA;
  65         else
  66                 reg = ADPA;
  67
  68         temp = I915_READ(reg);
  69         temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  70         temp &= ~ADPA_DAC_ENABLE;
  71
  72         switch(mode) {
  73         case DRM_MODE_DPMS_ON:
  74                 temp |= ADPA_DAC_ENABLE;
  75                 break;
  76         case DRM_MODE_DPMS_STANDBY:
  77                 temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  78                 break;
  79         case DRM_MODE_DPMS_SUSPEND:
  80                 temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  81                 break;
  82         case DRM_MODE_DPMS_OFF:
  83                 temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  84                 break;
  85         }
  86
  87         I915_WRITE(reg, temp);
  88 }
  89
  90 static int intel_crt_mode_valid(struct drm_connector *connector,
  91                                 struct drm_display_mode *mode)
  92 {
  93         struct drm_device *dev = connector->dev;
  94
  95         int max_clock = 0;
  96         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  97                 return MODE_NO_DBLESCAN;
  98
  99         if (mode->clock < 25000)
 100                 return MODE_CLOCK_LOW;
 101
 102         if (IS_GEN2(dev))
 103                 max_clock = 350000;
 104         else
 105                 max_clock = 400000;
 106         if (mode->clock > max_clock)
 107                 return MODE_CLOCK_HIGH;
 108
 109         return MODE_OK;
 110 }
 111
 112 static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
 113                                  struct drm_display_mode *mode,
 114                                  struct drm_display_mode *adjusted_mode)
 115 {
 116         return true;
 117 }
 118
 119 static void intel_crt_mode_set(struct drm_encoder *encoder,
 120                                struct drm_display_mode *mode,
 121                                struct drm_display_mode *adjusted_mode)
 122 {
 123
 124         struct drm_device *dev = encoder->dev;
 125         struct drm_crtc *crtc = encoder->crtc;
 126         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 127         struct drm_i915_private *dev_priv = dev->dev_private;
 128         int dpll_md_reg;
 129         u32 adpa, dpll_md;
 130         u32 adpa_reg;
 131
 132         dpll_md_reg = DPLL_MD(intel_crtc->pipe);
 133
 134         if (HAS_PCH_SPLIT(dev))
 135                 adpa_reg = PCH_ADPA;
 136         else
 137                 adpa_reg = ADPA;
 138
 139         /*
 140          * Disable separate mode multiplier used when cloning SDVO to CRT
 141          * XXX this needs to be adjusted when we really are cloning
 142          */
 143         if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
 144                 dpll_md = I915_READ(dpll_md_reg);
 145                 I915_WRITE(dpll_md_reg,
 146                            dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
 147         }
 148
 149         adpa = ADPA_HOTPLUG_BITS;
 150         if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
 151                 adpa |= ADPA_HSYNC_ACTIVE_HIGH;
 152         if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
 153                 adpa |= ADPA_VSYNC_ACTIVE_HIGH;
 154
 155         if (intel_crtc->pipe == 0) {
 156                 if (HAS_PCH_CPT(dev))
 157                         adpa |= PORT_TRANS_A_SEL_CPT;
 158                 else
 159                         adpa |= ADPA_PIPE_A_SELECT;
 160         } else {
 161                 if (HAS_PCH_CPT(dev))
 162                         adpa |= PORT_TRANS_B_SEL_CPT;
 163                 else
 164                         adpa |= ADPA_PIPE_B_SELECT;
 165         }
 166
 167         if (!HAS_PCH_SPLIT(dev))
 168                 I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
 169
 170         I915_WRITE(adpa_reg, adpa);
 171 }
 172
 173 static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
 174 {
 175         struct drm_device *dev = connector->dev;
 176         struct intel_crt *crt = intel_attached_crt(connector);
 177         struct drm_i915_private *dev_priv = dev->dev_private;
 178         u32 adpa;
 179         bool ret;
 180
 181         /* The first time through, trigger an explicit detection cycle */
 182         if (crt->force_hotplug_required) {
 183                 bool turn_off_dac = HAS_PCH_SPLIT(dev);
 184                 u32 save_adpa;
 185
 186                 crt->force_hotplug_required = 0;
 187
 188                 save_adpa = adpa = I915_READ(PCH_ADPA);
 189                 DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
 190
 191                 adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
 192                 if (turn_off_dac)
 193                         adpa &= ~ADPA_DAC_ENABLE;
 194
 195                 I915_WRITE(PCH_ADPA, adpa);
 196
 197                 if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
 198                              1000))
 199                         DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER");
 200
 201                 if (turn_off_dac) {
 202                         I915_WRITE(PCH_ADPA, save_adpa);
 203                         POSTING_READ(PCH_ADPA);
 204                 }
 205         }
 206
 207         /* Check the status to see if both blue and green are on now */
 208         adpa = I915_READ(PCH_ADPA);
 209         if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
 210                 ret = true;
 211         else
 212                 ret = false;
 213         DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
 214
 215         return ret;
 216 }
 217
 218 /**
 219  * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
 220  *
 221  * Not for i915G/i915GM
 222  *
 223  * \return true if CRT is connected.
 224  * \return false if CRT is disconnected.
 225  */
 226 static bool intel_crt_detect_hotplug(struct drm_connector *connector)
 227 {
 228         struct drm_device *dev = connector->dev;
 229         struct drm_i915_private *dev_priv = dev->dev_private;
 230         u32 hotplug_en, orig, stat;
 231         bool ret = false;
 232         int i, tries = 0;
 233
 234         if (HAS_PCH_SPLIT(dev))
 235                 return intel_ironlake_crt_detect_hotplug(connector);
 236
 237         /*
 238          * On 4 series desktop, CRT detect sequence need to be done twice
 239          * to get a reliable result.
 240          */
 241
 242         if (IS_G4X(dev) && !IS_GM45(dev))
 243                 tries = 2;
 244         else
 245                 tries = 1;
 246         hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
 247         hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
 248
 249         for (i = 0; i < tries ; i++) {
 250                 /* turn on the FORCE_DETECT */
 251                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 252                 /* wait for FORCE_DETECT to go off */
 253                 if (wait_for((I915_READ(PORT_HOTPLUG_EN) &
 254                               CRT_HOTPLUG_FORCE_DETECT) == 0,
 255                              1000))
 256                         DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
 257         }
 258
 259         stat = I915_READ(PORT_HOTPLUG_STAT);
 260         if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
 261                 ret = true;
 262
 263         /* clear the interrupt we just generated, if any */
 264         I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
 265
 266         /* and put the bits back */
 267         I915_WRITE(PORT_HOTPLUG_EN, orig);
 268
 269         return ret;
 270 }
 271
 272 static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus)
 273 {
 274         u8 buf;
 275         struct i2c_msg msgs[] = {
 276                 {
 277                         .addr = 0xA0,
 278                         .flags = 0,
 279                         .len = 1,
 280                         .buf = &buf,
 281                 },
 282         };
 283         /* DDC monitor detect: Does it ACK a write to 0xA0? */
 284         return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1;
 285 }
 286
 287 static bool intel_crt_detect_ddc(struct drm_connector *connector)
 288 {
 289         struct intel_crt *crt = intel_attached_crt(connector);
 290         struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
 291
 292         /* CRT should always be at 0, but check anyway */
 293         if (crt->base.type != INTEL_OUTPUT_ANALOG)
 294                 return false;
 295
 296         if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) {
 297                 DRM_DEBUG_KMS("CRT detected via DDC:0xa0\n");
 298                 return true;
 299         }
 300
 301         if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
 302                 struct edid *edid;
 303                 bool is_digital = false;
 304
 305                 edid = drm_get_edid(connector,
 306                         &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 307                 /*
 308                  * This may be a DVI-I connector with a shared DDC
 309                  * link between analog and digital outputs, so we
 310                  * have to check the EDID input spec of the attached device.
 311                  */
 312                 if (edid != NULL) {
 313                         is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
 314                         connector->display_info.raw_edid = NULL;
 315                         kfree(edid);
 316                 }
 317
 318                 if (!is_digital) {
 319                         DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
 320                         return true;
 321                 }
 322         }
 323
 324         return false;
 325 }
 326
 327 static enum drm_connector_status
 328 intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt)
 329 {
 330         struct drm_encoder *encoder = &crt->base.base;
 331         struct drm_device *dev = encoder->dev;
 332         struct drm_i915_private *dev_priv = dev->dev_private;
 333         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 334         uint32_t pipe = intel_crtc->pipe;
 335         uint32_t save_bclrpat;
 336         uint32_t save_vtotal;
 337         uint32_t vtotal, vactive;
 338         uint32_t vsample;
 339         uint32_t vblank, vblank_start, vblank_end;
 340         uint32_t dsl;
 341         uint32_t bclrpat_reg;
 342         uint32_t vtotal_reg;
 343         uint32_t vblank_reg;
 344         uint32_t vsync_reg;
 345         uint32_t pipeconf_reg;
 346         uint32_t pipe_dsl_reg;
 347         uint8_t st00;
 348         enum drm_connector_status status;
 349
 350         DRM_DEBUG_KMS("starting load-detect on CRT\n");
 351
 352         bclrpat_reg = BCLRPAT(pipe);
 353         vtotal_reg = VTOTAL(pipe);
 354         vblank_reg = VBLANK(pipe);
 355         vsync_reg = VSYNC(pipe);
 356         pipeconf_reg = PIPECONF(pipe);
 357         pipe_dsl_reg = PIPEDSL(pipe);
 358
 359         save_bclrpat = I915_READ(bclrpat_reg);
 360         save_vtotal = I915_READ(vtotal_reg);
 361         vblank = I915_READ(vblank_reg);
 362
 363         vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
 364         vactive = (save_vtotal & 0x7ff) + 1;
 365
 366         vblank_start = (vblank & 0xfff) + 1;
 367         vblank_end = ((vblank >> 16) & 0xfff) + 1;
 368
 369         /* Set the border color to purple. */
 370         I915_WRITE(bclrpat_reg, 0x500050);
 371
 372         if (!IS_GEN2(dev)) {
 373                 uint32_t pipeconf = I915_READ(pipeconf_reg);
 374                 I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
 375                 POSTING_READ(pipeconf_reg);
 376                 /* Wait for next Vblank to substitue
 377                  * border color for Color info */
 378                 intel_wait_for_vblank(dev, pipe);
 379                 st00 = I915_READ8(VGA_MSR_WRITE);
 380                 status = ((st00 & (1 << 4)) != 0) ?
 381                         connector_status_connected :
 382                         connector_status_disconnected;
 383
 384                 I915_WRITE(pipeconf_reg, pipeconf);
 385         } else {
 386                 bool restore_vblank = false;
 387                 int count, detect;
 388
 389                 /*
 390                 * If there isn't any border, add some.
 391                 * Yes, this will flicker
 392                 */
 393                 if (vblank_start <= vactive && vblank_end >= vtotal) {
 394                         uint32_t vsync = I915_READ(vsync_reg);
 395                         uint32_t vsync_start = (vsync & 0xffff) + 1;
 396
 397                         vblank_start = vsync_start;
 398                         I915_WRITE(vblank_reg,
 399                                    (vblank_start - 1) |
 400                                    ((vblank_end - 1) << 16));
 401                         restore_vblank = true;
 402                 }
 403                 /* sample in the vertical border, selecting the larger one */
 404                 if (vblank_start - vactive >= vtotal - vblank_end)
 405                         vsample = (vblank_start + vactive) >> 1;
 406                 else
 407                         vsample = (vtotal + vblank_end) >> 1;
 408
 409                 /*
 410                  * Wait for the border to be displayed
 411                  */
 412                 while (I915_READ(pipe_dsl_reg) >= vactive)
 413                         ;
 414                 while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
 415                         ;
 416                 /*
 417                  * Watch ST00 for an entire scanline
 418                  */
 419                 detect = 0;
 420                 count = 0;
 421                 do {
 422                         count++;
 423                         /* Read the ST00 VGA status register */
 424                         st00 = I915_READ8(VGA_MSR_WRITE);
 425                         if (st00 & (1 << 4))
 426                                 detect++;
 427                 } while ((I915_READ(pipe_dsl_reg) == dsl));
 428
 429                 /* restore vblank if necessary */
 430                 if (restore_vblank)
 431                         I915_WRITE(vblank_reg, vblank);
 432                 /*
 433                  * If more than 3/4 of the scanline detected a monitor,
 434                  * then it is assumed to be present. This works even on i830,
 435                  * where there isn't any way to force the border color across
 436                  * the screen
 437                  */
 438                 status = detect * 4 > count * 3 ?
 439                          connector_status_connected :
 440                          connector_status_disconnected;
 441         }
 442
 443         /* Restore previous settings */
 444         I915_WRITE(bclrpat_reg, save_bclrpat);
 445
 446         return status;
 447 }
 448
 449 static enum drm_connector_status
 450 intel_crt_detect(struct drm_connector *connector, bool force)
 451 {
 452         struct drm_device *dev = connector->dev;
 453         struct intel_crt *crt = intel_attached_crt(connector);
 454         struct drm_crtc *crtc;
 455         int dpms_mode;
 456         enum drm_connector_status status;
 457
 458         if (I915_HAS_HOTPLUG(dev)) {
 459                 if (intel_crt_detect_hotplug(connector)) {
 460                         DRM_DEBUG_KMS("CRT detected via hotplug\n");
 461                         return connector_status_connected;
 462                 } else {
 463                         DRM_DEBUG_KMS("CRT not detected via hotplug\n");
 464                         return connector_status_disconnected;
 465                 }
 466         }
 467
 468         if (intel_crt_detect_ddc(connector))
 469                 return connector_status_connected;
 470
 471         if (!force)
 472                 return connector->status;
 473
 474         /* for pre-945g platforms use load detect */
 475         crtc = crt->base.base.crtc;
 476         if (crtc && crtc->enabled) {
 477                 status = intel_crt_load_detect(crtc, crt);
 478         } else {
 479                 crtc = intel_get_load_detect_pipe(&crt->base, connector,
 480                                                   NULL, &dpms_mode);
 481                 if (crtc) {
 482                         if (intel_crt_detect_ddc(connector))
 483                                 status = connector_status_connected;
 484                         else
 485                                 status = intel_crt_load_detect(crtc, crt);
 486                         intel_release_load_detect_pipe(&crt->base,
 487                                                        connector, dpms_mode);
 488                 } else
 489                         status = connector_status_unknown;
 490         }
 491
 492         return status;
 493 }
 494
 495 static void intel_crt_destroy(struct drm_connector *connector)
 496 {
 497         drm_sysfs_connector_remove(connector);
 498         drm_connector_cleanup(connector);
 499         kfree(connector);
 500 }
 501
 502 static int intel_crt_get_modes(struct drm_connector *connector)
 503 {
 504         struct drm_device *dev = connector->dev;
 505         struct drm_i915_private *dev_priv = dev->dev_private;
 506         int ret;
 507
 508         ret = intel_ddc_get_modes(connector,
 509                                  &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
 510         if (ret || !IS_G4X(dev))
 511                 return ret;
 512
 513         /* Try to probe digital port for output in DVI-I -> VGA mode. */
 514         return intel_ddc_get_modes(connector,
 515                                    &dev_priv->gmbus[GMBUS_PORT_DPB].adapter);
 516 }
 517
 518 static int intel_crt_set_property(struct drm_connector *connector,
 519                                   struct drm_property *property,
 520                                   uint64_t value)
 521 {
 522         return 0;
 523 }
 524
 525 static void intel_crt_reset(struct drm_connector *connector)
 526 {
 527         struct drm_device *dev = connector->dev;
 528         struct intel_crt *crt = intel_attached_crt(connector);
 529
 530         if (HAS_PCH_SPLIT(dev))
 531                 crt->force_hotplug_required = 1;
 532 }
 533
 534 /*
 535  * Routines for controlling stuff on the analog port
 536  */
 537
 538 static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
 539         .dpms = intel_crt_dpms,
 540         .mode_fixup = intel_crt_mode_fixup,
 541         .prepare = intel_encoder_prepare,
 542         .commit = intel_encoder_commit,
 543         .mode_set = intel_crt_mode_set,
 544 };
 545
 546 static const struct drm_connector_funcs intel_crt_connector_funcs = {
 547         .reset = intel_crt_reset,
 548         .dpms = drm_helper_connector_dpms,
 549         .detect = intel_crt_detect,
 550         .fill_modes = drm_helper_probe_single_connector_modes,
 551         .destroy = intel_crt_destroy,
 552         .set_property = intel_crt_set_property,
 553 };
 554
 555 static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
 556         .mode_valid = intel_crt_mode_valid,
 557         .get_modes = intel_crt_get_modes,
 558         .best_encoder = intel_best_encoder,
 559 };
 560
 561 static const struct drm_encoder_funcs intel_crt_enc_funcs = {
 562         .destroy = intel_encoder_destroy,
 563 };
 564
 565 void intel_crt_init(struct drm_device *dev)
 566 {
 567         struct drm_connector *connector;
 568         struct intel_crt *crt;
 569         struct intel_connector *intel_connector;
 570         struct drm_i915_private *dev_priv = dev->dev_private;
 571
 572         crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL);
 573         if (!crt)
 574                 return;
 575
 576         intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
 577         if (!intel_connector) {
 578                 kfree(crt);
 579                 return;
 580         }
 581
 582         connector = &intel_connector->base;
 583         drm_connector_init(dev, &intel_connector->base,
 584                            &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
 585
 586         drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
 587                          DRM_MODE_ENCODER_DAC);
 588
 589         intel_connector_attach_encoder(intel_connector, &crt->base);
 590
 591         crt->base.type = INTEL_OUTPUT_ANALOG;
 592         crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
 593                                 1 << INTEL_ANALOG_CLONE_BIT |
 594                                 1 << INTEL_SDVO_LVDS_CLONE_BIT);
 595         crt->base.crtc_mask = (1 << 0) | (1 << 1);
 596         connector->interlace_allowed = 1;
 597         connector->doublescan_allowed = 0;
 598
 599         drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
 600         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 601
 602         drm_sysfs_connector_add(connector);
 603
 604         if (I915_HAS_HOTPLUG(dev))
 605                 connector->polled = DRM_CONNECTOR_POLL_HPD;
 606         else
 607                 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
 608
 609         /*
 610          * Configure the automatic hotplug detection stuff
 611          */
 612         crt->force_hotplug_required = 0;
 613         if (HAS_PCH_SPLIT(dev)) {
 614                 u32 adpa;
 615
 616                 adpa = I915_READ(PCH_ADPA);
 617                 adpa &= ~ADPA_CRT_HOTPLUG_MASK;
 618                 adpa |= ADPA_HOTPLUG_BITS;
 619                 I915_WRITE(PCH_ADPA, adpa);
 620                 POSTING_READ(PCH_ADPA);
 621
 622                 DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
 623                 crt->force_hotplug_required = 1;
 624         }
 625
 626         dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 627 }