2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
27 #include <linux/dmi.h>
28 #include <drm/drm_dp_helper.h>
30 #include <drm/i915_drm.h>
32 #include "intel_bios.h"
34 #define SLAVE_ADDR1 0x70
35 #define SLAVE_ADDR2 0x72
37 static int panel_type;
40 find_section(struct bdb_header *bdb, int section_id)
44 u16 total, current_size;
47 /* skip to first section */
48 index += bdb->header_size;
49 total = bdb->bdb_size;
51 /* walk the sections looking for section_id */
52 while (index < total) {
53 current_id = *(base + index);
55 current_size = *((u16 *)(base + index));
57 if (current_id == section_id)
59 index += current_size;
66 get_blocksize(void *p)
68 u16 *block_ptr, block_size;
70 block_ptr = (u16 *)((char *)p - 2);
71 block_size = *block_ptr;
76 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
77 const struct lvds_dvo_timing *dvo_timing)
79 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
80 dvo_timing->hactive_lo;
81 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
82 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
83 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
84 dvo_timing->hsync_pulse_width;
85 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
86 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
88 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
89 dvo_timing->vactive_lo;
90 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
91 dvo_timing->vsync_off;
92 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
93 dvo_timing->vsync_pulse_width;
94 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
95 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
96 panel_fixed_mode->clock = dvo_timing->clock * 10;
97 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
99 if (dvo_timing->hsync_positive)
100 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
102 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
104 if (dvo_timing->vsync_positive)
105 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
107 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
109 /* Some VBTs have bogus h/vtotal values */
110 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
111 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
112 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
113 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
115 drm_mode_set_name(panel_fixed_mode);
119 lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
120 const struct lvds_dvo_timing *b)
122 if (a->hactive_hi != b->hactive_hi ||
123 a->hactive_lo != b->hactive_lo)
126 if (a->hsync_off_hi != b->hsync_off_hi ||
127 a->hsync_off_lo != b->hsync_off_lo)
130 if (a->hsync_pulse_width != b->hsync_pulse_width)
133 if (a->hblank_hi != b->hblank_hi ||
134 a->hblank_lo != b->hblank_lo)
137 if (a->vactive_hi != b->vactive_hi ||
138 a->vactive_lo != b->vactive_lo)
141 if (a->vsync_off != b->vsync_off)
144 if (a->vsync_pulse_width != b->vsync_pulse_width)
147 if (a->vblank_hi != b->vblank_hi ||
148 a->vblank_lo != b->vblank_lo)
154 static const struct lvds_dvo_timing *
155 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
156 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
160 * the size of fp_timing varies on the different platform.
161 * So calculate the DVO timing relative offset in LVDS data
162 * entry to get the DVO timing entry
166 lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
167 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
168 int dvo_timing_offset =
169 lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
170 lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
171 char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
173 return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
176 /* get lvds_fp_timing entry
177 * this function may return NULL if the corresponding entry is invalid
179 static const struct lvds_fp_timing *
180 get_lvds_fp_timing(const struct bdb_header *bdb,
181 const struct bdb_lvds_lfp_data *data,
182 const struct bdb_lvds_lfp_data_ptrs *ptrs,
185 size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
186 u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
189 if (index >= ARRAY_SIZE(ptrs->ptr))
191 ofs = ptrs->ptr[index].fp_timing_offset;
192 if (ofs < data_ofs ||
193 ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
195 return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
198 /* Try to find integrated panel data */
200 parse_lfp_panel_data(struct drm_i915_private *dev_priv,
201 struct bdb_header *bdb)
203 const struct bdb_lvds_options *lvds_options;
204 const struct bdb_lvds_lfp_data *lvds_lfp_data;
205 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
206 const struct lvds_dvo_timing *panel_dvo_timing;
207 const struct lvds_fp_timing *fp_timing;
208 struct drm_display_mode *panel_fixed_mode;
209 int i, downclock, drrs_mode;
211 lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
215 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
216 if (lvds_options->panel_type == 0xff)
219 panel_type = lvds_options->panel_type;
221 drrs_mode = (lvds_options->dps_panel_type_bits
222 >> (panel_type * 2)) & MODE_MASK;
224 * VBT has static DRRS = 0 and seamless DRRS = 2.
225 * The below piece of code is required to adjust vbt.drrs_type
226 * to match the enum drrs_support_type.
230 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
231 DRM_DEBUG_KMS("DRRS supported mode is static\n");
234 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
235 DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
238 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
239 DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
243 lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
247 lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
248 if (!lvds_lfp_data_ptrs)
251 dev_priv->vbt.lvds_vbt = 1;
253 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
255 lvds_options->panel_type);
257 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
258 if (!panel_fixed_mode)
261 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
263 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
265 DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
266 drm_mode_debug_printmodeline(panel_fixed_mode);
269 * Iterate over the LVDS panel timing info to find the lowest clock
270 * for the native resolution.
272 downclock = panel_dvo_timing->clock;
273 for (i = 0; i < 16; i++) {
274 const struct lvds_dvo_timing *dvo_timing;
276 dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
279 if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
280 dvo_timing->clock < downclock)
281 downclock = dvo_timing->clock;
284 if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
285 dev_priv->lvds_downclock_avail = 1;
286 dev_priv->lvds_downclock = downclock * 10;
287 DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
288 "Normal Clock %dKHz, downclock %dKHz\n",
289 panel_fixed_mode->clock, 10*downclock);
292 fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
294 lvds_options->panel_type);
296 /* check the resolution, just to be sure */
297 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
298 fp_timing->y_res == panel_fixed_mode->vdisplay) {
299 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
300 DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
301 dev_priv->vbt.bios_lvds_val);
307 parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
309 const struct bdb_lfp_backlight_data *backlight_data;
310 const struct bdb_lfp_backlight_data_entry *entry;
312 /* Err to enabling backlight if no backlight block. */
313 dev_priv->vbt.backlight.present = true;
315 backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
319 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
320 DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
321 backlight_data->entry_size);
325 entry = &backlight_data->data[panel_type];
327 dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
328 if (!dev_priv->vbt.backlight.present) {
329 DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
334 dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
335 dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
336 DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
337 "active %s, min brightness %u, level %u\n",
338 dev_priv->vbt.backlight.pwm_freq_hz,
339 dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
340 entry->min_brightness,
341 backlight_data->level[panel_type]);
344 /* Try to find sdvo panel data */
346 parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
347 struct bdb_header *bdb)
349 struct lvds_dvo_timing *dvo_timing;
350 struct drm_display_mode *panel_fixed_mode;
353 index = i915.vbt_sdvo_panel_type;
355 DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
360 struct bdb_sdvo_lvds_options *sdvo_lvds_options;
362 sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
363 if (!sdvo_lvds_options)
366 index = sdvo_lvds_options->panel_type;
369 dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
373 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
374 if (!panel_fixed_mode)
377 fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
379 dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
381 DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
382 drm_mode_debug_printmodeline(panel_fixed_mode);
385 static int intel_bios_ssc_frequency(struct drm_device *dev,
388 switch (INTEL_INFO(dev)->gen) {
390 return alternate ? 66667 : 48000;
393 return alternate ? 100000 : 96000;
395 return alternate ? 100000 : 120000;
400 parse_general_features(struct drm_i915_private *dev_priv,
401 struct bdb_header *bdb)
403 struct drm_device *dev = dev_priv->dev;
404 struct bdb_general_features *general;
406 general = find_section(bdb, BDB_GENERAL_FEATURES);
408 dev_priv->vbt.int_tv_support = general->int_tv_support;
409 dev_priv->vbt.int_crt_support = general->int_crt_support;
410 dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
411 dev_priv->vbt.lvds_ssc_freq =
412 intel_bios_ssc_frequency(dev, general->ssc_freq);
413 dev_priv->vbt.display_clock_mode = general->display_clock_mode;
414 dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
415 DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
416 dev_priv->vbt.int_tv_support,
417 dev_priv->vbt.int_crt_support,
418 dev_priv->vbt.lvds_use_ssc,
419 dev_priv->vbt.lvds_ssc_freq,
420 dev_priv->vbt.display_clock_mode,
421 dev_priv->vbt.fdi_rx_polarity_inverted);
426 parse_general_definitions(struct drm_i915_private *dev_priv,
427 struct bdb_header *bdb)
429 struct bdb_general_definitions *general;
431 general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
433 u16 block_size = get_blocksize(general);
434 if (block_size >= sizeof(*general)) {
435 int bus_pin = general->crt_ddc_gmbus_pin;
436 DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
437 if (intel_gmbus_is_port_valid(bus_pin))
438 dev_priv->vbt.crt_ddc_pin = bus_pin;
440 DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
447 parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
448 struct bdb_header *bdb)
450 struct sdvo_device_mapping *p_mapping;
451 struct bdb_general_definitions *p_defs;
452 union child_device_config *p_child;
453 int i, child_device_num, count;
456 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
458 DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
461 /* judge whether the size of child device meets the requirements.
462 * If the child device size obtained from general definition block
463 * is different with sizeof(struct child_device_config), skip the
464 * parsing of sdvo device info
466 if (p_defs->child_dev_size != sizeof(*p_child)) {
467 /* different child dev size . Ignore it */
468 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
471 /* get the block size of general definitions */
472 block_size = get_blocksize(p_defs);
473 /* get the number of child device */
474 child_device_num = (block_size - sizeof(*p_defs)) /
477 for (i = 0; i < child_device_num; i++) {
478 p_child = &(p_defs->devices[i]);
479 if (!p_child->old.device_type) {
480 /* skip the device block if device type is invalid */
483 if (p_child->old.slave_addr != SLAVE_ADDR1 &&
484 p_child->old.slave_addr != SLAVE_ADDR2) {
486 * If the slave address is neither 0x70 nor 0x72,
487 * it is not a SDVO device. Skip it.
491 if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
492 p_child->old.dvo_port != DEVICE_PORT_DVOC) {
493 /* skip the incorrect SDVO port */
494 DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
497 DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
499 p_child->old.slave_addr,
500 (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
502 p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
503 if (!p_mapping->initialized) {
504 p_mapping->dvo_port = p_child->old.dvo_port;
505 p_mapping->slave_addr = p_child->old.slave_addr;
506 p_mapping->dvo_wiring = p_child->old.dvo_wiring;
507 p_mapping->ddc_pin = p_child->old.ddc_pin;
508 p_mapping->i2c_pin = p_child->old.i2c_pin;
509 p_mapping->initialized = 1;
510 DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
512 p_mapping->slave_addr,
513 p_mapping->dvo_wiring,
517 DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
518 "two SDVO device.\n");
520 if (p_child->old.slave2_addr) {
521 /* Maybe this is a SDVO device with multiple inputs */
522 /* And the mapping info is not added */
523 DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
524 " is a SDVO device with multiple inputs.\n");
530 /* No SDVO device info is found */
531 DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
537 parse_driver_features(struct drm_i915_private *dev_priv,
538 struct bdb_header *bdb)
540 struct bdb_driver_features *driver;
542 driver = find_section(bdb, BDB_DRIVER_FEATURES);
546 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
547 dev_priv->vbt.edp_support = 1;
549 if (driver->dual_frequency)
550 dev_priv->render_reclock_avail = true;
552 DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
554 * If DRRS is not supported, drrs_type has to be set to 0.
555 * This is because, VBT is configured in such a way that
556 * static DRRS is 0 and DRRS not supported is represented by
557 * driver->drrs_enabled=false
559 if (!driver->drrs_enabled)
560 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
564 parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
567 struct edp_power_seq *edp_pps;
568 struct edp_link_params *edp_link_params;
570 edp = find_section(bdb, BDB_EDP);
572 if (dev_priv->vbt.edp_support)
573 DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
577 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
579 dev_priv->vbt.edp_bpp = 18;
582 dev_priv->vbt.edp_bpp = 24;
585 dev_priv->vbt.edp_bpp = 30;
589 /* Get the eDP sequencing and link info */
590 edp_pps = &edp->power_seqs[panel_type];
591 edp_link_params = &edp->link_params[panel_type];
593 dev_priv->vbt.edp_pps = *edp_pps;
595 dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
597 switch (edp_link_params->lanes) {
599 dev_priv->vbt.edp_lanes = 1;
602 dev_priv->vbt.edp_lanes = 2;
606 dev_priv->vbt.edp_lanes = 4;
609 switch (edp_link_params->preemphasis) {
611 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
614 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
617 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
620 dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
623 switch (edp_link_params->vswing) {
625 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
628 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
631 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
634 dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
639 static u8 *goto_next_sequence(u8 *data, int *size)
647 /* goto first element */
651 case MIPI_SEQ_ELEM_SEND_PKT:
653 * skip by this element payload size
654 * skip elem id, command flag and data type
661 len = *((u16 *)data);
668 data = data + 2 + len;
670 case MIPI_SEQ_ELEM_DELAY:
671 /* skip by elem id, and delay is 4 bytes */
678 case MIPI_SEQ_ELEM_GPIO:
686 DRM_ERROR("Unknown element\n");
690 /* end of sequence ? */
695 /* goto next sequence or end of block byte */
701 /* update amount of data left for the sequence block to be parsed */
707 parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
709 struct bdb_mipi_config *start;
710 struct bdb_mipi_sequence *sequence;
711 struct mipi_config *config;
712 struct mipi_pps_data *pps;
714 int i, panel_id, seq_size;
717 /* Initialize this to undefined indicating no generic MIPI support */
718 dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
720 /* Block #40 is already parsed and panel_fixed_mode is
721 * stored in dev_priv->lfp_lvds_vbt_mode
722 * resuse this when needed
725 /* Parse #52 for panel index used from panel_type already
728 start = find_section(bdb, BDB_MIPI_CONFIG);
730 DRM_DEBUG_KMS("No MIPI config BDB found");
734 DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
738 * get hold of the correct configuration block and pps data as per
739 * the panel_type as index
741 config = &start->config[panel_type];
742 pps = &start->pps[panel_type];
744 /* store as of now full data. Trim when we realise all is not needed */
745 dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
746 if (!dev_priv->vbt.dsi.config)
749 dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
750 if (!dev_priv->vbt.dsi.pps) {
751 kfree(dev_priv->vbt.dsi.config);
755 /* We have mandatory mipi config blocks. Initialize as generic panel */
756 dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
758 /* Check if we have sequence block as well */
759 sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
761 DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
765 DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
767 block_size = get_blocksize(sequence);
770 * parse the sequence block for individual sequences
772 dev_priv->vbt.dsi.seq_version = sequence->version;
774 seq_data = &sequence->data[0];
777 * sequence block is variable length and hence we need to parse and
778 * get the sequence data for specific panel id
780 for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
781 panel_id = *seq_data;
782 seq_size = *((u16 *) (seq_data + 1));
783 if (panel_id == panel_type)
786 /* skip the sequence including seq header of 3 bytes */
787 seq_data = seq_data + 3 + seq_size;
788 if ((seq_data - &sequence->data[0]) > block_size) {
789 DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
794 if (i == MAX_MIPI_CONFIGURATIONS) {
795 DRM_ERROR("Sequence block detected but no valid configuration\n");
799 /* check if found sequence is completely within the sequence block
800 * just being paranoid */
801 if (seq_size > block_size) {
802 DRM_ERROR("Corrupted sequence/size, bailing out\n");
806 /* skip the panel id(1 byte) and seq size(2 bytes) */
807 dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
808 if (!dev_priv->vbt.dsi.data)
812 * loop into the sequence data and split into multiple sequneces
813 * There are only 5 types of sequences as of now
815 data = dev_priv->vbt.dsi.data;
816 dev_priv->vbt.dsi.size = seq_size;
818 /* two consecutive 0x00 indicate end of all sequences */
821 if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
822 dev_priv->vbt.dsi.sequence[seq_id] = data;
823 DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
825 DRM_ERROR("undefined sequence\n");
829 /* partial parsing to skip elements */
830 data = goto_next_sequence(data, &seq_size);
833 DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
838 break; /* end of sequence reached */
841 DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
844 kfree(dev_priv->vbt.dsi.data);
845 dev_priv->vbt.dsi.data = NULL;
847 /* error during parsing so set all pointers to null
848 * because of partial parsing */
849 memset(dev_priv->vbt.dsi.sequence, 0, MIPI_SEQ_MAX);
852 static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
853 struct bdb_header *bdb)
855 union child_device_config *it, *child = NULL;
856 struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
857 uint8_t hdmi_level_shift;
859 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
861 /* Each DDI port can have more than one value on the "DVO Port" field,
862 * so look for all the possible values for each port and abort if more
863 * than one is found. */
864 int dvo_ports[][2] = {
865 {DVO_PORT_HDMIA, DVO_PORT_DPA},
866 {DVO_PORT_HDMIB, DVO_PORT_DPB},
867 {DVO_PORT_HDMIC, DVO_PORT_DPC},
868 {DVO_PORT_HDMID, DVO_PORT_DPD},
869 {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
872 /* Find the child device to use, abort if more than one found. */
873 for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
874 it = dev_priv->vbt.child_dev + i;
876 for (j = 0; j < 2; j++) {
877 if (dvo_ports[port][j] == -1)
880 if (it->common.dvo_port == dvo_ports[port][j]) {
882 DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
893 aux_channel = child->raw[25];
895 is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
896 is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
897 is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
898 is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
899 is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
901 info->supports_dvi = is_dvi;
902 info->supports_hdmi = is_hdmi;
903 info->supports_dp = is_dp;
905 DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
906 port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
908 if (is_edp && is_dvi)
909 DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
911 if (is_crt && port != PORT_E)
912 DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
913 if (is_crt && (is_dvi || is_dp))
914 DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
916 if (is_dvi && (port == PORT_A || port == PORT_E))
917 DRM_DEBUG_KMS("Port %c is TMDS compabile\n", port_name(port));
918 if (!is_dvi && !is_dp && !is_crt)
919 DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
921 if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
922 DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
925 if (child->common.ddc_pin == 0x05 && port != PORT_B)
926 DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
927 if (child->common.ddc_pin == 0x04 && port != PORT_C)
928 DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
929 if (child->common.ddc_pin == 0x06 && port != PORT_D)
930 DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
934 if (aux_channel == 0x40 && port != PORT_A)
935 DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
936 if (aux_channel == 0x10 && port != PORT_B)
937 DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
938 if (aux_channel == 0x20 && port != PORT_C)
939 DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
940 if (aux_channel == 0x30 && port != PORT_D)
941 DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
944 if (bdb->version >= 158) {
945 /* The VBT HDMI level shift values match the table we have. */
946 hdmi_level_shift = child->raw[7] & 0xF;
947 if (hdmi_level_shift < 0xC) {
948 DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
951 info->hdmi_level_shift = hdmi_level_shift;
956 static void parse_ddi_ports(struct drm_i915_private *dev_priv,
957 struct bdb_header *bdb)
959 struct drm_device *dev = dev_priv->dev;
965 if (!dev_priv->vbt.child_dev_num)
968 if (bdb->version < 155)
971 for (port = PORT_A; port < I915_MAX_PORTS; port++)
972 parse_ddi_port(dev_priv, port, bdb);
976 parse_device_mapping(struct drm_i915_private *dev_priv,
977 struct bdb_header *bdb)
979 struct bdb_general_definitions *p_defs;
980 union child_device_config *p_child, *child_dev_ptr;
981 int i, child_device_num, count;
984 p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
986 DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
989 /* judge whether the size of child device meets the requirements.
990 * If the child device size obtained from general definition block
991 * is different with sizeof(struct child_device_config), skip the
992 * parsing of sdvo device info
994 if (p_defs->child_dev_size != sizeof(*p_child)) {
995 /* different child dev size . Ignore it */
996 DRM_DEBUG_KMS("different child size is found. Invalid.\n");
999 /* get the block size of general definitions */
1000 block_size = get_blocksize(p_defs);
1001 /* get the number of child device */
1002 child_device_num = (block_size - sizeof(*p_defs)) /
1005 /* get the number of child device that is present */
1006 for (i = 0; i < child_device_num; i++) {
1007 p_child = &(p_defs->devices[i]);
1008 if (!p_child->common.device_type) {
1009 /* skip the device block if device type is invalid */
1015 DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
1018 dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
1019 if (!dev_priv->vbt.child_dev) {
1020 DRM_DEBUG_KMS("No memory space for child device\n");
1024 dev_priv->vbt.child_dev_num = count;
1026 for (i = 0; i < child_device_num; i++) {
1027 p_child = &(p_defs->devices[i]);
1028 if (!p_child->common.device_type) {
1029 /* skip the device block if device type is invalid */
1032 child_dev_ptr = dev_priv->vbt.child_dev + count;
1034 memcpy((void *)child_dev_ptr, (void *)p_child,
1041 init_vbt_defaults(struct drm_i915_private *dev_priv)
1043 struct drm_device *dev = dev_priv->dev;
1046 dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
1048 /* LFP panel data */
1049 dev_priv->vbt.lvds_dither = 1;
1050 dev_priv->vbt.lvds_vbt = 0;
1052 /* SDVO panel data */
1053 dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
1055 /* general features */
1056 dev_priv->vbt.int_tv_support = 1;
1057 dev_priv->vbt.int_crt_support = 1;
1059 /* Default to using SSC */
1060 dev_priv->vbt.lvds_use_ssc = 1;
1062 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
1065 dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
1066 !HAS_PCH_SPLIT(dev));
1067 DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
1069 for (port = PORT_A; port < I915_MAX_PORTS; port++) {
1070 struct ddi_vbt_port_info *info =
1071 &dev_priv->vbt.ddi_port_info[port];
1073 /* Recommended BSpec default: 800mV 0dB. */
1074 info->hdmi_level_shift = 6;
1076 info->supports_dvi = (port != PORT_A && port != PORT_E);
1077 info->supports_hdmi = info->supports_dvi;
1078 info->supports_dp = (port != PORT_E);
1082 static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
1084 DRM_DEBUG_KMS("Falling back to manually reading VBT from "
1085 "VBIOS ROM for %s\n",
1090 static const struct dmi_system_id intel_no_opregion_vbt[] = {
1092 .callback = intel_no_opregion_vbt_callback,
1093 .ident = "ThinkCentre A57",
1095 DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
1096 DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
1103 * intel_parse_bios - find VBT and initialize settings from the BIOS
1106 * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
1107 * to appropriate values.
1109 * Returns 0 on success, nonzero on failure.
1112 intel_parse_bios(struct drm_device *dev)
1114 struct drm_i915_private *dev_priv = dev->dev_private;
1115 struct pci_dev *pdev = dev->pdev;
1116 struct bdb_header *bdb = NULL;
1117 u8 __iomem *bios = NULL;
1119 if (HAS_PCH_NOP(dev))
1122 init_vbt_defaults(dev_priv);
1124 /* XXX Should this validation be moved to intel_opregion.c? */
1125 if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt) {
1126 struct vbt_header *vbt = dev_priv->opregion.vbt;
1127 if (memcmp(vbt->signature, "$VBT", 4) == 0) {
1128 DRM_DEBUG_KMS("Using VBT from OpRegion: %20s\n",
1130 bdb = (struct bdb_header *)((char *)vbt + vbt->bdb_offset);
1132 dev_priv->opregion.vbt = NULL;
1136 struct vbt_header *vbt = NULL;
1140 bios = pci_map_rom(pdev, &size);
1144 /* Scour memory looking for the VBT signature */
1145 for (i = 0; i + 4 < size; i++) {
1146 if (!memcmp(bios + i, "$VBT", 4)) {
1147 vbt = (struct vbt_header *)(bios + i);
1153 DRM_DEBUG_DRIVER("VBT signature missing\n");
1154 pci_unmap_rom(pdev, bios);
1158 bdb = (struct bdb_header *)(bios + i + vbt->bdb_offset);
1161 /* Grab useful general definitions */
1162 parse_general_features(dev_priv, bdb);
1163 parse_general_definitions(dev_priv, bdb);
1164 parse_lfp_panel_data(dev_priv, bdb);
1165 parse_lfp_backlight(dev_priv, bdb);
1166 parse_sdvo_panel_data(dev_priv, bdb);
1167 parse_sdvo_device_mapping(dev_priv, bdb);
1168 parse_device_mapping(dev_priv, bdb);
1169 parse_driver_features(dev_priv, bdb);
1170 parse_edp(dev_priv, bdb);
1171 parse_mipi(dev_priv, bdb);
1172 parse_ddi_ports(dev_priv, bdb);
1175 pci_unmap_rom(pdev, bios);
1180 /* Ensure that vital registers have been initialised, even if the BIOS
1181 * is absent or just failing to do its job.
1183 void intel_setup_bios(struct drm_device *dev)
1185 struct drm_i915_private *dev_priv = dev->dev_private;
1187 /* Set the Panel Power On/Off timings if uninitialized. */
1188 if (!HAS_PCH_SPLIT(dev) &&
1189 I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
1190 /* Set T2 to 40ms and T5 to 200ms */
1191 I915_WRITE(PP_ON_DELAYS, 0x019007d0);
1193 /* Set T3 to 35ms and Tx to 200ms */
1194 I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);