2 * Copyright © 2016 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 #include <linux/sched/mm.h>
26 #include <linux/dma-fence-array.h>
27 #include <drm/drm_gem.h>
29 #include "display/intel_display.h"
30 #include "display/intel_frontbuffer.h"
31 #include "gem/i915_gem_lmem.h"
32 #include "gem/i915_gem_tiling.h"
33 #include "gt/intel_engine.h"
34 #include "gt/intel_engine_heartbeat.h"
35 #include "gt/intel_gt.h"
36 #include "gt/intel_gt_requests.h"
39 #include "i915_gem_evict.h"
40 #include "i915_sw_fence_work.h"
41 #include "i915_trace.h"
43 #include "i915_vma_resource.h"
45 static inline void assert_vma_held_evict(const struct i915_vma *vma)
48 * We may be forced to unbind when the vm is dead, to clean it up.
49 * This is the only exception to the requirement of the object lock
52 if (kref_read(&vma->vm->ref))
53 assert_object_held_shared(vma->obj);
56 static struct kmem_cache *slab_vmas;
58 static struct i915_vma *i915_vma_alloc(void)
60 return kmem_cache_zalloc(slab_vmas, GFP_KERNEL);
63 static void i915_vma_free(struct i915_vma *vma)
65 return kmem_cache_free(slab_vmas, vma);
68 #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM)
70 #include <linux/stackdepot.h>
72 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
76 if (!vma->node.stack) {
77 drm_dbg(&to_i915(vma->obj->base.dev)->drm,
78 "vma.node [%08llx + %08llx] %s: unknown owner\n",
79 vma->node.start, vma->node.size, reason);
83 stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
84 drm_dbg(&to_i915(vma->obj->base.dev)->drm,
85 "vma.node [%08llx + %08llx] %s: inserted at %s\n",
86 vma->node.start, vma->node.size, reason, buf);
91 static void vma_print_allocator(struct i915_vma *vma, const char *reason)
97 static inline struct i915_vma *active_to_vma(struct i915_active *ref)
99 return container_of(ref, typeof(struct i915_vma), active);
102 static int __i915_vma_active(struct i915_active *ref)
104 return i915_vma_tryget(active_to_vma(ref)) ? 0 : -ENOENT;
107 static void __i915_vma_retire(struct i915_active *ref)
109 i915_vma_put(active_to_vma(ref));
112 static struct i915_vma *
113 vma_create(struct drm_i915_gem_object *obj,
114 struct i915_address_space *vm,
115 const struct i915_gtt_view *view)
117 struct i915_vma *pos = ERR_PTR(-E2BIG);
118 struct i915_vma *vma;
119 struct rb_node *rb, **p;
122 /* The aliasing_ppgtt should never be used directly! */
123 GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm);
125 vma = i915_vma_alloc();
127 return ERR_PTR(-ENOMEM);
129 vma->ops = &vm->vma_ops;
131 vma->size = obj->base.size;
132 vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
134 i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire, 0);
136 /* Declare ourselves safe for use inside shrinkers */
137 if (IS_ENABLED(CONFIG_LOCKDEP)) {
138 fs_reclaim_acquire(GFP_KERNEL);
139 might_lock(&vma->active.mutex);
140 fs_reclaim_release(GFP_KERNEL);
143 INIT_LIST_HEAD(&vma->closed_link);
144 INIT_LIST_HEAD(&vma->obj_link);
145 RB_CLEAR_NODE(&vma->obj_node);
147 if (view && view->type != I915_GTT_VIEW_NORMAL) {
148 vma->gtt_view = *view;
149 if (view->type == I915_GTT_VIEW_PARTIAL) {
150 GEM_BUG_ON(range_overflows_t(u64,
151 view->partial.offset,
153 obj->base.size >> PAGE_SHIFT));
154 vma->size = view->partial.size;
155 vma->size <<= PAGE_SHIFT;
156 GEM_BUG_ON(vma->size > obj->base.size);
157 } else if (view->type == I915_GTT_VIEW_ROTATED) {
158 vma->size = intel_rotation_info_size(&view->rotated);
159 vma->size <<= PAGE_SHIFT;
160 } else if (view->type == I915_GTT_VIEW_REMAPPED) {
161 vma->size = intel_remapped_info_size(&view->remapped);
162 vma->size <<= PAGE_SHIFT;
166 if (unlikely(vma->size > vm->total))
169 GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
171 err = mutex_lock_interruptible(&vm->mutex);
178 list_add_tail(&vma->vm_link, &vm->unbound_list);
180 spin_lock(&obj->vma.lock);
181 if (i915_is_ggtt(vm)) {
182 if (unlikely(overflows_type(vma->size, u32)))
185 vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
186 i915_gem_object_get_tiling(obj),
187 i915_gem_object_get_stride(obj));
188 if (unlikely(vma->fence_size < vma->size || /* overflow */
189 vma->fence_size > vm->total))
192 GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
194 vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size,
195 i915_gem_object_get_tiling(obj),
196 i915_gem_object_get_stride(obj));
197 GEM_BUG_ON(!is_power_of_2(vma->fence_alignment));
199 __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
203 p = &obj->vma.tree.rb_node;
208 pos = rb_entry(rb, struct i915_vma, obj_node);
211 * If the view already exists in the tree, another thread
212 * already created a matching vma, so return the older instance
213 * and dispose of ours.
215 cmp = i915_vma_compare(pos, vm, view);
223 rb_link_node(&vma->obj_node, rb, p);
224 rb_insert_color(&vma->obj_node, &obj->vma.tree);
226 if (i915_vma_is_ggtt(vma))
228 * We put the GGTT vma at the start of the vma-list, followed
229 * by the ppGGTT vma. This allows us to break early when
230 * iterating over only the GGTT vma for an object, see
231 * for_each_ggtt_vma()
233 list_add(&vma->obj_link, &obj->vma.list);
235 list_add_tail(&vma->obj_link, &obj->vma.list);
237 spin_unlock(&obj->vma.lock);
238 mutex_unlock(&vm->mutex);
243 spin_unlock(&obj->vma.lock);
244 list_del_init(&vma->vm_link);
245 mutex_unlock(&vm->mutex);
251 static struct i915_vma *
252 i915_vma_lookup(struct drm_i915_gem_object *obj,
253 struct i915_address_space *vm,
254 const struct i915_gtt_view *view)
258 rb = obj->vma.tree.rb_node;
260 struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node);
263 cmp = i915_vma_compare(vma, vm, view);
277 * i915_vma_instance - return the singleton instance of the VMA
278 * @obj: parent &struct drm_i915_gem_object to be mapped
279 * @vm: address space in which the mapping is located
280 * @view: additional mapping requirements
282 * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with
283 * the same @view characteristics. If a match is not found, one is created.
284 * Once created, the VMA is kept until either the object is freed, or the
285 * address space is closed.
287 * Returns the vma, or an error pointer.
290 i915_vma_instance(struct drm_i915_gem_object *obj,
291 struct i915_address_space *vm,
292 const struct i915_gtt_view *view)
294 struct i915_vma *vma;
296 GEM_BUG_ON(view && !i915_is_ggtt_or_dpt(vm));
297 GEM_BUG_ON(!kref_read(&vm->ref));
299 spin_lock(&obj->vma.lock);
300 vma = i915_vma_lookup(obj, vm, view);
301 spin_unlock(&obj->vma.lock);
303 /* vma_create() will resolve the race if another creates the vma */
305 vma = vma_create(obj, vm, view);
307 GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view));
311 struct i915_vma_work {
312 struct dma_fence_work base;
313 struct i915_address_space *vm;
314 struct i915_vm_pt_stash stash;
315 struct i915_vma_resource *vma_res;
316 struct drm_i915_gem_object *obj;
317 struct i915_sw_dma_fence_cb cb;
318 unsigned int pat_index;
322 static void __vma_bind(struct dma_fence_work *work)
324 struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
325 struct i915_vma_resource *vma_res = vw->vma_res;
328 * We are about the bind the object, which must mean we have already
329 * signaled the work to potentially clear/move the pages underneath. If
330 * something went wrong at that stage then the object should have
331 * unknown_state set, in which case we need to skip the bind.
333 if (i915_gem_object_has_unknown_state(vw->obj))
336 vma_res->ops->bind_vma(vma_res->vm, &vw->stash,
337 vma_res, vw->pat_index, vw->flags);
340 static void __vma_release(struct dma_fence_work *work)
342 struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
345 i915_gem_object_put(vw->obj);
347 i915_vm_free_pt_stash(vw->vm, &vw->stash);
349 i915_vma_resource_put(vw->vma_res);
352 static const struct dma_fence_work_ops bind_ops = {
355 .release = __vma_release,
358 struct i915_vma_work *i915_vma_work(void)
360 struct i915_vma_work *vw;
362 vw = kzalloc(sizeof(*vw), GFP_KERNEL);
366 dma_fence_work_init(&vw->base, &bind_ops);
367 vw->base.dma.error = -EAGAIN; /* disable the worker by default */
372 int i915_vma_wait_for_bind(struct i915_vma *vma)
376 if (rcu_access_pointer(vma->active.excl.fence)) {
377 struct dma_fence *fence;
380 fence = dma_fence_get_rcu_safe(&vma->active.excl.fence);
383 err = dma_fence_wait(fence, true);
384 dma_fence_put(fence);
391 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
392 static int i915_vma_verify_bind_complete(struct i915_vma *vma)
394 struct dma_fence *fence = i915_active_fence_get(&vma->active.excl);
400 if (dma_fence_is_signaled(fence))
405 dma_fence_put(fence);
410 #define i915_vma_verify_bind_complete(_vma) 0
413 I915_SELFTEST_EXPORT void
414 i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res,
415 struct i915_vma *vma)
417 struct drm_i915_gem_object *obj = vma->obj;
419 i915_vma_resource_init(vma_res, vma->vm, vma->pages, &vma->page_sizes,
420 obj->mm.rsgt, i915_gem_object_is_readonly(obj),
421 i915_gem_object_is_lmem(obj), obj->mm.region,
422 vma->ops, vma->private, __i915_vma_offset(vma),
423 __i915_vma_size(vma), vma->size, vma->guard);
427 * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space.
429 * @pat_index: PAT index to set in PTE
430 * @flags: flags like global or local mapping
431 * @work: preallocated worker for allocating and binding the PTE
432 * @vma_res: pointer to a preallocated vma resource. The resource is either
435 * DMA addresses are taken from the scatter-gather table of this object (or of
436 * this VMA in case of non-default GGTT views) and PTE entries set up.
437 * Note that DMA addresses are also the only part of the SG table we care about.
439 int i915_vma_bind(struct i915_vma *vma,
440 unsigned int pat_index,
442 struct i915_vma_work *work,
443 struct i915_vma_resource *vma_res)
449 lockdep_assert_held(&vma->vm->mutex);
450 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
451 GEM_BUG_ON(vma->size > i915_vma_size(vma));
453 if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
456 i915_vma_resource_free(vma_res);
460 if (GEM_DEBUG_WARN_ON(!flags)) {
461 i915_vma_resource_free(vma_res);
466 bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
468 vma_flags = atomic_read(&vma->flags);
469 vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
471 bind_flags &= ~vma_flags;
472 if (bind_flags == 0) {
473 i915_vma_resource_free(vma_res);
477 GEM_BUG_ON(!atomic_read(&vma->pages_count));
479 /* Wait for or await async unbinds touching our range */
480 if (work && bind_flags & vma->vm->bind_async_flags)
481 ret = i915_vma_resource_bind_dep_await(vma->vm,
487 __GFP_RETRY_MAYFAIL |
490 ret = i915_vma_resource_bind_dep_sync(vma->vm, vma->node.start,
491 vma->node.size, true);
493 i915_vma_resource_free(vma_res);
497 if (vma->resource || !vma_res) {
498 /* Rebinding with an additional I915_VMA_*_BIND */
499 GEM_WARN_ON(!vma_flags);
500 i915_vma_resource_free(vma_res);
502 i915_vma_resource_init_from_vma(vma_res, vma);
503 vma->resource = vma_res;
505 trace_i915_vma_bind(vma, bind_flags);
506 if (work && bind_flags & vma->vm->bind_async_flags) {
507 struct dma_fence *prev;
509 work->vma_res = i915_vma_resource_get(vma->resource);
510 work->pat_index = pat_index;
511 work->flags = bind_flags;
514 * Note we only want to chain up to the migration fence on
515 * the pages (not the object itself). As we don't track that,
516 * yet, we have to use the exclusive fence instead.
518 * Also note that we do not want to track the async vma as
519 * part of the obj->resv->excl_fence as it only affects
520 * execution and not content or object's backing store lifetime.
522 prev = i915_active_set_exclusive(&vma->active, &work->base.dma);
524 __i915_sw_fence_await_dma_fence(&work->base.chain,
530 work->base.dma.error = 0; /* enable the queue_work() */
531 work->obj = i915_gem_object_get(vma->obj);
533 ret = i915_gem_object_wait_moving_fence(vma->obj, true);
535 i915_vma_resource_free(vma->resource);
536 vma->resource = NULL;
540 vma->ops->bind_vma(vma->vm, NULL, vma->resource, pat_index,
544 atomic_or(bind_flags, &vma->flags);
548 void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
553 if (WARN_ON_ONCE(vma->obj->flags & I915_BO_ALLOC_GPU_ONLY))
554 return IOMEM_ERR_PTR(-EINVAL);
556 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
557 GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND));
558 GEM_BUG_ON(i915_vma_verify_bind_complete(vma));
560 ptr = READ_ONCE(vma->iomap);
563 * TODO: consider just using i915_gem_object_pin_map() for lmem
564 * instead, which already supports mapping non-contiguous chunks
565 * of pages, that way we can also drop the
566 * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
568 if (i915_gem_object_is_lmem(vma->obj)) {
569 ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
570 vma->obj->base.size);
571 } else if (i915_vma_is_map_and_fenceable(vma)) {
572 ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
573 i915_vma_offset(vma),
576 ptr = (void __iomem *)
577 i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
582 ptr = page_pack_bits(ptr, 1);
590 if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
591 if (page_unmask_bits(ptr))
592 __i915_gem_object_release_map(vma->obj);
594 io_mapping_unmap(ptr);
601 err = i915_vma_pin_fence(vma);
605 i915_vma_set_ggtt_write(vma);
607 /* NB Access through the GTT requires the device to be awake. */
608 return page_mask_bits(ptr);
611 __i915_vma_unpin(vma);
613 return IOMEM_ERR_PTR(err);
616 void i915_vma_flush_writes(struct i915_vma *vma)
618 if (i915_vma_unset_ggtt_write(vma))
619 intel_gt_flush_ggtt_writes(vma->vm->gt);
622 void i915_vma_unpin_iomap(struct i915_vma *vma)
624 GEM_BUG_ON(vma->iomap == NULL);
626 /* XXX We keep the mapping until __i915_vma_unbind()/evict() */
628 i915_vma_flush_writes(vma);
630 i915_vma_unpin_fence(vma);
634 void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags)
636 struct i915_vma *vma;
637 struct drm_i915_gem_object *obj;
639 vma = fetch_and_zero(p_vma);
648 if (flags & I915_VMA_RELEASE_MAP)
649 i915_gem_object_unpin_map(obj);
651 i915_gem_object_put(obj);
654 bool i915_vma_misplaced(const struct i915_vma *vma,
655 u64 size, u64 alignment, u64 flags)
657 if (!drm_mm_node_allocated(&vma->node))
660 if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma)))
663 if (i915_vma_size(vma) < size)
666 GEM_BUG_ON(alignment && !is_power_of_2(alignment));
667 if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment))
670 if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma))
673 if (flags & PIN_OFFSET_BIAS &&
674 i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK))
677 if (flags & PIN_OFFSET_FIXED &&
678 i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))
681 if (flags & PIN_OFFSET_GUARD &&
682 vma->guard < (flags & PIN_OFFSET_MASK))
688 void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
690 bool mappable, fenceable;
692 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
693 GEM_BUG_ON(!vma->fence_size);
695 fenceable = (i915_vma_size(vma) >= vma->fence_size &&
696 IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment));
698 mappable = i915_ggtt_offset(vma) + vma->fence_size <=
699 i915_vm_to_ggtt(vma->vm)->mappable_end;
701 if (mappable && fenceable)
702 set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
704 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
707 bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color)
709 struct drm_mm_node *node = &vma->node;
710 struct drm_mm_node *other;
713 * On some machines we have to be careful when putting differing types
714 * of snoopable memory together to avoid the prefetcher crossing memory
715 * domains and dying. During vm initialisation, we decide whether or not
716 * these constraints apply and set the drm_mm.color_adjust
719 if (!i915_vm_has_cache_coloring(vma->vm))
722 /* Only valid to be called on an already inserted vma */
723 GEM_BUG_ON(!drm_mm_node_allocated(node));
724 GEM_BUG_ON(list_empty(&node->node_list));
726 other = list_prev_entry(node, node_list);
727 if (i915_node_color_differs(other, color) &&
728 !drm_mm_hole_follows(other))
731 other = list_next_entry(node, node_list);
732 if (i915_node_color_differs(other, color) &&
733 !drm_mm_hole_follows(node))
740 * i915_vma_insert - finds a slot for the vma in its address space
742 * @ww: An optional struct i915_gem_ww_ctx
743 * @size: requested size in bytes (can be larger than the VMA)
744 * @alignment: required alignment
745 * @flags: mask of PIN_* flags to use
747 * First we try to allocate some free space that meets the requirements for
748 * the VMA. Failiing that, if the flags permit, it will evict an old VMA,
749 * preferrably the oldest idle entry to make room for the new VMA.
752 * 0 on success, negative error code otherwise.
755 i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
756 u64 size, u64 alignment, u64 flags)
758 unsigned long color, guard;
762 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
763 GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
764 GEM_BUG_ON(hweight64(flags & (PIN_OFFSET_GUARD | PIN_OFFSET_FIXED | PIN_OFFSET_BIAS)) > 1);
766 size = max(size, vma->size);
767 alignment = max_t(typeof(alignment), alignment, vma->display_alignment);
768 if (flags & PIN_MAPPABLE) {
769 size = max_t(typeof(size), size, vma->fence_size);
770 alignment = max_t(typeof(alignment),
771 alignment, vma->fence_alignment);
774 GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
775 GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
776 GEM_BUG_ON(!is_power_of_2(alignment));
778 guard = vma->guard; /* retain guard across rebinds */
779 if (flags & PIN_OFFSET_GUARD) {
780 GEM_BUG_ON(overflows_type(flags & PIN_OFFSET_MASK, u32));
781 guard = max_t(u32, guard, flags & PIN_OFFSET_MASK);
784 * As we align the node upon insertion, but the hardware gets
785 * node.start + guard, the easiest way to make that work is
786 * to make the guard a multiple of the alignment size.
788 guard = ALIGN(guard, alignment);
790 start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0;
791 GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
793 end = vma->vm->total;
794 if (flags & PIN_MAPPABLE)
795 end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
796 if (flags & PIN_ZONE_4G)
797 end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
798 GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
800 alignment = max(alignment, i915_vm_obj_min_alignment(vma->vm, vma->obj));
803 * If binding the object/GGTT view requires more space than the entire
804 * aperture has, reject it early before evicting everything in a vain
805 * attempt to find space.
807 if (size > end - 2 * guard) {
808 drm_dbg(&to_i915(vma->obj->base.dev)->drm,
809 "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
810 size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
816 if (i915_vm_has_cache_coloring(vma->vm))
817 color = vma->obj->pat_index;
819 if (flags & PIN_OFFSET_FIXED) {
820 u64 offset = flags & PIN_OFFSET_MASK;
821 if (!IS_ALIGNED(offset, alignment) ||
822 range_overflows(offset, size, end))
825 * The caller knows not of the guard added by others and
826 * requests for the offset of the start of its buffer
827 * to be fixed, which may not be the same as the position
828 * of the vma->node due to the guard pages.
830 if (offset < guard || offset + size > end - guard)
833 ret = i915_gem_gtt_reserve(vma->vm, ww, &vma->node,
842 * We only support huge gtt pages through the 48b PPGTT,
843 * however we also don't want to force any alignment for
844 * objects which need to be tightly packed into the low 32bits.
846 * Note that we assume that GGTT are limited to 4GiB for the
847 * forseeable future. See also i915_ggtt_offset().
849 if (upper_32_bits(end - 1) &&
850 vma->page_sizes.sg > I915_GTT_PAGE_SIZE &&
851 !HAS_64K_PAGES(vma->vm->i915)) {
853 * We can't mix 64K and 4K PTEs in the same page-table
854 * (2M block), and so to avoid the ugliness and
855 * complexity of coloring we opt for just aligning 64K
859 rounddown_pow_of_two(vma->page_sizes.sg |
860 I915_GTT_PAGE_SIZE_2M);
863 * Check we don't expand for the limited Global GTT
864 * (mappable aperture is even more precious!). This
865 * also checks that we exclude the aliasing-ppgtt.
867 GEM_BUG_ON(i915_vma_is_ggtt(vma));
869 alignment = max(alignment, page_alignment);
871 if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
872 size = round_up(size, I915_GTT_PAGE_SIZE_2M);
875 ret = i915_gem_gtt_insert(vma->vm, ww, &vma->node,
876 size, alignment, color,
881 GEM_BUG_ON(vma->node.start < start);
882 GEM_BUG_ON(vma->node.start + vma->node.size > end);
884 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
885 GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color));
887 list_move_tail(&vma->vm_link, &vma->vm->bound_list);
894 i915_vma_detach(struct i915_vma *vma)
896 GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
897 GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
900 * And finally now the object is completely decoupled from this
901 * vma, we can drop its hold on the backing storage and allow
902 * it to be reaped by the shrinker.
904 list_move_tail(&vma->vm_link, &vma->vm->unbound_list);
907 static bool try_qad_pin(struct i915_vma *vma, unsigned int flags)
911 bound = atomic_read(&vma->flags);
913 if (flags & PIN_VALIDATE) {
914 flags &= I915_VMA_BIND_MASK;
916 return (flags & bound) == flags;
919 /* with the lock mandatory for unbind, we don't race here */
920 flags &= I915_VMA_BIND_MASK;
922 if (unlikely(flags & ~bound))
925 if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR)))
928 GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0);
929 } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
934 static struct scatterlist *
935 rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
936 unsigned int width, unsigned int height,
937 unsigned int src_stride, unsigned int dst_stride,
938 struct sg_table *st, struct scatterlist *sg)
940 unsigned int column, row;
943 for (column = 0; column < width; column++) {
946 src_idx = src_stride * (height - 1) + column + offset;
947 for (row = 0; row < height; row++) {
950 * We don't need the pages, but need to initialize
951 * the entries so the sg list can be happily traversed.
952 * The only thing we need are DMA addresses.
954 sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
956 i915_gem_object_get_dma_address(obj, src_idx);
957 sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
959 src_idx -= src_stride;
962 left = (dst_stride - height) * I915_GTT_PAGE_SIZE;
970 * The DE ignores the PTEs for the padding tiles, the sg entry
971 * here is just a conenience to indicate how many padding PTEs
972 * to insert at this spot.
974 sg_set_page(sg, NULL, left, 0);
975 sg_dma_address(sg) = 0;
976 sg_dma_len(sg) = left;
983 static noinline struct sg_table *
984 intel_rotate_pages(struct intel_rotation_info *rot_info,
985 struct drm_i915_gem_object *obj)
987 unsigned int size = intel_rotation_info_size(rot_info);
988 struct drm_i915_private *i915 = to_i915(obj->base.dev);
990 struct scatterlist *sg;
994 /* Allocate target SG list. */
995 st = kmalloc(sizeof(*st), GFP_KERNEL);
999 ret = sg_alloc_table(st, size, GFP_KERNEL);
1006 for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
1007 sg = rotate_pages(obj, rot_info->plane[i].offset,
1008 rot_info->plane[i].width, rot_info->plane[i].height,
1009 rot_info->plane[i].src_stride,
1010 rot_info->plane[i].dst_stride,
1019 drm_dbg(&i915->drm, "Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n",
1020 obj->base.size, rot_info->plane[0].width,
1021 rot_info->plane[0].height, size);
1023 return ERR_PTR(ret);
1026 static struct scatterlist *
1027 add_padding_pages(unsigned int count,
1028 struct sg_table *st, struct scatterlist *sg)
1033 * The DE ignores the PTEs for the padding tiles, the sg entry
1034 * here is just a convenience to indicate how many padding PTEs
1035 * to insert at this spot.
1037 sg_set_page(sg, NULL, count * I915_GTT_PAGE_SIZE, 0);
1038 sg_dma_address(sg) = 0;
1039 sg_dma_len(sg) = count * I915_GTT_PAGE_SIZE;
1045 static struct scatterlist *
1046 remap_tiled_color_plane_pages(struct drm_i915_gem_object *obj,
1047 unsigned long offset, unsigned int alignment_pad,
1048 unsigned int width, unsigned int height,
1049 unsigned int src_stride, unsigned int dst_stride,
1050 struct sg_table *st, struct scatterlist *sg,
1051 unsigned int *gtt_offset)
1055 if (!width || !height)
1059 sg = add_padding_pages(alignment_pad, st, sg);
1061 for (row = 0; row < height; row++) {
1062 unsigned int left = width * I915_GTT_PAGE_SIZE;
1066 unsigned int length;
1069 * We don't need the pages, but need to initialize
1070 * the entries so the sg list can be happily traversed.
1071 * The only thing we need are DMA addresses.
1074 addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
1076 length = min(left, length);
1080 sg_set_page(sg, NULL, length, 0);
1081 sg_dma_address(sg) = addr;
1082 sg_dma_len(sg) = length;
1085 offset += length / I915_GTT_PAGE_SIZE;
1089 offset += src_stride - width;
1091 left = (dst_stride - width) * I915_GTT_PAGE_SIZE;
1096 sg = add_padding_pages(left >> PAGE_SHIFT, st, sg);
1099 *gtt_offset += alignment_pad + dst_stride * height;
1104 static struct scatterlist *
1105 remap_contiguous_pages(struct drm_i915_gem_object *obj,
1108 struct sg_table *st, struct scatterlist *sg)
1110 struct scatterlist *iter;
1111 unsigned int offset;
1113 iter = i915_gem_object_get_sg_dma(obj, obj_offset, &offset);
1119 len = min(sg_dma_len(iter) - (offset << PAGE_SHIFT),
1120 count << PAGE_SHIFT);
1121 sg_set_page(sg, NULL, len, 0);
1122 sg_dma_address(sg) =
1123 sg_dma_address(iter) + (offset << PAGE_SHIFT);
1124 sg_dma_len(sg) = len;
1127 count -= len >> PAGE_SHIFT;
1132 iter = __sg_next(iter);
1137 static struct scatterlist *
1138 remap_linear_color_plane_pages(struct drm_i915_gem_object *obj,
1139 pgoff_t obj_offset, unsigned int alignment_pad,
1141 struct sg_table *st, struct scatterlist *sg,
1142 unsigned int *gtt_offset)
1148 sg = add_padding_pages(alignment_pad, st, sg);
1150 sg = remap_contiguous_pages(obj, obj_offset, size, st, sg);
1153 *gtt_offset += alignment_pad + size;
1158 static struct scatterlist *
1159 remap_color_plane_pages(const struct intel_remapped_info *rem_info,
1160 struct drm_i915_gem_object *obj,
1162 struct sg_table *st, struct scatterlist *sg,
1163 unsigned int *gtt_offset)
1165 unsigned int alignment_pad = 0;
1167 if (rem_info->plane_alignment)
1168 alignment_pad = ALIGN(*gtt_offset, rem_info->plane_alignment) - *gtt_offset;
1170 if (rem_info->plane[color_plane].linear)
1171 sg = remap_linear_color_plane_pages(obj,
1172 rem_info->plane[color_plane].offset,
1174 rem_info->plane[color_plane].size,
1179 sg = remap_tiled_color_plane_pages(obj,
1180 rem_info->plane[color_plane].offset,
1182 rem_info->plane[color_plane].width,
1183 rem_info->plane[color_plane].height,
1184 rem_info->plane[color_plane].src_stride,
1185 rem_info->plane[color_plane].dst_stride,
1192 static noinline struct sg_table *
1193 intel_remap_pages(struct intel_remapped_info *rem_info,
1194 struct drm_i915_gem_object *obj)
1196 unsigned int size = intel_remapped_info_size(rem_info);
1197 struct drm_i915_private *i915 = to_i915(obj->base.dev);
1198 struct sg_table *st;
1199 struct scatterlist *sg;
1200 unsigned int gtt_offset = 0;
1204 /* Allocate target SG list. */
1205 st = kmalloc(sizeof(*st), GFP_KERNEL);
1209 ret = sg_alloc_table(st, size, GFP_KERNEL);
1216 for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
1217 sg = remap_color_plane_pages(rem_info, obj, i, st, sg, >t_offset);
1227 drm_dbg(&i915->drm, "Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
1228 obj->base.size, rem_info->plane[0].width,
1229 rem_info->plane[0].height, size);
1231 return ERR_PTR(ret);
1234 static noinline struct sg_table *
1235 intel_partial_pages(const struct i915_gtt_view *view,
1236 struct drm_i915_gem_object *obj)
1238 struct sg_table *st;
1239 struct scatterlist *sg;
1240 unsigned int count = view->partial.size;
1243 st = kmalloc(sizeof(*st), GFP_KERNEL);
1247 ret = sg_alloc_table(st, count, GFP_KERNEL);
1253 sg = remap_contiguous_pages(obj, view->partial.offset, count, st, st->sgl);
1256 i915_sg_trim(st); /* Drop any unused tail entries. */
1263 return ERR_PTR(ret);
1267 __i915_vma_get_pages(struct i915_vma *vma)
1269 struct sg_table *pages;
1272 * The vma->pages are only valid within the lifespan of the borrowed
1273 * obj->mm.pages. When the obj->mm.pages sg_table is regenerated, so
1274 * must be the vma->pages. A simple rule is that vma->pages must only
1275 * be accessed when the obj->mm.pages are pinned.
1277 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(vma->obj));
1279 switch (vma->gtt_view.type) {
1281 GEM_BUG_ON(vma->gtt_view.type);
1283 case I915_GTT_VIEW_NORMAL:
1284 pages = vma->obj->mm.pages;
1287 case I915_GTT_VIEW_ROTATED:
1289 intel_rotate_pages(&vma->gtt_view.rotated, vma->obj);
1292 case I915_GTT_VIEW_REMAPPED:
1294 intel_remap_pages(&vma->gtt_view.remapped, vma->obj);
1297 case I915_GTT_VIEW_PARTIAL:
1298 pages = intel_partial_pages(&vma->gtt_view, vma->obj);
1302 if (IS_ERR(pages)) {
1303 drm_err(&vma->vm->i915->drm,
1304 "Failed to get pages for VMA view type %u (%ld)!\n",
1305 vma->gtt_view.type, PTR_ERR(pages));
1306 return PTR_ERR(pages);
1314 I915_SELFTEST_EXPORT int i915_vma_get_pages(struct i915_vma *vma)
1318 if (atomic_add_unless(&vma->pages_count, 1, 0))
1321 err = i915_gem_object_pin_pages(vma->obj);
1325 err = __i915_vma_get_pages(vma);
1329 vma->page_sizes = vma->obj->mm.page_sizes;
1330 atomic_inc(&vma->pages_count);
1335 __i915_gem_object_unpin_pages(vma->obj);
1340 void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb)
1343 * Before we release the pages that were bound by this vma, we
1344 * must invalidate all the TLBs that may still have a reference
1345 * back to our physical address. It only needs to be done once,
1346 * so after updating the PTE to point away from the pages, record
1347 * the most recent TLB invalidation seqno, and if we have not yet
1348 * flushed the TLBs upon release, perform a full invalidation.
1350 WRITE_ONCE(*tlb, intel_gt_next_invalidate_tlb_full(vm->gt));
1353 static void __vma_put_pages(struct i915_vma *vma, unsigned int count)
1355 /* We allocate under vma_get_pages, so beware the shrinker */
1356 GEM_BUG_ON(atomic_read(&vma->pages_count) < count);
1358 if (atomic_sub_return(count, &vma->pages_count) == 0) {
1359 if (vma->pages != vma->obj->mm.pages) {
1360 sg_free_table(vma->pages);
1365 i915_gem_object_unpin_pages(vma->obj);
1369 I915_SELFTEST_EXPORT void i915_vma_put_pages(struct i915_vma *vma)
1371 if (atomic_add_unless(&vma->pages_count, -1, 1))
1374 __vma_put_pages(vma, 1);
1377 static void vma_unbind_pages(struct i915_vma *vma)
1381 lockdep_assert_held(&vma->vm->mutex);
1383 /* The upper portion of pages_count is the number of bindings */
1384 count = atomic_read(&vma->pages_count);
1385 count >>= I915_VMA_PAGES_BIAS;
1388 __vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS);
1391 int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1392 u64 size, u64 alignment, u64 flags)
1394 struct i915_vma_work *work = NULL;
1395 struct dma_fence *moving = NULL;
1396 struct i915_vma_resource *vma_res = NULL;
1397 intel_wakeref_t wakeref = 0;
1401 assert_vma_held(vma);
1404 BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
1405 BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
1407 GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL)));
1409 /* First try and grab the pin without rebinding the vma */
1410 if (try_qad_pin(vma, flags))
1413 err = i915_vma_get_pages(vma);
1417 if (flags & PIN_GLOBAL)
1418 wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
1420 if (flags & vma->vm->bind_async_flags) {
1422 err = i915_vm_lock_objects(vma->vm, ww);
1426 work = i915_vma_work();
1434 err = i915_gem_object_get_moving_fence(vma->obj, &moving);
1438 dma_fence_work_chain(&work->base, moving);
1440 /* Allocate enough page directories to used PTE */
1441 if (vma->vm->allocate_va_range) {
1442 err = i915_vm_alloc_pt_stash(vma->vm,
1448 err = i915_vm_map_pt_stash(vma->vm, &work->stash);
1454 vma_res = i915_vma_resource_alloc();
1455 if (IS_ERR(vma_res)) {
1456 err = PTR_ERR(vma_res);
1461 * Differentiate between user/kernel vma inside the aliasing-ppgtt.
1463 * We conflate the Global GTT with the user's vma when using the
1464 * aliasing-ppgtt, but it is still vitally important to try and
1465 * keep the use cases distinct. For example, userptr objects are
1466 * not allowed inside the Global GTT as that will cause lock
1467 * inversions when we have to evict them the mmu_notifier callbacks -
1468 * but they are allowed to be part of the user ppGTT which can never
1469 * be mapped. As such we try to give the distinct users of the same
1470 * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt
1471 * and i915_ppgtt separate].
1473 * NB this may cause us to mask real lock inversions -- while the
1474 * code is safe today, lockdep may not be able to spot future
1477 err = mutex_lock_interruptible_nested(&vma->vm->mutex,
1478 !(flags & PIN_GLOBAL));
1482 /* No more allocations allowed now we hold vm->mutex */
1484 if (unlikely(i915_vma_is_closed(vma))) {
1489 bound = atomic_read(&vma->flags);
1490 if (unlikely(bound & I915_VMA_ERROR)) {
1495 if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) {
1496 err = -EAGAIN; /* pins are meant to be fairly temporary */
1500 if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) {
1501 if (!(flags & PIN_VALIDATE))
1502 __i915_vma_pin(vma);
1506 err = i915_active_acquire(&vma->active);
1510 if (!(bound & I915_VMA_BIND_MASK)) {
1511 err = i915_vma_insert(vma, ww, size, alignment, flags);
1515 if (i915_is_ggtt(vma->vm))
1516 __i915_vma_set_map_and_fenceable(vma);
1519 GEM_BUG_ON(!vma->pages);
1520 err = i915_vma_bind(vma,
1521 vma->obj->pat_index,
1522 flags, work, vma_res);
1527 /* There should only be at most 2 active bindings (user, global) */
1528 GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound);
1529 atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count);
1530 list_move_tail(&vma->vm_link, &vma->vm->bound_list);
1532 if (!(flags & PIN_VALIDATE)) {
1533 __i915_vma_pin(vma);
1534 GEM_BUG_ON(!i915_vma_is_pinned(vma));
1536 GEM_BUG_ON(!i915_vma_is_bound(vma, flags));
1537 GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
1540 if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) {
1541 i915_vma_detach(vma);
1542 drm_mm_remove_node(&vma->node);
1545 i915_active_release(&vma->active);
1547 mutex_unlock(&vma->vm->mutex);
1549 i915_vma_resource_free(vma_res);
1552 dma_fence_work_commit_imm(&work->base);
1555 intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
1558 dma_fence_put(moving);
1560 i915_vma_put_pages(vma);
1564 static void flush_idle_contexts(struct intel_gt *gt)
1566 struct intel_engine_cs *engine;
1567 enum intel_engine_id id;
1569 for_each_engine(engine, gt, id)
1570 intel_engine_flush_barriers(engine);
1572 intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
1575 static int __i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1576 u32 align, unsigned int flags)
1578 struct i915_address_space *vm = vma->vm;
1579 struct intel_gt *gt;
1580 struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm);
1584 err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL);
1586 if (err != -ENOSPC) {
1588 err = i915_vma_wait_for_bind(vma);
1590 i915_vma_unpin(vma);
1595 /* Unlike i915_vma_pin, we don't take no for an answer! */
1596 list_for_each_entry(gt, &ggtt->gt_list, ggtt_link)
1597 flush_idle_contexts(gt);
1598 if (mutex_lock_interruptible(&vm->mutex) == 0) {
1600 * We pass NULL ww here, as we don't want to unbind
1601 * locked objects when called from execbuf when pinning
1602 * is removed. This would probably regress badly.
1604 i915_gem_evict_vm(vm, NULL, NULL);
1605 mutex_unlock(&vm->mutex);
1610 int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
1611 u32 align, unsigned int flags)
1613 struct i915_gem_ww_ctx _ww;
1616 GEM_BUG_ON(!i915_vma_is_ggtt(vma));
1619 return __i915_ggtt_pin(vma, ww, align, flags);
1621 lockdep_assert_not_held(&vma->obj->base.resv->lock.base);
1623 for_i915_gem_ww(&_ww, err, true) {
1624 err = i915_gem_object_lock(vma->obj, &_ww);
1626 err = __i915_ggtt_pin(vma, &_ww, align, flags);
1632 static void __vma_close(struct i915_vma *vma, struct intel_gt *gt)
1635 * We defer actually closing, unbinding and destroying the VMA until
1636 * the next idle point, or if the object is freed in the meantime. By
1637 * postponing the unbind, we allow for it to be resurrected by the
1638 * client, avoiding the work required to rebind the VMA. This is
1639 * advantageous for DRI, where the client/server pass objects
1640 * between themselves, temporarily opening a local VMA to the
1641 * object, and then closing it again. The same object is then reused
1642 * on the next frame (or two, depending on the depth of the swap queue)
1643 * causing us to rebind the VMA once more. This ends up being a lot
1644 * of wasted work for the steady state.
1646 GEM_BUG_ON(i915_vma_is_closed(vma));
1647 list_add(&vma->closed_link, >->closed_vma);
1650 void i915_vma_close(struct i915_vma *vma)
1652 struct intel_gt *gt = vma->vm->gt;
1653 unsigned long flags;
1655 if (i915_vma_is_ggtt(vma))
1658 GEM_BUG_ON(!atomic_read(&vma->open_count));
1659 if (atomic_dec_and_lock_irqsave(&vma->open_count,
1662 __vma_close(vma, gt);
1663 spin_unlock_irqrestore(>->closed_lock, flags);
1667 static void __i915_vma_remove_closed(struct i915_vma *vma)
1669 list_del_init(&vma->closed_link);
1672 void i915_vma_reopen(struct i915_vma *vma)
1674 struct intel_gt *gt = vma->vm->gt;
1676 spin_lock_irq(>->closed_lock);
1677 if (i915_vma_is_closed(vma))
1678 __i915_vma_remove_closed(vma);
1679 spin_unlock_irq(>->closed_lock);
1682 static void force_unbind(struct i915_vma *vma)
1684 if (!drm_mm_node_allocated(&vma->node))
1687 atomic_and(~I915_VMA_PIN_MASK, &vma->flags);
1688 WARN_ON(__i915_vma_unbind(vma));
1689 GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
1692 static void release_references(struct i915_vma *vma, struct intel_gt *gt,
1695 struct drm_i915_gem_object *obj = vma->obj;
1697 GEM_BUG_ON(i915_vma_is_active(vma));
1699 spin_lock(&obj->vma.lock);
1700 list_del(&vma->obj_link);
1701 if (!RB_EMPTY_NODE(&vma->obj_node))
1702 rb_erase(&vma->obj_node, &obj->vma.tree);
1704 spin_unlock(&obj->vma.lock);
1706 spin_lock_irq(>->closed_lock);
1707 __i915_vma_remove_closed(vma);
1708 spin_unlock_irq(>->closed_lock);
1711 i915_vm_resv_put(vma->vm);
1713 /* Wait for async active retire */
1714 i915_active_wait(&vma->active);
1715 i915_active_fini(&vma->active);
1716 GEM_WARN_ON(vma->resource);
1721 * i915_vma_destroy_locked - Remove all weak reference to the vma and put
1722 * the initial reference.
1724 * This function should be called when it's decided the vma isn't needed
1725 * anymore. The caller must assure that it doesn't race with another lookup
1726 * plus destroy, typically by taking an appropriate reference.
1728 * Current callsites are
1729 * - __i915_gem_object_pages_fini()
1730 * - __i915_vm_close() - Blocks the above function by taking a reference on
1732 * - __i915_vma_parked() - Blocks the above functions by taking a reference
1733 * on the vm and a reference on the object. Also takes the object lock so
1734 * destruction from __i915_vma_parked() can be blocked by holding the
1735 * object lock. Since the object lock is only allowed from within i915 with
1736 * an object refcount, holding the object lock also implicitly blocks the
1737 * vma freeing from __i915_gem_object_pages_fini().
1739 * Because of locks taken during destruction, a vma is also guaranteed to
1740 * stay alive while the following locks are held if it was looked up while
1741 * holding one of the locks:
1746 void i915_vma_destroy_locked(struct i915_vma *vma)
1748 lockdep_assert_held(&vma->vm->mutex);
1751 list_del_init(&vma->vm_link);
1752 release_references(vma, vma->vm->gt, false);
1755 void i915_vma_destroy(struct i915_vma *vma)
1757 struct intel_gt *gt;
1760 mutex_lock(&vma->vm->mutex);
1762 list_del_init(&vma->vm_link);
1763 vm_ddestroy = vma->vm_ddestroy;
1764 vma->vm_ddestroy = false;
1766 /* vma->vm may be freed when releasing vma->vm->mutex. */
1768 mutex_unlock(&vma->vm->mutex);
1769 release_references(vma, gt, vm_ddestroy);
1772 void i915_vma_parked(struct intel_gt *gt)
1774 struct i915_vma *vma, *next;
1777 spin_lock_irq(>->closed_lock);
1778 list_for_each_entry_safe(vma, next, >->closed_vma, closed_link) {
1779 struct drm_i915_gem_object *obj = vma->obj;
1780 struct i915_address_space *vm = vma->vm;
1782 /* XXX All to avoid keeping a reference on i915_vma itself */
1784 if (!kref_get_unless_zero(&obj->base.refcount))
1787 if (!i915_vm_tryget(vm)) {
1788 i915_gem_object_put(obj);
1792 list_move(&vma->closed_link, &closed);
1794 spin_unlock_irq(>->closed_lock);
1796 /* As the GT is held idle, no vma can be reopened as we destroy them */
1797 list_for_each_entry_safe(vma, next, &closed, closed_link) {
1798 struct drm_i915_gem_object *obj = vma->obj;
1799 struct i915_address_space *vm = vma->vm;
1801 if (i915_gem_object_trylock(obj, NULL)) {
1802 INIT_LIST_HEAD(&vma->closed_link);
1803 i915_vma_destroy(vma);
1804 i915_gem_object_unlock(obj);
1807 spin_lock_irq(>->closed_lock);
1808 list_add(&vma->closed_link, >->closed_vma);
1809 spin_unlock_irq(>->closed_lock);
1812 i915_gem_object_put(obj);
1817 static void __i915_vma_iounmap(struct i915_vma *vma)
1819 GEM_BUG_ON(i915_vma_is_pinned(vma));
1821 if (vma->iomap == NULL)
1824 if (page_unmask_bits(vma->iomap))
1825 __i915_gem_object_release_map(vma->obj);
1827 io_mapping_unmap(vma->iomap);
1831 void i915_vma_revoke_mmap(struct i915_vma *vma)
1833 struct drm_vma_offset_node *node;
1836 if (!i915_vma_has_userfault(vma))
1839 GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
1840 GEM_BUG_ON(!vma->obj->userfault_count);
1842 node = &vma->mmo->vma_node;
1843 vma_offset = vma->gtt_view.partial.offset << PAGE_SHIFT;
1844 unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping,
1845 drm_vma_node_offset_addr(node) + vma_offset,
1849 i915_vma_unset_userfault(vma);
1850 if (!--vma->obj->userfault_count)
1851 list_del(&vma->obj->userfault_link);
1855 __i915_request_await_bind(struct i915_request *rq, struct i915_vma *vma)
1857 return __i915_request_await_exclusive(rq, &vma->active);
1860 static int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq)
1864 /* Wait for the vma to be bound before we start! */
1865 err = __i915_request_await_bind(rq, vma);
1869 return i915_active_add_request(&vma->active, rq);
1872 int _i915_vma_move_to_active(struct i915_vma *vma,
1873 struct i915_request *rq,
1874 struct dma_fence *fence,
1877 struct drm_i915_gem_object *obj = vma->obj;
1880 assert_object_held(obj);
1882 GEM_BUG_ON(!vma->pages);
1884 if (!(flags & __EXEC_OBJECT_NO_REQUEST_AWAIT)) {
1885 err = i915_request_await_object(rq, vma->obj, flags & EXEC_OBJECT_WRITE);
1889 err = __i915_vma_move_to_active(vma, rq);
1894 * Reserve fences slot early to prevent an allocation after preparing
1895 * the workload and associating fences with dma_resv.
1897 if (fence && !(flags & __EXEC_OBJECT_NO_RESERVE)) {
1898 struct dma_fence *curr;
1901 dma_fence_array_for_each(curr, idx, fence)
1903 err = dma_resv_reserve_fences(vma->obj->base.resv, idx);
1908 if (flags & EXEC_OBJECT_WRITE) {
1909 struct intel_frontbuffer *front;
1911 front = __intel_frontbuffer_get(obj);
1912 if (unlikely(front)) {
1913 if (intel_frontbuffer_invalidate(front, ORIGIN_CS))
1914 i915_active_add_request(&front->write, rq);
1915 intel_frontbuffer_put(front);
1920 struct dma_fence *curr;
1921 enum dma_resv_usage usage;
1924 if (flags & EXEC_OBJECT_WRITE) {
1925 usage = DMA_RESV_USAGE_WRITE;
1926 obj->write_domain = I915_GEM_DOMAIN_RENDER;
1927 obj->read_domains = 0;
1929 usage = DMA_RESV_USAGE_READ;
1930 obj->write_domain = 0;
1933 dma_fence_array_for_each(curr, idx, fence)
1934 dma_resv_add_fence(vma->obj->base.resv, curr, usage);
1937 if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence)
1938 i915_active_add_request(&vma->fence->active, rq);
1940 obj->read_domains |= I915_GEM_GPU_DOMAINS;
1941 obj->mm.dirty = true;
1943 GEM_BUG_ON(!i915_vma_is_active(vma));
1947 struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async)
1949 struct i915_vma_resource *vma_res = vma->resource;
1950 struct dma_fence *unbind_fence;
1952 GEM_BUG_ON(i915_vma_is_pinned(vma));
1953 assert_vma_held_evict(vma);
1955 if (i915_vma_is_map_and_fenceable(vma)) {
1956 /* Force a pagefault for domain tracking on next user access */
1957 i915_vma_revoke_mmap(vma);
1960 * Check that we have flushed all writes through the GGTT
1961 * before the unbind, other due to non-strict nature of those
1962 * indirect writes they may end up referencing the GGTT PTE
1965 * Note that we may be concurrently poking at the GGTT_WRITE
1966 * bit from set-domain, as we mark all GGTT vma associated
1967 * with an object. We know this is for another vma, as we
1968 * are currently unbinding this one -- so if this vma will be
1969 * reused, it will be refaulted and have its dirty bit set
1970 * before the next write.
1972 i915_vma_flush_writes(vma);
1974 /* release the fence reg _after_ flushing */
1975 i915_vma_revoke_fence(vma);
1977 clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
1980 __i915_vma_iounmap(vma);
1982 GEM_BUG_ON(vma->fence);
1983 GEM_BUG_ON(i915_vma_has_userfault(vma));
1985 /* Object backend must be async capable. */
1986 GEM_WARN_ON(async && !vma->resource->bi.pages_rsgt);
1988 /* If vm is not open, unbind is a nop. */
1989 vma_res->needs_wakeref = i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND) &&
1990 kref_read(&vma->vm->ref);
1991 vma_res->skip_pte_rewrite = !kref_read(&vma->vm->ref) ||
1992 vma->vm->skip_pte_rewrite;
1993 trace_i915_vma_unbind(vma);
1996 unbind_fence = i915_vma_resource_unbind(vma_res,
1999 unbind_fence = i915_vma_resource_unbind(vma_res, NULL);
2001 vma->resource = NULL;
2003 atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE),
2006 i915_vma_detach(vma);
2010 dma_fence_wait(unbind_fence, false);
2011 dma_fence_put(unbind_fence);
2012 unbind_fence = NULL;
2014 vma_invalidate_tlb(vma->vm, &vma->obj->mm.tlb);
2018 * Binding itself may not have completed until the unbind fence signals,
2019 * so don't drop the pages until that happens, unless the resource is
2023 vma_unbind_pages(vma);
2024 return unbind_fence;
2027 int __i915_vma_unbind(struct i915_vma *vma)
2031 lockdep_assert_held(&vma->vm->mutex);
2032 assert_vma_held_evict(vma);
2034 if (!drm_mm_node_allocated(&vma->node))
2037 if (i915_vma_is_pinned(vma)) {
2038 vma_print_allocator(vma, "is pinned");
2043 * After confirming that no one else is pinning this vma, wait for
2044 * any laggards who may have crept in during the wait (through
2045 * a residual pin skipping the vm->mutex) to complete.
2047 ret = i915_vma_sync(vma);
2051 GEM_BUG_ON(i915_vma_is_active(vma));
2052 __i915_vma_evict(vma, false);
2054 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
2058 static struct dma_fence *__i915_vma_unbind_async(struct i915_vma *vma)
2060 struct dma_fence *fence;
2062 lockdep_assert_held(&vma->vm->mutex);
2064 if (!drm_mm_node_allocated(&vma->node))
2067 if (i915_vma_is_pinned(vma) ||
2068 &vma->obj->mm.rsgt->table != vma->resource->bi.pages)
2069 return ERR_PTR(-EAGAIN);
2072 * We probably need to replace this with awaiting the fences of the
2073 * object's dma_resv when the vma active goes away. When doing that
2074 * we need to be careful to not add the vma_resource unbind fence
2075 * immediately to the object's dma_resv, because then unbinding
2076 * the next vma from the object, in case there are many, will
2077 * actually await the unbinding of the previous vmas, which is
2080 if (i915_sw_fence_await_active(&vma->resource->chain, &vma->active,
2081 I915_ACTIVE_AWAIT_EXCL |
2082 I915_ACTIVE_AWAIT_ACTIVE) < 0) {
2083 return ERR_PTR(-EBUSY);
2086 fence = __i915_vma_evict(vma, true);
2088 drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
2093 int i915_vma_unbind(struct i915_vma *vma)
2095 struct i915_address_space *vm = vma->vm;
2096 intel_wakeref_t wakeref = 0;
2099 assert_object_held_shared(vma->obj);
2101 /* Optimistic wait before taking the mutex */
2102 err = i915_vma_sync(vma);
2106 if (!drm_mm_node_allocated(&vma->node))
2109 if (i915_vma_is_pinned(vma)) {
2110 vma_print_allocator(vma, "is pinned");
2114 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
2115 /* XXX not always required: nop_clear_range */
2116 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
2118 err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref);
2122 err = __i915_vma_unbind(vma);
2123 mutex_unlock(&vm->mutex);
2127 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
2131 int i915_vma_unbind_async(struct i915_vma *vma, bool trylock_vm)
2133 struct drm_i915_gem_object *obj = vma->obj;
2134 struct i915_address_space *vm = vma->vm;
2135 intel_wakeref_t wakeref = 0;
2136 struct dma_fence *fence;
2140 * We need the dma-resv lock since we add the
2141 * unbind fence to the dma-resv object.
2143 assert_object_held(obj);
2145 if (!drm_mm_node_allocated(&vma->node))
2148 if (i915_vma_is_pinned(vma)) {
2149 vma_print_allocator(vma, "is pinned");
2156 err = dma_resv_reserve_fences(obj->base.resv, 2);
2161 * It would be great if we could grab this wakeref from the
2162 * async unbind work if needed, but we can't because it uses
2163 * kmalloc and it's in the dma-fence signalling critical path.
2165 if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
2166 wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
2168 if (trylock_vm && !mutex_trylock(&vm->mutex)) {
2171 } else if (!trylock_vm) {
2172 err = mutex_lock_interruptible_nested(&vm->mutex, !wakeref);
2177 fence = __i915_vma_unbind_async(vma);
2178 mutex_unlock(&vm->mutex);
2179 if (IS_ERR_OR_NULL(fence)) {
2180 err = PTR_ERR_OR_ZERO(fence);
2184 dma_resv_add_fence(obj->base.resv, fence, DMA_RESV_USAGE_READ);
2185 dma_fence_put(fence);
2189 intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
2193 int i915_vma_unbind_unlocked(struct i915_vma *vma)
2197 i915_gem_object_lock(vma->obj, NULL);
2198 err = i915_vma_unbind(vma);
2199 i915_gem_object_unlock(vma->obj);
2204 struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma)
2206 i915_gem_object_make_unshrinkable(vma->obj);
2210 void i915_vma_make_shrinkable(struct i915_vma *vma)
2212 i915_gem_object_make_shrinkable(vma->obj);
2215 void i915_vma_make_purgeable(struct i915_vma *vma)
2217 i915_gem_object_make_purgeable(vma->obj);
2220 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
2221 #include "selftests/i915_vma.c"
2224 void i915_vma_module_exit(void)
2226 kmem_cache_destroy(slab_vmas);
2229 int __init i915_vma_module_init(void)
2231 slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN);