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25 #ifndef I915_REQUEST_H
26 #define I915_REQUEST_H
28 #include <linux/dma-fence.h>
29 #include <linux/hrtimer.h>
30 #include <linux/irq_work.h>
31 #include <linux/llist.h>
32 #include <linux/lockdep.h>
34 #include "gem/i915_gem_context_types.h"
35 #include "gt/intel_context_types.h"
36 #include "gt/intel_engine_types.h"
37 #include "gt/intel_timeline_types.h"
40 #include "i915_scheduler.h"
41 #include "i915_selftest.h"
42 #include "i915_sw_fence.h"
43 #include "i915_vma_resource.h"
45 #include <uapi/drm/i915_drm.h>
48 struct drm_i915_gem_object;
53 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
54 struct i915_capture_list {
55 struct i915_vma_resource *vma_res;
56 struct i915_capture_list *next;
59 void i915_request_free_capture_list(struct i915_capture_list *capture);
61 #define i915_request_free_capture_list(_a) do {} while (0)
64 #define RQ_TRACE(rq, fmt, ...) do { \
65 const struct i915_request *rq__ = (rq); \
66 ENGINE_TRACE(rq__->engine, "fence %llx:%lld, current %d " fmt, \
67 rq__->fence.context, rq__->fence.seqno, \
68 hwsp_seqno(rq__), ##__VA_ARGS__); \
73 * I915_FENCE_FLAG_ACTIVE - this request is currently submitted to HW.
75 * Set by __i915_request_submit() on handing over to HW, and cleared
76 * by __i915_request_unsubmit() if we preempt this request.
78 * Finally cleared for consistency on retiring the request, when
79 * we know the HW is no longer running this request.
81 * See i915_request_is_active()
83 I915_FENCE_FLAG_ACTIVE = DMA_FENCE_FLAG_USER_BITS,
86 * I915_FENCE_FLAG_PQUEUE - this request is ready for execution
88 * Using the scheduler, when a request is ready for execution it is put
89 * into the priority queue, and removed from that queue when transferred
90 * to the HW runlists. We want to track its membership within the
91 * priority queue so that we can easily check before rescheduling.
93 * See i915_request_in_priority_queue()
95 I915_FENCE_FLAG_PQUEUE,
98 * I915_FENCE_FLAG_HOLD - this request is currently on hold
100 * This request has been suspended, pending an ongoing investigation.
102 I915_FENCE_FLAG_HOLD,
105 * I915_FENCE_FLAG_INITIAL_BREADCRUMB - this request has the initial
106 * breadcrumb that marks the end of semaphore waits and start of the
109 I915_FENCE_FLAG_INITIAL_BREADCRUMB,
112 * I915_FENCE_FLAG_SIGNAL - this request is currently on signal_list
114 * Internal bookkeeping used by the breadcrumb code to track when
115 * a request is on the various signal_list.
117 I915_FENCE_FLAG_SIGNAL,
120 * I915_FENCE_FLAG_NOPREEMPT - this request should not be preempted
122 * The execution of some requests should not be interrupted. This is
123 * a sensitive operation as it makes the request super important,
124 * blocking other higher priority work. Abuse of this flag will
125 * lead to quality of service issues.
127 I915_FENCE_FLAG_NOPREEMPT,
130 * I915_FENCE_FLAG_SENTINEL - this request should be last in the queue
132 * A high priority sentinel request may be submitted to clear the
133 * submission queue. As it will be the only request in-flight, upon
134 * execution all other active requests will have been preempted and
135 * unsubmitted. This preemptive pulse is used to re-evaluate the
136 * in-flight requests, particularly in cases where an active context
137 * is banned and those active requests need to be cancelled.
139 I915_FENCE_FLAG_SENTINEL,
142 * I915_FENCE_FLAG_BOOST - upclock the gpu for this request
144 * Some requests are more important than others! In particular, a
145 * request that the user is waiting on is typically required for
146 * interactive latency, for which we want to minimise by upclocking
147 * the GPU. Here we track such boost requests on a per-request basis.
149 I915_FENCE_FLAG_BOOST,
152 * I915_FENCE_FLAG_SUBMIT_PARALLEL - request with a context in a
153 * parent-child relationship (parallel submission, multi-lrc) should
154 * trigger a submission to the GuC rather than just moving the context
157 I915_FENCE_FLAG_SUBMIT_PARALLEL,
160 * I915_FENCE_FLAG_SKIP_PARALLEL - request with a context in a
161 * parent-child relationship (parallel submission, multi-lrc) that
162 * hit an error while generating requests in the execbuf IOCTL.
163 * Indicates this request should be skipped as another request in
164 * submission / relationship encoutered an error.
166 I915_FENCE_FLAG_SKIP_PARALLEL,
169 * I915_FENCE_FLAG_COMPOSITE - Indicates fence is part of a composite
170 * fence (dma_fence_array) and i915 generated for parallel submission.
172 I915_FENCE_FLAG_COMPOSITE,
176 * Request queue structure.
178 * The request queue allows us to note sequence numbers that have been emitted
179 * and may be associated with active buffers to be retired.
181 * By keeping this list, we can avoid having to do questionable sequence
182 * number comparisons on buffer last_read|write_seqno. It also allows an
183 * emission time to be associated with the request for tracking how far ahead
184 * of the GPU the submission is.
186 * When modifying this structure be very aware that we perform a lockless
187 * RCU lookup of it that may race against reallocation of the struct
188 * from the slab freelist. We intentionally do not zero the structure on
189 * allocation so that the lookup can use the dangling pointers (and is
190 * cogniscent that those pointers may be wrong). Instead, everything that
191 * needs to be initialised must be done so explicitly.
193 * The requests are reference counted.
195 struct i915_request {
196 struct dma_fence fence;
199 struct drm_i915_private *i915;
202 * Context and ring buffer related to this request
203 * Contexts are refcounted, so when this request is associated with a
204 * context, we must increment the context's refcount, to guarantee that
205 * it persists while any request is linked to it. Requests themselves
206 * are also refcounted, so the request will only be freed when the last
207 * reference to it is dismissed, and the code in
208 * i915_request_free() will then decrement the refcount on the
211 struct intel_engine_cs *engine;
212 struct intel_context *context;
213 struct intel_ring *ring;
214 struct intel_timeline __rcu *timeline;
216 struct list_head signal_link;
217 struct llist_node signal_node;
220 * The rcu epoch of when this request was allocated. Used to judiciously
221 * apply backpressure on future allocations to ensure that under
222 * mempressure there is sufficient RCU ticks for us to reclaim our
223 * RCU protected slabs.
225 unsigned long rcustate;
228 * We pin the timeline->mutex while constructing the request to
229 * ensure that no caller accidentally drops it during construction.
230 * The timeline->mutex must be held to ensure that only this caller
231 * can use the ring and manipulate the associated timeline during
234 struct pin_cookie cookie;
237 * Fences for the various phases in the request's lifetime.
239 * The submit fence is used to await upon all of the request's
240 * dependencies. When it is signaled, the request is ready to run.
241 * It is used by the driver to then queue the request for execution.
243 struct i915_sw_fence submit;
245 wait_queue_entry_t submitq;
246 struct i915_sw_dma_fence_cb dmaq;
247 struct i915_request_duration_cb {
248 struct dma_fence_cb cb;
252 struct llist_head execute_cb;
253 struct i915_sw_fence semaphore;
255 * @submit_work: complete submit fence from an IRQ if needed for
256 * locking hierarchy reasons.
258 struct irq_work submit_work;
261 * A list of everyone we wait upon, and everyone who waits upon us.
262 * Even though we will not be submitted to the hardware before the
263 * submit fence is signaled (it waits for all external events as well
264 * as our own requests), the scheduler still needs to know the
265 * dependency tree for the lifetime of the request (from execbuf
266 * to retirement), i.e. bidirectional dependency information for the
267 * request not tied to individual fences.
269 struct i915_sched_node sched;
270 struct i915_dependency dep;
271 intel_engine_mask_t execution_mask;
274 * A convenience pointer to the current breadcrumb value stored in
275 * the HW status page (or our timeline's local equivalent). The full
276 * path would be rq->hw_context->ring->timeline->hwsp_seqno.
278 const u32 *hwsp_seqno;
280 /** Position in the ring of the start of the request */
283 /** Position in the ring of the start of the user packets */
287 * Position in the ring of the start of the postfix.
288 * This is required to calculate the maximum available ring space
289 * without overwriting the postfix.
293 /** Position in the ring of the end of the whole request */
296 /** Position in the ring of the end of any workarounds after the tail */
299 /** Preallocate space in the ring for the emitting the request */
302 /** Batch buffer pointer for selftest internal use. */
303 I915_SELFTEST_DECLARE(struct i915_vma *batch);
305 struct i915_vma_resource *batch_res;
307 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
309 * Additional buffers requested by userspace to be captured upon
310 * a GPU hang. The vma/obj on this list are protected by their
311 * active reference - all objects on this list must also be
312 * on the active_list (of their final request).
314 struct i915_capture_list *capture_list;
317 /** Time at which this request was emitted, in jiffies. */
318 unsigned long emitted_jiffies;
320 /** timeline->request entry for this request */
321 struct list_head link;
323 /** Watchdog support fields. */
324 struct i915_request_watchdog {
325 struct llist_node link;
326 struct hrtimer timer;
330 * @guc_fence_link: Requests may need to be stalled when using GuC
331 * submission waiting for certain GuC operations to complete. If that is
332 * the case, stalled requests are added to a per context list of stalled
333 * requests. The below list_head is the link in that list. Protected by
334 * ce->guc_state.lock.
336 struct list_head guc_fence_link;
339 * @guc_prio: Priority level while the request is in flight. Differs
340 * from i915 scheduler priority. See comment above
341 * I915_SCHEDULER_CAP_STATIC_PRIORITY_MAP for details. Protected by
342 * ce->guc_active.lock. Two special values (GUC_PRIO_INIT and
343 * GUC_PRIO_FINI) outside the GuC priority range are used to indicate
344 * if the priority has not been initialized yet or if no more updates
345 * are possible because the request has completed.
347 #define GUC_PRIO_INIT 0xff
348 #define GUC_PRIO_FINI 0xfe
351 I915_SELFTEST_DECLARE(struct {
352 struct list_head link;
357 #define I915_FENCE_GFP (GFP_KERNEL | __GFP_RETRY_MAYFAIL | __GFP_NOWARN)
359 extern const struct dma_fence_ops i915_fence_ops;
361 static inline bool dma_fence_is_i915(const struct dma_fence *fence)
363 return fence->ops == &i915_fence_ops;
366 struct kmem_cache *i915_request_slab_cache(void);
368 struct i915_request * __must_check
369 __i915_request_create(struct intel_context *ce, gfp_t gfp);
370 struct i915_request * __must_check
371 i915_request_create(struct intel_context *ce);
373 void __i915_request_skip(struct i915_request *rq);
374 bool i915_request_set_error_once(struct i915_request *rq, int error);
375 struct i915_request *i915_request_mark_eio(struct i915_request *rq);
377 struct i915_request *__i915_request_commit(struct i915_request *request);
378 void __i915_request_queue(struct i915_request *rq,
379 const struct i915_sched_attr *attr);
380 void __i915_request_queue_bh(struct i915_request *rq);
382 bool i915_request_retire(struct i915_request *rq);
383 void i915_request_retire_upto(struct i915_request *rq);
385 static inline struct i915_request *
386 to_request(struct dma_fence *fence)
388 /* We assume that NULL fence/request are interoperable */
389 BUILD_BUG_ON(offsetof(struct i915_request, fence) != 0);
390 GEM_BUG_ON(fence && !dma_fence_is_i915(fence));
391 return container_of(fence, struct i915_request, fence);
394 static inline struct i915_request *
395 i915_request_get(struct i915_request *rq)
397 return to_request(dma_fence_get(&rq->fence));
400 static inline struct i915_request *
401 i915_request_get_rcu(struct i915_request *rq)
403 return to_request(dma_fence_get_rcu(&rq->fence));
407 i915_request_put(struct i915_request *rq)
409 dma_fence_put(&rq->fence);
412 int i915_request_await_object(struct i915_request *to,
413 struct drm_i915_gem_object *obj,
415 int i915_request_await_dma_fence(struct i915_request *rq,
416 struct dma_fence *fence);
417 int i915_request_await_deps(struct i915_request *rq, const struct i915_deps *deps);
418 int i915_request_await_execution(struct i915_request *rq,
419 struct dma_fence *fence);
421 void i915_request_add(struct i915_request *rq);
423 bool __i915_request_submit(struct i915_request *request);
424 void i915_request_submit(struct i915_request *request);
426 void __i915_request_unsubmit(struct i915_request *request);
427 void i915_request_unsubmit(struct i915_request *request);
429 void i915_request_cancel(struct i915_request *rq, int error);
431 long i915_request_wait_timeout(struct i915_request *rq,
434 __attribute__((nonnull(1)));
436 long i915_request_wait(struct i915_request *rq,
439 __attribute__((nonnull(1)));
440 #define I915_WAIT_INTERRUPTIBLE BIT(0)
441 #define I915_WAIT_PRIORITY BIT(1) /* small priority bump for the request */
442 #define I915_WAIT_ALL BIT(2) /* used by i915_gem_object_wait() */
444 void i915_request_show(struct drm_printer *m,
445 const struct i915_request *rq,
449 static inline bool i915_request_signaled(const struct i915_request *rq)
451 /* The request may live longer than its HWSP, so check flags first! */
452 return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &rq->fence.flags);
455 static inline bool i915_request_is_active(const struct i915_request *rq)
457 return test_bit(I915_FENCE_FLAG_ACTIVE, &rq->fence.flags);
460 static inline bool i915_request_in_priority_queue(const struct i915_request *rq)
462 return test_bit(I915_FENCE_FLAG_PQUEUE, &rq->fence.flags);
466 i915_request_has_initial_breadcrumb(const struct i915_request *rq)
468 return test_bit(I915_FENCE_FLAG_INITIAL_BREADCRUMB, &rq->fence.flags);
472 * Returns true if seq1 is later than seq2.
474 static inline bool i915_seqno_passed(u32 seq1, u32 seq2)
476 return (s32)(seq1 - seq2) >= 0;
479 static inline u32 __hwsp_seqno(const struct i915_request *rq)
481 const u32 *hwsp = READ_ONCE(rq->hwsp_seqno);
483 return READ_ONCE(*hwsp);
487 * hwsp_seqno - the current breadcrumb value in the HW status page
488 * @rq: the request, to chase the relevant HW status page
490 * The emphasis in naming here is that hwsp_seqno() is not a property of the
491 * request, but an indication of the current HW state (associated with this
492 * request). Its value will change as the GPU executes more requests.
494 * Returns the current breadcrumb value in the associated HW status page (or
495 * the local timeline's equivalent) for this request. The request itself
496 * has the associated breadcrumb value of rq->fence.seqno, when the HW
497 * status page has that breadcrumb or later, this request is complete.
499 static inline u32 hwsp_seqno(const struct i915_request *rq)
503 rcu_read_lock(); /* the HWSP may be freed at runtime */
504 seqno = __hwsp_seqno(rq);
510 static inline bool __i915_request_has_started(const struct i915_request *rq)
512 return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno - 1);
516 * i915_request_started - check if the request has begun being executed
519 * If the timeline is not using initial breadcrumbs, a request is
520 * considered started if the previous request on its timeline (i.e.
521 * context) has been signaled.
523 * If the timeline is using semaphores, it will also be emitting an
524 * "initial breadcrumb" after the semaphores are complete and just before
525 * it began executing the user payload. A request can therefore be active
526 * on the HW and not yet started as it is still busywaiting on its
527 * dependencies (via HW semaphores).
529 * If the request has started, its dependencies will have been signaled
530 * (either by fences or by semaphores) and it will have begun processing
533 * However, even if a request has started, it may have been preempted and
534 * so no longer active, or it may have already completed.
536 * See also i915_request_is_active().
538 * Returns true if the request has begun executing the user payload, or
541 static inline bool i915_request_started(const struct i915_request *rq)
545 if (i915_request_signaled(rq))
549 rcu_read_lock(); /* the HWSP may be freed at runtime */
550 if (likely(!i915_request_signaled(rq)))
551 /* Remember: started but may have since been preempted! */
552 result = __i915_request_has_started(rq);
559 * i915_request_is_running - check if the request may actually be executing
562 * Returns true if the request is currently submitted to hardware, has passed
563 * its start point (i.e. the context is setup and not busywaiting). Note that
564 * it may no longer be running by the time the function returns!
566 static inline bool i915_request_is_running(const struct i915_request *rq)
570 if (!i915_request_is_active(rq))
574 result = __i915_request_has_started(rq) && i915_request_is_active(rq);
581 * i915_request_is_ready - check if the request is ready for execution
584 * Upon construction, the request is instructed to wait upon various
585 * signals before it is ready to be executed by the HW. That is, we do
586 * not want to start execution and read data before it is written. In practice,
587 * this is controlled with a mixture of interrupts and semaphores. Once
588 * the submit fence is completed, the backend scheduler will place the
589 * request into its queue and from there submit it for execution. So we
590 * can detect when a request is eligible for execution (and is under control
591 * of the scheduler) by querying where it is in any of the scheduler's lists.
593 * Returns true if the request is ready for execution (it may be inflight),
596 static inline bool i915_request_is_ready(const struct i915_request *rq)
598 return !list_empty(&rq->sched.link);
601 static inline bool __i915_request_is_complete(const struct i915_request *rq)
603 return i915_seqno_passed(__hwsp_seqno(rq), rq->fence.seqno);
606 static inline bool i915_request_completed(const struct i915_request *rq)
610 if (i915_request_signaled(rq))
614 rcu_read_lock(); /* the HWSP may be freed at runtime */
615 if (likely(!i915_request_signaled(rq)))
616 result = __i915_request_is_complete(rq);
622 static inline void i915_request_mark_complete(struct i915_request *rq)
624 WRITE_ONCE(rq->hwsp_seqno, /* decouple from HWSP */
625 (u32 *)&rq->fence.seqno);
628 static inline bool i915_request_has_waitboost(const struct i915_request *rq)
630 return test_bit(I915_FENCE_FLAG_BOOST, &rq->fence.flags);
633 static inline bool i915_request_has_nopreempt(const struct i915_request *rq)
635 /* Preemption should only be disabled very rarely */
636 return unlikely(test_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags));
639 static inline bool i915_request_has_sentinel(const struct i915_request *rq)
641 return unlikely(test_bit(I915_FENCE_FLAG_SENTINEL, &rq->fence.flags));
644 static inline bool i915_request_on_hold(const struct i915_request *rq)
646 return unlikely(test_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags));
649 static inline void i915_request_set_hold(struct i915_request *rq)
651 set_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
654 static inline void i915_request_clear_hold(struct i915_request *rq)
656 clear_bit(I915_FENCE_FLAG_HOLD, &rq->fence.flags);
659 static inline struct intel_timeline *
660 i915_request_timeline(const struct i915_request *rq)
662 /* Valid only while the request is being constructed (or retired). */
663 return rcu_dereference_protected(rq->timeline,
664 lockdep_is_held(&rcu_access_pointer(rq->timeline)->mutex) ||
665 test_bit(CONTEXT_IS_PARKING, &rq->context->flags));
668 static inline struct i915_gem_context *
669 i915_request_gem_context(const struct i915_request *rq)
671 /* Valid only while the request is being constructed (or retired). */
672 return rcu_dereference_protected(rq->context->gem_context, true);
675 static inline struct intel_timeline *
676 i915_request_active_timeline(const struct i915_request *rq)
679 * When in use during submission, we are protected by a guarantee that
680 * the context/timeline is pinned and must remain pinned until after
683 return rcu_dereference_protected(rq->timeline,
684 lockdep_is_held(&rq->engine->sched_engine->lock));
688 i915_request_active_seqno(const struct i915_request *rq)
691 page_mask_bits(i915_request_active_timeline(rq)->hwsp_offset);
692 u32 hwsp_relative_offset = offset_in_page(rq->hwsp_seqno);
695 * Because of wraparound, we cannot simply take tl->hwsp_offset,
696 * but instead use the fact that the relative for vaddr is the
697 * offset as for hwsp_offset. Take the top bits from tl->hwsp_offset
698 * and combine them with the relative offset in rq->hwsp_seqno.
700 * As rw->hwsp_seqno is rewritten when signaled, this only works
701 * when the request isn't signaled yet, but at that point you
702 * no longer need the offset.
705 return hwsp_phys_base + hwsp_relative_offset;
709 i915_request_active_engine(struct i915_request *rq,
710 struct intel_engine_cs **active);
712 void i915_request_notify_execute_cb_imm(struct i915_request *rq);
714 enum i915_request_state {
715 I915_REQUEST_UNKNOWN = 0,
716 I915_REQUEST_COMPLETE,
717 I915_REQUEST_PENDING,
722 enum i915_request_state i915_test_request_state(struct i915_request *rq);
724 void i915_request_module_exit(void);
725 int i915_request_module_init(void);
727 #endif /* I915_REQUEST_H */