1 /* i915_drv.c -- i830,i845,i855,i865,i915 driver -*- linux-c -*-
5 * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the
10 * "Software"), to deal in the Software without restriction, including
11 * without limitation the rights to use, copy, modify, merge, publish,
12 * distribute, sub license, and/or sell copies of the Software, and to
13 * permit persons to whom the Software is furnished to do so, subject to
14 * the following conditions:
16 * The above copyright notice and this permission notice (including the
17 * next paragraph) shall be included in all copies or substantial portions
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
21 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
23 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
24 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
25 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
26 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
30 #include <linux/device.h>
36 #include <linux/console.h>
37 #include "drm_crtc_helper.h"
39 static int i915_modeset = -1;
40 module_param_named(modeset, i915_modeset, int, 0400);
42 unsigned int i915_fbpercrtc = 0;
43 module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400);
45 unsigned int i915_powersave = 1;
46 module_param_named(powersave, i915_powersave, int, 0400);
48 unsigned int i915_lvds_downclock = 0;
49 module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400);
51 static struct drm_driver driver;
52 extern int intel_agp_enabled;
54 #define INTEL_VGA_DEVICE(id, info) { \
55 .class = PCI_CLASS_DISPLAY_VGA << 8, \
56 .class_mask = 0xffff00, \
59 .subvendor = PCI_ANY_ID, \
60 .subdevice = PCI_ANY_ID, \
61 .driver_data = (unsigned long) info }
63 const static struct intel_device_info intel_i830_info = {
64 .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
67 const static struct intel_device_info intel_845g_info = {
71 const static struct intel_device_info intel_i85x_info = {
72 .is_i8xx = 1, .is_i85x = 1, .is_mobile = 1,
73 .cursor_needs_physical = 1,
76 const static struct intel_device_info intel_i865g_info = {
80 const static struct intel_device_info intel_i915g_info = {
81 .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
83 const static struct intel_device_info intel_i915gm_info = {
84 .is_i9xx = 1, .is_mobile = 1,
85 .cursor_needs_physical = 1,
87 const static struct intel_device_info intel_i945g_info = {
88 .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
90 const static struct intel_device_info intel_i945gm_info = {
91 .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1,
92 .has_hotplug = 1, .cursor_needs_physical = 1,
95 const static struct intel_device_info intel_i965g_info = {
96 .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
99 const static struct intel_device_info intel_i965gm_info = {
100 .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
101 .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
105 const static struct intel_device_info intel_g33_info = {
106 .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
110 const static struct intel_device_info intel_g45_info = {
111 .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
116 const static struct intel_device_info intel_gm45_info = {
117 .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
118 .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
123 const static struct intel_device_info intel_pineview_info = {
124 .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
129 const static struct intel_device_info intel_ironlake_d_info = {
130 .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
135 const static struct intel_device_info intel_ironlake_m_info = {
136 .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
137 .need_gfx_hws = 1, .has_rc6 = 1,
141 const static struct intel_device_info intel_sandybridge_d_info = {
142 .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
143 .has_hotplug = 1, .is_gen6 = 1,
146 const static struct intel_device_info intel_sandybridge_m_info = {
147 .is_i965g = 1, .is_mobile = 1, .is_i9xx = 1, .need_gfx_hws = 1,
148 .has_hotplug = 1, .is_gen6 = 1,
151 const static struct pci_device_id pciidlist[] = {
152 INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
153 INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
154 INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
155 INTEL_VGA_DEVICE(0x358e, &intel_i85x_info),
156 INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
157 INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
158 INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
159 INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
160 INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
161 INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
162 INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
163 INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
164 INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
165 INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
166 INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
167 INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
168 INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
169 INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
170 INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
171 INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
172 INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
173 INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
174 INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
175 INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
176 INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
177 INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
178 INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
179 INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
180 INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
181 INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
182 INTEL_VGA_DEVICE(0x0102, &intel_sandybridge_d_info),
183 INTEL_VGA_DEVICE(0x0106, &intel_sandybridge_m_info),
187 #if defined(CONFIG_DRM_I915_KMS)
188 MODULE_DEVICE_TABLE(pci, pciidlist);
191 #define INTEL_PCH_DEVICE_ID_MASK 0xff00
192 #define INTEL_PCH_CPT_DEVICE_ID_TYPE 0x1c00
194 void intel_detect_pch (struct drm_device *dev)
196 struct drm_i915_private *dev_priv = dev->dev_private;
200 * The reason to probe ISA bridge instead of Dev31:Fun0 is to
201 * make graphics device passthrough work easy for VMM, that only
202 * need to expose ISA bridge to let driver know the real hardware
203 * underneath. This is a requirement from virtualization team.
205 pch = pci_get_class(PCI_CLASS_BRIDGE_ISA << 8, NULL);
207 if (pch->vendor == PCI_VENDOR_ID_INTEL) {
209 id = pch->device & INTEL_PCH_DEVICE_ID_MASK;
211 if (id == INTEL_PCH_CPT_DEVICE_ID_TYPE) {
212 dev_priv->pch_type = PCH_CPT;
213 DRM_DEBUG_KMS("Found CougarPoint PCH\n");
220 static int i915_drm_freeze(struct drm_device *dev)
222 struct drm_i915_private *dev_priv = dev->dev_private;
224 pci_save_state(dev->pdev);
226 /* If KMS is active, we do the leavevt stuff here */
227 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
228 int error = i915_gem_idle(dev);
230 dev_err(&dev->pdev->dev,
231 "GEM idle failed, resume might fail\n");
234 drm_irq_uninstall(dev);
237 i915_save_state(dev);
239 intel_opregion_free(dev, 1);
241 /* Modeset on resume, not lid events */
242 dev_priv->modeset_on_lid = 0;
247 int i915_suspend(struct drm_device *dev, pm_message_t state)
251 if (!dev || !dev->dev_private) {
252 DRM_ERROR("dev: %p\n", dev);
253 DRM_ERROR("DRM not initialized, aborting suspend.\n");
257 if (state.event == PM_EVENT_PRETHAW)
260 error = i915_drm_freeze(dev);
264 if (state.event == PM_EVENT_SUSPEND) {
265 /* Shut down the device */
266 pci_disable_device(dev->pdev);
267 pci_set_power_state(dev->pdev, PCI_D3hot);
273 static int i915_drm_thaw(struct drm_device *dev)
275 struct drm_i915_private *dev_priv = dev->dev_private;
278 i915_restore_state(dev);
280 intel_opregion_init(dev, 1);
282 /* KMS EnterVT equivalent */
283 if (drm_core_check_feature(dev, DRIVER_MODESET)) {
284 mutex_lock(&dev->struct_mutex);
285 dev_priv->mm.suspended = 0;
287 error = i915_gem_init_ringbuffer(dev);
288 mutex_unlock(&dev->struct_mutex);
290 drm_irq_install(dev);
292 /* Resume the modeset for every activated CRTC */
293 drm_helper_resume_force_mode(dev);
296 dev_priv->modeset_on_lid = 0;
301 int i915_resume(struct drm_device *dev)
303 if (pci_enable_device(dev->pdev))
306 pci_set_master(dev->pdev);
308 return i915_drm_thaw(dev);
312 * i965_reset - reset chip after a hang
313 * @dev: drm device to reset
314 * @flags: reset domains
316 * Reset the chip. Useful if a hang is detected. Returns zero on successful
317 * reset or otherwise an error code.
319 * Procedure is fairly simple:
320 * - reset the chip using the reset reg
321 * - re-init context state
322 * - re-init hardware status page
323 * - re-init ring buffer
324 * - re-init interrupt state
327 int i965_reset(struct drm_device *dev, u8 flags)
329 drm_i915_private_t *dev_priv = dev->dev_private;
330 unsigned long timeout;
333 * We really should only reset the display subsystem if we actually
336 bool need_display = true;
338 mutex_lock(&dev->struct_mutex);
343 i915_gem_retire_requests(dev);
346 i915_save_display(dev);
348 if (IS_I965G(dev) || IS_G4X(dev)) {
350 * Set the domains we want to reset, then the reset bit (bit 0).
351 * Clear the reset bit after a while and wait for hardware status
352 * bit (bit 1) to be set
354 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
355 pci_write_config_byte(dev->pdev, GDRST, gdrst | flags | ((flags == GDRST_FULL) ? 0x1 : 0x0));
357 pci_write_config_byte(dev->pdev, GDRST, gdrst & 0xfe);
359 /* ...we don't want to loop forever though, 500ms should be plenty */
360 timeout = jiffies + msecs_to_jiffies(500);
363 pci_read_config_byte(dev->pdev, GDRST, &gdrst);
364 } while ((gdrst & 0x1) && time_after(timeout, jiffies));
367 WARN(true, "i915: Failed to reset chip\n");
368 mutex_unlock(&dev->struct_mutex);
372 DRM_ERROR("Error occurred. Don't know how to reset this chip.\n");
376 /* Ok, now get things going again... */
379 * Everything depends on having the GTT running, so we need to start
380 * there. Fortunately we don't need to do this unless we reset the
381 * chip at a PCI level.
383 * Next we need to restore the context, but we don't use those
386 * Ring buffer needs to be re-initialized in the KMS case, or if X
387 * was running at the time of the reset (i.e. we weren't VT
390 if (drm_core_check_feature(dev, DRIVER_MODESET) ||
391 !dev_priv->mm.suspended) {
392 drm_i915_ring_buffer_t *ring = &dev_priv->ring;
393 struct drm_gem_object *obj = ring->ring_obj;
394 struct drm_i915_gem_object *obj_priv = to_intel_bo(obj);
395 dev_priv->mm.suspended = 0;
397 /* Stop the ring if it's running. */
398 I915_WRITE(PRB0_CTL, 0);
399 I915_WRITE(PRB0_TAIL, 0);
400 I915_WRITE(PRB0_HEAD, 0);
402 /* Initialize the ring. */
403 I915_WRITE(PRB0_START, obj_priv->gtt_offset);
405 ((obj->size - 4096) & RING_NR_PAGES) |
408 if (!drm_core_check_feature(dev, DRIVER_MODESET))
409 i915_kernel_lost_context(dev);
411 ring->head = I915_READ(PRB0_HEAD) & HEAD_ADDR;
412 ring->tail = I915_READ(PRB0_TAIL) & TAIL_ADDR;
413 ring->space = ring->head - (ring->tail + 8);
415 ring->space += ring->Size;
418 mutex_unlock(&dev->struct_mutex);
419 drm_irq_uninstall(dev);
420 drm_irq_install(dev);
421 mutex_lock(&dev->struct_mutex);
425 * Display needs restore too...
428 i915_restore_display(dev);
430 mutex_unlock(&dev->struct_mutex);
436 i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
438 return drm_get_dev(pdev, ent, &driver);
442 i915_pci_remove(struct pci_dev *pdev)
444 struct drm_device *dev = pci_get_drvdata(pdev);
449 static int i915_pm_suspend(struct device *dev)
451 struct pci_dev *pdev = to_pci_dev(dev);
452 struct drm_device *drm_dev = pci_get_drvdata(pdev);
455 if (!drm_dev || !drm_dev->dev_private) {
456 dev_err(dev, "DRM not initialized, aborting suspend.\n");
460 error = i915_drm_freeze(drm_dev);
464 pci_disable_device(pdev);
465 pci_set_power_state(pdev, PCI_D3hot);
470 static int i915_pm_resume(struct device *dev)
472 struct pci_dev *pdev = to_pci_dev(dev);
473 struct drm_device *drm_dev = pci_get_drvdata(pdev);
475 return i915_resume(drm_dev);
478 static int i915_pm_freeze(struct device *dev)
480 struct pci_dev *pdev = to_pci_dev(dev);
481 struct drm_device *drm_dev = pci_get_drvdata(pdev);
483 if (!drm_dev || !drm_dev->dev_private) {
484 dev_err(dev, "DRM not initialized, aborting suspend.\n");
488 return i915_drm_freeze(drm_dev);
491 static int i915_pm_thaw(struct device *dev)
493 struct pci_dev *pdev = to_pci_dev(dev);
494 struct drm_device *drm_dev = pci_get_drvdata(pdev);
496 return i915_drm_thaw(drm_dev);
499 static int i915_pm_poweroff(struct device *dev)
501 struct pci_dev *pdev = to_pci_dev(dev);
502 struct drm_device *drm_dev = pci_get_drvdata(pdev);
504 return i915_drm_freeze(drm_dev);
507 const struct dev_pm_ops i915_pm_ops = {
508 .suspend = i915_pm_suspend,
509 .resume = i915_pm_resume,
510 .freeze = i915_pm_freeze,
511 .thaw = i915_pm_thaw,
512 .poweroff = i915_pm_poweroff,
513 .restore = i915_pm_resume,
516 static struct vm_operations_struct i915_gem_vm_ops = {
517 .fault = i915_gem_fault,
518 .open = drm_gem_vm_open,
519 .close = drm_gem_vm_close,
522 static struct drm_driver driver = {
523 /* don't use mtrr's here, the Xserver or user space app should
524 * deal with them for intel hardware.
527 DRIVER_USE_AGP | DRIVER_REQUIRE_AGP | /* DRIVER_USE_MTRR |*/
528 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
529 .load = i915_driver_load,
530 .unload = i915_driver_unload,
531 .open = i915_driver_open,
532 .lastclose = i915_driver_lastclose,
533 .preclose = i915_driver_preclose,
534 .postclose = i915_driver_postclose,
536 /* Used in place of i915_pm_ops for non-DRIVER_MODESET */
537 .suspend = i915_suspend,
538 .resume = i915_resume,
540 .device_is_agp = i915_driver_device_is_agp,
541 .enable_vblank = i915_enable_vblank,
542 .disable_vblank = i915_disable_vblank,
543 .irq_preinstall = i915_driver_irq_preinstall,
544 .irq_postinstall = i915_driver_irq_postinstall,
545 .irq_uninstall = i915_driver_irq_uninstall,
546 .irq_handler = i915_driver_irq_handler,
547 .reclaim_buffers = drm_core_reclaim_buffers,
548 .get_map_ofs = drm_core_get_map_ofs,
549 .get_reg_ofs = drm_core_get_reg_ofs,
550 .master_create = i915_master_create,
551 .master_destroy = i915_master_destroy,
552 #if defined(CONFIG_DEBUG_FS)
553 .debugfs_init = i915_debugfs_init,
554 .debugfs_cleanup = i915_debugfs_cleanup,
556 .gem_init_object = i915_gem_init_object,
557 .gem_free_object = i915_gem_free_object,
558 .gem_vm_ops = &i915_gem_vm_ops,
559 .ioctls = i915_ioctls,
561 .owner = THIS_MODULE,
563 .release = drm_release,
564 .unlocked_ioctl = drm_ioctl,
565 .mmap = drm_gem_mmap,
567 .fasync = drm_fasync,
570 .compat_ioctl = i915_compat_ioctl,
576 .id_table = pciidlist,
577 .probe = i915_pci_probe,
578 .remove = i915_pci_remove,
579 .driver.pm = &i915_pm_ops,
585 .major = DRIVER_MAJOR,
586 .minor = DRIVER_MINOR,
587 .patchlevel = DRIVER_PATCHLEVEL,
590 static int __init i915_init(void)
592 if (!intel_agp_enabled) {
593 DRM_ERROR("drm/i915 can't work without intel_agp module!\n");
597 driver.num_ioctls = i915_max_ioctl;
599 i915_gem_shrinker_init();
602 * If CONFIG_DRM_I915_KMS is set, default to KMS unless
603 * explicitly disabled with the module pararmeter.
605 * Otherwise, just follow the parameter (defaulting to off).
607 * Allow optional vga_text_mode_force boot option to override
608 * the default behavior.
610 #if defined(CONFIG_DRM_I915_KMS)
611 if (i915_modeset != 0)
612 driver.driver_features |= DRIVER_MODESET;
614 if (i915_modeset == 1)
615 driver.driver_features |= DRIVER_MODESET;
617 #ifdef CONFIG_VGA_CONSOLE
618 if (vgacon_text_force() && i915_modeset == -1)
619 driver.driver_features &= ~DRIVER_MODESET;
622 if (!(driver.driver_features & DRIVER_MODESET)) {
623 driver.suspend = i915_suspend;
624 driver.resume = i915_resume;
627 return drm_init(&driver);
630 static void __exit i915_exit(void)
632 i915_gem_shrinker_exit();
636 module_init(i915_init);
637 module_exit(i915_exit);
639 MODULE_AUTHOR(DRIVER_AUTHOR);
640 MODULE_DESCRIPTION(DRIVER_DESC);
641 MODULE_LICENSE("GPL and additional rights");