drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "intel_drv.h"
  36 #include "intel_ringbuffer.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39
  40 #define DRM_I915_RING_DEBUG 1
  41
  42
  43 #if defined(CONFIG_DEBUG_FS)
  44
  45 enum {
  46         ACTIVE_LIST,
  47         FLUSHING_LIST,
  48         INACTIVE_LIST,
  49         PINNED_LIST,
  50 };
  51
  52 static const char *yesno(int v)
  53 {
  54         return v ? "yes" : "no";
  55 }
  56
  57 static int i915_capabilities(struct seq_file *m, void *data)
  58 {
  59         struct drm_info_node *node = (struct drm_info_node *) m->private;
  60         struct drm_device *dev = node->minor->dev;
  61         const struct intel_device_info *info = INTEL_INFO(dev);
  62
  63         seq_printf(m, "gen: %d\n", info->gen);
  64         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  65 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  66         B(is_mobile);
  67         B(is_i85x);
  68         B(is_i915g);
  69         B(is_i945gm);
  70         B(is_g33);
  71         B(need_gfx_hws);
  72         B(is_g4x);
  73         B(is_pineview);
  74         B(is_broadwater);
  75         B(is_crestline);
  76         B(has_fbc);
  77         B(has_pipe_cxsr);
  78         B(has_hotplug);
  79         B(cursor_needs_physical);
  80         B(has_overlay);
  81         B(overlay_needs_physical);
  82         B(supports_tv);
  83         B(has_bsd_ring);
  84         B(has_blt_ring);
  85         B(has_llc);
  86 #undef B
  87
  88         return 0;
  89 }
  90
  91 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  92 {
  93         if (obj->user_pin_count > 0)
  94                 return "P";
  95         else if (obj->pin_count > 0)
  96                 return "p";
  97         else
  98                 return " ";
  99 }
 100
 101 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
 102 {
 103         switch (obj->tiling_mode) {
 104         default:
 105         case I915_TILING_NONE: return " ";
 106         case I915_TILING_X: return "X";
 107         case I915_TILING_Y: return "Y";
 108         }
 109 }
 110
 111 static const char *cache_level_str(int type)
 112 {
 113         switch (type) {
 114         case I915_CACHE_NONE: return " uncached";
 115         case I915_CACHE_LLC: return " snooped (LLC)";
 116         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
 117         default: return "";
 118         }
 119 }
 120
 121 static void
 122 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 123 {
 124         seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d%s%s%s",
 125                    &obj->base,
 126                    get_pin_flag(obj),
 127                    get_tiling_flag(obj),
 128                    obj->base.size / 1024,
 129                    obj->base.read_domains,
 130                    obj->base.write_domain,
 131                    obj->last_rendering_seqno,
 132                    obj->last_fenced_seqno,
 133                    cache_level_str(obj->cache_level),
 134                    obj->dirty ? " dirty" : "",
 135                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 136         if (obj->base.name)
 137                 seq_printf(m, " (name: %d)", obj->base.name);
 138         if (obj->fence_reg != I915_FENCE_REG_NONE)
 139                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 140         if (obj->gtt_space != NULL)
 141                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 142                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 143         if (obj->pin_mappable || obj->fault_mappable) {
 144                 char s[3], *t = s;
 145                 if (obj->pin_mappable)
 146                         *t++ = 'p';
 147                 if (obj->fault_mappable)
 148                         *t++ = 'f';
 149                 *t = '\0';
 150                 seq_printf(m, " (%s mappable)", s);
 151         }
 152         if (obj->ring != NULL)
 153                 seq_printf(m, " (%s)", obj->ring->name);
 154 }
 155
 156 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 157 {
 158         struct drm_info_node *node = (struct drm_info_node *) m->private;
 159         uintptr_t list = (uintptr_t) node->info_ent->data;
 160         struct list_head *head;
 161         struct drm_device *dev = node->minor->dev;
 162         drm_i915_private_t *dev_priv = dev->dev_private;
 163         struct drm_i915_gem_object *obj;
 164         size_t total_obj_size, total_gtt_size;
 165         int count, ret;
 166
 167         ret = mutex_lock_interruptible(&dev->struct_mutex);
 168         if (ret)
 169                 return ret;
 170
 171         switch (list) {
 172         case ACTIVE_LIST:
 173                 seq_printf(m, "Active:\n");
 174                 head = &dev_priv->mm.active_list;
 175                 break;
 176         case INACTIVE_LIST:
 177                 seq_printf(m, "Inactive:\n");
 178                 head = &dev_priv->mm.inactive_list;
 179                 break;
 180         case FLUSHING_LIST:
 181                 seq_printf(m, "Flushing:\n");
 182                 head = &dev_priv->mm.flushing_list;
 183                 break;
 184         default:
 185                 mutex_unlock(&dev->struct_mutex);
 186                 return -EINVAL;
 187         }
 188
 189         total_obj_size = total_gtt_size = count = 0;
 190         list_for_each_entry(obj, head, mm_list) {
 191                 seq_printf(m, "   ");
 192                 describe_obj(m, obj);
 193                 seq_printf(m, "\n");
 194                 total_obj_size += obj->base.size;
 195                 total_gtt_size += obj->gtt_space->size;
 196                 count++;
 197         }
 198         mutex_unlock(&dev->struct_mutex);
 199
 200         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 201                    count, total_obj_size, total_gtt_size);
 202         return 0;
 203 }
 204
 205 #define count_objects(list, member) do { \
 206         list_for_each_entry(obj, list, member) { \
 207                 size += obj->gtt_space->size; \
 208                 ++count; \
 209                 if (obj->map_and_fenceable) { \
 210                         mappable_size += obj->gtt_space->size; \
 211                         ++mappable_count; \
 212                 } \
 213         } \
 214 } while (0)
 215
 216 static int i915_gem_object_info(struct seq_file *m, void* data)
 217 {
 218         struct drm_info_node *node = (struct drm_info_node *) m->private;
 219         struct drm_device *dev = node->minor->dev;
 220         struct drm_i915_private *dev_priv = dev->dev_private;
 221         u32 count, mappable_count;
 222         size_t size, mappable_size;
 223         struct drm_i915_gem_object *obj;
 224         int ret;
 225
 226         ret = mutex_lock_interruptible(&dev->struct_mutex);
 227         if (ret)
 228                 return ret;
 229
 230         seq_printf(m, "%u objects, %zu bytes\n",
 231                    dev_priv->mm.object_count,
 232                    dev_priv->mm.object_memory);
 233
 234         size = count = mappable_size = mappable_count = 0;
 235         count_objects(&dev_priv->mm.gtt_list, gtt_list);
 236         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 237                    count, mappable_count, size, mappable_size);
 238
 239         size = count = mappable_size = mappable_count = 0;
 240         count_objects(&dev_priv->mm.active_list, mm_list);
 241         count_objects(&dev_priv->mm.flushing_list, mm_list);
 242         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 243                    count, mappable_count, size, mappable_size);
 244
 245         size = count = mappable_size = mappable_count = 0;
 246         count_objects(&dev_priv->mm.inactive_list, mm_list);
 247         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 248                    count, mappable_count, size, mappable_size);
 249
 250         size = count = mappable_size = mappable_count = 0;
 251         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 252                 if (obj->fault_mappable) {
 253                         size += obj->gtt_space->size;
 254                         ++count;
 255                 }
 256                 if (obj->pin_mappable) {
 257                         mappable_size += obj->gtt_space->size;
 258                         ++mappable_count;
 259                 }
 260         }
 261         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 262                    mappable_count, mappable_size);
 263         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 264                    count, size);
 265
 266         seq_printf(m, "%zu [%zu] gtt total\n",
 267                    dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
 268
 269         mutex_unlock(&dev->struct_mutex);
 270
 271         return 0;
 272 }
 273
 274 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 275 {
 276         struct drm_info_node *node = (struct drm_info_node *) m->private;
 277         struct drm_device *dev = node->minor->dev;
 278         uintptr_t list = (uintptr_t) node->info_ent->data;
 279         struct drm_i915_private *dev_priv = dev->dev_private;
 280         struct drm_i915_gem_object *obj;
 281         size_t total_obj_size, total_gtt_size;
 282         int count, ret;
 283
 284         ret = mutex_lock_interruptible(&dev->struct_mutex);
 285         if (ret)
 286                 return ret;
 287
 288         total_obj_size = total_gtt_size = count = 0;
 289         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 290                 if (list == PINNED_LIST && obj->pin_count == 0)
 291                         continue;
 292
 293                 seq_printf(m, "   ");
 294                 describe_obj(m, obj);
 295                 seq_printf(m, "\n");
 296                 total_obj_size += obj->base.size;
 297                 total_gtt_size += obj->gtt_space->size;
 298                 count++;
 299         }
 300
 301         mutex_unlock(&dev->struct_mutex);
 302
 303         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 304                    count, total_obj_size, total_gtt_size);
 305
 306         return 0;
 307 }
 308
 309 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 310 {
 311         struct drm_info_node *node = (struct drm_info_node *) m->private;
 312         struct drm_device *dev = node->minor->dev;
 313         unsigned long flags;
 314         struct intel_crtc *crtc;
 315
 316         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 317                 const char pipe = pipe_name(crtc->pipe);
 318                 const char plane = plane_name(crtc->plane);
 319                 struct intel_unpin_work *work;
 320
 321                 spin_lock_irqsave(&dev->event_lock, flags);
 322                 work = crtc->unpin_work;
 323                 if (work == NULL) {
 324                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 325                                    pipe, plane);
 326                 } else {
 327                         if (!work->pending) {
 328                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 329                                            pipe, plane);
 330                         } else {
 331                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 332                                            pipe, plane);
 333                         }
 334                         if (work->enable_stall_check)
 335                                 seq_printf(m, "Stall check enabled, ");
 336                         else
 337                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 338                         seq_printf(m, "%d prepares\n", work->pending);
 339
 340                         if (work->old_fb_obj) {
 341                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 342                                 if (obj)
 343                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 344                         }
 345                         if (work->pending_flip_obj) {
 346                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 347                                 if (obj)
 348                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 349                         }
 350                 }
 351                 spin_unlock_irqrestore(&dev->event_lock, flags);
 352         }
 353
 354         return 0;
 355 }
 356
 357 static int i915_gem_request_info(struct seq_file *m, void *data)
 358 {
 359         struct drm_info_node *node = (struct drm_info_node *) m->private;
 360         struct drm_device *dev = node->minor->dev;
 361         drm_i915_private_t *dev_priv = dev->dev_private;
 362         struct drm_i915_gem_request *gem_request;
 363         int ret, count;
 364
 365         ret = mutex_lock_interruptible(&dev->struct_mutex);
 366         if (ret)
 367                 return ret;
 368
 369         count = 0;
 370         if (!list_empty(&dev_priv->ring[RCS].request_list)) {
 371                 seq_printf(m, "Render requests:\n");
 372                 list_for_each_entry(gem_request,
 373                                     &dev_priv->ring[RCS].request_list,
 374                                     list) {
 375                         seq_printf(m, "    %d @ %d\n",
 376                                    gem_request->seqno,
 377                                    (int) (jiffies - gem_request->emitted_jiffies));
 378                 }
 379                 count++;
 380         }
 381         if (!list_empty(&dev_priv->ring[VCS].request_list)) {
 382                 seq_printf(m, "BSD requests:\n");
 383                 list_for_each_entry(gem_request,
 384                                     &dev_priv->ring[VCS].request_list,
 385                                     list) {
 386                         seq_printf(m, "    %d @ %d\n",
 387                                    gem_request->seqno,
 388                                    (int) (jiffies - gem_request->emitted_jiffies));
 389                 }
 390                 count++;
 391         }
 392         if (!list_empty(&dev_priv->ring[BCS].request_list)) {
 393                 seq_printf(m, "BLT requests:\n");
 394                 list_for_each_entry(gem_request,
 395                                     &dev_priv->ring[BCS].request_list,
 396                                     list) {
 397                         seq_printf(m, "    %d @ %d\n",
 398                                    gem_request->seqno,
 399                                    (int) (jiffies - gem_request->emitted_jiffies));
 400                 }
 401                 count++;
 402         }
 403         mutex_unlock(&dev->struct_mutex);
 404
 405         if (count == 0)
 406                 seq_printf(m, "No requests\n");
 407
 408         return 0;
 409 }
 410
 411 static void i915_ring_seqno_info(struct seq_file *m,
 412                                  struct intel_ring_buffer *ring)
 413 {
 414         if (ring->get_seqno) {
 415                 seq_printf(m, "Current sequence (%s): %d\n",
 416                            ring->name, ring->get_seqno(ring));
 417         }
 418 }
 419
 420 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 421 {
 422         struct drm_info_node *node = (struct drm_info_node *) m->private;
 423         struct drm_device *dev = node->minor->dev;
 424         drm_i915_private_t *dev_priv = dev->dev_private;
 425         int ret, i;
 426
 427         ret = mutex_lock_interruptible(&dev->struct_mutex);
 428         if (ret)
 429                 return ret;
 430
 431         for (i = 0; i < I915_NUM_RINGS; i++)
 432                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 433
 434         mutex_unlock(&dev->struct_mutex);
 435
 436         return 0;
 437 }
 438
 439
 440 static int i915_interrupt_info(struct seq_file *m, void *data)
 441 {
 442         struct drm_info_node *node = (struct drm_info_node *) m->private;
 443         struct drm_device *dev = node->minor->dev;
 444         drm_i915_private_t *dev_priv = dev->dev_private;
 445         int ret, i, pipe;
 446
 447         ret = mutex_lock_interruptible(&dev->struct_mutex);
 448         if (ret)
 449                 return ret;
 450
 451         if (IS_VALLEYVIEW(dev)) {
 452                 seq_printf(m, "Display IER:\t%08x\n",
 453                            I915_READ(VLV_IER));
 454                 seq_printf(m, "Display IIR:\t%08x\n",
 455                            I915_READ(VLV_IIR));
 456                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 457                            I915_READ(VLV_IIR_RW));
 458                 seq_printf(m, "Display IMR:\t%08x\n",
 459                            I915_READ(VLV_IMR));
 460                 for_each_pipe(pipe)
 461                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 462                                    pipe_name(pipe),
 463                                    I915_READ(PIPESTAT(pipe)));
 464
 465                 seq_printf(m, "Master IER:\t%08x\n",
 466                            I915_READ(VLV_MASTER_IER));
 467
 468                 seq_printf(m, "Render IER:\t%08x\n",
 469                            I915_READ(GTIER));
 470                 seq_printf(m, "Render IIR:\t%08x\n",
 471                            I915_READ(GTIIR));
 472                 seq_printf(m, "Render IMR:\t%08x\n",
 473                            I915_READ(GTIMR));
 474
 475                 seq_printf(m, "PM IER:\t\t%08x\n",
 476                            I915_READ(GEN6_PMIER));
 477                 seq_printf(m, "PM IIR:\t\t%08x\n",
 478                            I915_READ(GEN6_PMIIR));
 479                 seq_printf(m, "PM IMR:\t\t%08x\n",
 480                            I915_READ(GEN6_PMIMR));
 481
 482                 seq_printf(m, "Port hotplug:\t%08x\n",
 483                            I915_READ(PORT_HOTPLUG_EN));
 484                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 485                            I915_READ(VLV_DPFLIPSTAT));
 486                 seq_printf(m, "DPINVGTT:\t%08x\n",
 487                            I915_READ(DPINVGTT));
 488
 489         } else if (!HAS_PCH_SPLIT(dev)) {
 490                 seq_printf(m, "Interrupt enable:    %08x\n",
 491                            I915_READ(IER));
 492                 seq_printf(m, "Interrupt identity:  %08x\n",
 493                            I915_READ(IIR));
 494                 seq_printf(m, "Interrupt mask:      %08x\n",
 495                            I915_READ(IMR));
 496                 for_each_pipe(pipe)
 497                         seq_printf(m, "Pipe %c stat:         %08x\n",
 498                                    pipe_name(pipe),
 499                                    I915_READ(PIPESTAT(pipe)));
 500         } else {
 501                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 502                            I915_READ(DEIER));
 503                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 504                            I915_READ(DEIIR));
 505                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 506                            I915_READ(DEIMR));
 507                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 508                            I915_READ(SDEIER));
 509                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 510                            I915_READ(SDEIIR));
 511                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 512                            I915_READ(SDEIMR));
 513                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 514                            I915_READ(GTIER));
 515                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 516                            I915_READ(GTIIR));
 517                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 518                            I915_READ(GTIMR));
 519         }
 520         seq_printf(m, "Interrupts received: %d\n",
 521                    atomic_read(&dev_priv->irq_received));
 522         for (i = 0; i < I915_NUM_RINGS; i++) {
 523                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 524                         seq_printf(m, "Graphics Interrupt mask (%s):    %08x\n",
 525                                    dev_priv->ring[i].name,
 526                                    I915_READ_IMR(&dev_priv->ring[i]));
 527                 }
 528                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 529         }
 530         mutex_unlock(&dev->struct_mutex);
 531
 532         return 0;
 533 }
 534
 535 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 536 {
 537         struct drm_info_node *node = (struct drm_info_node *) m->private;
 538         struct drm_device *dev = node->minor->dev;
 539         drm_i915_private_t *dev_priv = dev->dev_private;
 540         int i, ret;
 541
 542         ret = mutex_lock_interruptible(&dev->struct_mutex);
 543         if (ret)
 544                 return ret;
 545
 546         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 547         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 548         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 549                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 550
 551                 seq_printf(m, "Fenced object[%2d] = ", i);
 552                 if (obj == NULL)
 553                         seq_printf(m, "unused");
 554                 else
 555                         describe_obj(m, obj);
 556                 seq_printf(m, "\n");
 557         }
 558
 559         mutex_unlock(&dev->struct_mutex);
 560         return 0;
 561 }
 562
 563 static int i915_hws_info(struct seq_file *m, void *data)
 564 {
 565         struct drm_info_node *node = (struct drm_info_node *) m->private;
 566         struct drm_device *dev = node->minor->dev;
 567         drm_i915_private_t *dev_priv = dev->dev_private;
 568         struct intel_ring_buffer *ring;
 569         const volatile u32 __iomem *hws;
 570         int i;
 571
 572         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 573         hws = (volatile u32 __iomem *)ring->status_page.page_addr;
 574         if (hws == NULL)
 575                 return 0;
 576
 577         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 578                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 579                            i * 4,
 580                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 581         }
 582         return 0;
 583 }
 584
 585 static const char *ring_str(int ring)
 586 {
 587         switch (ring) {
 588         case RCS: return "render";
 589         case VCS: return "bsd";
 590         case BCS: return "blt";
 591         default: return "";
 592         }
 593 }
 594
 595 static const char *pin_flag(int pinned)
 596 {
 597         if (pinned > 0)
 598                 return " P";
 599         else if (pinned < 0)
 600                 return " p";
 601         else
 602                 return "";
 603 }
 604
 605 static const char *tiling_flag(int tiling)
 606 {
 607         switch (tiling) {
 608         default:
 609         case I915_TILING_NONE: return "";
 610         case I915_TILING_X: return " X";
 611         case I915_TILING_Y: return " Y";
 612         }
 613 }
 614
 615 static const char *dirty_flag(int dirty)
 616 {
 617         return dirty ? " dirty" : "";
 618 }
 619
 620 static const char *purgeable_flag(int purgeable)
 621 {
 622         return purgeable ? " purgeable" : "";
 623 }
 624
 625 static void print_error_buffers(struct seq_file *m,
 626                                 const char *name,
 627                                 struct drm_i915_error_buffer *err,
 628                                 int count)
 629 {
 630         seq_printf(m, "%s [%d]:\n", name, count);
 631
 632         while (count--) {
 633                 seq_printf(m, "  %08x %8u %04x %04x %08x%s%s%s%s%s%s%s",
 634                            err->gtt_offset,
 635                            err->size,
 636                            err->read_domains,
 637                            err->write_domain,
 638                            err->seqno,
 639                            pin_flag(err->pinned),
 640                            tiling_flag(err->tiling),
 641                            dirty_flag(err->dirty),
 642                            purgeable_flag(err->purgeable),
 643                            err->ring != -1 ? " " : "",
 644                            ring_str(err->ring),
 645                            cache_level_str(err->cache_level));
 646
 647                 if (err->name)
 648                         seq_printf(m, " (name: %d)", err->name);
 649                 if (err->fence_reg != I915_FENCE_REG_NONE)
 650                         seq_printf(m, " (fence: %d)", err->fence_reg);
 651
 652                 seq_printf(m, "\n");
 653                 err++;
 654         }
 655 }
 656
 657 static void i915_ring_error_state(struct seq_file *m,
 658                                   struct drm_device *dev,
 659                                   struct drm_i915_error_state *error,
 660                                   unsigned ring)
 661 {
 662         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 663         seq_printf(m, "%s command stream:\n", ring_str(ring));
 664         seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 665         seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 666         seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 667         seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 668         seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 669         seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 670         if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
 671                 seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
 672                 seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 673         }
 674         if (INTEL_INFO(dev)->gen >= 4)
 675                 seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 676         seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 677         seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 678         if (INTEL_INFO(dev)->gen >= 6) {
 679                 seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 680                 seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 681                 seq_printf(m, "  SYNC_0: 0x%08x\n",
 682                            error->semaphore_mboxes[ring][0]);
 683                 seq_printf(m, "  SYNC_1: 0x%08x\n",
 684                            error->semaphore_mboxes[ring][1]);
 685         }
 686         seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 687         seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 688         seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 689         seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 690 }
 691
 692 struct i915_error_state_file_priv {
 693         struct drm_device *dev;
 694         struct drm_i915_error_state *error;
 695 };
 696
 697 static int i915_error_state(struct seq_file *m, void *unused)
 698 {
 699         struct i915_error_state_file_priv *error_priv = m->private;
 700         struct drm_device *dev = error_priv->dev;
 701         drm_i915_private_t *dev_priv = dev->dev_private;
 702         struct drm_i915_error_state *error = error_priv->error;
 703         struct intel_ring_buffer *ring;
 704         int i, j, page, offset, elt;
 705
 706         if (!error) {
 707                 seq_printf(m, "no error state collected\n");
 708                 return 0;
 709         }
 710
 711         seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 712                    error->time.tv_usec);
 713         seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 714         seq_printf(m, "EIR: 0x%08x\n", error->eir);
 715         seq_printf(m, "IER: 0x%08x\n", error->ier);
 716         seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 717         seq_printf(m, "CCID: 0x%08x\n", error->ccid);
 718
 719         for (i = 0; i < dev_priv->num_fence_regs; i++)
 720                 seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 721
 722         if (INTEL_INFO(dev)->gen >= 6) {
 723                 seq_printf(m, "ERROR: 0x%08x\n", error->error);
 724                 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 725         }
 726
 727         for_each_ring(ring, dev_priv, i)
 728                 i915_ring_error_state(m, dev, error, i);
 729
 730         if (error->active_bo)
 731                 print_error_buffers(m, "Active",
 732                                     error->active_bo,
 733                                     error->active_bo_count);
 734
 735         if (error->pinned_bo)
 736                 print_error_buffers(m, "Pinned",
 737                                     error->pinned_bo,
 738                                     error->pinned_bo_count);
 739
 740         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 741                 struct drm_i915_error_object *obj;
 742
 743                 if ((obj = error->ring[i].batchbuffer)) {
 744                         seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
 745                                    dev_priv->ring[i].name,
 746                                    obj->gtt_offset);
 747                         offset = 0;
 748                         for (page = 0; page < obj->page_count; page++) {
 749                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 750                                         seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
 751                                         offset += 4;
 752                                 }
 753                         }
 754                 }
 755
 756                 if (error->ring[i].num_requests) {
 757                         seq_printf(m, "%s --- %d requests\n",
 758                                    dev_priv->ring[i].name,
 759                                    error->ring[i].num_requests);
 760                         for (j = 0; j < error->ring[i].num_requests; j++) {
 761                                 seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 762                                            error->ring[i].requests[j].seqno,
 763                                            error->ring[i].requests[j].jiffies,
 764                                            error->ring[i].requests[j].tail);
 765                         }
 766                 }
 767
 768                 if ((obj = error->ring[i].ringbuffer)) {
 769                         seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
 770                                    dev_priv->ring[i].name,
 771                                    obj->gtt_offset);
 772                         offset = 0;
 773                         for (page = 0; page < obj->page_count; page++) {
 774                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 775                                         seq_printf(m, "%08x :  %08x\n",
 776                                                    offset,
 777                                                    obj->pages[page][elt]);
 778                                         offset += 4;
 779                                 }
 780                         }
 781                 }
 782         }
 783
 784         if (error->overlay)
 785                 intel_overlay_print_error_state(m, error->overlay);
 786
 787         if (error->display)
 788                 intel_display_print_error_state(m, dev, error->display);
 789
 790         return 0;
 791 }
 792
 793 static ssize_t
 794 i915_error_state_write(struct file *filp,
 795                        const char __user *ubuf,
 796                        size_t cnt,
 797                        loff_t *ppos)
 798 {
 799         struct seq_file *m = filp->private_data;
 800         struct i915_error_state_file_priv *error_priv = m->private;
 801         struct drm_device *dev = error_priv->dev;
 802
 803         DRM_DEBUG_DRIVER("Resetting error state\n");
 804
 805         mutex_lock(&dev->struct_mutex);
 806         i915_destroy_error_state(dev);
 807         mutex_unlock(&dev->struct_mutex);
 808
 809         return cnt;
 810 }
 811
 812 static int i915_error_state_open(struct inode *inode, struct file *file)
 813 {
 814         struct drm_device *dev = inode->i_private;
 815         drm_i915_private_t *dev_priv = dev->dev_private;
 816         struct i915_error_state_file_priv *error_priv;
 817         unsigned long flags;
 818
 819         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 820         if (!error_priv)
 821                 return -ENOMEM;
 822
 823         error_priv->dev = dev;
 824
 825         spin_lock_irqsave(&dev_priv->error_lock, flags);
 826         error_priv->error = dev_priv->first_error;
 827         if (error_priv->error)
 828                 kref_get(&error_priv->error->ref);
 829         spin_unlock_irqrestore(&dev_priv->error_lock, flags);
 830
 831         return single_open(file, i915_error_state, error_priv);
 832 }
 833
 834 static int i915_error_state_release(struct inode *inode, struct file *file)
 835 {
 836         struct seq_file *m = file->private_data;
 837         struct i915_error_state_file_priv *error_priv = m->private;
 838
 839         if (error_priv->error)
 840                 kref_put(&error_priv->error->ref, i915_error_state_free);
 841         kfree(error_priv);
 842
 843         return single_release(inode, file);
 844 }
 845
 846 static const struct file_operations i915_error_state_fops = {
 847         .owner = THIS_MODULE,
 848         .open = i915_error_state_open,
 849         .read = seq_read,
 850         .write = i915_error_state_write,
 851         .llseek = default_llseek,
 852         .release = i915_error_state_release,
 853 };
 854
 855 static int i915_rstdby_delays(struct seq_file *m, void *unused)
 856 {
 857         struct drm_info_node *node = (struct drm_info_node *) m->private;
 858         struct drm_device *dev = node->minor->dev;
 859         drm_i915_private_t *dev_priv = dev->dev_private;
 860         u16 crstanddelay;
 861         int ret;
 862
 863         ret = mutex_lock_interruptible(&dev->struct_mutex);
 864         if (ret)
 865                 return ret;
 866
 867         crstanddelay = I915_READ16(CRSTANDVID);
 868
 869         mutex_unlock(&dev->struct_mutex);
 870
 871         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
 872
 873         return 0;
 874 }
 875
 876 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
 877 {
 878         struct drm_info_node *node = (struct drm_info_node *) m->private;
 879         struct drm_device *dev = node->minor->dev;
 880         drm_i915_private_t *dev_priv = dev->dev_private;
 881         int ret;
 882
 883         if (IS_GEN5(dev)) {
 884                 u16 rgvswctl = I915_READ16(MEMSWCTL);
 885                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
 886
 887                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
 888                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
 889                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 890                            MEMSTAT_VID_SHIFT);
 891                 seq_printf(m, "Current P-state: %d\n",
 892                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 893         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
 894                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
 895                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
 896                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
 897                 u32 rpstat;
 898                 u32 rpupei, rpcurup, rpprevup;
 899                 u32 rpdownei, rpcurdown, rpprevdown;
 900                 int max_freq;
 901
 902                 /* RPSTAT1 is in the GT power well */
 903                 ret = mutex_lock_interruptible(&dev->struct_mutex);
 904                 if (ret)
 905                         return ret;
 906
 907                 gen6_gt_force_wake_get(dev_priv);
 908
 909                 rpstat = I915_READ(GEN6_RPSTAT1);
 910                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
 911                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
 912                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
 913                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
 914                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
 915                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
 916
 917                 gen6_gt_force_wake_put(dev_priv);
 918                 mutex_unlock(&dev->struct_mutex);
 919
 920                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
 921                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
 922                 seq_printf(m, "Render p-state ratio: %d\n",
 923                            (gt_perf_status & 0xff00) >> 8);
 924                 seq_printf(m, "Render p-state VID: %d\n",
 925                            gt_perf_status & 0xff);
 926                 seq_printf(m, "Render p-state limit: %d\n",
 927                            rp_state_limits & 0xff);
 928                 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
 929                                                 GEN6_CAGF_SHIFT) * 50);
 930                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
 931                            GEN6_CURICONT_MASK);
 932                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
 933                            GEN6_CURBSYTAVG_MASK);
 934                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
 935                            GEN6_CURBSYTAVG_MASK);
 936                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
 937                            GEN6_CURIAVG_MASK);
 938                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
 939                            GEN6_CURBSYTAVG_MASK);
 940                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
 941                            GEN6_CURBSYTAVG_MASK);
 942
 943                 max_freq = (rp_state_cap & 0xff0000) >> 16;
 944                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
 945                            max_freq * 50);
 946
 947                 max_freq = (rp_state_cap & 0xff00) >> 8;
 948                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
 949                            max_freq * 50);
 950
 951                 max_freq = rp_state_cap & 0xff;
 952                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
 953                            max_freq * 50);
 954         } else {
 955                 seq_printf(m, "no P-state info available\n");
 956         }
 957
 958         return 0;
 959 }
 960
 961 static int i915_delayfreq_table(struct seq_file *m, void *unused)
 962 {
 963         struct drm_info_node *node = (struct drm_info_node *) m->private;
 964         struct drm_device *dev = node->minor->dev;
 965         drm_i915_private_t *dev_priv = dev->dev_private;
 966         u32 delayfreq;
 967         int ret, i;
 968
 969         ret = mutex_lock_interruptible(&dev->struct_mutex);
 970         if (ret)
 971                 return ret;
 972
 973         for (i = 0; i < 16; i++) {
 974                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
 975                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
 976                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
 977         }
 978
 979         mutex_unlock(&dev->struct_mutex);
 980
 981         return 0;
 982 }
 983
 984 static inline int MAP_TO_MV(int map)
 985 {
 986         return 1250 - (map * 25);
 987 }
 988
 989 static int i915_inttoext_table(struct seq_file *m, void *unused)
 990 {
 991         struct drm_info_node *node = (struct drm_info_node *) m->private;
 992         struct drm_device *dev = node->minor->dev;
 993         drm_i915_private_t *dev_priv = dev->dev_private;
 994         u32 inttoext;
 995         int ret, i;
 996
 997         ret = mutex_lock_interruptible(&dev->struct_mutex);
 998         if (ret)
 999                 return ret;
1000
1001         for (i = 1; i <= 32; i++) {
1002                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1003                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1004         }
1005
1006         mutex_unlock(&dev->struct_mutex);
1007
1008         return 0;
1009 }
1010
1011 static int ironlake_drpc_info(struct seq_file *m)
1012 {
1013         struct drm_info_node *node = (struct drm_info_node *) m->private;
1014         struct drm_device *dev = node->minor->dev;
1015         drm_i915_private_t *dev_priv = dev->dev_private;
1016         u32 rgvmodectl, rstdbyctl;
1017         u16 crstandvid;
1018         int ret;
1019
1020         ret = mutex_lock_interruptible(&dev->struct_mutex);
1021         if (ret)
1022                 return ret;
1023
1024         rgvmodectl = I915_READ(MEMMODECTL);
1025         rstdbyctl = I915_READ(RSTDBYCTL);
1026         crstandvid = I915_READ16(CRSTANDVID);
1027
1028         mutex_unlock(&dev->struct_mutex);
1029
1030         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1031                    "yes" : "no");
1032         seq_printf(m, "Boost freq: %d\n",
1033                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1034                    MEMMODE_BOOST_FREQ_SHIFT);
1035         seq_printf(m, "HW control enabled: %s\n",
1036                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1037         seq_printf(m, "SW control enabled: %s\n",
1038                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1039         seq_printf(m, "Gated voltage change: %s\n",
1040                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1041         seq_printf(m, "Starting frequency: P%d\n",
1042                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1043         seq_printf(m, "Max P-state: P%d\n",
1044                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1045         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1046         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1047         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1048         seq_printf(m, "Render standby enabled: %s\n",
1049                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1050         seq_printf(m, "Current RS state: ");
1051         switch (rstdbyctl & RSX_STATUS_MASK) {
1052         case RSX_STATUS_ON:
1053                 seq_printf(m, "on\n");
1054                 break;
1055         case RSX_STATUS_RC1:
1056                 seq_printf(m, "RC1\n");
1057                 break;
1058         case RSX_STATUS_RC1E:
1059                 seq_printf(m, "RC1E\n");
1060                 break;
1061         case RSX_STATUS_RS1:
1062                 seq_printf(m, "RS1\n");
1063                 break;
1064         case RSX_STATUS_RS2:
1065                 seq_printf(m, "RS2 (RC6)\n");
1066                 break;
1067         case RSX_STATUS_RS3:
1068                 seq_printf(m, "RC3 (RC6+)\n");
1069                 break;
1070         default:
1071                 seq_printf(m, "unknown\n");
1072                 break;
1073         }
1074
1075         return 0;
1076 }
1077
1078 static int gen6_drpc_info(struct seq_file *m)
1079 {
1080
1081         struct drm_info_node *node = (struct drm_info_node *) m->private;
1082         struct drm_device *dev = node->minor->dev;
1083         struct drm_i915_private *dev_priv = dev->dev_private;
1084         u32 rpmodectl1, gt_core_status, rcctl1;
1085         unsigned forcewake_count;
1086         int count=0, ret;
1087
1088
1089         ret = mutex_lock_interruptible(&dev->struct_mutex);
1090         if (ret)
1091                 return ret;
1092
1093         spin_lock_irq(&dev_priv->gt_lock);
1094         forcewake_count = dev_priv->forcewake_count;
1095         spin_unlock_irq(&dev_priv->gt_lock);
1096
1097         if (forcewake_count) {
1098                 seq_printf(m, "RC information inaccurate because somebody "
1099                               "holds a forcewake reference \n");
1100         } else {
1101                 /* NB: we cannot use forcewake, else we read the wrong values */
1102                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1103                         udelay(10);
1104                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1105         }
1106
1107         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1108         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1109
1110         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1111         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1112         mutex_unlock(&dev->struct_mutex);
1113
1114         seq_printf(m, "Video Turbo Mode: %s\n",
1115                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1116         seq_printf(m, "HW control enabled: %s\n",
1117                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1118         seq_printf(m, "SW control enabled: %s\n",
1119                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1120                           GEN6_RP_MEDIA_SW_MODE));
1121         seq_printf(m, "RC1e Enabled: %s\n",
1122                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1123         seq_printf(m, "RC6 Enabled: %s\n",
1124                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1125         seq_printf(m, "Deep RC6 Enabled: %s\n",
1126                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1127         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1128                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1129         seq_printf(m, "Current RC state: ");
1130         switch (gt_core_status & GEN6_RCn_MASK) {
1131         case GEN6_RC0:
1132                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1133                         seq_printf(m, "Core Power Down\n");
1134                 else
1135                         seq_printf(m, "on\n");
1136                 break;
1137         case GEN6_RC3:
1138                 seq_printf(m, "RC3\n");
1139                 break;
1140         case GEN6_RC6:
1141                 seq_printf(m, "RC6\n");
1142                 break;
1143         case GEN6_RC7:
1144                 seq_printf(m, "RC7\n");
1145                 break;
1146         default:
1147                 seq_printf(m, "Unknown\n");
1148                 break;
1149         }
1150
1151         seq_printf(m, "Core Power Down: %s\n",
1152                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1153
1154         /* Not exactly sure what this is */
1155         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1156                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1157         seq_printf(m, "RC6 residency since boot: %u\n",
1158                    I915_READ(GEN6_GT_GFX_RC6));
1159         seq_printf(m, "RC6+ residency since boot: %u\n",
1160                    I915_READ(GEN6_GT_GFX_RC6p));
1161         seq_printf(m, "RC6++ residency since boot: %u\n",
1162                    I915_READ(GEN6_GT_GFX_RC6pp));
1163
1164         return 0;
1165 }
1166
1167 static int i915_drpc_info(struct seq_file *m, void *unused)
1168 {
1169         struct drm_info_node *node = (struct drm_info_node *) m->private;
1170         struct drm_device *dev = node->minor->dev;
1171
1172         if (IS_GEN6(dev) || IS_GEN7(dev))
1173                 return gen6_drpc_info(m);
1174         else
1175                 return ironlake_drpc_info(m);
1176 }
1177
1178 static int i915_fbc_status(struct seq_file *m, void *unused)
1179 {
1180         struct drm_info_node *node = (struct drm_info_node *) m->private;
1181         struct drm_device *dev = node->minor->dev;
1182         drm_i915_private_t *dev_priv = dev->dev_private;
1183
1184         if (!I915_HAS_FBC(dev)) {
1185                 seq_printf(m, "FBC unsupported on this chipset\n");
1186                 return 0;
1187         }
1188
1189         if (intel_fbc_enabled(dev)) {
1190                 seq_printf(m, "FBC enabled\n");
1191         } else {
1192                 seq_printf(m, "FBC disabled: ");
1193                 switch (dev_priv->no_fbc_reason) {
1194                 case FBC_NO_OUTPUT:
1195                         seq_printf(m, "no outputs");
1196                         break;
1197                 case FBC_STOLEN_TOO_SMALL:
1198                         seq_printf(m, "not enough stolen memory");
1199                         break;
1200                 case FBC_UNSUPPORTED_MODE:
1201                         seq_printf(m, "mode not supported");
1202                         break;
1203                 case FBC_MODE_TOO_LARGE:
1204                         seq_printf(m, "mode too large");
1205                         break;
1206                 case FBC_BAD_PLANE:
1207                         seq_printf(m, "FBC unsupported on plane");
1208                         break;
1209                 case FBC_NOT_TILED:
1210                         seq_printf(m, "scanout buffer not tiled");
1211                         break;
1212                 case FBC_MULTIPLE_PIPES:
1213                         seq_printf(m, "multiple pipes are enabled");
1214                         break;
1215                 case FBC_MODULE_PARAM:
1216                         seq_printf(m, "disabled per module param (default off)");
1217                         break;
1218                 default:
1219                         seq_printf(m, "unknown reason");
1220                 }
1221                 seq_printf(m, "\n");
1222         }
1223         return 0;
1224 }
1225
1226 static int i915_sr_status(struct seq_file *m, void *unused)
1227 {
1228         struct drm_info_node *node = (struct drm_info_node *) m->private;
1229         struct drm_device *dev = node->minor->dev;
1230         drm_i915_private_t *dev_priv = dev->dev_private;
1231         bool sr_enabled = false;
1232
1233         if (HAS_PCH_SPLIT(dev))
1234                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1235         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1236                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1237         else if (IS_I915GM(dev))
1238                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1239         else if (IS_PINEVIEW(dev))
1240                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1241
1242         seq_printf(m, "self-refresh: %s\n",
1243                    sr_enabled ? "enabled" : "disabled");
1244
1245         return 0;
1246 }
1247
1248 static int i915_emon_status(struct seq_file *m, void *unused)
1249 {
1250         struct drm_info_node *node = (struct drm_info_node *) m->private;
1251         struct drm_device *dev = node->minor->dev;
1252         drm_i915_private_t *dev_priv = dev->dev_private;
1253         unsigned long temp, chipset, gfx;
1254         int ret;
1255
1256         if (!IS_GEN5(dev))
1257                 return -ENODEV;
1258
1259         ret = mutex_lock_interruptible(&dev->struct_mutex);
1260         if (ret)
1261                 return ret;
1262
1263         temp = i915_mch_val(dev_priv);
1264         chipset = i915_chipset_val(dev_priv);
1265         gfx = i915_gfx_val(dev_priv);
1266         mutex_unlock(&dev->struct_mutex);
1267
1268         seq_printf(m, "GMCH temp: %ld\n", temp);
1269         seq_printf(m, "Chipset power: %ld\n", chipset);
1270         seq_printf(m, "GFX power: %ld\n", gfx);
1271         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1272
1273         return 0;
1274 }
1275
1276 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1277 {
1278         struct drm_info_node *node = (struct drm_info_node *) m->private;
1279         struct drm_device *dev = node->minor->dev;
1280         drm_i915_private_t *dev_priv = dev->dev_private;
1281         int ret;
1282         int gpu_freq, ia_freq;
1283
1284         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1285                 seq_printf(m, "unsupported on this chipset\n");
1286                 return 0;
1287         }
1288
1289         ret = mutex_lock_interruptible(&dev->struct_mutex);
1290         if (ret)
1291                 return ret;
1292
1293         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1294
1295         for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1296              gpu_freq++) {
1297                 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1298                 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1299                            GEN6_PCODE_READ_MIN_FREQ_TABLE);
1300                 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1301                               GEN6_PCODE_READY) == 0, 10)) {
1302                         DRM_ERROR("pcode read of freq table timed out\n");
1303                         continue;
1304                 }
1305                 ia_freq = I915_READ(GEN6_PCODE_DATA);
1306                 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1307         }
1308
1309         mutex_unlock(&dev->struct_mutex);
1310
1311         return 0;
1312 }
1313
1314 static int i915_gfxec(struct seq_file *m, void *unused)
1315 {
1316         struct drm_info_node *node = (struct drm_info_node *) m->private;
1317         struct drm_device *dev = node->minor->dev;
1318         drm_i915_private_t *dev_priv = dev->dev_private;
1319         int ret;
1320
1321         ret = mutex_lock_interruptible(&dev->struct_mutex);
1322         if (ret)
1323                 return ret;
1324
1325         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1326
1327         mutex_unlock(&dev->struct_mutex);
1328
1329         return 0;
1330 }
1331
1332 static int i915_opregion(struct seq_file *m, void *unused)
1333 {
1334         struct drm_info_node *node = (struct drm_info_node *) m->private;
1335         struct drm_device *dev = node->minor->dev;
1336         drm_i915_private_t *dev_priv = dev->dev_private;
1337         struct intel_opregion *opregion = &dev_priv->opregion;
1338         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1339         int ret;
1340
1341         if (data == NULL)
1342                 return -ENOMEM;
1343
1344         ret = mutex_lock_interruptible(&dev->struct_mutex);
1345         if (ret)
1346                 goto out;
1347
1348         if (opregion->header) {
1349                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1350                 seq_write(m, data, OPREGION_SIZE);
1351         }
1352
1353         mutex_unlock(&dev->struct_mutex);
1354
1355 out:
1356         kfree(data);
1357         return 0;
1358 }
1359
1360 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1361 {
1362         struct drm_info_node *node = (struct drm_info_node *) m->private;
1363         struct drm_device *dev = node->minor->dev;
1364         drm_i915_private_t *dev_priv = dev->dev_private;
1365         struct intel_fbdev *ifbdev;
1366         struct intel_framebuffer *fb;
1367         int ret;
1368
1369         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1370         if (ret)
1371                 return ret;
1372
1373         ifbdev = dev_priv->fbdev;
1374         fb = to_intel_framebuffer(ifbdev->helper.fb);
1375
1376         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1377                    fb->base.width,
1378                    fb->base.height,
1379                    fb->base.depth,
1380                    fb->base.bits_per_pixel);
1381         describe_obj(m, fb->obj);
1382         seq_printf(m, "\n");
1383
1384         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1385                 if (&fb->base == ifbdev->helper.fb)
1386                         continue;
1387
1388                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1389                            fb->base.width,
1390                            fb->base.height,
1391                            fb->base.depth,
1392                            fb->base.bits_per_pixel);
1393                 describe_obj(m, fb->obj);
1394                 seq_printf(m, "\n");
1395         }
1396
1397         mutex_unlock(&dev->mode_config.mutex);
1398
1399         return 0;
1400 }
1401
1402 static int i915_context_status(struct seq_file *m, void *unused)
1403 {
1404         struct drm_info_node *node = (struct drm_info_node *) m->private;
1405         struct drm_device *dev = node->minor->dev;
1406         drm_i915_private_t *dev_priv = dev->dev_private;
1407         int ret;
1408
1409         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1410         if (ret)
1411                 return ret;
1412
1413         if (dev_priv->pwrctx) {
1414                 seq_printf(m, "power context ");
1415                 describe_obj(m, dev_priv->pwrctx);
1416                 seq_printf(m, "\n");
1417         }
1418
1419         if (dev_priv->renderctx) {
1420                 seq_printf(m, "render context ");
1421                 describe_obj(m, dev_priv->renderctx);
1422                 seq_printf(m, "\n");
1423         }
1424
1425         mutex_unlock(&dev->mode_config.mutex);
1426
1427         return 0;
1428 }
1429
1430 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1431 {
1432         struct drm_info_node *node = (struct drm_info_node *) m->private;
1433         struct drm_device *dev = node->minor->dev;
1434         struct drm_i915_private *dev_priv = dev->dev_private;
1435         unsigned forcewake_count;
1436
1437         spin_lock_irq(&dev_priv->gt_lock);
1438         forcewake_count = dev_priv->forcewake_count;
1439         spin_unlock_irq(&dev_priv->gt_lock);
1440
1441         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1442
1443         return 0;
1444 }
1445
1446 static const char *swizzle_string(unsigned swizzle)
1447 {
1448         switch(swizzle) {
1449         case I915_BIT_6_SWIZZLE_NONE:
1450                 return "none";
1451         case I915_BIT_6_SWIZZLE_9:
1452                 return "bit9";
1453         case I915_BIT_6_SWIZZLE_9_10:
1454                 return "bit9/bit10";
1455         case I915_BIT_6_SWIZZLE_9_11:
1456                 return "bit9/bit11";
1457         case I915_BIT_6_SWIZZLE_9_10_11:
1458                 return "bit9/bit10/bit11";
1459         case I915_BIT_6_SWIZZLE_9_17:
1460                 return "bit9/bit17";
1461         case I915_BIT_6_SWIZZLE_9_10_17:
1462                 return "bit9/bit10/bit17";
1463         case I915_BIT_6_SWIZZLE_UNKNOWN:
1464                 return "unkown";
1465         }
1466
1467         return "bug";
1468 }
1469
1470 static int i915_swizzle_info(struct seq_file *m, void *data)
1471 {
1472         struct drm_info_node *node = (struct drm_info_node *) m->private;
1473         struct drm_device *dev = node->minor->dev;
1474         struct drm_i915_private *dev_priv = dev->dev_private;
1475
1476         mutex_lock(&dev->struct_mutex);
1477         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1478                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1479         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1480                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1481
1482         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1483                 seq_printf(m, "DDC = 0x%08x\n",
1484                            I915_READ(DCC));
1485                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1486                            I915_READ16(C0DRB3));
1487                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1488                            I915_READ16(C1DRB3));
1489         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1490                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1491                            I915_READ(MAD_DIMM_C0));
1492                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1493                            I915_READ(MAD_DIMM_C1));
1494                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1495                            I915_READ(MAD_DIMM_C2));
1496                 seq_printf(m, "TILECTL = 0x%08x\n",
1497                            I915_READ(TILECTL));
1498                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1499                            I915_READ(ARB_MODE));
1500                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1501                            I915_READ(DISP_ARB_CTL));
1502         }
1503         mutex_unlock(&dev->struct_mutex);
1504
1505         return 0;
1506 }
1507
1508 static int i915_ppgtt_info(struct seq_file *m, void *data)
1509 {
1510         struct drm_info_node *node = (struct drm_info_node *) m->private;
1511         struct drm_device *dev = node->minor->dev;
1512         struct drm_i915_private *dev_priv = dev->dev_private;
1513         struct intel_ring_buffer *ring;
1514         int i, ret;
1515
1516
1517         ret = mutex_lock_interruptible(&dev->struct_mutex);
1518         if (ret)
1519                 return ret;
1520         if (INTEL_INFO(dev)->gen == 6)
1521                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1522
1523         for (i = 0; i < I915_NUM_RINGS; i++) {
1524                 ring = &dev_priv->ring[i];
1525
1526                 seq_printf(m, "%s\n", ring->name);
1527                 if (INTEL_INFO(dev)->gen == 7)
1528                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1529                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1530                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1531                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1532         }
1533         if (dev_priv->mm.aliasing_ppgtt) {
1534                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1535
1536                 seq_printf(m, "aliasing PPGTT:\n");
1537                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1538         }
1539         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1540         mutex_unlock(&dev->struct_mutex);
1541
1542         return 0;
1543 }
1544
1545 static int i915_dpio_info(struct seq_file *m, void *data)
1546 {
1547         struct drm_info_node *node = (struct drm_info_node *) m->private;
1548         struct drm_device *dev = node->minor->dev;
1549         struct drm_i915_private *dev_priv = dev->dev_private;
1550         int ret;
1551
1552
1553         if (!IS_VALLEYVIEW(dev)) {
1554                 seq_printf(m, "unsupported\n");
1555                 return 0;
1556         }
1557
1558         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1559         if (ret)
1560                 return ret;
1561
1562         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1563
1564         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1565                    intel_dpio_read(dev_priv, _DPIO_DIV_A));
1566         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1567                    intel_dpio_read(dev_priv, _DPIO_DIV_B));
1568
1569         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1570                    intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1571         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1572                    intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1573
1574         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1575                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1576         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1577                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1578
1579         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1580                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1581         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1582                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1583
1584         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1585                    intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1586
1587         mutex_unlock(&dev->mode_config.mutex);
1588
1589         return 0;
1590 }
1591
1592 static ssize_t
1593 i915_wedged_read(struct file *filp,
1594                  char __user *ubuf,
1595                  size_t max,
1596                  loff_t *ppos)
1597 {
1598         struct drm_device *dev = filp->private_data;
1599         drm_i915_private_t *dev_priv = dev->dev_private;
1600         char buf[80];
1601         int len;
1602
1603         len = snprintf(buf, sizeof(buf),
1604                        "wedged :  %d\n",
1605                        atomic_read(&dev_priv->mm.wedged));
1606
1607         if (len > sizeof(buf))
1608                 len = sizeof(buf);
1609
1610         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1611 }
1612
1613 static ssize_t
1614 i915_wedged_write(struct file *filp,
1615                   const char __user *ubuf,
1616                   size_t cnt,
1617                   loff_t *ppos)
1618 {
1619         struct drm_device *dev = filp->private_data;
1620         char buf[20];
1621         int val = 1;
1622
1623         if (cnt > 0) {
1624                 if (cnt > sizeof(buf) - 1)
1625                         return -EINVAL;
1626
1627                 if (copy_from_user(buf, ubuf, cnt))
1628                         return -EFAULT;
1629                 buf[cnt] = 0;
1630
1631                 val = simple_strtoul(buf, NULL, 0);
1632         }
1633
1634         DRM_INFO("Manually setting wedged to %d\n", val);
1635         i915_handle_error(dev, val);
1636
1637         return cnt;
1638 }
1639
1640 static const struct file_operations i915_wedged_fops = {
1641         .owner = THIS_MODULE,
1642         .open = simple_open,
1643         .read = i915_wedged_read,
1644         .write = i915_wedged_write,
1645         .llseek = default_llseek,
1646 };
1647
1648 static ssize_t
1649 i915_ring_stop_read(struct file *filp,
1650                     char __user *ubuf,
1651                     size_t max,
1652                     loff_t *ppos)
1653 {
1654         struct drm_device *dev = filp->private_data;
1655         drm_i915_private_t *dev_priv = dev->dev_private;
1656         char buf[20];
1657         int len;
1658
1659         len = snprintf(buf, sizeof(buf),
1660                        "0x%08x\n", dev_priv->stop_rings);
1661
1662         if (len > sizeof(buf))
1663                 len = sizeof(buf);
1664
1665         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1666 }
1667
1668 static ssize_t
1669 i915_ring_stop_write(struct file *filp,
1670                      const char __user *ubuf,
1671                      size_t cnt,
1672                      loff_t *ppos)
1673 {
1674         struct drm_device *dev = filp->private_data;
1675         struct drm_i915_private *dev_priv = dev->dev_private;
1676         char buf[20];
1677         int val = 0;
1678
1679         if (cnt > 0) {
1680                 if (cnt > sizeof(buf) - 1)
1681                         return -EINVAL;
1682
1683                 if (copy_from_user(buf, ubuf, cnt))
1684                         return -EFAULT;
1685                 buf[cnt] = 0;
1686
1687                 val = simple_strtoul(buf, NULL, 0);
1688         }
1689
1690         DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1691
1692         mutex_lock(&dev->struct_mutex);
1693         dev_priv->stop_rings = val;
1694         mutex_unlock(&dev->struct_mutex);
1695
1696         return cnt;
1697 }
1698
1699 static const struct file_operations i915_ring_stop_fops = {
1700         .owner = THIS_MODULE,
1701         .open = simple_open,
1702         .read = i915_ring_stop_read,
1703         .write = i915_ring_stop_write,
1704         .llseek = default_llseek,
1705 };
1706
1707 static ssize_t
1708 i915_max_freq_read(struct file *filp,
1709                    char __user *ubuf,
1710                    size_t max,
1711                    loff_t *ppos)
1712 {
1713         struct drm_device *dev = filp->private_data;
1714         drm_i915_private_t *dev_priv = dev->dev_private;
1715         char buf[80];
1716         int len;
1717
1718         len = snprintf(buf, sizeof(buf),
1719                        "max freq: %d\n", dev_priv->max_delay * 50);
1720
1721         if (len > sizeof(buf))
1722                 len = sizeof(buf);
1723
1724         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1725 }
1726
1727 static ssize_t
1728 i915_max_freq_write(struct file *filp,
1729                   const char __user *ubuf,
1730                   size_t cnt,
1731                   loff_t *ppos)
1732 {
1733         struct drm_device *dev = filp->private_data;
1734         struct drm_i915_private *dev_priv = dev->dev_private;
1735         char buf[20];
1736         int val = 1;
1737
1738         if (cnt > 0) {
1739                 if (cnt > sizeof(buf) - 1)
1740                         return -EINVAL;
1741
1742                 if (copy_from_user(buf, ubuf, cnt))
1743                         return -EFAULT;
1744                 buf[cnt] = 0;
1745
1746                 val = simple_strtoul(buf, NULL, 0);
1747         }
1748
1749         DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1750
1751         /*
1752          * Turbo will still be enabled, but won't go above the set value.
1753          */
1754         dev_priv->max_delay = val / 50;
1755
1756         gen6_set_rps(dev, val / 50);
1757
1758         return cnt;
1759 }
1760
1761 static const struct file_operations i915_max_freq_fops = {
1762         .owner = THIS_MODULE,
1763         .open = simple_open,
1764         .read = i915_max_freq_read,
1765         .write = i915_max_freq_write,
1766         .llseek = default_llseek,
1767 };
1768
1769 static ssize_t
1770 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1771                    loff_t *ppos)
1772 {
1773         struct drm_device *dev = filp->private_data;
1774         drm_i915_private_t *dev_priv = dev->dev_private;
1775         char buf[80];
1776         int len;
1777
1778         len = snprintf(buf, sizeof(buf),
1779                        "min freq: %d\n", dev_priv->min_delay * 50);
1780
1781         if (len > sizeof(buf))
1782                 len = sizeof(buf);
1783
1784         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1785 }
1786
1787 static ssize_t
1788 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1789                     loff_t *ppos)
1790 {
1791         struct drm_device *dev = filp->private_data;
1792         struct drm_i915_private *dev_priv = dev->dev_private;
1793         char buf[20];
1794         int val = 1;
1795
1796         if (cnt > 0) {
1797                 if (cnt > sizeof(buf) - 1)
1798                         return -EINVAL;
1799
1800                 if (copy_from_user(buf, ubuf, cnt))
1801                         return -EFAULT;
1802                 buf[cnt] = 0;
1803
1804                 val = simple_strtoul(buf, NULL, 0);
1805         }
1806
1807         DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1808
1809         /*
1810          * Turbo will still be enabled, but won't go below the set value.
1811          */
1812         dev_priv->min_delay = val / 50;
1813
1814         gen6_set_rps(dev, val / 50);
1815
1816         return cnt;
1817 }
1818
1819 static const struct file_operations i915_min_freq_fops = {
1820         .owner = THIS_MODULE,
1821         .open = simple_open,
1822         .read = i915_min_freq_read,
1823         .write = i915_min_freq_write,
1824         .llseek = default_llseek,
1825 };
1826
1827 static ssize_t
1828 i915_cache_sharing_read(struct file *filp,
1829                    char __user *ubuf,
1830                    size_t max,
1831                    loff_t *ppos)
1832 {
1833         struct drm_device *dev = filp->private_data;
1834         drm_i915_private_t *dev_priv = dev->dev_private;
1835         char buf[80];
1836         u32 snpcr;
1837         int len;
1838
1839         mutex_lock(&dev_priv->dev->struct_mutex);
1840         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1841         mutex_unlock(&dev_priv->dev->struct_mutex);
1842
1843         len = snprintf(buf, sizeof(buf),
1844                        "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1845                        GEN6_MBC_SNPCR_SHIFT);
1846
1847         if (len > sizeof(buf))
1848                 len = sizeof(buf);
1849
1850         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1851 }
1852
1853 static ssize_t
1854 i915_cache_sharing_write(struct file *filp,
1855                   const char __user *ubuf,
1856                   size_t cnt,
1857                   loff_t *ppos)
1858 {
1859         struct drm_device *dev = filp->private_data;
1860         struct drm_i915_private *dev_priv = dev->dev_private;
1861         char buf[20];
1862         u32 snpcr;
1863         int val = 1;
1864
1865         if (cnt > 0) {
1866                 if (cnt > sizeof(buf) - 1)
1867                         return -EINVAL;
1868
1869                 if (copy_from_user(buf, ubuf, cnt))
1870                         return -EFAULT;
1871                 buf[cnt] = 0;
1872
1873                 val = simple_strtoul(buf, NULL, 0);
1874         }
1875
1876         if (val < 0 || val > 3)
1877                 return -EINVAL;
1878
1879         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1880
1881         /* Update the cache sharing policy here as well */
1882         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1883         snpcr &= ~GEN6_MBC_SNPCR_MASK;
1884         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1885         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1886
1887         return cnt;
1888 }
1889
1890 static const struct file_operations i915_cache_sharing_fops = {
1891         .owner = THIS_MODULE,
1892         .open = simple_open,
1893         .read = i915_cache_sharing_read,
1894         .write = i915_cache_sharing_write,
1895         .llseek = default_llseek,
1896 };
1897
1898 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1899  * allocated we need to hook into the minor for release. */
1900 static int
1901 drm_add_fake_info_node(struct drm_minor *minor,
1902                        struct dentry *ent,
1903                        const void *key)
1904 {
1905         struct drm_info_node *node;
1906
1907         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1908         if (node == NULL) {
1909                 debugfs_remove(ent);
1910                 return -ENOMEM;
1911         }
1912
1913         node->minor = minor;
1914         node->dent = ent;
1915         node->info_ent = (void *) key;
1916
1917         mutex_lock(&minor->debugfs_lock);
1918         list_add(&node->list, &minor->debugfs_list);
1919         mutex_unlock(&minor->debugfs_lock);
1920
1921         return 0;
1922 }
1923
1924 static int i915_forcewake_open(struct inode *inode, struct file *file)
1925 {
1926         struct drm_device *dev = inode->i_private;
1927         struct drm_i915_private *dev_priv = dev->dev_private;
1928         int ret;
1929
1930         if (INTEL_INFO(dev)->gen < 6)
1931                 return 0;
1932
1933         ret = mutex_lock_interruptible(&dev->struct_mutex);
1934         if (ret)
1935                 return ret;
1936         gen6_gt_force_wake_get(dev_priv);
1937         mutex_unlock(&dev->struct_mutex);
1938
1939         return 0;
1940 }
1941
1942 static int i915_forcewake_release(struct inode *inode, struct file *file)
1943 {
1944         struct drm_device *dev = inode->i_private;
1945         struct drm_i915_private *dev_priv = dev->dev_private;
1946
1947         if (INTEL_INFO(dev)->gen < 6)
1948                 return 0;
1949
1950         /*
1951          * It's bad that we can potentially hang userspace if struct_mutex gets
1952          * forever stuck.  However, if we cannot acquire this lock it means that
1953          * almost certainly the driver has hung, is not unload-able. Therefore
1954          * hanging here is probably a minor inconvenience not to be seen my
1955          * almost every user.
1956          */
1957         mutex_lock(&dev->struct_mutex);
1958         gen6_gt_force_wake_put(dev_priv);
1959         mutex_unlock(&dev->struct_mutex);
1960
1961         return 0;
1962 }
1963
1964 static const struct file_operations i915_forcewake_fops = {
1965         .owner = THIS_MODULE,
1966         .open = i915_forcewake_open,
1967         .release = i915_forcewake_release,
1968 };
1969
1970 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1971 {
1972         struct drm_device *dev = minor->dev;
1973         struct dentry *ent;
1974
1975         ent = debugfs_create_file("i915_forcewake_user",
1976                                   S_IRUSR,
1977                                   root, dev,
1978                                   &i915_forcewake_fops);
1979         if (IS_ERR(ent))
1980                 return PTR_ERR(ent);
1981
1982         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
1983 }
1984
1985 static int i915_debugfs_create(struct dentry *root,
1986                                struct drm_minor *minor,
1987                                const char *name,
1988                                const struct file_operations *fops)
1989 {
1990         struct drm_device *dev = minor->dev;
1991         struct dentry *ent;
1992
1993         ent = debugfs_create_file(name,
1994                                   S_IRUGO | S_IWUSR,
1995                                   root, dev,
1996                                   fops);
1997         if (IS_ERR(ent))
1998                 return PTR_ERR(ent);
1999
2000         return drm_add_fake_info_node(minor, ent, fops);
2001 }
2002
2003 static struct drm_info_list i915_debugfs_list[] = {
2004         {"i915_capabilities", i915_capabilities, 0},
2005         {"i915_gem_objects", i915_gem_object_info, 0},
2006         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2007         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2008         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2009         {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
2010         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2011         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2012         {"i915_gem_request", i915_gem_request_info, 0},
2013         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2014         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2015         {"i915_gem_interrupt", i915_interrupt_info, 0},
2016         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2017         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2018         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2019         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2020         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2021         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2022         {"i915_inttoext_table", i915_inttoext_table, 0},
2023         {"i915_drpc_info", i915_drpc_info, 0},
2024         {"i915_emon_status", i915_emon_status, 0},
2025         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2026         {"i915_gfxec", i915_gfxec, 0},
2027         {"i915_fbc_status", i915_fbc_status, 0},
2028         {"i915_sr_status", i915_sr_status, 0},
2029         {"i915_opregion", i915_opregion, 0},
2030         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2031         {"i915_context_status", i915_context_status, 0},
2032         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2033         {"i915_swizzle_info", i915_swizzle_info, 0},
2034         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2035         {"i915_dpio", i915_dpio_info, 0},
2036 };
2037 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2038
2039 int i915_debugfs_init(struct drm_minor *minor)
2040 {
2041         int ret;
2042
2043         ret = i915_debugfs_create(minor->debugfs_root, minor,
2044                                   "i915_wedged",
2045                                   &i915_wedged_fops);
2046         if (ret)
2047                 return ret;
2048
2049         ret = i915_forcewake_create(minor->debugfs_root, minor);
2050         if (ret)
2051                 return ret;
2052
2053         ret = i915_debugfs_create(minor->debugfs_root, minor,
2054                                   "i915_max_freq",
2055                                   &i915_max_freq_fops);
2056         if (ret)
2057                 return ret;
2058
2059         ret = i915_debugfs_create(minor->debugfs_root, minor,
2060                                   "i915_min_freq",
2061                                   &i915_min_freq_fops);
2062         if (ret)
2063                 return ret;
2064
2065         ret = i915_debugfs_create(minor->debugfs_root, minor,
2066                                   "i915_cache_sharing",
2067                                   &i915_cache_sharing_fops);
2068         if (ret)
2069                 return ret;
2070         ret = i915_debugfs_create(minor->debugfs_root, minor,
2071                                   "i915_ring_stop",
2072                                   &i915_ring_stop_fops);
2073         if (ret)
2074                 return ret;
2075
2076         ret = i915_debugfs_create(minor->debugfs_root, minor,
2077                                   "i915_error_state",
2078                                   &i915_error_state_fops);
2079         if (ret)
2080                 return ret;
2081
2082         return drm_debugfs_create_files(i915_debugfs_list,
2083                                         I915_DEBUGFS_ENTRIES,
2084                                         minor->debugfs_root, minor);
2085 }
2086
2087 void i915_debugfs_cleanup(struct drm_minor *minor)
2088 {
2089         drm_debugfs_remove_files(i915_debugfs_list,
2090                                  I915_DEBUGFS_ENTRIES, minor);
2091         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2092                                  1, minor);
2093         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2094                                  1, minor);
2095         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2096                                  1, minor);
2097         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2098                                  1, minor);
2099         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2100                                  1, minor);
2101         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2102                                  1, minor);
2103         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2104                                  1, minor);
2105 }
2106
2107 #endif /* CONFIG_DEBUG_FS */