drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include <drm/drmP.h>
  34 #include "intel_drv.h"
  35 #include "intel_ringbuffer.h"
  36 #include <drm/i915_drm.h>
  37 #include "i915_drv.h"
  38
  39 #define DRM_I915_RING_DEBUG 1
  40
  41
  42 #if defined(CONFIG_DEBUG_FS)
  43
  44 enum {
  45         ACTIVE_LIST,
  46         FLUSHING_LIST,
  47         INACTIVE_LIST,
  48         PINNED_LIST,
  49 };
  50
  51 static const char *yesno(int v)
  52 {
  53         return v ? "yes" : "no";
  54 }
  55
  56 static int i915_capabilities(struct seq_file *m, void *data)
  57 {
  58         struct drm_info_node *node = (struct drm_info_node *) m->private;
  59         struct drm_device *dev = node->minor->dev;
  60         const struct intel_device_info *info = INTEL_INFO(dev);
  61
  62         seq_printf(m, "gen: %d\n", info->gen);
  63         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  64 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  65         B(is_mobile);
  66         B(is_i85x);
  67         B(is_i915g);
  68         B(is_i945gm);
  69         B(is_g33);
  70         B(need_gfx_hws);
  71         B(is_g4x);
  72         B(is_pineview);
  73         B(is_broadwater);
  74         B(is_crestline);
  75         B(has_fbc);
  76         B(has_pipe_cxsr);
  77         B(has_hotplug);
  78         B(cursor_needs_physical);
  79         B(has_overlay);
  80         B(overlay_needs_physical);
  81         B(supports_tv);
  82         B(has_bsd_ring);
  83         B(has_blt_ring);
  84         B(has_llc);
  85 #undef B
  86
  87         return 0;
  88 }
  89
  90 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  91 {
  92         if (obj->user_pin_count > 0)
  93                 return "P";
  94         else if (obj->pin_count > 0)
  95                 return "p";
  96         else
  97                 return " ";
  98 }
  99
 100 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
 101 {
 102         switch (obj->tiling_mode) {
 103         default:
 104         case I915_TILING_NONE: return " ";
 105         case I915_TILING_X: return "X";
 106         case I915_TILING_Y: return "Y";
 107         }
 108 }
 109
 110 static const char *cache_level_str(int type)
 111 {
 112         switch (type) {
 113         case I915_CACHE_NONE: return " uncached";
 114         case I915_CACHE_LLC: return " snooped (LLC)";
 115         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
 116         default: return "";
 117         }
 118 }
 119
 120 static void
 121 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 122 {
 123         seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d%s%s%s",
 124                    &obj->base,
 125                    get_pin_flag(obj),
 126                    get_tiling_flag(obj),
 127                    obj->base.size / 1024,
 128                    obj->base.read_domains,
 129                    obj->base.write_domain,
 130                    obj->last_rendering_seqno,
 131                    obj->last_fenced_seqno,
 132                    cache_level_str(obj->cache_level),
 133                    obj->dirty ? " dirty" : "",
 134                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 135         if (obj->base.name)
 136                 seq_printf(m, " (name: %d)", obj->base.name);
 137         if (obj->fence_reg != I915_FENCE_REG_NONE)
 138                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 139         if (obj->gtt_space != NULL)
 140                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 141                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 142         if (obj->pin_mappable || obj->fault_mappable) {
 143                 char s[3], *t = s;
 144                 if (obj->pin_mappable)
 145                         *t++ = 'p';
 146                 if (obj->fault_mappable)
 147                         *t++ = 'f';
 148                 *t = '\0';
 149                 seq_printf(m, " (%s mappable)", s);
 150         }
 151         if (obj->ring != NULL)
 152                 seq_printf(m, " (%s)", obj->ring->name);
 153 }
 154
 155 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 156 {
 157         struct drm_info_node *node = (struct drm_info_node *) m->private;
 158         uintptr_t list = (uintptr_t) node->info_ent->data;
 159         struct list_head *head;
 160         struct drm_device *dev = node->minor->dev;
 161         drm_i915_private_t *dev_priv = dev->dev_private;
 162         struct drm_i915_gem_object *obj;
 163         size_t total_obj_size, total_gtt_size;
 164         int count, ret;
 165
 166         ret = mutex_lock_interruptible(&dev->struct_mutex);
 167         if (ret)
 168                 return ret;
 169
 170         switch (list) {
 171         case ACTIVE_LIST:
 172                 seq_printf(m, "Active:\n");
 173                 head = &dev_priv->mm.active_list;
 174                 break;
 175         case INACTIVE_LIST:
 176                 seq_printf(m, "Inactive:\n");
 177                 head = &dev_priv->mm.inactive_list;
 178                 break;
 179         case FLUSHING_LIST:
 180                 seq_printf(m, "Flushing:\n");
 181                 head = &dev_priv->mm.flushing_list;
 182                 break;
 183         default:
 184                 mutex_unlock(&dev->struct_mutex);
 185                 return -EINVAL;
 186         }
 187
 188         total_obj_size = total_gtt_size = count = 0;
 189         list_for_each_entry(obj, head, mm_list) {
 190                 seq_printf(m, "   ");
 191                 describe_obj(m, obj);
 192                 seq_printf(m, "\n");
 193                 total_obj_size += obj->base.size;
 194                 total_gtt_size += obj->gtt_space->size;
 195                 count++;
 196         }
 197         mutex_unlock(&dev->struct_mutex);
 198
 199         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 200                    count, total_obj_size, total_gtt_size);
 201         return 0;
 202 }
 203
 204 #define count_objects(list, member) do { \
 205         list_for_each_entry(obj, list, member) { \
 206                 size += obj->gtt_space->size; \
 207                 ++count; \
 208                 if (obj->map_and_fenceable) { \
 209                         mappable_size += obj->gtt_space->size; \
 210                         ++mappable_count; \
 211                 } \
 212         } \
 213 } while (0)
 214
 215 static int i915_gem_object_info(struct seq_file *m, void* data)
 216 {
 217         struct drm_info_node *node = (struct drm_info_node *) m->private;
 218         struct drm_device *dev = node->minor->dev;
 219         struct drm_i915_private *dev_priv = dev->dev_private;
 220         u32 count, mappable_count;
 221         size_t size, mappable_size;
 222         struct drm_i915_gem_object *obj;
 223         int ret;
 224
 225         ret = mutex_lock_interruptible(&dev->struct_mutex);
 226         if (ret)
 227                 return ret;
 228
 229         seq_printf(m, "%u objects, %zu bytes\n",
 230                    dev_priv->mm.object_count,
 231                    dev_priv->mm.object_memory);
 232
 233         size = count = mappable_size = mappable_count = 0;
 234         count_objects(&dev_priv->mm.gtt_list, gtt_list);
 235         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 236                    count, mappable_count, size, mappable_size);
 237
 238         size = count = mappable_size = mappable_count = 0;
 239         count_objects(&dev_priv->mm.active_list, mm_list);
 240         count_objects(&dev_priv->mm.flushing_list, mm_list);
 241         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 242                    count, mappable_count, size, mappable_size);
 243
 244         size = count = mappable_size = mappable_count = 0;
 245         count_objects(&dev_priv->mm.inactive_list, mm_list);
 246         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 247                    count, mappable_count, size, mappable_size);
 248
 249         size = count = mappable_size = mappable_count = 0;
 250         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 251                 if (obj->fault_mappable) {
 252                         size += obj->gtt_space->size;
 253                         ++count;
 254                 }
 255                 if (obj->pin_mappable) {
 256                         mappable_size += obj->gtt_space->size;
 257                         ++mappable_count;
 258                 }
 259         }
 260         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 261                    mappable_count, mappable_size);
 262         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 263                    count, size);
 264
 265         seq_printf(m, "%zu [%zu] gtt total\n",
 266                    dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
 267
 268         mutex_unlock(&dev->struct_mutex);
 269
 270         return 0;
 271 }
 272
 273 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 274 {
 275         struct drm_info_node *node = (struct drm_info_node *) m->private;
 276         struct drm_device *dev = node->minor->dev;
 277         uintptr_t list = (uintptr_t) node->info_ent->data;
 278         struct drm_i915_private *dev_priv = dev->dev_private;
 279         struct drm_i915_gem_object *obj;
 280         size_t total_obj_size, total_gtt_size;
 281         int count, ret;
 282
 283         ret = mutex_lock_interruptible(&dev->struct_mutex);
 284         if (ret)
 285                 return ret;
 286
 287         total_obj_size = total_gtt_size = count = 0;
 288         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 289                 if (list == PINNED_LIST && obj->pin_count == 0)
 290                         continue;
 291
 292                 seq_printf(m, "   ");
 293                 describe_obj(m, obj);
 294                 seq_printf(m, "\n");
 295                 total_obj_size += obj->base.size;
 296                 total_gtt_size += obj->gtt_space->size;
 297                 count++;
 298         }
 299
 300         mutex_unlock(&dev->struct_mutex);
 301
 302         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 303                    count, total_obj_size, total_gtt_size);
 304
 305         return 0;
 306 }
 307
 308 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 309 {
 310         struct drm_info_node *node = (struct drm_info_node *) m->private;
 311         struct drm_device *dev = node->minor->dev;
 312         unsigned long flags;
 313         struct intel_crtc *crtc;
 314
 315         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 316                 const char pipe = pipe_name(crtc->pipe);
 317                 const char plane = plane_name(crtc->plane);
 318                 struct intel_unpin_work *work;
 319
 320                 spin_lock_irqsave(&dev->event_lock, flags);
 321                 work = crtc->unpin_work;
 322                 if (work == NULL) {
 323                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 324                                    pipe, plane);
 325                 } else {
 326                         if (!work->pending) {
 327                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 328                                            pipe, plane);
 329                         } else {
 330                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 331                                            pipe, plane);
 332                         }
 333                         if (work->enable_stall_check)
 334                                 seq_printf(m, "Stall check enabled, ");
 335                         else
 336                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 337                         seq_printf(m, "%d prepares\n", work->pending);
 338
 339                         if (work->old_fb_obj) {
 340                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 341                                 if (obj)
 342                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 343                         }
 344                         if (work->pending_flip_obj) {
 345                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 346                                 if (obj)
 347                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 348                         }
 349                 }
 350                 spin_unlock_irqrestore(&dev->event_lock, flags);
 351         }
 352
 353         return 0;
 354 }
 355
 356 static int i915_gem_request_info(struct seq_file *m, void *data)
 357 {
 358         struct drm_info_node *node = (struct drm_info_node *) m->private;
 359         struct drm_device *dev = node->minor->dev;
 360         drm_i915_private_t *dev_priv = dev->dev_private;
 361         struct drm_i915_gem_request *gem_request;
 362         int ret, count;
 363
 364         ret = mutex_lock_interruptible(&dev->struct_mutex);
 365         if (ret)
 366                 return ret;
 367
 368         count = 0;
 369         if (!list_empty(&dev_priv->ring[RCS].request_list)) {
 370                 seq_printf(m, "Render requests:\n");
 371                 list_for_each_entry(gem_request,
 372                                     &dev_priv->ring[RCS].request_list,
 373                                     list) {
 374                         seq_printf(m, "    %d @ %d\n",
 375                                    gem_request->seqno,
 376                                    (int) (jiffies - gem_request->emitted_jiffies));
 377                 }
 378                 count++;
 379         }
 380         if (!list_empty(&dev_priv->ring[VCS].request_list)) {
 381                 seq_printf(m, "BSD requests:\n");
 382                 list_for_each_entry(gem_request,
 383                                     &dev_priv->ring[VCS].request_list,
 384                                     list) {
 385                         seq_printf(m, "    %d @ %d\n",
 386                                    gem_request->seqno,
 387                                    (int) (jiffies - gem_request->emitted_jiffies));
 388                 }
 389                 count++;
 390         }
 391         if (!list_empty(&dev_priv->ring[BCS].request_list)) {
 392                 seq_printf(m, "BLT requests:\n");
 393                 list_for_each_entry(gem_request,
 394                                     &dev_priv->ring[BCS].request_list,
 395                                     list) {
 396                         seq_printf(m, "    %d @ %d\n",
 397                                    gem_request->seqno,
 398                                    (int) (jiffies - gem_request->emitted_jiffies));
 399                 }
 400                 count++;
 401         }
 402         mutex_unlock(&dev->struct_mutex);
 403
 404         if (count == 0)
 405                 seq_printf(m, "No requests\n");
 406
 407         return 0;
 408 }
 409
 410 static void i915_ring_seqno_info(struct seq_file *m,
 411                                  struct intel_ring_buffer *ring)
 412 {
 413         if (ring->get_seqno) {
 414                 seq_printf(m, "Current sequence (%s): %d\n",
 415                            ring->name, ring->get_seqno(ring));
 416         }
 417 }
 418
 419 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 420 {
 421         struct drm_info_node *node = (struct drm_info_node *) m->private;
 422         struct drm_device *dev = node->minor->dev;
 423         drm_i915_private_t *dev_priv = dev->dev_private;
 424         int ret, i;
 425
 426         ret = mutex_lock_interruptible(&dev->struct_mutex);
 427         if (ret)
 428                 return ret;
 429
 430         for (i = 0; i < I915_NUM_RINGS; i++)
 431                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 432
 433         mutex_unlock(&dev->struct_mutex);
 434
 435         return 0;
 436 }
 437
 438
 439 static int i915_interrupt_info(struct seq_file *m, void *data)
 440 {
 441         struct drm_info_node *node = (struct drm_info_node *) m->private;
 442         struct drm_device *dev = node->minor->dev;
 443         drm_i915_private_t *dev_priv = dev->dev_private;
 444         int ret, i, pipe;
 445
 446         ret = mutex_lock_interruptible(&dev->struct_mutex);
 447         if (ret)
 448                 return ret;
 449
 450         if (IS_VALLEYVIEW(dev)) {
 451                 seq_printf(m, "Display IER:\t%08x\n",
 452                            I915_READ(VLV_IER));
 453                 seq_printf(m, "Display IIR:\t%08x\n",
 454                            I915_READ(VLV_IIR));
 455                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 456                            I915_READ(VLV_IIR_RW));
 457                 seq_printf(m, "Display IMR:\t%08x\n",
 458                            I915_READ(VLV_IMR));
 459                 for_each_pipe(pipe)
 460                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 461                                    pipe_name(pipe),
 462                                    I915_READ(PIPESTAT(pipe)));
 463
 464                 seq_printf(m, "Master IER:\t%08x\n",
 465                            I915_READ(VLV_MASTER_IER));
 466
 467                 seq_printf(m, "Render IER:\t%08x\n",
 468                            I915_READ(GTIER));
 469                 seq_printf(m, "Render IIR:\t%08x\n",
 470                            I915_READ(GTIIR));
 471                 seq_printf(m, "Render IMR:\t%08x\n",
 472                            I915_READ(GTIMR));
 473
 474                 seq_printf(m, "PM IER:\t\t%08x\n",
 475                            I915_READ(GEN6_PMIER));
 476                 seq_printf(m, "PM IIR:\t\t%08x\n",
 477                            I915_READ(GEN6_PMIIR));
 478                 seq_printf(m, "PM IMR:\t\t%08x\n",
 479                            I915_READ(GEN6_PMIMR));
 480
 481                 seq_printf(m, "Port hotplug:\t%08x\n",
 482                            I915_READ(PORT_HOTPLUG_EN));
 483                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 484                            I915_READ(VLV_DPFLIPSTAT));
 485                 seq_printf(m, "DPINVGTT:\t%08x\n",
 486                            I915_READ(DPINVGTT));
 487
 488         } else if (!HAS_PCH_SPLIT(dev)) {
 489                 seq_printf(m, "Interrupt enable:    %08x\n",
 490                            I915_READ(IER));
 491                 seq_printf(m, "Interrupt identity:  %08x\n",
 492                            I915_READ(IIR));
 493                 seq_printf(m, "Interrupt mask:      %08x\n",
 494                            I915_READ(IMR));
 495                 for_each_pipe(pipe)
 496                         seq_printf(m, "Pipe %c stat:         %08x\n",
 497                                    pipe_name(pipe),
 498                                    I915_READ(PIPESTAT(pipe)));
 499         } else {
 500                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 501                            I915_READ(DEIER));
 502                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 503                            I915_READ(DEIIR));
 504                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 505                            I915_READ(DEIMR));
 506                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 507                            I915_READ(SDEIER));
 508                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 509                            I915_READ(SDEIIR));
 510                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 511                            I915_READ(SDEIMR));
 512                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 513                            I915_READ(GTIER));
 514                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 515                            I915_READ(GTIIR));
 516                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 517                            I915_READ(GTIMR));
 518         }
 519         seq_printf(m, "Interrupts received: %d\n",
 520                    atomic_read(&dev_priv->irq_received));
 521         for (i = 0; i < I915_NUM_RINGS; i++) {
 522                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 523                         seq_printf(m, "Graphics Interrupt mask (%s):    %08x\n",
 524                                    dev_priv->ring[i].name,
 525                                    I915_READ_IMR(&dev_priv->ring[i]));
 526                 }
 527                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 528         }
 529         mutex_unlock(&dev->struct_mutex);
 530
 531         return 0;
 532 }
 533
 534 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 535 {
 536         struct drm_info_node *node = (struct drm_info_node *) m->private;
 537         struct drm_device *dev = node->minor->dev;
 538         drm_i915_private_t *dev_priv = dev->dev_private;
 539         int i, ret;
 540
 541         ret = mutex_lock_interruptible(&dev->struct_mutex);
 542         if (ret)
 543                 return ret;
 544
 545         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 546         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 547         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 548                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 549
 550                 seq_printf(m, "Fenced object[%2d] = ", i);
 551                 if (obj == NULL)
 552                         seq_printf(m, "unused");
 553                 else
 554                         describe_obj(m, obj);
 555                 seq_printf(m, "\n");
 556         }
 557
 558         mutex_unlock(&dev->struct_mutex);
 559         return 0;
 560 }
 561
 562 static int i915_hws_info(struct seq_file *m, void *data)
 563 {
 564         struct drm_info_node *node = (struct drm_info_node *) m->private;
 565         struct drm_device *dev = node->minor->dev;
 566         drm_i915_private_t *dev_priv = dev->dev_private;
 567         struct intel_ring_buffer *ring;
 568         const volatile u32 __iomem *hws;
 569         int i;
 570
 571         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 572         hws = (volatile u32 __iomem *)ring->status_page.page_addr;
 573         if (hws == NULL)
 574                 return 0;
 575
 576         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 577                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 578                            i * 4,
 579                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 580         }
 581         return 0;
 582 }
 583
 584 static const char *ring_str(int ring)
 585 {
 586         switch (ring) {
 587         case RCS: return "render";
 588         case VCS: return "bsd";
 589         case BCS: return "blt";
 590         default: return "";
 591         }
 592 }
 593
 594 static const char *pin_flag(int pinned)
 595 {
 596         if (pinned > 0)
 597                 return " P";
 598         else if (pinned < 0)
 599                 return " p";
 600         else
 601                 return "";
 602 }
 603
 604 static const char *tiling_flag(int tiling)
 605 {
 606         switch (tiling) {
 607         default:
 608         case I915_TILING_NONE: return "";
 609         case I915_TILING_X: return " X";
 610         case I915_TILING_Y: return " Y";
 611         }
 612 }
 613
 614 static const char *dirty_flag(int dirty)
 615 {
 616         return dirty ? " dirty" : "";
 617 }
 618
 619 static const char *purgeable_flag(int purgeable)
 620 {
 621         return purgeable ? " purgeable" : "";
 622 }
 623
 624 static void print_error_buffers(struct seq_file *m,
 625                                 const char *name,
 626                                 struct drm_i915_error_buffer *err,
 627                                 int count)
 628 {
 629         seq_printf(m, "%s [%d]:\n", name, count);
 630
 631         while (count--) {
 632                 seq_printf(m, "  %08x %8u %04x %04x %08x%s%s%s%s%s%s%s",
 633                            err->gtt_offset,
 634                            err->size,
 635                            err->read_domains,
 636                            err->write_domain,
 637                            err->seqno,
 638                            pin_flag(err->pinned),
 639                            tiling_flag(err->tiling),
 640                            dirty_flag(err->dirty),
 641                            purgeable_flag(err->purgeable),
 642                            err->ring != -1 ? " " : "",
 643                            ring_str(err->ring),
 644                            cache_level_str(err->cache_level));
 645
 646                 if (err->name)
 647                         seq_printf(m, " (name: %d)", err->name);
 648                 if (err->fence_reg != I915_FENCE_REG_NONE)
 649                         seq_printf(m, " (fence: %d)", err->fence_reg);
 650
 651                 seq_printf(m, "\n");
 652                 err++;
 653         }
 654 }
 655
 656 static void i915_ring_error_state(struct seq_file *m,
 657                                   struct drm_device *dev,
 658                                   struct drm_i915_error_state *error,
 659                                   unsigned ring)
 660 {
 661         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 662         seq_printf(m, "%s command stream:\n", ring_str(ring));
 663         seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 664         seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 665         seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 666         seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 667         seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 668         seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 669         if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
 670                 seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
 671                 seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 672         }
 673         if (INTEL_INFO(dev)->gen >= 4)
 674                 seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 675         seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 676         seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 677         if (INTEL_INFO(dev)->gen >= 6) {
 678                 seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 679                 seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 680                 seq_printf(m, "  SYNC_0: 0x%08x\n",
 681                            error->semaphore_mboxes[ring][0]);
 682                 seq_printf(m, "  SYNC_1: 0x%08x\n",
 683                            error->semaphore_mboxes[ring][1]);
 684         }
 685         seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 686         seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 687         seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 688         seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 689 }
 690
 691 struct i915_error_state_file_priv {
 692         struct drm_device *dev;
 693         struct drm_i915_error_state *error;
 694 };
 695
 696 static int i915_error_state(struct seq_file *m, void *unused)
 697 {
 698         struct i915_error_state_file_priv *error_priv = m->private;
 699         struct drm_device *dev = error_priv->dev;
 700         drm_i915_private_t *dev_priv = dev->dev_private;
 701         struct drm_i915_error_state *error = error_priv->error;
 702         struct intel_ring_buffer *ring;
 703         int i, j, page, offset, elt;
 704
 705         if (!error) {
 706                 seq_printf(m, "no error state collected\n");
 707                 return 0;
 708         }
 709
 710         seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 711                    error->time.tv_usec);
 712         seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 713         seq_printf(m, "EIR: 0x%08x\n", error->eir);
 714         seq_printf(m, "IER: 0x%08x\n", error->ier);
 715         seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 716         seq_printf(m, "CCID: 0x%08x\n", error->ccid);
 717
 718         for (i = 0; i < dev_priv->num_fence_regs; i++)
 719                 seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 720
 721         if (INTEL_INFO(dev)->gen >= 6) {
 722                 seq_printf(m, "ERROR: 0x%08x\n", error->error);
 723                 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 724         }
 725
 726         for_each_ring(ring, dev_priv, i)
 727                 i915_ring_error_state(m, dev, error, i);
 728
 729         if (error->active_bo)
 730                 print_error_buffers(m, "Active",
 731                                     error->active_bo,
 732                                     error->active_bo_count);
 733
 734         if (error->pinned_bo)
 735                 print_error_buffers(m, "Pinned",
 736                                     error->pinned_bo,
 737                                     error->pinned_bo_count);
 738
 739         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 740                 struct drm_i915_error_object *obj;
 741
 742                 if ((obj = error->ring[i].batchbuffer)) {
 743                         seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
 744                                    dev_priv->ring[i].name,
 745                                    obj->gtt_offset);
 746                         offset = 0;
 747                         for (page = 0; page < obj->page_count; page++) {
 748                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 749                                         seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
 750                                         offset += 4;
 751                                 }
 752                         }
 753                 }
 754
 755                 if (error->ring[i].num_requests) {
 756                         seq_printf(m, "%s --- %d requests\n",
 757                                    dev_priv->ring[i].name,
 758                                    error->ring[i].num_requests);
 759                         for (j = 0; j < error->ring[i].num_requests; j++) {
 760                                 seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 761                                            error->ring[i].requests[j].seqno,
 762                                            error->ring[i].requests[j].jiffies,
 763                                            error->ring[i].requests[j].tail);
 764                         }
 765                 }
 766
 767                 if ((obj = error->ring[i].ringbuffer)) {
 768                         seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
 769                                    dev_priv->ring[i].name,
 770                                    obj->gtt_offset);
 771                         offset = 0;
 772                         for (page = 0; page < obj->page_count; page++) {
 773                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 774                                         seq_printf(m, "%08x :  %08x\n",
 775                                                    offset,
 776                                                    obj->pages[page][elt]);
 777                                         offset += 4;
 778                                 }
 779                         }
 780                 }
 781         }
 782
 783         if (error->overlay)
 784                 intel_overlay_print_error_state(m, error->overlay);
 785
 786         if (error->display)
 787                 intel_display_print_error_state(m, dev, error->display);
 788
 789         return 0;
 790 }
 791
 792 static ssize_t
 793 i915_error_state_write(struct file *filp,
 794                        const char __user *ubuf,
 795                        size_t cnt,
 796                        loff_t *ppos)
 797 {
 798         struct seq_file *m = filp->private_data;
 799         struct i915_error_state_file_priv *error_priv = m->private;
 800         struct drm_device *dev = error_priv->dev;
 801
 802         DRM_DEBUG_DRIVER("Resetting error state\n");
 803
 804         mutex_lock(&dev->struct_mutex);
 805         i915_destroy_error_state(dev);
 806         mutex_unlock(&dev->struct_mutex);
 807
 808         return cnt;
 809 }
 810
 811 static int i915_error_state_open(struct inode *inode, struct file *file)
 812 {
 813         struct drm_device *dev = inode->i_private;
 814         drm_i915_private_t *dev_priv = dev->dev_private;
 815         struct i915_error_state_file_priv *error_priv;
 816         unsigned long flags;
 817
 818         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 819         if (!error_priv)
 820                 return -ENOMEM;
 821
 822         error_priv->dev = dev;
 823
 824         spin_lock_irqsave(&dev_priv->error_lock, flags);
 825         error_priv->error = dev_priv->first_error;
 826         if (error_priv->error)
 827                 kref_get(&error_priv->error->ref);
 828         spin_unlock_irqrestore(&dev_priv->error_lock, flags);
 829
 830         return single_open(file, i915_error_state, error_priv);
 831 }
 832
 833 static int i915_error_state_release(struct inode *inode, struct file *file)
 834 {
 835         struct seq_file *m = file->private_data;
 836         struct i915_error_state_file_priv *error_priv = m->private;
 837
 838         if (error_priv->error)
 839                 kref_put(&error_priv->error->ref, i915_error_state_free);
 840         kfree(error_priv);
 841
 842         return single_release(inode, file);
 843 }
 844
 845 static const struct file_operations i915_error_state_fops = {
 846         .owner = THIS_MODULE,
 847         .open = i915_error_state_open,
 848         .read = seq_read,
 849         .write = i915_error_state_write,
 850         .llseek = default_llseek,
 851         .release = i915_error_state_release,
 852 };
 853
 854 static int i915_rstdby_delays(struct seq_file *m, void *unused)
 855 {
 856         struct drm_info_node *node = (struct drm_info_node *) m->private;
 857         struct drm_device *dev = node->minor->dev;
 858         drm_i915_private_t *dev_priv = dev->dev_private;
 859         u16 crstanddelay;
 860         int ret;
 861
 862         ret = mutex_lock_interruptible(&dev->struct_mutex);
 863         if (ret)
 864                 return ret;
 865
 866         crstanddelay = I915_READ16(CRSTANDVID);
 867
 868         mutex_unlock(&dev->struct_mutex);
 869
 870         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
 871
 872         return 0;
 873 }
 874
 875 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
 876 {
 877         struct drm_info_node *node = (struct drm_info_node *) m->private;
 878         struct drm_device *dev = node->minor->dev;
 879         drm_i915_private_t *dev_priv = dev->dev_private;
 880         int ret;
 881
 882         if (IS_GEN5(dev)) {
 883                 u16 rgvswctl = I915_READ16(MEMSWCTL);
 884                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
 885
 886                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
 887                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
 888                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 889                            MEMSTAT_VID_SHIFT);
 890                 seq_printf(m, "Current P-state: %d\n",
 891                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 892         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
 893                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
 894                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
 895                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
 896                 u32 rpstat;
 897                 u32 rpupei, rpcurup, rpprevup;
 898                 u32 rpdownei, rpcurdown, rpprevdown;
 899                 int max_freq;
 900
 901                 /* RPSTAT1 is in the GT power well */
 902                 ret = mutex_lock_interruptible(&dev->struct_mutex);
 903                 if (ret)
 904                         return ret;
 905
 906                 gen6_gt_force_wake_get(dev_priv);
 907
 908                 rpstat = I915_READ(GEN6_RPSTAT1);
 909                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
 910                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
 911                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
 912                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
 913                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
 914                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
 915
 916                 gen6_gt_force_wake_put(dev_priv);
 917                 mutex_unlock(&dev->struct_mutex);
 918
 919                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
 920                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
 921                 seq_printf(m, "Render p-state ratio: %d\n",
 922                            (gt_perf_status & 0xff00) >> 8);
 923                 seq_printf(m, "Render p-state VID: %d\n",
 924                            gt_perf_status & 0xff);
 925                 seq_printf(m, "Render p-state limit: %d\n",
 926                            rp_state_limits & 0xff);
 927                 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
 928                                                 GEN6_CAGF_SHIFT) * 50);
 929                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
 930                            GEN6_CURICONT_MASK);
 931                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
 932                            GEN6_CURBSYTAVG_MASK);
 933                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
 934                            GEN6_CURBSYTAVG_MASK);
 935                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
 936                            GEN6_CURIAVG_MASK);
 937                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
 938                            GEN6_CURBSYTAVG_MASK);
 939                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
 940                            GEN6_CURBSYTAVG_MASK);
 941
 942                 max_freq = (rp_state_cap & 0xff0000) >> 16;
 943                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
 944                            max_freq * 50);
 945
 946                 max_freq = (rp_state_cap & 0xff00) >> 8;
 947                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
 948                            max_freq * 50);
 949
 950                 max_freq = rp_state_cap & 0xff;
 951                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
 952                            max_freq * 50);
 953         } else {
 954                 seq_printf(m, "no P-state info available\n");
 955         }
 956
 957         return 0;
 958 }
 959
 960 static int i915_delayfreq_table(struct seq_file *m, void *unused)
 961 {
 962         struct drm_info_node *node = (struct drm_info_node *) m->private;
 963         struct drm_device *dev = node->minor->dev;
 964         drm_i915_private_t *dev_priv = dev->dev_private;
 965         u32 delayfreq;
 966         int ret, i;
 967
 968         ret = mutex_lock_interruptible(&dev->struct_mutex);
 969         if (ret)
 970                 return ret;
 971
 972         for (i = 0; i < 16; i++) {
 973                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
 974                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
 975                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
 976         }
 977
 978         mutex_unlock(&dev->struct_mutex);
 979
 980         return 0;
 981 }
 982
 983 static inline int MAP_TO_MV(int map)
 984 {
 985         return 1250 - (map * 25);
 986 }
 987
 988 static int i915_inttoext_table(struct seq_file *m, void *unused)
 989 {
 990         struct drm_info_node *node = (struct drm_info_node *) m->private;
 991         struct drm_device *dev = node->minor->dev;
 992         drm_i915_private_t *dev_priv = dev->dev_private;
 993         u32 inttoext;
 994         int ret, i;
 995
 996         ret = mutex_lock_interruptible(&dev->struct_mutex);
 997         if (ret)
 998                 return ret;
 999
1000         for (i = 1; i <= 32; i++) {
1001                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1002                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1003         }
1004
1005         mutex_unlock(&dev->struct_mutex);
1006
1007         return 0;
1008 }
1009
1010 static int ironlake_drpc_info(struct seq_file *m)
1011 {
1012         struct drm_info_node *node = (struct drm_info_node *) m->private;
1013         struct drm_device *dev = node->minor->dev;
1014         drm_i915_private_t *dev_priv = dev->dev_private;
1015         u32 rgvmodectl, rstdbyctl;
1016         u16 crstandvid;
1017         int ret;
1018
1019         ret = mutex_lock_interruptible(&dev->struct_mutex);
1020         if (ret)
1021                 return ret;
1022
1023         rgvmodectl = I915_READ(MEMMODECTL);
1024         rstdbyctl = I915_READ(RSTDBYCTL);
1025         crstandvid = I915_READ16(CRSTANDVID);
1026
1027         mutex_unlock(&dev->struct_mutex);
1028
1029         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1030                    "yes" : "no");
1031         seq_printf(m, "Boost freq: %d\n",
1032                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1033                    MEMMODE_BOOST_FREQ_SHIFT);
1034         seq_printf(m, "HW control enabled: %s\n",
1035                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1036         seq_printf(m, "SW control enabled: %s\n",
1037                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1038         seq_printf(m, "Gated voltage change: %s\n",
1039                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1040         seq_printf(m, "Starting frequency: P%d\n",
1041                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1042         seq_printf(m, "Max P-state: P%d\n",
1043                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1044         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1045         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1046         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1047         seq_printf(m, "Render standby enabled: %s\n",
1048                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1049         seq_printf(m, "Current RS state: ");
1050         switch (rstdbyctl & RSX_STATUS_MASK) {
1051         case RSX_STATUS_ON:
1052                 seq_printf(m, "on\n");
1053                 break;
1054         case RSX_STATUS_RC1:
1055                 seq_printf(m, "RC1\n");
1056                 break;
1057         case RSX_STATUS_RC1E:
1058                 seq_printf(m, "RC1E\n");
1059                 break;
1060         case RSX_STATUS_RS1:
1061                 seq_printf(m, "RS1\n");
1062                 break;
1063         case RSX_STATUS_RS2:
1064                 seq_printf(m, "RS2 (RC6)\n");
1065                 break;
1066         case RSX_STATUS_RS3:
1067                 seq_printf(m, "RC3 (RC6+)\n");
1068                 break;
1069         default:
1070                 seq_printf(m, "unknown\n");
1071                 break;
1072         }
1073
1074         return 0;
1075 }
1076
1077 static int gen6_drpc_info(struct seq_file *m)
1078 {
1079
1080         struct drm_info_node *node = (struct drm_info_node *) m->private;
1081         struct drm_device *dev = node->minor->dev;
1082         struct drm_i915_private *dev_priv = dev->dev_private;
1083         u32 rpmodectl1, gt_core_status, rcctl1;
1084         unsigned forcewake_count;
1085         int count=0, ret;
1086
1087
1088         ret = mutex_lock_interruptible(&dev->struct_mutex);
1089         if (ret)
1090                 return ret;
1091
1092         spin_lock_irq(&dev_priv->gt_lock);
1093         forcewake_count = dev_priv->forcewake_count;
1094         spin_unlock_irq(&dev_priv->gt_lock);
1095
1096         if (forcewake_count) {
1097                 seq_printf(m, "RC information inaccurate because somebody "
1098                               "holds a forcewake reference \n");
1099         } else {
1100                 /* NB: we cannot use forcewake, else we read the wrong values */
1101                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1102                         udelay(10);
1103                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1104         }
1105
1106         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1107         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1108
1109         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1110         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1111         mutex_unlock(&dev->struct_mutex);
1112
1113         seq_printf(m, "Video Turbo Mode: %s\n",
1114                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1115         seq_printf(m, "HW control enabled: %s\n",
1116                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1117         seq_printf(m, "SW control enabled: %s\n",
1118                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1119                           GEN6_RP_MEDIA_SW_MODE));
1120         seq_printf(m, "RC1e Enabled: %s\n",
1121                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1122         seq_printf(m, "RC6 Enabled: %s\n",
1123                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1124         seq_printf(m, "Deep RC6 Enabled: %s\n",
1125                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1126         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1127                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1128         seq_printf(m, "Current RC state: ");
1129         switch (gt_core_status & GEN6_RCn_MASK) {
1130         case GEN6_RC0:
1131                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1132                         seq_printf(m, "Core Power Down\n");
1133                 else
1134                         seq_printf(m, "on\n");
1135                 break;
1136         case GEN6_RC3:
1137                 seq_printf(m, "RC3\n");
1138                 break;
1139         case GEN6_RC6:
1140                 seq_printf(m, "RC6\n");
1141                 break;
1142         case GEN6_RC7:
1143                 seq_printf(m, "RC7\n");
1144                 break;
1145         default:
1146                 seq_printf(m, "Unknown\n");
1147                 break;
1148         }
1149
1150         seq_printf(m, "Core Power Down: %s\n",
1151                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1152
1153         /* Not exactly sure what this is */
1154         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1155                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1156         seq_printf(m, "RC6 residency since boot: %u\n",
1157                    I915_READ(GEN6_GT_GFX_RC6));
1158         seq_printf(m, "RC6+ residency since boot: %u\n",
1159                    I915_READ(GEN6_GT_GFX_RC6p));
1160         seq_printf(m, "RC6++ residency since boot: %u\n",
1161                    I915_READ(GEN6_GT_GFX_RC6pp));
1162
1163         return 0;
1164 }
1165
1166 static int i915_drpc_info(struct seq_file *m, void *unused)
1167 {
1168         struct drm_info_node *node = (struct drm_info_node *) m->private;
1169         struct drm_device *dev = node->minor->dev;
1170
1171         if (IS_GEN6(dev) || IS_GEN7(dev))
1172                 return gen6_drpc_info(m);
1173         else
1174                 return ironlake_drpc_info(m);
1175 }
1176
1177 static int i915_fbc_status(struct seq_file *m, void *unused)
1178 {
1179         struct drm_info_node *node = (struct drm_info_node *) m->private;
1180         struct drm_device *dev = node->minor->dev;
1181         drm_i915_private_t *dev_priv = dev->dev_private;
1182
1183         if (!I915_HAS_FBC(dev)) {
1184                 seq_printf(m, "FBC unsupported on this chipset\n");
1185                 return 0;
1186         }
1187
1188         if (intel_fbc_enabled(dev)) {
1189                 seq_printf(m, "FBC enabled\n");
1190         } else {
1191                 seq_printf(m, "FBC disabled: ");
1192                 switch (dev_priv->no_fbc_reason) {
1193                 case FBC_NO_OUTPUT:
1194                         seq_printf(m, "no outputs");
1195                         break;
1196                 case FBC_STOLEN_TOO_SMALL:
1197                         seq_printf(m, "not enough stolen memory");
1198                         break;
1199                 case FBC_UNSUPPORTED_MODE:
1200                         seq_printf(m, "mode not supported");
1201                         break;
1202                 case FBC_MODE_TOO_LARGE:
1203                         seq_printf(m, "mode too large");
1204                         break;
1205                 case FBC_BAD_PLANE:
1206                         seq_printf(m, "FBC unsupported on plane");
1207                         break;
1208                 case FBC_NOT_TILED:
1209                         seq_printf(m, "scanout buffer not tiled");
1210                         break;
1211                 case FBC_MULTIPLE_PIPES:
1212                         seq_printf(m, "multiple pipes are enabled");
1213                         break;
1214                 case FBC_MODULE_PARAM:
1215                         seq_printf(m, "disabled per module param (default off)");
1216                         break;
1217                 default:
1218                         seq_printf(m, "unknown reason");
1219                 }
1220                 seq_printf(m, "\n");
1221         }
1222         return 0;
1223 }
1224
1225 static int i915_sr_status(struct seq_file *m, void *unused)
1226 {
1227         struct drm_info_node *node = (struct drm_info_node *) m->private;
1228         struct drm_device *dev = node->minor->dev;
1229         drm_i915_private_t *dev_priv = dev->dev_private;
1230         bool sr_enabled = false;
1231
1232         if (HAS_PCH_SPLIT(dev))
1233                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1234         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1235                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1236         else if (IS_I915GM(dev))
1237                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1238         else if (IS_PINEVIEW(dev))
1239                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1240
1241         seq_printf(m, "self-refresh: %s\n",
1242                    sr_enabled ? "enabled" : "disabled");
1243
1244         return 0;
1245 }
1246
1247 static int i915_emon_status(struct seq_file *m, void *unused)
1248 {
1249         struct drm_info_node *node = (struct drm_info_node *) m->private;
1250         struct drm_device *dev = node->minor->dev;
1251         drm_i915_private_t *dev_priv = dev->dev_private;
1252         unsigned long temp, chipset, gfx;
1253         int ret;
1254
1255         if (!IS_GEN5(dev))
1256                 return -ENODEV;
1257
1258         ret = mutex_lock_interruptible(&dev->struct_mutex);
1259         if (ret)
1260                 return ret;
1261
1262         temp = i915_mch_val(dev_priv);
1263         chipset = i915_chipset_val(dev_priv);
1264         gfx = i915_gfx_val(dev_priv);
1265         mutex_unlock(&dev->struct_mutex);
1266
1267         seq_printf(m, "GMCH temp: %ld\n", temp);
1268         seq_printf(m, "Chipset power: %ld\n", chipset);
1269         seq_printf(m, "GFX power: %ld\n", gfx);
1270         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1271
1272         return 0;
1273 }
1274
1275 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1276 {
1277         struct drm_info_node *node = (struct drm_info_node *) m->private;
1278         struct drm_device *dev = node->minor->dev;
1279         drm_i915_private_t *dev_priv = dev->dev_private;
1280         int ret;
1281         int gpu_freq, ia_freq;
1282
1283         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1284                 seq_printf(m, "unsupported on this chipset\n");
1285                 return 0;
1286         }
1287
1288         ret = mutex_lock_interruptible(&dev->struct_mutex);
1289         if (ret)
1290                 return ret;
1291
1292         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1293
1294         for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1295              gpu_freq++) {
1296                 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1297                 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1298                            GEN6_PCODE_READ_MIN_FREQ_TABLE);
1299                 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1300                               GEN6_PCODE_READY) == 0, 10)) {
1301                         DRM_ERROR("pcode read of freq table timed out\n");
1302                         continue;
1303                 }
1304                 ia_freq = I915_READ(GEN6_PCODE_DATA);
1305                 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1306         }
1307
1308         mutex_unlock(&dev->struct_mutex);
1309
1310         return 0;
1311 }
1312
1313 static int i915_gfxec(struct seq_file *m, void *unused)
1314 {
1315         struct drm_info_node *node = (struct drm_info_node *) m->private;
1316         struct drm_device *dev = node->minor->dev;
1317         drm_i915_private_t *dev_priv = dev->dev_private;
1318         int ret;
1319
1320         ret = mutex_lock_interruptible(&dev->struct_mutex);
1321         if (ret)
1322                 return ret;
1323
1324         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1325
1326         mutex_unlock(&dev->struct_mutex);
1327
1328         return 0;
1329 }
1330
1331 static int i915_opregion(struct seq_file *m, void *unused)
1332 {
1333         struct drm_info_node *node = (struct drm_info_node *) m->private;
1334         struct drm_device *dev = node->minor->dev;
1335         drm_i915_private_t *dev_priv = dev->dev_private;
1336         struct intel_opregion *opregion = &dev_priv->opregion;
1337         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1338         int ret;
1339
1340         if (data == NULL)
1341                 return -ENOMEM;
1342
1343         ret = mutex_lock_interruptible(&dev->struct_mutex);
1344         if (ret)
1345                 goto out;
1346
1347         if (opregion->header) {
1348                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1349                 seq_write(m, data, OPREGION_SIZE);
1350         }
1351
1352         mutex_unlock(&dev->struct_mutex);
1353
1354 out:
1355         kfree(data);
1356         return 0;
1357 }
1358
1359 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1360 {
1361         struct drm_info_node *node = (struct drm_info_node *) m->private;
1362         struct drm_device *dev = node->minor->dev;
1363         drm_i915_private_t *dev_priv = dev->dev_private;
1364         struct intel_fbdev *ifbdev;
1365         struct intel_framebuffer *fb;
1366         int ret;
1367
1368         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1369         if (ret)
1370                 return ret;
1371
1372         ifbdev = dev_priv->fbdev;
1373         fb = to_intel_framebuffer(ifbdev->helper.fb);
1374
1375         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1376                    fb->base.width,
1377                    fb->base.height,
1378                    fb->base.depth,
1379                    fb->base.bits_per_pixel);
1380         describe_obj(m, fb->obj);
1381         seq_printf(m, "\n");
1382
1383         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1384                 if (&fb->base == ifbdev->helper.fb)
1385                         continue;
1386
1387                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1388                            fb->base.width,
1389                            fb->base.height,
1390                            fb->base.depth,
1391                            fb->base.bits_per_pixel);
1392                 describe_obj(m, fb->obj);
1393                 seq_printf(m, "\n");
1394         }
1395
1396         mutex_unlock(&dev->mode_config.mutex);
1397
1398         return 0;
1399 }
1400
1401 static int i915_context_status(struct seq_file *m, void *unused)
1402 {
1403         struct drm_info_node *node = (struct drm_info_node *) m->private;
1404         struct drm_device *dev = node->minor->dev;
1405         drm_i915_private_t *dev_priv = dev->dev_private;
1406         int ret;
1407
1408         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1409         if (ret)
1410                 return ret;
1411
1412         if (dev_priv->pwrctx) {
1413                 seq_printf(m, "power context ");
1414                 describe_obj(m, dev_priv->pwrctx);
1415                 seq_printf(m, "\n");
1416         }
1417
1418         if (dev_priv->renderctx) {
1419                 seq_printf(m, "render context ");
1420                 describe_obj(m, dev_priv->renderctx);
1421                 seq_printf(m, "\n");
1422         }
1423
1424         mutex_unlock(&dev->mode_config.mutex);
1425
1426         return 0;
1427 }
1428
1429 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1430 {
1431         struct drm_info_node *node = (struct drm_info_node *) m->private;
1432         struct drm_device *dev = node->minor->dev;
1433         struct drm_i915_private *dev_priv = dev->dev_private;
1434         unsigned forcewake_count;
1435
1436         spin_lock_irq(&dev_priv->gt_lock);
1437         forcewake_count = dev_priv->forcewake_count;
1438         spin_unlock_irq(&dev_priv->gt_lock);
1439
1440         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1441
1442         return 0;
1443 }
1444
1445 static const char *swizzle_string(unsigned swizzle)
1446 {
1447         switch(swizzle) {
1448         case I915_BIT_6_SWIZZLE_NONE:
1449                 return "none";
1450         case I915_BIT_6_SWIZZLE_9:
1451                 return "bit9";
1452         case I915_BIT_6_SWIZZLE_9_10:
1453                 return "bit9/bit10";
1454         case I915_BIT_6_SWIZZLE_9_11:
1455                 return "bit9/bit11";
1456         case I915_BIT_6_SWIZZLE_9_10_11:
1457                 return "bit9/bit10/bit11";
1458         case I915_BIT_6_SWIZZLE_9_17:
1459                 return "bit9/bit17";
1460         case I915_BIT_6_SWIZZLE_9_10_17:
1461                 return "bit9/bit10/bit17";
1462         case I915_BIT_6_SWIZZLE_UNKNOWN:
1463                 return "unkown";
1464         }
1465
1466         return "bug";
1467 }
1468
1469 static int i915_swizzle_info(struct seq_file *m, void *data)
1470 {
1471         struct drm_info_node *node = (struct drm_info_node *) m->private;
1472         struct drm_device *dev = node->minor->dev;
1473         struct drm_i915_private *dev_priv = dev->dev_private;
1474
1475         mutex_lock(&dev->struct_mutex);
1476         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1477                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1478         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1479                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1480
1481         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1482                 seq_printf(m, "DDC = 0x%08x\n",
1483                            I915_READ(DCC));
1484                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1485                            I915_READ16(C0DRB3));
1486                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1487                            I915_READ16(C1DRB3));
1488         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1489                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1490                            I915_READ(MAD_DIMM_C0));
1491                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1492                            I915_READ(MAD_DIMM_C1));
1493                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1494                            I915_READ(MAD_DIMM_C2));
1495                 seq_printf(m, "TILECTL = 0x%08x\n",
1496                            I915_READ(TILECTL));
1497                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1498                            I915_READ(ARB_MODE));
1499                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1500                            I915_READ(DISP_ARB_CTL));
1501         }
1502         mutex_unlock(&dev->struct_mutex);
1503
1504         return 0;
1505 }
1506
1507 static int i915_ppgtt_info(struct seq_file *m, void *data)
1508 {
1509         struct drm_info_node *node = (struct drm_info_node *) m->private;
1510         struct drm_device *dev = node->minor->dev;
1511         struct drm_i915_private *dev_priv = dev->dev_private;
1512         struct intel_ring_buffer *ring;
1513         int i, ret;
1514
1515
1516         ret = mutex_lock_interruptible(&dev->struct_mutex);
1517         if (ret)
1518                 return ret;
1519         if (INTEL_INFO(dev)->gen == 6)
1520                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1521
1522         for (i = 0; i < I915_NUM_RINGS; i++) {
1523                 ring = &dev_priv->ring[i];
1524
1525                 seq_printf(m, "%s\n", ring->name);
1526                 if (INTEL_INFO(dev)->gen == 7)
1527                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1528                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1529                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1530                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1531         }
1532         if (dev_priv->mm.aliasing_ppgtt) {
1533                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1534
1535                 seq_printf(m, "aliasing PPGTT:\n");
1536                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1537         }
1538         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1539         mutex_unlock(&dev->struct_mutex);
1540
1541         return 0;
1542 }
1543
1544 static int i915_dpio_info(struct seq_file *m, void *data)
1545 {
1546         struct drm_info_node *node = (struct drm_info_node *) m->private;
1547         struct drm_device *dev = node->minor->dev;
1548         struct drm_i915_private *dev_priv = dev->dev_private;
1549         int ret;
1550
1551
1552         if (!IS_VALLEYVIEW(dev)) {
1553                 seq_printf(m, "unsupported\n");
1554                 return 0;
1555         }
1556
1557         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1558         if (ret)
1559                 return ret;
1560
1561         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1562
1563         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1564                    intel_dpio_read(dev_priv, _DPIO_DIV_A));
1565         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1566                    intel_dpio_read(dev_priv, _DPIO_DIV_B));
1567
1568         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1569                    intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1570         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1571                    intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1572
1573         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1574                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1575         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1576                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1577
1578         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1579                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1580         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1581                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1582
1583         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1584                    intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1585
1586         mutex_unlock(&dev->mode_config.mutex);
1587
1588         return 0;
1589 }
1590
1591 static ssize_t
1592 i915_wedged_read(struct file *filp,
1593                  char __user *ubuf,
1594                  size_t max,
1595                  loff_t *ppos)
1596 {
1597         struct drm_device *dev = filp->private_data;
1598         drm_i915_private_t *dev_priv = dev->dev_private;
1599         char buf[80];
1600         int len;
1601
1602         len = snprintf(buf, sizeof(buf),
1603                        "wedged :  %d\n",
1604                        atomic_read(&dev_priv->mm.wedged));
1605
1606         if (len > sizeof(buf))
1607                 len = sizeof(buf);
1608
1609         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1610 }
1611
1612 static ssize_t
1613 i915_wedged_write(struct file *filp,
1614                   const char __user *ubuf,
1615                   size_t cnt,
1616                   loff_t *ppos)
1617 {
1618         struct drm_device *dev = filp->private_data;
1619         char buf[20];
1620         int val = 1;
1621
1622         if (cnt > 0) {
1623                 if (cnt > sizeof(buf) - 1)
1624                         return -EINVAL;
1625
1626                 if (copy_from_user(buf, ubuf, cnt))
1627                         return -EFAULT;
1628                 buf[cnt] = 0;
1629
1630                 val = simple_strtoul(buf, NULL, 0);
1631         }
1632
1633         DRM_INFO("Manually setting wedged to %d\n", val);
1634         i915_handle_error(dev, val);
1635
1636         return cnt;
1637 }
1638
1639 static const struct file_operations i915_wedged_fops = {
1640         .owner = THIS_MODULE,
1641         .open = simple_open,
1642         .read = i915_wedged_read,
1643         .write = i915_wedged_write,
1644         .llseek = default_llseek,
1645 };
1646
1647 static ssize_t
1648 i915_ring_stop_read(struct file *filp,
1649                     char __user *ubuf,
1650                     size_t max,
1651                     loff_t *ppos)
1652 {
1653         struct drm_device *dev = filp->private_data;
1654         drm_i915_private_t *dev_priv = dev->dev_private;
1655         char buf[20];
1656         int len;
1657
1658         len = snprintf(buf, sizeof(buf),
1659                        "0x%08x\n", dev_priv->stop_rings);
1660
1661         if (len > sizeof(buf))
1662                 len = sizeof(buf);
1663
1664         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1665 }
1666
1667 static ssize_t
1668 i915_ring_stop_write(struct file *filp,
1669                      const char __user *ubuf,
1670                      size_t cnt,
1671                      loff_t *ppos)
1672 {
1673         struct drm_device *dev = filp->private_data;
1674         struct drm_i915_private *dev_priv = dev->dev_private;
1675         char buf[20];
1676         int val = 0;
1677
1678         if (cnt > 0) {
1679                 if (cnt > sizeof(buf) - 1)
1680                         return -EINVAL;
1681
1682                 if (copy_from_user(buf, ubuf, cnt))
1683                         return -EFAULT;
1684                 buf[cnt] = 0;
1685
1686                 val = simple_strtoul(buf, NULL, 0);
1687         }
1688
1689         DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1690
1691         mutex_lock(&dev->struct_mutex);
1692         dev_priv->stop_rings = val;
1693         mutex_unlock(&dev->struct_mutex);
1694
1695         return cnt;
1696 }
1697
1698 static const struct file_operations i915_ring_stop_fops = {
1699         .owner = THIS_MODULE,
1700         .open = simple_open,
1701         .read = i915_ring_stop_read,
1702         .write = i915_ring_stop_write,
1703         .llseek = default_llseek,
1704 };
1705
1706 static ssize_t
1707 i915_max_freq_read(struct file *filp,
1708                    char __user *ubuf,
1709                    size_t max,
1710                    loff_t *ppos)
1711 {
1712         struct drm_device *dev = filp->private_data;
1713         drm_i915_private_t *dev_priv = dev->dev_private;
1714         char buf[80];
1715         int len;
1716
1717         len = snprintf(buf, sizeof(buf),
1718                        "max freq: %d\n", dev_priv->max_delay * 50);
1719
1720         if (len > sizeof(buf))
1721                 len = sizeof(buf);
1722
1723         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1724 }
1725
1726 static ssize_t
1727 i915_max_freq_write(struct file *filp,
1728                   const char __user *ubuf,
1729                   size_t cnt,
1730                   loff_t *ppos)
1731 {
1732         struct drm_device *dev = filp->private_data;
1733         struct drm_i915_private *dev_priv = dev->dev_private;
1734         char buf[20];
1735         int val = 1;
1736
1737         if (cnt > 0) {
1738                 if (cnt > sizeof(buf) - 1)
1739                         return -EINVAL;
1740
1741                 if (copy_from_user(buf, ubuf, cnt))
1742                         return -EFAULT;
1743                 buf[cnt] = 0;
1744
1745                 val = simple_strtoul(buf, NULL, 0);
1746         }
1747
1748         DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1749
1750         /*
1751          * Turbo will still be enabled, but won't go above the set value.
1752          */
1753         dev_priv->max_delay = val / 50;
1754
1755         gen6_set_rps(dev, val / 50);
1756
1757         return cnt;
1758 }
1759
1760 static const struct file_operations i915_max_freq_fops = {
1761         .owner = THIS_MODULE,
1762         .open = simple_open,
1763         .read = i915_max_freq_read,
1764         .write = i915_max_freq_write,
1765         .llseek = default_llseek,
1766 };
1767
1768 static ssize_t
1769 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1770                    loff_t *ppos)
1771 {
1772         struct drm_device *dev = filp->private_data;
1773         drm_i915_private_t *dev_priv = dev->dev_private;
1774         char buf[80];
1775         int len;
1776
1777         len = snprintf(buf, sizeof(buf),
1778                        "min freq: %d\n", dev_priv->min_delay * 50);
1779
1780         if (len > sizeof(buf))
1781                 len = sizeof(buf);
1782
1783         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1784 }
1785
1786 static ssize_t
1787 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1788                     loff_t *ppos)
1789 {
1790         struct drm_device *dev = filp->private_data;
1791         struct drm_i915_private *dev_priv = dev->dev_private;
1792         char buf[20];
1793         int val = 1;
1794
1795         if (cnt > 0) {
1796                 if (cnt > sizeof(buf) - 1)
1797                         return -EINVAL;
1798
1799                 if (copy_from_user(buf, ubuf, cnt))
1800                         return -EFAULT;
1801                 buf[cnt] = 0;
1802
1803                 val = simple_strtoul(buf, NULL, 0);
1804         }
1805
1806         DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1807
1808         /*
1809          * Turbo will still be enabled, but won't go below the set value.
1810          */
1811         dev_priv->min_delay = val / 50;
1812
1813         gen6_set_rps(dev, val / 50);
1814
1815         return cnt;
1816 }
1817
1818 static const struct file_operations i915_min_freq_fops = {
1819         .owner = THIS_MODULE,
1820         .open = simple_open,
1821         .read = i915_min_freq_read,
1822         .write = i915_min_freq_write,
1823         .llseek = default_llseek,
1824 };
1825
1826 static ssize_t
1827 i915_cache_sharing_read(struct file *filp,
1828                    char __user *ubuf,
1829                    size_t max,
1830                    loff_t *ppos)
1831 {
1832         struct drm_device *dev = filp->private_data;
1833         drm_i915_private_t *dev_priv = dev->dev_private;
1834         char buf[80];
1835         u32 snpcr;
1836         int len;
1837
1838         mutex_lock(&dev_priv->dev->struct_mutex);
1839         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1840         mutex_unlock(&dev_priv->dev->struct_mutex);
1841
1842         len = snprintf(buf, sizeof(buf),
1843                        "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1844                        GEN6_MBC_SNPCR_SHIFT);
1845
1846         if (len > sizeof(buf))
1847                 len = sizeof(buf);
1848
1849         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1850 }
1851
1852 static ssize_t
1853 i915_cache_sharing_write(struct file *filp,
1854                   const char __user *ubuf,
1855                   size_t cnt,
1856                   loff_t *ppos)
1857 {
1858         struct drm_device *dev = filp->private_data;
1859         struct drm_i915_private *dev_priv = dev->dev_private;
1860         char buf[20];
1861         u32 snpcr;
1862         int val = 1;
1863
1864         if (cnt > 0) {
1865                 if (cnt > sizeof(buf) - 1)
1866                         return -EINVAL;
1867
1868                 if (copy_from_user(buf, ubuf, cnt))
1869                         return -EFAULT;
1870                 buf[cnt] = 0;
1871
1872                 val = simple_strtoul(buf, NULL, 0);
1873         }
1874
1875         if (val < 0 || val > 3)
1876                 return -EINVAL;
1877
1878         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1879
1880         /* Update the cache sharing policy here as well */
1881         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1882         snpcr &= ~GEN6_MBC_SNPCR_MASK;
1883         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1884         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1885
1886         return cnt;
1887 }
1888
1889 static const struct file_operations i915_cache_sharing_fops = {
1890         .owner = THIS_MODULE,
1891         .open = simple_open,
1892         .read = i915_cache_sharing_read,
1893         .write = i915_cache_sharing_write,
1894         .llseek = default_llseek,
1895 };
1896
1897 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1898  * allocated we need to hook into the minor for release. */
1899 static int
1900 drm_add_fake_info_node(struct drm_minor *minor,
1901                        struct dentry *ent,
1902                        const void *key)
1903 {
1904         struct drm_info_node *node;
1905
1906         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1907         if (node == NULL) {
1908                 debugfs_remove(ent);
1909                 return -ENOMEM;
1910         }
1911
1912         node->minor = minor;
1913         node->dent = ent;
1914         node->info_ent = (void *) key;
1915
1916         mutex_lock(&minor->debugfs_lock);
1917         list_add(&node->list, &minor->debugfs_list);
1918         mutex_unlock(&minor->debugfs_lock);
1919
1920         return 0;
1921 }
1922
1923 static int i915_forcewake_open(struct inode *inode, struct file *file)
1924 {
1925         struct drm_device *dev = inode->i_private;
1926         struct drm_i915_private *dev_priv = dev->dev_private;
1927         int ret;
1928
1929         if (INTEL_INFO(dev)->gen < 6)
1930                 return 0;
1931
1932         ret = mutex_lock_interruptible(&dev->struct_mutex);
1933         if (ret)
1934                 return ret;
1935         gen6_gt_force_wake_get(dev_priv);
1936         mutex_unlock(&dev->struct_mutex);
1937
1938         return 0;
1939 }
1940
1941 static int i915_forcewake_release(struct inode *inode, struct file *file)
1942 {
1943         struct drm_device *dev = inode->i_private;
1944         struct drm_i915_private *dev_priv = dev->dev_private;
1945
1946         if (INTEL_INFO(dev)->gen < 6)
1947                 return 0;
1948
1949         /*
1950          * It's bad that we can potentially hang userspace if struct_mutex gets
1951          * forever stuck.  However, if we cannot acquire this lock it means that
1952          * almost certainly the driver has hung, is not unload-able. Therefore
1953          * hanging here is probably a minor inconvenience not to be seen my
1954          * almost every user.
1955          */
1956         mutex_lock(&dev->struct_mutex);
1957         gen6_gt_force_wake_put(dev_priv);
1958         mutex_unlock(&dev->struct_mutex);
1959
1960         return 0;
1961 }
1962
1963 static const struct file_operations i915_forcewake_fops = {
1964         .owner = THIS_MODULE,
1965         .open = i915_forcewake_open,
1966         .release = i915_forcewake_release,
1967 };
1968
1969 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1970 {
1971         struct drm_device *dev = minor->dev;
1972         struct dentry *ent;
1973
1974         ent = debugfs_create_file("i915_forcewake_user",
1975                                   S_IRUSR,
1976                                   root, dev,
1977                                   &i915_forcewake_fops);
1978         if (IS_ERR(ent))
1979                 return PTR_ERR(ent);
1980
1981         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
1982 }
1983
1984 static int i915_debugfs_create(struct dentry *root,
1985                                struct drm_minor *minor,
1986                                const char *name,
1987                                const struct file_operations *fops)
1988 {
1989         struct drm_device *dev = minor->dev;
1990         struct dentry *ent;
1991
1992         ent = debugfs_create_file(name,
1993                                   S_IRUGO | S_IWUSR,
1994                                   root, dev,
1995                                   fops);
1996         if (IS_ERR(ent))
1997                 return PTR_ERR(ent);
1998
1999         return drm_add_fake_info_node(minor, ent, fops);
2000 }
2001
2002 static struct drm_info_list i915_debugfs_list[] = {
2003         {"i915_capabilities", i915_capabilities, 0},
2004         {"i915_gem_objects", i915_gem_object_info, 0},
2005         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2006         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2007         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2008         {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
2009         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2010         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2011         {"i915_gem_request", i915_gem_request_info, 0},
2012         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2013         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2014         {"i915_gem_interrupt", i915_interrupt_info, 0},
2015         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2016         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2017         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2018         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2019         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2020         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2021         {"i915_inttoext_table", i915_inttoext_table, 0},
2022         {"i915_drpc_info", i915_drpc_info, 0},
2023         {"i915_emon_status", i915_emon_status, 0},
2024         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2025         {"i915_gfxec", i915_gfxec, 0},
2026         {"i915_fbc_status", i915_fbc_status, 0},
2027         {"i915_sr_status", i915_sr_status, 0},
2028         {"i915_opregion", i915_opregion, 0},
2029         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2030         {"i915_context_status", i915_context_status, 0},
2031         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2032         {"i915_swizzle_info", i915_swizzle_info, 0},
2033         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2034         {"i915_dpio", i915_dpio_info, 0},
2035 };
2036 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2037
2038 int i915_debugfs_init(struct drm_minor *minor)
2039 {
2040         int ret;
2041
2042         ret = i915_debugfs_create(minor->debugfs_root, minor,
2043                                   "i915_wedged",
2044                                   &i915_wedged_fops);
2045         if (ret)
2046                 return ret;
2047
2048         ret = i915_forcewake_create(minor->debugfs_root, minor);
2049         if (ret)
2050                 return ret;
2051
2052         ret = i915_debugfs_create(minor->debugfs_root, minor,
2053                                   "i915_max_freq",
2054                                   &i915_max_freq_fops);
2055         if (ret)
2056                 return ret;
2057
2058         ret = i915_debugfs_create(minor->debugfs_root, minor,
2059                                   "i915_min_freq",
2060                                   &i915_min_freq_fops);
2061         if (ret)
2062                 return ret;
2063
2064         ret = i915_debugfs_create(minor->debugfs_root, minor,
2065                                   "i915_cache_sharing",
2066                                   &i915_cache_sharing_fops);
2067         if (ret)
2068                 return ret;
2069         ret = i915_debugfs_create(minor->debugfs_root, minor,
2070                                   "i915_ring_stop",
2071                                   &i915_ring_stop_fops);
2072         if (ret)
2073                 return ret;
2074
2075         ret = i915_debugfs_create(minor->debugfs_root, minor,
2076                                   "i915_error_state",
2077                                   &i915_error_state_fops);
2078         if (ret)
2079                 return ret;
2080
2081         return drm_debugfs_create_files(i915_debugfs_list,
2082                                         I915_DEBUGFS_ENTRIES,
2083                                         minor->debugfs_root, minor);
2084 }
2085
2086 void i915_debugfs_cleanup(struct drm_minor *minor)
2087 {
2088         drm_debugfs_remove_files(i915_debugfs_list,
2089                                  I915_DEBUGFS_ENTRIES, minor);
2090         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2091                                  1, minor);
2092         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2093                                  1, minor);
2094         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2095                                  1, minor);
2096         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2097                                  1, minor);
2098         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2099                                  1, minor);
2100         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2101                                  1, minor);
2102         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2103                                  1, minor);
2104 }
2105
2106 #endif /* CONFIG_DEBUG_FS */