drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include <generated/utsrelease.h>
  34 #include <drm/drmP.h>
  35 #include "intel_drv.h"
  36 #include "intel_ringbuffer.h"
  37 #include <drm/i915_drm.h>
  38 #include "i915_drv.h"
  39
  40 #define DRM_I915_RING_DEBUG 1
  41
  42
  43 #if defined(CONFIG_DEBUG_FS)
  44
  45 enum {
  46         ACTIVE_LIST,
  47         INACTIVE_LIST,
  48         PINNED_LIST,
  49 };
  50
  51 static const char *yesno(int v)
  52 {
  53         return v ? "yes" : "no";
  54 }
  55
  56 static int i915_capabilities(struct seq_file *m, void *data)
  57 {
  58         struct drm_info_node *node = (struct drm_info_node *) m->private;
  59         struct drm_device *dev = node->minor->dev;
  60         const struct intel_device_info *info = INTEL_INFO(dev);
  61
  62         seq_printf(m, "gen: %d\n", info->gen);
  63         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  64 #define PRINT_FLAG(x)  seq_printf(m, #x ": %s\n", yesno(info->x))
  65 #define SEP_SEMICOLON ;
  66         DEV_INFO_FOR_EACH_FLAG(PRINT_FLAG, SEP_SEMICOLON);
  67 #undef PRINT_FLAG
  68 #undef SEP_SEMICOLON
  69
  70         return 0;
  71 }
  72
  73 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  74 {
  75         if (obj->user_pin_count > 0)
  76                 return "P";
  77         else if (obj->pin_count > 0)
  78                 return "p";
  79         else
  80                 return " ";
  81 }
  82
  83 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
  84 {
  85         switch (obj->tiling_mode) {
  86         default:
  87         case I915_TILING_NONE: return " ";
  88         case I915_TILING_X: return "X";
  89         case I915_TILING_Y: return "Y";
  90         }
  91 }
  92
  93 static const char *cache_level_str(int type)
  94 {
  95         switch (type) {
  96         case I915_CACHE_NONE: return " uncached";
  97         case I915_CACHE_LLC: return " snooped (LLC)";
  98         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
  99         default: return "";
 100         }
 101 }
 102
 103 static void
 104 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 105 {
 106         seq_printf(m, "%pK: %s%s %8zdKiB %02x %02x %d %d %d%s%s%s",
 107                    &obj->base,
 108                    get_pin_flag(obj),
 109                    get_tiling_flag(obj),
 110                    obj->base.size / 1024,
 111                    obj->base.read_domains,
 112                    obj->base.write_domain,
 113                    obj->last_read_seqno,
 114                    obj->last_write_seqno,
 115                    obj->last_fenced_seqno,
 116                    cache_level_str(obj->cache_level),
 117                    obj->dirty ? " dirty" : "",
 118                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 119         if (obj->base.name)
 120                 seq_printf(m, " (name: %d)", obj->base.name);
 121         if (obj->pin_count)
 122                 seq_printf(m, " (pinned x %d)", obj->pin_count);
 123         if (obj->fence_reg != I915_FENCE_REG_NONE)
 124                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 125         if (i915_gem_obj_ggtt_bound(obj))
 126                 seq_printf(m, " (gtt offset: %08lx, size: %08x)",
 127                            i915_gem_obj_ggtt_offset(obj), (unsigned int)i915_gem_obj_ggtt_size(obj));
 128         if (obj->stolen)
 129                 seq_printf(m, " (stolen: %08lx)", obj->stolen->start);
 130         if (obj->pin_mappable || obj->fault_mappable) {
 131                 char s[3], *t = s;
 132                 if (obj->pin_mappable)
 133                         *t++ = 'p';
 134                 if (obj->fault_mappable)
 135                         *t++ = 'f';
 136                 *t = '\0';
 137                 seq_printf(m, " (%s mappable)", s);
 138         }
 139         if (obj->ring != NULL)
 140                 seq_printf(m, " (%s)", obj->ring->name);
 141 }
 142
 143 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 144 {
 145         struct drm_info_node *node = (struct drm_info_node *) m->private;
 146         uintptr_t list = (uintptr_t) node->info_ent->data;
 147         struct list_head *head;
 148         struct drm_device *dev = node->minor->dev;
 149         drm_i915_private_t *dev_priv = dev->dev_private;
 150         struct drm_i915_gem_object *obj;
 151         size_t total_obj_size, total_gtt_size;
 152         int count, ret;
 153
 154         ret = mutex_lock_interruptible(&dev->struct_mutex);
 155         if (ret)
 156                 return ret;
 157
 158         switch (list) {
 159         case ACTIVE_LIST:
 160                 seq_puts(m, "Active:\n");
 161                 head = &dev_priv->mm.active_list;
 162                 break;
 163         case INACTIVE_LIST:
 164                 seq_puts(m, "Inactive:\n");
 165                 head = &dev_priv->mm.inactive_list;
 166                 break;
 167         default:
 168                 mutex_unlock(&dev->struct_mutex);
 169                 return -EINVAL;
 170         }
 171
 172         total_obj_size = total_gtt_size = count = 0;
 173         list_for_each_entry(obj, head, mm_list) {
 174                 seq_puts(m, "   ");
 175                 describe_obj(m, obj);
 176                 seq_putc(m, '\n');
 177                 total_obj_size += obj->base.size;
 178                 total_gtt_size += i915_gem_obj_ggtt_size(obj);
 179                 count++;
 180         }
 181         mutex_unlock(&dev->struct_mutex);
 182
 183         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 184                    count, total_obj_size, total_gtt_size);
 185         return 0;
 186 }
 187
 188 #define count_objects(list, member) do { \
 189         list_for_each_entry(obj, list, member) { \
 190                 size += i915_gem_obj_ggtt_size(obj); \
 191                 ++count; \
 192                 if (obj->map_and_fenceable) { \
 193                         mappable_size += i915_gem_obj_ggtt_size(obj); \
 194                         ++mappable_count; \
 195                 } \
 196         } \
 197 } while (0)
 198
 199 struct file_stats {
 200         int count;
 201         size_t total, active, inactive, unbound;
 202 };
 203
 204 static int per_file_stats(int id, void *ptr, void *data)
 205 {
 206         struct drm_i915_gem_object *obj = ptr;
 207         struct file_stats *stats = data;
 208
 209         stats->count++;
 210         stats->total += obj->base.size;
 211
 212         if (i915_gem_obj_ggtt_bound(obj)) {
 213                 if (!list_empty(&obj->ring_list))
 214                         stats->active += obj->base.size;
 215                 else
 216                         stats->inactive += obj->base.size;
 217         } else {
 218                 if (!list_empty(&obj->global_list))
 219                         stats->unbound += obj->base.size;
 220         }
 221
 222         return 0;
 223 }
 224
 225 static int i915_gem_object_info(struct seq_file *m, void *data)
 226 {
 227         struct drm_info_node *node = (struct drm_info_node *) m->private;
 228         struct drm_device *dev = node->minor->dev;
 229         struct drm_i915_private *dev_priv = dev->dev_private;
 230         u32 count, mappable_count, purgeable_count;
 231         size_t size, mappable_size, purgeable_size;
 232         struct drm_i915_gem_object *obj;
 233         struct drm_file *file;
 234         int ret;
 235
 236         ret = mutex_lock_interruptible(&dev->struct_mutex);
 237         if (ret)
 238                 return ret;
 239
 240         seq_printf(m, "%u objects, %zu bytes\n",
 241                    dev_priv->mm.object_count,
 242                    dev_priv->mm.object_memory);
 243
 244         size = count = mappable_size = mappable_count = 0;
 245         count_objects(&dev_priv->mm.bound_list, global_list);
 246         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 247                    count, mappable_count, size, mappable_size);
 248
 249         size = count = mappable_size = mappable_count = 0;
 250         count_objects(&dev_priv->mm.active_list, mm_list);
 251         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 252                    count, mappable_count, size, mappable_size);
 253
 254         size = count = mappable_size = mappable_count = 0;
 255         count_objects(&dev_priv->mm.inactive_list, mm_list);
 256         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 257                    count, mappable_count, size, mappable_size);
 258
 259         size = count = purgeable_size = purgeable_count = 0;
 260         list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) {
 261                 size += obj->base.size, ++count;
 262                 if (obj->madv == I915_MADV_DONTNEED)
 263                         purgeable_size += obj->base.size, ++purgeable_count;
 264         }
 265         seq_printf(m, "%u unbound objects, %zu bytes\n", count, size);
 266
 267         size = count = mappable_size = mappable_count = 0;
 268         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 269                 if (obj->fault_mappable) {
 270                         size += i915_gem_obj_ggtt_size(obj);
 271                         ++count;
 272                 }
 273                 if (obj->pin_mappable) {
 274                         mappable_size += i915_gem_obj_ggtt_size(obj);
 275                         ++mappable_count;
 276                 }
 277                 if (obj->madv == I915_MADV_DONTNEED) {
 278                         purgeable_size += obj->base.size;
 279                         ++purgeable_count;
 280                 }
 281         }
 282         seq_printf(m, "%u purgeable objects, %zu bytes\n",
 283                    purgeable_count, purgeable_size);
 284         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 285                    mappable_count, mappable_size);
 286         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 287                    count, size);
 288
 289         seq_printf(m, "%zu [%lu] gtt total\n",
 290                    dev_priv->gtt.total,
 291                    dev_priv->gtt.mappable_end - dev_priv->gtt.start);
 292
 293         seq_putc(m, '\n');
 294         list_for_each_entry_reverse(file, &dev->filelist, lhead) {
 295                 struct file_stats stats;
 296
 297                 memset(&stats, 0, sizeof(stats));
 298                 idr_for_each(&file->object_idr, per_file_stats, &stats);
 299                 seq_printf(m, "%s: %u objects, %zu bytes (%zu active, %zu inactive, %zu unbound)\n",
 300                            get_pid_task(file->pid, PIDTYPE_PID)->comm,
 301                            stats.count,
 302                            stats.total,
 303                            stats.active,
 304                            stats.inactive,
 305                            stats.unbound);
 306         }
 307
 308         mutex_unlock(&dev->struct_mutex);
 309
 310         return 0;
 311 }
 312
 313 static int i915_gem_gtt_info(struct seq_file *m, void *data)
 314 {
 315         struct drm_info_node *node = (struct drm_info_node *) m->private;
 316         struct drm_device *dev = node->minor->dev;
 317         uintptr_t list = (uintptr_t) node->info_ent->data;
 318         struct drm_i915_private *dev_priv = dev->dev_private;
 319         struct drm_i915_gem_object *obj;
 320         size_t total_obj_size, total_gtt_size;
 321         int count, ret;
 322
 323         ret = mutex_lock_interruptible(&dev->struct_mutex);
 324         if (ret)
 325                 return ret;
 326
 327         total_obj_size = total_gtt_size = count = 0;
 328         list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) {
 329                 if (list == PINNED_LIST && obj->pin_count == 0)
 330                         continue;
 331
 332                 seq_puts(m, "   ");
 333                 describe_obj(m, obj);
 334                 seq_putc(m, '\n');
 335                 total_obj_size += obj->base.size;
 336                 total_gtt_size += i915_gem_obj_ggtt_size(obj);
 337                 count++;
 338         }
 339
 340         mutex_unlock(&dev->struct_mutex);
 341
 342         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 343                    count, total_obj_size, total_gtt_size);
 344
 345         return 0;
 346 }
 347
 348 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 349 {
 350         struct drm_info_node *node = (struct drm_info_node *) m->private;
 351         struct drm_device *dev = node->minor->dev;
 352         unsigned long flags;
 353         struct intel_crtc *crtc;
 354
 355         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 356                 const char pipe = pipe_name(crtc->pipe);
 357                 const char plane = plane_name(crtc->plane);
 358                 struct intel_unpin_work *work;
 359
 360                 spin_lock_irqsave(&dev->event_lock, flags);
 361                 work = crtc->unpin_work;
 362                 if (work == NULL) {
 363                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 364                                    pipe, plane);
 365                 } else {
 366                         if (atomic_read(&work->pending) < INTEL_FLIP_COMPLETE) {
 367                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 368                                            pipe, plane);
 369                         } else {
 370                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 371                                            pipe, plane);
 372                         }
 373                         if (work->enable_stall_check)
 374                                 seq_puts(m, "Stall check enabled, ");
 375                         else
 376                                 seq_puts(m, "Stall check waiting for page flip ioctl, ");
 377                         seq_printf(m, "%d prepares\n", atomic_read(&work->pending));
 378
 379                         if (work->old_fb_obj) {
 380                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 381                                 if (obj)
 382                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08lx\n",
 383                                                    i915_gem_obj_ggtt_offset(obj));
 384                         }
 385                         if (work->pending_flip_obj) {
 386                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 387                                 if (obj)
 388                                         seq_printf(m, "New framebuffer gtt_offset 0x%08lx\n",
 389                                                    i915_gem_obj_ggtt_offset(obj));
 390                         }
 391                 }
 392                 spin_unlock_irqrestore(&dev->event_lock, flags);
 393         }
 394
 395         return 0;
 396 }
 397
 398 static int i915_gem_request_info(struct seq_file *m, void *data)
 399 {
 400         struct drm_info_node *node = (struct drm_info_node *) m->private;
 401         struct drm_device *dev = node->minor->dev;
 402         drm_i915_private_t *dev_priv = dev->dev_private;
 403         struct intel_ring_buffer *ring;
 404         struct drm_i915_gem_request *gem_request;
 405         int ret, count, i;
 406
 407         ret = mutex_lock_interruptible(&dev->struct_mutex);
 408         if (ret)
 409                 return ret;
 410
 411         count = 0;
 412         for_each_ring(ring, dev_priv, i) {
 413                 if (list_empty(&ring->request_list))
 414                         continue;
 415
 416                 seq_printf(m, "%s requests:\n", ring->name);
 417                 list_for_each_entry(gem_request,
 418                                     &ring->request_list,
 419                                     list) {
 420                         seq_printf(m, "    %d @ %d\n",
 421                                    gem_request->seqno,
 422                                    (int) (jiffies - gem_request->emitted_jiffies));
 423                 }
 424                 count++;
 425         }
 426         mutex_unlock(&dev->struct_mutex);
 427
 428         if (count == 0)
 429                 seq_puts(m, "No requests\n");
 430
 431         return 0;
 432 }
 433
 434 static void i915_ring_seqno_info(struct seq_file *m,
 435                                  struct intel_ring_buffer *ring)
 436 {
 437         if (ring->get_seqno) {
 438                 seq_printf(m, "Current sequence (%s): %u\n",
 439                            ring->name, ring->get_seqno(ring, false));
 440         }
 441 }
 442
 443 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 444 {
 445         struct drm_info_node *node = (struct drm_info_node *) m->private;
 446         struct drm_device *dev = node->minor->dev;
 447         drm_i915_private_t *dev_priv = dev->dev_private;
 448         struct intel_ring_buffer *ring;
 449         int ret, i;
 450
 451         ret = mutex_lock_interruptible(&dev->struct_mutex);
 452         if (ret)
 453                 return ret;
 454
 455         for_each_ring(ring, dev_priv, i)
 456                 i915_ring_seqno_info(m, ring);
 457
 458         mutex_unlock(&dev->struct_mutex);
 459
 460         return 0;
 461 }
 462
 463
 464 static int i915_interrupt_info(struct seq_file *m, void *data)
 465 {
 466         struct drm_info_node *node = (struct drm_info_node *) m->private;
 467         struct drm_device *dev = node->minor->dev;
 468         drm_i915_private_t *dev_priv = dev->dev_private;
 469         struct intel_ring_buffer *ring;
 470         int ret, i, pipe;
 471
 472         ret = mutex_lock_interruptible(&dev->struct_mutex);
 473         if (ret)
 474                 return ret;
 475
 476         if (IS_VALLEYVIEW(dev)) {
 477                 seq_printf(m, "Display IER:\t%08x\n",
 478                            I915_READ(VLV_IER));
 479                 seq_printf(m, "Display IIR:\t%08x\n",
 480                            I915_READ(VLV_IIR));
 481                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 482                            I915_READ(VLV_IIR_RW));
 483                 seq_printf(m, "Display IMR:\t%08x\n",
 484                            I915_READ(VLV_IMR));
 485                 for_each_pipe(pipe)
 486                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 487                                    pipe_name(pipe),
 488                                    I915_READ(PIPESTAT(pipe)));
 489
 490                 seq_printf(m, "Master IER:\t%08x\n",
 491                            I915_READ(VLV_MASTER_IER));
 492
 493                 seq_printf(m, "Render IER:\t%08x\n",
 494                            I915_READ(GTIER));
 495                 seq_printf(m, "Render IIR:\t%08x\n",
 496                            I915_READ(GTIIR));
 497                 seq_printf(m, "Render IMR:\t%08x\n",
 498                            I915_READ(GTIMR));
 499
 500                 seq_printf(m, "PM IER:\t\t%08x\n",
 501                            I915_READ(GEN6_PMIER));
 502                 seq_printf(m, "PM IIR:\t\t%08x\n",
 503                            I915_READ(GEN6_PMIIR));
 504                 seq_printf(m, "PM IMR:\t\t%08x\n",
 505                            I915_READ(GEN6_PMIMR));
 506
 507                 seq_printf(m, "Port hotplug:\t%08x\n",
 508                            I915_READ(PORT_HOTPLUG_EN));
 509                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 510                            I915_READ(VLV_DPFLIPSTAT));
 511                 seq_printf(m, "DPINVGTT:\t%08x\n",
 512                            I915_READ(DPINVGTT));
 513
 514         } else if (!HAS_PCH_SPLIT(dev)) {
 515                 seq_printf(m, "Interrupt enable:    %08x\n",
 516                            I915_READ(IER));
 517                 seq_printf(m, "Interrupt identity:  %08x\n",
 518                            I915_READ(IIR));
 519                 seq_printf(m, "Interrupt mask:      %08x\n",
 520                            I915_READ(IMR));
 521                 for_each_pipe(pipe)
 522                         seq_printf(m, "Pipe %c stat:         %08x\n",
 523                                    pipe_name(pipe),
 524                                    I915_READ(PIPESTAT(pipe)));
 525         } else {
 526                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 527                            I915_READ(DEIER));
 528                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 529                            I915_READ(DEIIR));
 530                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 531                            I915_READ(DEIMR));
 532                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 533                            I915_READ(SDEIER));
 534                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 535                            I915_READ(SDEIIR));
 536                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 537                            I915_READ(SDEIMR));
 538                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 539                            I915_READ(GTIER));
 540                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 541                            I915_READ(GTIIR));
 542                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 543                            I915_READ(GTIMR));
 544         }
 545         seq_printf(m, "Interrupts received: %d\n",
 546                    atomic_read(&dev_priv->irq_received));
 547         for_each_ring(ring, dev_priv, i) {
 548                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 549                         seq_printf(m,
 550                                    "Graphics Interrupt mask (%s):       %08x\n",
 551                                    ring->name, I915_READ_IMR(ring));
 552                 }
 553                 i915_ring_seqno_info(m, ring);
 554         }
 555         mutex_unlock(&dev->struct_mutex);
 556
 557         return 0;
 558 }
 559
 560 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 561 {
 562         struct drm_info_node *node = (struct drm_info_node *) m->private;
 563         struct drm_device *dev = node->minor->dev;
 564         drm_i915_private_t *dev_priv = dev->dev_private;
 565         int i, ret;
 566
 567         ret = mutex_lock_interruptible(&dev->struct_mutex);
 568         if (ret)
 569                 return ret;
 570
 571         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 572         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 573         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 574                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 575
 576                 seq_printf(m, "Fence %d, pin count = %d, object = ",
 577                            i, dev_priv->fence_regs[i].pin_count);
 578                 if (obj == NULL)
 579                         seq_puts(m, "unused");
 580                 else
 581                         describe_obj(m, obj);
 582                 seq_putc(m, '\n');
 583         }
 584
 585         mutex_unlock(&dev->struct_mutex);
 586         return 0;
 587 }
 588
 589 static int i915_hws_info(struct seq_file *m, void *data)
 590 {
 591         struct drm_info_node *node = (struct drm_info_node *) m->private;
 592         struct drm_device *dev = node->minor->dev;
 593         drm_i915_private_t *dev_priv = dev->dev_private;
 594         struct intel_ring_buffer *ring;
 595         const u32 *hws;
 596         int i;
 597
 598         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 599         hws = ring->status_page.page_addr;
 600         if (hws == NULL)
 601                 return 0;
 602
 603         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 604                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 605                            i * 4,
 606                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 607         }
 608         return 0;
 609 }
 610
 611 static const char *ring_str(int ring)
 612 {
 613         switch (ring) {
 614         case RCS: return "render";
 615         case VCS: return "bsd";
 616         case BCS: return "blt";
 617         case VECS: return "vebox";
 618         default: return "";
 619         }
 620 }
 621
 622 static const char *pin_flag(int pinned)
 623 {
 624         if (pinned > 0)
 625                 return " P";
 626         else if (pinned < 0)
 627                 return " p";
 628         else
 629                 return "";
 630 }
 631
 632 static const char *tiling_flag(int tiling)
 633 {
 634         switch (tiling) {
 635         default:
 636         case I915_TILING_NONE: return "";
 637         case I915_TILING_X: return " X";
 638         case I915_TILING_Y: return " Y";
 639         }
 640 }
 641
 642 static const char *dirty_flag(int dirty)
 643 {
 644         return dirty ? " dirty" : "";
 645 }
 646
 647 static const char *purgeable_flag(int purgeable)
 648 {
 649         return purgeable ? " purgeable" : "";
 650 }
 651
 652 static bool __i915_error_ok(struct drm_i915_error_state_buf *e)
 653 {
 654
 655         if (!e->err && WARN(e->bytes > (e->size - 1), "overflow")) {
 656                 e->err = -ENOSPC;
 657                 return false;
 658         }
 659
 660         if (e->bytes == e->size - 1 || e->err)
 661                 return false;
 662
 663         return true;
 664 }
 665
 666 static bool __i915_error_seek(struct drm_i915_error_state_buf *e,
 667                               unsigned len)
 668 {
 669         if (e->pos + len <= e->start) {
 670                 e->pos += len;
 671                 return false;
 672         }
 673
 674         /* First vsnprintf needs to fit in its entirety for memmove */
 675         if (len >= e->size) {
 676                 e->err = -EIO;
 677                 return false;
 678         }
 679
 680         return true;
 681 }
 682
 683 static void __i915_error_advance(struct drm_i915_error_state_buf *e,
 684                                  unsigned len)
 685 {
 686         /* If this is first printf in this window, adjust it so that
 687          * start position matches start of the buffer
 688          */
 689
 690         if (e->pos < e->start) {
 691                 const size_t off = e->start - e->pos;
 692
 693                 /* Should not happen but be paranoid */
 694                 if (off > len || e->bytes) {
 695                         e->err = -EIO;
 696                         return;
 697                 }
 698
 699                 memmove(e->buf, e->buf + off, len - off);
 700                 e->bytes = len - off;
 701                 e->pos = e->start;
 702                 return;
 703         }
 704
 705         e->bytes += len;
 706         e->pos += len;
 707 }
 708
 709 static void i915_error_vprintf(struct drm_i915_error_state_buf *e,
 710                                const char *f, va_list args)
 711 {
 712         unsigned len;
 713
 714         if (!__i915_error_ok(e))
 715                 return;
 716
 717         /* Seek the first printf which is hits start position */
 718         if (e->pos < e->start) {
 719                 len = vsnprintf(NULL, 0, f, args);
 720                 if (!__i915_error_seek(e, len))
 721                         return;
 722         }
 723
 724         len = vsnprintf(e->buf + e->bytes, e->size - e->bytes, f, args);
 725         if (len >= e->size - e->bytes)
 726                 len = e->size - e->bytes - 1;
 727
 728         __i915_error_advance(e, len);
 729 }
 730
 731 static void i915_error_puts(struct drm_i915_error_state_buf *e,
 732                             const char *str)
 733 {
 734         unsigned len;
 735
 736         if (!__i915_error_ok(e))
 737                 return;
 738
 739         len = strlen(str);
 740
 741         /* Seek the first printf which is hits start position */
 742         if (e->pos < e->start) {
 743                 if (!__i915_error_seek(e, len))
 744                         return;
 745         }
 746
 747         if (len >= e->size - e->bytes)
 748                 len = e->size - e->bytes - 1;
 749         memcpy(e->buf + e->bytes, str, len);
 750
 751         __i915_error_advance(e, len);
 752 }
 753
 754 void i915_error_printf(struct drm_i915_error_state_buf *e, const char *f, ...)
 755 {
 756         va_list args;
 757
 758         va_start(args, f);
 759         i915_error_vprintf(e, f, args);
 760         va_end(args);
 761 }
 762
 763 #define err_printf(e, ...) i915_error_printf(e, __VA_ARGS__)
 764 #define err_puts(e, s) i915_error_puts(e, s)
 765
 766 static void print_error_buffers(struct drm_i915_error_state_buf *m,
 767                                 const char *name,
 768                                 struct drm_i915_error_buffer *err,
 769                                 int count)
 770 {
 771         err_printf(m, "%s [%d]:\n", name, count);
 772
 773         while (count--) {
 774                 err_printf(m, "  %08x %8u %02x %02x %x %x",
 775                            err->gtt_offset,
 776                            err->size,
 777                            err->read_domains,
 778                            err->write_domain,
 779                            err->rseqno, err->wseqno);
 780                 err_puts(m, pin_flag(err->pinned));
 781                 err_puts(m, tiling_flag(err->tiling));
 782                 err_puts(m, dirty_flag(err->dirty));
 783                 err_puts(m, purgeable_flag(err->purgeable));
 784                 err_puts(m, err->ring != -1 ? " " : "");
 785                 err_puts(m, ring_str(err->ring));
 786                 err_puts(m, cache_level_str(err->cache_level));
 787
 788                 if (err->name)
 789                         err_printf(m, " (name: %d)", err->name);
 790                 if (err->fence_reg != I915_FENCE_REG_NONE)
 791                         err_printf(m, " (fence: %d)", err->fence_reg);
 792
 793                 err_puts(m, "\n");
 794                 err++;
 795         }
 796 }
 797
 798 static void i915_ring_error_state(struct drm_i915_error_state_buf *m,
 799                                   struct drm_device *dev,
 800                                   struct drm_i915_error_state *error,
 801                                   unsigned ring)
 802 {
 803         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 804         err_printf(m, "%s command stream:\n", ring_str(ring));
 805         err_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 806         err_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 807         err_printf(m, "  CTL: 0x%08x\n", error->ctl[ring]);
 808         err_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 809         err_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 810         err_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 811         err_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 812         if (ring == RCS && INTEL_INFO(dev)->gen >= 4)
 813                 err_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 814
 815         if (INTEL_INFO(dev)->gen >= 4)
 816                 err_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 817         err_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 818         err_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 819         if (INTEL_INFO(dev)->gen >= 6) {
 820                 err_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 821                 err_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 822                 err_printf(m, "  SYNC_0: 0x%08x [last synced 0x%08x]\n",
 823                            error->semaphore_mboxes[ring][0],
 824                            error->semaphore_seqno[ring][0]);
 825                 err_printf(m, "  SYNC_1: 0x%08x [last synced 0x%08x]\n",
 826                            error->semaphore_mboxes[ring][1],
 827                            error->semaphore_seqno[ring][1]);
 828         }
 829         err_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 830         err_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 831         err_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 832         err_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 833 }
 834
 835 int i915_error_state_to_str(struct drm_i915_error_state_buf *m,
 836                             const struct i915_error_state_file_priv *error_priv)
 837 {
 838         struct drm_device *dev = error_priv->dev;
 839         drm_i915_private_t *dev_priv = dev->dev_private;
 840         struct drm_i915_error_state *error = error_priv->error;
 841         struct intel_ring_buffer *ring;
 842         int i, j, page, offset, elt;
 843
 844         if (!error) {
 845                 err_printf(m, "no error state collected\n");
 846                 goto out;
 847         }
 848
 849         err_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 850                    error->time.tv_usec);
 851         err_printf(m, "Kernel: " UTS_RELEASE "\n");
 852         err_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 853         err_printf(m, "EIR: 0x%08x\n", error->eir);
 854         err_printf(m, "IER: 0x%08x\n", error->ier);
 855         err_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 856         err_printf(m, "FORCEWAKE: 0x%08x\n", error->forcewake);
 857         err_printf(m, "DERRMR: 0x%08x\n", error->derrmr);
 858         err_printf(m, "CCID: 0x%08x\n", error->ccid);
 859
 860         for (i = 0; i < dev_priv->num_fence_regs; i++)
 861                 err_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 862
 863         for (i = 0; i < ARRAY_SIZE(error->extra_instdone); i++)
 864                 err_printf(m, "  INSTDONE_%d: 0x%08x\n", i,
 865                            error->extra_instdone[i]);
 866
 867         if (INTEL_INFO(dev)->gen >= 6) {
 868                 err_printf(m, "ERROR: 0x%08x\n", error->error);
 869                 err_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 870         }
 871
 872         if (INTEL_INFO(dev)->gen == 7)
 873                 err_printf(m, "ERR_INT: 0x%08x\n", error->err_int);
 874
 875         for_each_ring(ring, dev_priv, i)
 876                 i915_ring_error_state(m, dev, error, i);
 877
 878         if (error->active_bo)
 879                 print_error_buffers(m, "Active",
 880                                     error->active_bo,
 881                                     error->active_bo_count);
 882
 883         if (error->pinned_bo)
 884                 print_error_buffers(m, "Pinned",
 885                                     error->pinned_bo,
 886                                     error->pinned_bo_count);
 887
 888         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 889                 struct drm_i915_error_object *obj;
 890
 891                 if ((obj = error->ring[i].batchbuffer)) {
 892                         err_printf(m, "%s --- gtt_offset = 0x%08x\n",
 893                                    dev_priv->ring[i].name,
 894                                    obj->gtt_offset);
 895                         offset = 0;
 896                         for (page = 0; page < obj->page_count; page++) {
 897                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 898                                         err_printf(m, "%08x :  %08x\n", offset,
 899                                                    obj->pages[page][elt]);
 900                                         offset += 4;
 901                                 }
 902                         }
 903                 }
 904
 905                 if (error->ring[i].num_requests) {
 906                         err_printf(m, "%s --- %d requests\n",
 907                                    dev_priv->ring[i].name,
 908                                    error->ring[i].num_requests);
 909                         for (j = 0; j < error->ring[i].num_requests; j++) {
 910                                 err_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 911                                            error->ring[i].requests[j].seqno,
 912                                            error->ring[i].requests[j].jiffies,
 913                                            error->ring[i].requests[j].tail);
 914                         }
 915                 }
 916
 917                 if ((obj = error->ring[i].ringbuffer)) {
 918                         err_printf(m, "%s --- ringbuffer = 0x%08x\n",
 919                                    dev_priv->ring[i].name,
 920                                    obj->gtt_offset);
 921                         offset = 0;
 922                         for (page = 0; page < obj->page_count; page++) {
 923                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 924                                         err_printf(m, "%08x :  %08x\n",
 925                                                    offset,
 926                                                    obj->pages[page][elt]);
 927                                         offset += 4;
 928                                 }
 929                         }
 930                 }
 931
 932                 obj = error->ring[i].ctx;
 933                 if (obj) {
 934                         err_printf(m, "%s --- HW Context = 0x%08x\n",
 935                                    dev_priv->ring[i].name,
 936                                    obj->gtt_offset);
 937                         offset = 0;
 938                         for (elt = 0; elt < PAGE_SIZE/16; elt += 4) {
 939                                 err_printf(m, "[%04x] %08x %08x %08x %08x\n",
 940                                            offset,
 941                                            obj->pages[0][elt],
 942                                            obj->pages[0][elt+1],
 943                                            obj->pages[0][elt+2],
 944                                            obj->pages[0][elt+3]);
 945                                         offset += 16;
 946                         }
 947                 }
 948         }
 949
 950         if (error->overlay)
 951                 intel_overlay_print_error_state(m, error->overlay);
 952
 953         if (error->display)
 954                 intel_display_print_error_state(m, dev, error->display);
 955
 956 out:
 957         if (m->bytes == 0 && m->err)
 958                 return m->err;
 959
 960         return 0;
 961 }
 962
 963 static ssize_t
 964 i915_error_state_write(struct file *filp,
 965                        const char __user *ubuf,
 966                        size_t cnt,
 967                        loff_t *ppos)
 968 {
 969         struct i915_error_state_file_priv *error_priv = filp->private_data;
 970         struct drm_device *dev = error_priv->dev;
 971         int ret;
 972
 973         DRM_DEBUG_DRIVER("Resetting error state\n");
 974
 975         ret = mutex_lock_interruptible(&dev->struct_mutex);
 976         if (ret)
 977                 return ret;
 978
 979         i915_destroy_error_state(dev);
 980         mutex_unlock(&dev->struct_mutex);
 981
 982         return cnt;
 983 }
 984
 985 void i915_error_state_get(struct drm_device *dev,
 986                           struct i915_error_state_file_priv *error_priv)
 987 {
 988         struct drm_i915_private *dev_priv = dev->dev_private;
 989         unsigned long flags;
 990
 991         spin_lock_irqsave(&dev_priv->gpu_error.lock, flags);
 992         error_priv->error = dev_priv->gpu_error.first_error;
 993         if (error_priv->error)
 994                 kref_get(&error_priv->error->ref);
 995         spin_unlock_irqrestore(&dev_priv->gpu_error.lock, flags);
 996
 997 }
 998
 999 void i915_error_state_put(struct i915_error_state_file_priv *error_priv)
1000 {
1001         if (error_priv->error)
1002                 kref_put(&error_priv->error->ref, i915_error_state_free);
1003 }
1004
1005 static int i915_error_state_open(struct inode *inode, struct file *file)
1006 {
1007         struct drm_device *dev = inode->i_private;
1008         struct i915_error_state_file_priv *error_priv;
1009
1010         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
1011         if (!error_priv)
1012                 return -ENOMEM;
1013
1014         error_priv->dev = dev;
1015
1016         i915_error_state_get(dev, error_priv);
1017
1018         file->private_data = error_priv;
1019
1020         return 0;
1021 }
1022
1023 static int i915_error_state_release(struct inode *inode, struct file *file)
1024 {
1025         struct i915_error_state_file_priv *error_priv = file->private_data;
1026
1027         i915_error_state_put(error_priv);
1028         kfree(error_priv);
1029
1030         return 0;
1031 }
1032
1033 int i915_error_state_buf_init(struct drm_i915_error_state_buf *ebuf,
1034                               size_t count, loff_t pos)
1035 {
1036         memset(ebuf, 0, sizeof(*ebuf));
1037
1038         /* We need to have enough room to store any i915_error_state printf
1039          * so that we can move it to start position.
1040          */
1041         ebuf->size = count + 1 > PAGE_SIZE ? count + 1 : PAGE_SIZE;
1042         ebuf->buf = kmalloc(ebuf->size,
1043                                 GFP_TEMPORARY | __GFP_NORETRY | __GFP_NOWARN);
1044
1045         if (ebuf->buf == NULL) {
1046                 ebuf->size = PAGE_SIZE;
1047                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
1048         }
1049
1050         if (ebuf->buf == NULL) {
1051                 ebuf->size = 128;
1052                 ebuf->buf = kmalloc(ebuf->size, GFP_TEMPORARY);
1053         }
1054
1055         if (ebuf->buf == NULL)
1056                 return -ENOMEM;
1057
1058         ebuf->start = pos;
1059
1060         return 0;
1061 }
1062
1063 static ssize_t i915_error_state_read(struct file *file, char __user *userbuf,
1064                                      size_t count, loff_t *pos)
1065 {
1066         struct i915_error_state_file_priv *error_priv = file->private_data;
1067         struct drm_i915_error_state_buf error_str;
1068         loff_t tmp_pos = 0;
1069         ssize_t ret_count = 0;
1070         int ret;
1071
1072         ret = i915_error_state_buf_init(&error_str, count, *pos);
1073         if (ret)
1074                 return ret;
1075
1076         ret = i915_error_state_to_str(&error_str, error_priv);
1077         if (ret)
1078                 goto out;
1079
1080         ret_count = simple_read_from_buffer(userbuf, count, &tmp_pos,
1081                                             error_str.buf,
1082                                             error_str.bytes);
1083
1084         if (ret_count < 0)
1085                 ret = ret_count;
1086         else
1087                 *pos = error_str.start + ret_count;
1088 out:
1089         i915_error_state_buf_release(&error_str);
1090         return ret ?: ret_count;
1091 }
1092
1093 static const struct file_operations i915_error_state_fops = {
1094         .owner = THIS_MODULE,
1095         .open = i915_error_state_open,
1096         .read = i915_error_state_read,
1097         .write = i915_error_state_write,
1098         .llseek = default_llseek,
1099         .release = i915_error_state_release,
1100 };
1101
1102 static int
1103 i915_next_seqno_get(void *data, u64 *val)
1104 {
1105         struct drm_device *dev = data;
1106         drm_i915_private_t *dev_priv = dev->dev_private;
1107         int ret;
1108
1109         ret = mutex_lock_interruptible(&dev->struct_mutex);
1110         if (ret)
1111                 return ret;
1112
1113         *val = dev_priv->next_seqno;
1114         mutex_unlock(&dev->struct_mutex);
1115
1116         return 0;
1117 }
1118
1119 static int
1120 i915_next_seqno_set(void *data, u64 val)
1121 {
1122         struct drm_device *dev = data;
1123         int ret;
1124
1125         ret = mutex_lock_interruptible(&dev->struct_mutex);
1126         if (ret)
1127                 return ret;
1128
1129         ret = i915_gem_set_seqno(dev, val);
1130         mutex_unlock(&dev->struct_mutex);
1131
1132         return ret;
1133 }
1134
1135 DEFINE_SIMPLE_ATTRIBUTE(i915_next_seqno_fops,
1136                         i915_next_seqno_get, i915_next_seqno_set,
1137                         "0x%llx\n");
1138
1139 static int i915_rstdby_delays(struct seq_file *m, void *unused)
1140 {
1141         struct drm_info_node *node = (struct drm_info_node *) m->private;
1142         struct drm_device *dev = node->minor->dev;
1143         drm_i915_private_t *dev_priv = dev->dev_private;
1144         u16 crstanddelay;
1145         int ret;
1146
1147         ret = mutex_lock_interruptible(&dev->struct_mutex);
1148         if (ret)
1149                 return ret;
1150
1151         crstanddelay = I915_READ16(CRSTANDVID);
1152
1153         mutex_unlock(&dev->struct_mutex);
1154
1155         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
1156
1157         return 0;
1158 }
1159
1160 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
1161 {
1162         struct drm_info_node *node = (struct drm_info_node *) m->private;
1163         struct drm_device *dev = node->minor->dev;
1164         drm_i915_private_t *dev_priv = dev->dev_private;
1165         int ret;
1166
1167         if (IS_GEN5(dev)) {
1168                 u16 rgvswctl = I915_READ16(MEMSWCTL);
1169                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
1170
1171                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
1172                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
1173                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
1174                            MEMSTAT_VID_SHIFT);
1175                 seq_printf(m, "Current P-state: %d\n",
1176                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
1177         } else if ((IS_GEN6(dev) || IS_GEN7(dev)) && !IS_VALLEYVIEW(dev)) {
1178                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
1179                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
1180                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
1181                 u32 rpstat, cagf;
1182                 u32 rpupei, rpcurup, rpprevup;
1183                 u32 rpdownei, rpcurdown, rpprevdown;
1184                 int max_freq;
1185
1186                 /* RPSTAT1 is in the GT power well */
1187                 ret = mutex_lock_interruptible(&dev->struct_mutex);
1188                 if (ret)
1189                         return ret;
1190
1191                 gen6_gt_force_wake_get(dev_priv);
1192
1193                 rpstat = I915_READ(GEN6_RPSTAT1);
1194                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
1195                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
1196                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
1197                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
1198                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
1199                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
1200                 if (IS_HASWELL(dev))
1201                         cagf = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
1202                 else
1203                         cagf = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
1204                 cagf *= GT_FREQUENCY_MULTIPLIER;
1205
1206                 gen6_gt_force_wake_put(dev_priv);
1207                 mutex_unlock(&dev->struct_mutex);
1208
1209                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
1210                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
1211                 seq_printf(m, "Render p-state ratio: %d\n",
1212                            (gt_perf_status & 0xff00) >> 8);
1213                 seq_printf(m, "Render p-state VID: %d\n",
1214                            gt_perf_status & 0xff);
1215                 seq_printf(m, "Render p-state limit: %d\n",
1216                            rp_state_limits & 0xff);
1217                 seq_printf(m, "CAGF: %dMHz\n", cagf);
1218                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
1219                            GEN6_CURICONT_MASK);
1220                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
1221                            GEN6_CURBSYTAVG_MASK);
1222                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
1223                            GEN6_CURBSYTAVG_MASK);
1224                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
1225                            GEN6_CURIAVG_MASK);
1226                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
1227                            GEN6_CURBSYTAVG_MASK);
1228                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
1229                            GEN6_CURBSYTAVG_MASK);
1230
1231                 max_freq = (rp_state_cap & 0xff0000) >> 16;
1232                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
1233                            max_freq * GT_FREQUENCY_MULTIPLIER);
1234
1235                 max_freq = (rp_state_cap & 0xff00) >> 8;
1236                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
1237                            max_freq * GT_FREQUENCY_MULTIPLIER);
1238
1239                 max_freq = rp_state_cap & 0xff;
1240                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
1241                            max_freq * GT_FREQUENCY_MULTIPLIER);
1242
1243                 seq_printf(m, "Max overclocked frequency: %dMHz\n",
1244                            dev_priv->rps.hw_max * GT_FREQUENCY_MULTIPLIER);
1245         } else if (IS_VALLEYVIEW(dev)) {
1246                 u32 freq_sts, val;
1247
1248                 mutex_lock(&dev_priv->rps.hw_lock);
1249                 freq_sts = vlv_punit_read(dev_priv, PUNIT_REG_GPU_FREQ_STS);
1250                 seq_printf(m, "PUNIT_REG_GPU_FREQ_STS: 0x%08x\n", freq_sts);
1251                 seq_printf(m, "DDR freq: %d MHz\n", dev_priv->mem_freq);
1252
1253                 val = vlv_punit_read(dev_priv, PUNIT_FUSE_BUS1);
1254                 seq_printf(m, "max GPU freq: %d MHz\n",
1255                            vlv_gpu_freq(dev_priv->mem_freq, val));
1256
1257                 val = vlv_punit_read(dev_priv, PUNIT_REG_GPU_LFM);
1258                 seq_printf(m, "min GPU freq: %d MHz\n",
1259                            vlv_gpu_freq(dev_priv->mem_freq, val));
1260
1261                 seq_printf(m, "current GPU freq: %d MHz\n",
1262                            vlv_gpu_freq(dev_priv->mem_freq,
1263                                         (freq_sts >> 8) & 0xff));
1264                 mutex_unlock(&dev_priv->rps.hw_lock);
1265         } else {
1266                 seq_puts(m, "no P-state info available\n");
1267         }
1268
1269         return 0;
1270 }
1271
1272 static int i915_delayfreq_table(struct seq_file *m, void *unused)
1273 {
1274         struct drm_info_node *node = (struct drm_info_node *) m->private;
1275         struct drm_device *dev = node->minor->dev;
1276         drm_i915_private_t *dev_priv = dev->dev_private;
1277         u32 delayfreq;
1278         int ret, i;
1279
1280         ret = mutex_lock_interruptible(&dev->struct_mutex);
1281         if (ret)
1282                 return ret;
1283
1284         for (i = 0; i < 16; i++) {
1285                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
1286                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
1287                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
1288         }
1289
1290         mutex_unlock(&dev->struct_mutex);
1291
1292         return 0;
1293 }
1294
1295 static inline int MAP_TO_MV(int map)
1296 {
1297         return 1250 - (map * 25);
1298 }
1299
1300 static int i915_inttoext_table(struct seq_file *m, void *unused)
1301 {
1302         struct drm_info_node *node = (struct drm_info_node *) m->private;
1303         struct drm_device *dev = node->minor->dev;
1304         drm_i915_private_t *dev_priv = dev->dev_private;
1305         u32 inttoext;
1306         int ret, i;
1307
1308         ret = mutex_lock_interruptible(&dev->struct_mutex);
1309         if (ret)
1310                 return ret;
1311
1312         for (i = 1; i <= 32; i++) {
1313                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1314                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1315         }
1316
1317         mutex_unlock(&dev->struct_mutex);
1318
1319         return 0;
1320 }
1321
1322 static int ironlake_drpc_info(struct seq_file *m)
1323 {
1324         struct drm_info_node *node = (struct drm_info_node *) m->private;
1325         struct drm_device *dev = node->minor->dev;
1326         drm_i915_private_t *dev_priv = dev->dev_private;
1327         u32 rgvmodectl, rstdbyctl;
1328         u16 crstandvid;
1329         int ret;
1330
1331         ret = mutex_lock_interruptible(&dev->struct_mutex);
1332         if (ret)
1333                 return ret;
1334
1335         rgvmodectl = I915_READ(MEMMODECTL);
1336         rstdbyctl = I915_READ(RSTDBYCTL);
1337         crstandvid = I915_READ16(CRSTANDVID);
1338
1339         mutex_unlock(&dev->struct_mutex);
1340
1341         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1342                    "yes" : "no");
1343         seq_printf(m, "Boost freq: %d\n",
1344                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1345                    MEMMODE_BOOST_FREQ_SHIFT);
1346         seq_printf(m, "HW control enabled: %s\n",
1347                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1348         seq_printf(m, "SW control enabled: %s\n",
1349                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1350         seq_printf(m, "Gated voltage change: %s\n",
1351                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1352         seq_printf(m, "Starting frequency: P%d\n",
1353                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1354         seq_printf(m, "Max P-state: P%d\n",
1355                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1356         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1357         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1358         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1359         seq_printf(m, "Render standby enabled: %s\n",
1360                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1361         seq_puts(m, "Current RS state: ");
1362         switch (rstdbyctl & RSX_STATUS_MASK) {
1363         case RSX_STATUS_ON:
1364                 seq_puts(m, "on\n");
1365                 break;
1366         case RSX_STATUS_RC1:
1367                 seq_puts(m, "RC1\n");
1368                 break;
1369         case RSX_STATUS_RC1E:
1370                 seq_puts(m, "RC1E\n");
1371                 break;
1372         case RSX_STATUS_RS1:
1373                 seq_puts(m, "RS1\n");
1374                 break;
1375         case RSX_STATUS_RS2:
1376                 seq_puts(m, "RS2 (RC6)\n");
1377                 break;
1378         case RSX_STATUS_RS3:
1379                 seq_puts(m, "RC3 (RC6+)\n");
1380                 break;
1381         default:
1382                 seq_puts(m, "unknown\n");
1383                 break;
1384         }
1385
1386         return 0;
1387 }
1388
1389 static int gen6_drpc_info(struct seq_file *m)
1390 {
1391
1392         struct drm_info_node *node = (struct drm_info_node *) m->private;
1393         struct drm_device *dev = node->minor->dev;
1394         struct drm_i915_private *dev_priv = dev->dev_private;
1395         u32 rpmodectl1, gt_core_status, rcctl1, rc6vids = 0;
1396         unsigned forcewake_count;
1397         int count = 0, ret;
1398
1399         ret = mutex_lock_interruptible(&dev->struct_mutex);
1400         if (ret)
1401                 return ret;
1402
1403         spin_lock_irq(&dev_priv->gt_lock);
1404         forcewake_count = dev_priv->forcewake_count;
1405         spin_unlock_irq(&dev_priv->gt_lock);
1406
1407         if (forcewake_count) {
1408                 seq_puts(m, "RC information inaccurate because somebody "
1409                             "holds a forcewake reference \n");
1410         } else {
1411                 /* NB: we cannot use forcewake, else we read the wrong values */
1412                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1413                         udelay(10);
1414                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1415         }
1416
1417         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1418         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1419
1420         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1421         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1422         mutex_unlock(&dev->struct_mutex);
1423         mutex_lock(&dev_priv->rps.hw_lock);
1424         sandybridge_pcode_read(dev_priv, GEN6_PCODE_READ_RC6VIDS, &rc6vids);
1425         mutex_unlock(&dev_priv->rps.hw_lock);
1426
1427         seq_printf(m, "Video Turbo Mode: %s\n",
1428                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1429         seq_printf(m, "HW control enabled: %s\n",
1430                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1431         seq_printf(m, "SW control enabled: %s\n",
1432                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1433                           GEN6_RP_MEDIA_SW_MODE));
1434         seq_printf(m, "RC1e Enabled: %s\n",
1435                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1436         seq_printf(m, "RC6 Enabled: %s\n",
1437                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1438         seq_printf(m, "Deep RC6 Enabled: %s\n",
1439                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1440         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1441                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1442         seq_puts(m, "Current RC state: ");
1443         switch (gt_core_status & GEN6_RCn_MASK) {
1444         case GEN6_RC0:
1445                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1446                         seq_puts(m, "Core Power Down\n");
1447                 else
1448                         seq_puts(m, "on\n");
1449                 break;
1450         case GEN6_RC3:
1451                 seq_puts(m, "RC3\n");
1452                 break;
1453         case GEN6_RC6:
1454                 seq_puts(m, "RC6\n");
1455                 break;
1456         case GEN6_RC7:
1457                 seq_puts(m, "RC7\n");
1458                 break;
1459         default:
1460                 seq_puts(m, "Unknown\n");
1461                 break;
1462         }
1463
1464         seq_printf(m, "Core Power Down: %s\n",
1465                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1466
1467         /* Not exactly sure what this is */
1468         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1469                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1470         seq_printf(m, "RC6 residency since boot: %u\n",
1471                    I915_READ(GEN6_GT_GFX_RC6));
1472         seq_printf(m, "RC6+ residency since boot: %u\n",
1473                    I915_READ(GEN6_GT_GFX_RC6p));
1474         seq_printf(m, "RC6++ residency since boot: %u\n",
1475                    I915_READ(GEN6_GT_GFX_RC6pp));
1476
1477         seq_printf(m, "RC6   voltage: %dmV\n",
1478                    GEN6_DECODE_RC6_VID(((rc6vids >> 0) & 0xff)));
1479         seq_printf(m, "RC6+  voltage: %dmV\n",
1480                    GEN6_DECODE_RC6_VID(((rc6vids >> 8) & 0xff)));
1481         seq_printf(m, "RC6++ voltage: %dmV\n",
1482                    GEN6_DECODE_RC6_VID(((rc6vids >> 16) & 0xff)));
1483         return 0;
1484 }
1485
1486 static int i915_drpc_info(struct seq_file *m, void *unused)
1487 {
1488         struct drm_info_node *node = (struct drm_info_node *) m->private;
1489         struct drm_device *dev = node->minor->dev;
1490
1491         if (IS_GEN6(dev) || IS_GEN7(dev))
1492                 return gen6_drpc_info(m);
1493         else
1494                 return ironlake_drpc_info(m);
1495 }
1496
1497 static int i915_fbc_status(struct seq_file *m, void *unused)
1498 {
1499         struct drm_info_node *node = (struct drm_info_node *) m->private;
1500         struct drm_device *dev = node->minor->dev;
1501         drm_i915_private_t *dev_priv = dev->dev_private;
1502
1503         if (!I915_HAS_FBC(dev)) {
1504                 seq_puts(m, "FBC unsupported on this chipset\n");
1505                 return 0;
1506         }
1507
1508         if (intel_fbc_enabled(dev)) {
1509                 seq_puts(m, "FBC enabled\n");
1510         } else {
1511                 seq_puts(m, "FBC disabled: ");
1512                 switch (dev_priv->fbc.no_fbc_reason) {
1513                 case FBC_NO_OUTPUT:
1514                         seq_puts(m, "no outputs");
1515                         break;
1516                 case FBC_STOLEN_TOO_SMALL:
1517                         seq_puts(m, "not enough stolen memory");
1518                         break;
1519                 case FBC_UNSUPPORTED_MODE:
1520                         seq_puts(m, "mode not supported");
1521                         break;
1522                 case FBC_MODE_TOO_LARGE:
1523                         seq_puts(m, "mode too large");
1524                         break;
1525                 case FBC_BAD_PLANE:
1526                         seq_puts(m, "FBC unsupported on plane");
1527                         break;
1528                 case FBC_NOT_TILED:
1529                         seq_puts(m, "scanout buffer not tiled");
1530                         break;
1531                 case FBC_MULTIPLE_PIPES:
1532                         seq_puts(m, "multiple pipes are enabled");
1533                         break;
1534                 case FBC_MODULE_PARAM:
1535                         seq_puts(m, "disabled per module param (default off)");
1536                         break;
1537                 case FBC_CHIP_DEFAULT:
1538                         seq_puts(m, "disabled per chip default");
1539                         break;
1540                 default:
1541                         seq_puts(m, "unknown reason");
1542                 }
1543                 seq_putc(m, '\n');
1544         }
1545         return 0;
1546 }
1547
1548 static int i915_ips_status(struct seq_file *m, void *unused)
1549 {
1550         struct drm_info_node *node = (struct drm_info_node *) m->private;
1551         struct drm_device *dev = node->minor->dev;
1552         struct drm_i915_private *dev_priv = dev->dev_private;
1553
1554         if (!HAS_IPS(dev)) {
1555                 seq_puts(m, "not supported\n");
1556                 return 0;
1557         }
1558
1559         if (I915_READ(IPS_CTL) & IPS_ENABLE)
1560                 seq_puts(m, "enabled\n");
1561         else
1562                 seq_puts(m, "disabled\n");
1563
1564         return 0;
1565 }
1566
1567 static int i915_sr_status(struct seq_file *m, void *unused)
1568 {
1569         struct drm_info_node *node = (struct drm_info_node *) m->private;
1570         struct drm_device *dev = node->minor->dev;
1571         drm_i915_private_t *dev_priv = dev->dev_private;
1572         bool sr_enabled = false;
1573
1574         if (HAS_PCH_SPLIT(dev))
1575                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1576         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1577                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1578         else if (IS_I915GM(dev))
1579                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1580         else if (IS_PINEVIEW(dev))
1581                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1582
1583         seq_printf(m, "self-refresh: %s\n",
1584                    sr_enabled ? "enabled" : "disabled");
1585
1586         return 0;
1587 }
1588
1589 static int i915_emon_status(struct seq_file *m, void *unused)
1590 {
1591         struct drm_info_node *node = (struct drm_info_node *) m->private;
1592         struct drm_device *dev = node->minor->dev;
1593         drm_i915_private_t *dev_priv = dev->dev_private;
1594         unsigned long temp, chipset, gfx;
1595         int ret;
1596
1597         if (!IS_GEN5(dev))
1598                 return -ENODEV;
1599
1600         ret = mutex_lock_interruptible(&dev->struct_mutex);
1601         if (ret)
1602                 return ret;
1603
1604         temp = i915_mch_val(dev_priv);
1605         chipset = i915_chipset_val(dev_priv);
1606         gfx = i915_gfx_val(dev_priv);
1607         mutex_unlock(&dev->struct_mutex);
1608
1609         seq_printf(m, "GMCH temp: %ld\n", temp);
1610         seq_printf(m, "Chipset power: %ld\n", chipset);
1611         seq_printf(m, "GFX power: %ld\n", gfx);
1612         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1613
1614         return 0;
1615 }
1616
1617 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1618 {
1619         struct drm_info_node *node = (struct drm_info_node *) m->private;
1620         struct drm_device *dev = node->minor->dev;
1621         drm_i915_private_t *dev_priv = dev->dev_private;
1622         int ret;
1623         int gpu_freq, ia_freq;
1624
1625         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1626                 seq_puts(m, "unsupported on this chipset\n");
1627                 return 0;
1628         }
1629
1630         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
1631         if (ret)
1632                 return ret;
1633
1634         seq_puts(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\tEffective Ring freq (MHz)\n");
1635
1636         for (gpu_freq = dev_priv->rps.min_delay;
1637              gpu_freq <= dev_priv->rps.max_delay;
1638              gpu_freq++) {
1639                 ia_freq = gpu_freq;
1640                 sandybridge_pcode_read(dev_priv,
1641                                        GEN6_PCODE_READ_MIN_FREQ_TABLE,
1642                                        &ia_freq);
1643                 seq_printf(m, "%d\t\t%d\t\t\t\t%d\n",
1644                            gpu_freq * GT_FREQUENCY_MULTIPLIER,
1645                            ((ia_freq >> 0) & 0xff) * 100,
1646                            ((ia_freq >> 8) & 0xff) * 100);
1647         }
1648
1649         mutex_unlock(&dev_priv->rps.hw_lock);
1650
1651         return 0;
1652 }
1653
1654 static int i915_gfxec(struct seq_file *m, void *unused)
1655 {
1656         struct drm_info_node *node = (struct drm_info_node *) m->private;
1657         struct drm_device *dev = node->minor->dev;
1658         drm_i915_private_t *dev_priv = dev->dev_private;
1659         int ret;
1660
1661         ret = mutex_lock_interruptible(&dev->struct_mutex);
1662         if (ret)
1663                 return ret;
1664
1665         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1666
1667         mutex_unlock(&dev->struct_mutex);
1668
1669         return 0;
1670 }
1671
1672 static int i915_opregion(struct seq_file *m, void *unused)
1673 {
1674         struct drm_info_node *node = (struct drm_info_node *) m->private;
1675         struct drm_device *dev = node->minor->dev;
1676         drm_i915_private_t *dev_priv = dev->dev_private;
1677         struct intel_opregion *opregion = &dev_priv->opregion;
1678         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1679         int ret;
1680
1681         if (data == NULL)
1682                 return -ENOMEM;
1683
1684         ret = mutex_lock_interruptible(&dev->struct_mutex);
1685         if (ret)
1686                 goto out;
1687
1688         if (opregion->header) {
1689                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1690                 seq_write(m, data, OPREGION_SIZE);
1691         }
1692
1693         mutex_unlock(&dev->struct_mutex);
1694
1695 out:
1696         kfree(data);
1697         return 0;
1698 }
1699
1700 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1701 {
1702         struct drm_info_node *node = (struct drm_info_node *) m->private;
1703         struct drm_device *dev = node->minor->dev;
1704         drm_i915_private_t *dev_priv = dev->dev_private;
1705         struct intel_fbdev *ifbdev;
1706         struct intel_framebuffer *fb;
1707         int ret;
1708
1709         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1710         if (ret)
1711                 return ret;
1712
1713         ifbdev = dev_priv->fbdev;
1714         fb = to_intel_framebuffer(ifbdev->helper.fb);
1715
1716         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1717                    fb->base.width,
1718                    fb->base.height,
1719                    fb->base.depth,
1720                    fb->base.bits_per_pixel,
1721                    atomic_read(&fb->base.refcount.refcount));
1722         describe_obj(m, fb->obj);
1723         seq_putc(m, '\n');
1724         mutex_unlock(&dev->mode_config.mutex);
1725
1726         mutex_lock(&dev->mode_config.fb_lock);
1727         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1728                 if (&fb->base == ifbdev->helper.fb)
1729                         continue;
1730
1731                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, refcount %d, obj ",
1732                            fb->base.width,
1733                            fb->base.height,
1734                            fb->base.depth,
1735                            fb->base.bits_per_pixel,
1736                            atomic_read(&fb->base.refcount.refcount));
1737                 describe_obj(m, fb->obj);
1738                 seq_putc(m, '\n');
1739         }
1740         mutex_unlock(&dev->mode_config.fb_lock);
1741
1742         return 0;
1743 }
1744
1745 static int i915_context_status(struct seq_file *m, void *unused)
1746 {
1747         struct drm_info_node *node = (struct drm_info_node *) m->private;
1748         struct drm_device *dev = node->minor->dev;
1749         drm_i915_private_t *dev_priv = dev->dev_private;
1750         struct intel_ring_buffer *ring;
1751         int ret, i;
1752
1753         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1754         if (ret)
1755                 return ret;
1756
1757         if (dev_priv->ips.pwrctx) {
1758                 seq_puts(m, "power context ");
1759                 describe_obj(m, dev_priv->ips.pwrctx);
1760                 seq_putc(m, '\n');
1761         }
1762
1763         if (dev_priv->ips.renderctx) {
1764                 seq_puts(m, "render context ");
1765                 describe_obj(m, dev_priv->ips.renderctx);
1766                 seq_putc(m, '\n');
1767         }
1768
1769         for_each_ring(ring, dev_priv, i) {
1770                 if (ring->default_context) {
1771                         seq_printf(m, "HW default context %s ring ", ring->name);
1772                         describe_obj(m, ring->default_context->obj);
1773                         seq_putc(m, '\n');
1774                 }
1775         }
1776
1777         mutex_unlock(&dev->mode_config.mutex);
1778
1779         return 0;
1780 }
1781
1782 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1783 {
1784         struct drm_info_node *node = (struct drm_info_node *) m->private;
1785         struct drm_device *dev = node->minor->dev;
1786         struct drm_i915_private *dev_priv = dev->dev_private;
1787         unsigned forcewake_count;
1788
1789         spin_lock_irq(&dev_priv->gt_lock);
1790         forcewake_count = dev_priv->forcewake_count;
1791         spin_unlock_irq(&dev_priv->gt_lock);
1792
1793         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1794
1795         return 0;
1796 }
1797
1798 static const char *swizzle_string(unsigned swizzle)
1799 {
1800         switch (swizzle) {
1801         case I915_BIT_6_SWIZZLE_NONE:
1802                 return "none";
1803         case I915_BIT_6_SWIZZLE_9:
1804                 return "bit9";
1805         case I915_BIT_6_SWIZZLE_9_10:
1806                 return "bit9/bit10";
1807         case I915_BIT_6_SWIZZLE_9_11:
1808                 return "bit9/bit11";
1809         case I915_BIT_6_SWIZZLE_9_10_11:
1810                 return "bit9/bit10/bit11";
1811         case I915_BIT_6_SWIZZLE_9_17:
1812                 return "bit9/bit17";
1813         case I915_BIT_6_SWIZZLE_9_10_17:
1814                 return "bit9/bit10/bit17";
1815         case I915_BIT_6_SWIZZLE_UNKNOWN:
1816                 return "unknown";
1817         }
1818
1819         return "bug";
1820 }
1821
1822 static int i915_swizzle_info(struct seq_file *m, void *data)
1823 {
1824         struct drm_info_node *node = (struct drm_info_node *) m->private;
1825         struct drm_device *dev = node->minor->dev;
1826         struct drm_i915_private *dev_priv = dev->dev_private;
1827         int ret;
1828
1829         ret = mutex_lock_interruptible(&dev->struct_mutex);
1830         if (ret)
1831                 return ret;
1832
1833         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1834                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1835         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1836                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1837
1838         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1839                 seq_printf(m, "DDC = 0x%08x\n",
1840                            I915_READ(DCC));
1841                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1842                            I915_READ16(C0DRB3));
1843                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1844                            I915_READ16(C1DRB3));
1845         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1846                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1847                            I915_READ(MAD_DIMM_C0));
1848                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1849                            I915_READ(MAD_DIMM_C1));
1850                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1851                            I915_READ(MAD_DIMM_C2));
1852                 seq_printf(m, "TILECTL = 0x%08x\n",
1853                            I915_READ(TILECTL));
1854                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1855                            I915_READ(ARB_MODE));
1856                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1857                            I915_READ(DISP_ARB_CTL));
1858         }
1859         mutex_unlock(&dev->struct_mutex);
1860
1861         return 0;
1862 }
1863
1864 static int i915_ppgtt_info(struct seq_file *m, void *data)
1865 {
1866         struct drm_info_node *node = (struct drm_info_node *) m->private;
1867         struct drm_device *dev = node->minor->dev;
1868         struct drm_i915_private *dev_priv = dev->dev_private;
1869         struct intel_ring_buffer *ring;
1870         int i, ret;
1871
1872
1873         ret = mutex_lock_interruptible(&dev->struct_mutex);
1874         if (ret)
1875                 return ret;
1876         if (INTEL_INFO(dev)->gen == 6)
1877                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1878
1879         for_each_ring(ring, dev_priv, i) {
1880                 seq_printf(m, "%s\n", ring->name);
1881                 if (INTEL_INFO(dev)->gen == 7)
1882                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1883                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1884                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1885                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1886         }
1887         if (dev_priv->mm.aliasing_ppgtt) {
1888                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1889
1890                 seq_puts(m, "aliasing PPGTT:\n");
1891                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1892         }
1893         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1894         mutex_unlock(&dev->struct_mutex);
1895
1896         return 0;
1897 }
1898
1899 static int i915_dpio_info(struct seq_file *m, void *data)
1900 {
1901         struct drm_info_node *node = (struct drm_info_node *) m->private;
1902         struct drm_device *dev = node->minor->dev;
1903         struct drm_i915_private *dev_priv = dev->dev_private;
1904         int ret;
1905
1906
1907         if (!IS_VALLEYVIEW(dev)) {
1908                 seq_puts(m, "unsupported\n");
1909                 return 0;
1910         }
1911
1912         ret = mutex_lock_interruptible(&dev_priv->dpio_lock);
1913         if (ret)
1914                 return ret;
1915
1916         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1917
1918         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1919                    vlv_dpio_read(dev_priv, _DPIO_DIV_A));
1920         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1921                    vlv_dpio_read(dev_priv, _DPIO_DIV_B));
1922
1923         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1924                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_A));
1925         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1926                    vlv_dpio_read(dev_priv, _DPIO_REFSFR_B));
1927
1928         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1929                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1930         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1931                    vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1932
1933         seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n",
1934                    vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A));
1935         seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n",
1936                    vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B));
1937
1938         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1939                    vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1940
1941         mutex_unlock(&dev_priv->dpio_lock);
1942
1943         return 0;
1944 }
1945
1946 static int
1947 i915_wedged_get(void *data, u64 *val)
1948 {
1949         struct drm_device *dev = data;
1950         drm_i915_private_t *dev_priv = dev->dev_private;
1951
1952         *val = atomic_read(&dev_priv->gpu_error.reset_counter);
1953
1954         return 0;
1955 }
1956
1957 static int
1958 i915_wedged_set(void *data, u64 val)
1959 {
1960         struct drm_device *dev = data;
1961
1962         DRM_INFO("Manually setting wedged to %llu\n", val);
1963         i915_handle_error(dev, val);
1964
1965         return 0;
1966 }
1967
1968 DEFINE_SIMPLE_ATTRIBUTE(i915_wedged_fops,
1969                         i915_wedged_get, i915_wedged_set,
1970                         "%llu\n");
1971
1972 static int
1973 i915_ring_stop_get(void *data, u64 *val)
1974 {
1975         struct drm_device *dev = data;
1976         drm_i915_private_t *dev_priv = dev->dev_private;
1977
1978         *val = dev_priv->gpu_error.stop_rings;
1979
1980         return 0;
1981 }
1982
1983 static int
1984 i915_ring_stop_set(void *data, u64 val)
1985 {
1986         struct drm_device *dev = data;
1987         struct drm_i915_private *dev_priv = dev->dev_private;
1988         int ret;
1989
1990         DRM_DEBUG_DRIVER("Stopping rings 0x%08llx\n", val);
1991
1992         ret = mutex_lock_interruptible(&dev->struct_mutex);
1993         if (ret)
1994                 return ret;
1995
1996         dev_priv->gpu_error.stop_rings = val;
1997         mutex_unlock(&dev->struct_mutex);
1998
1999         return 0;
2000 }
2001
2002 DEFINE_SIMPLE_ATTRIBUTE(i915_ring_stop_fops,
2003                         i915_ring_stop_get, i915_ring_stop_set,
2004                         "0x%08llx\n");
2005
2006 #define DROP_UNBOUND 0x1
2007 #define DROP_BOUND 0x2
2008 #define DROP_RETIRE 0x4
2009 #define DROP_ACTIVE 0x8
2010 #define DROP_ALL (DROP_UNBOUND | \
2011                   DROP_BOUND | \
2012                   DROP_RETIRE | \
2013                   DROP_ACTIVE)
2014 static int
2015 i915_drop_caches_get(void *data, u64 *val)
2016 {
2017         *val = DROP_ALL;
2018
2019         return 0;
2020 }
2021
2022 static int
2023 i915_drop_caches_set(void *data, u64 val)
2024 {
2025         struct drm_device *dev = data;
2026         struct drm_i915_private *dev_priv = dev->dev_private;
2027         struct drm_i915_gem_object *obj, *next;
2028         int ret;
2029
2030         DRM_DEBUG_DRIVER("Dropping caches: 0x%08llx\n", val);
2031
2032         /* No need to check and wait for gpu resets, only libdrm auto-restarts
2033          * on ioctls on -EAGAIN. */
2034         ret = mutex_lock_interruptible(&dev->struct_mutex);
2035         if (ret)
2036                 return ret;
2037
2038         if (val & DROP_ACTIVE) {
2039                 ret = i915_gpu_idle(dev);
2040                 if (ret)
2041                         goto unlock;
2042         }
2043
2044         if (val & (DROP_RETIRE | DROP_ACTIVE))
2045                 i915_gem_retire_requests(dev);
2046
2047         if (val & DROP_BOUND) {
2048                 list_for_each_entry_safe(obj, next, &dev_priv->mm.inactive_list, mm_list)
2049                         if (obj->pin_count == 0) {
2050                                 ret = i915_gem_object_unbind(obj);
2051                                 if (ret)
2052                                         goto unlock;
2053                         }
2054         }
2055
2056         if (val & DROP_UNBOUND) {
2057                 list_for_each_entry_safe(obj, next, &dev_priv->mm.unbound_list,
2058                                          global_list)
2059                         if (obj->pages_pin_count == 0) {
2060                                 ret = i915_gem_object_put_pages(obj);
2061                                 if (ret)
2062                                         goto unlock;
2063                         }
2064         }
2065
2066 unlock:
2067         mutex_unlock(&dev->struct_mutex);
2068
2069         return ret;
2070 }
2071
2072 DEFINE_SIMPLE_ATTRIBUTE(i915_drop_caches_fops,
2073                         i915_drop_caches_get, i915_drop_caches_set,
2074                         "0x%08llx\n");
2075
2076 static int
2077 i915_max_freq_get(void *data, u64 *val)
2078 {
2079         struct drm_device *dev = data;
2080         drm_i915_private_t *dev_priv = dev->dev_private;
2081         int ret;
2082
2083         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2084                 return -ENODEV;
2085
2086         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2087         if (ret)
2088                 return ret;
2089
2090         if (IS_VALLEYVIEW(dev))
2091                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2092                                     dev_priv->rps.max_delay);
2093         else
2094                 *val = dev_priv->rps.max_delay * GT_FREQUENCY_MULTIPLIER;
2095         mutex_unlock(&dev_priv->rps.hw_lock);
2096
2097         return 0;
2098 }
2099
2100 static int
2101 i915_max_freq_set(void *data, u64 val)
2102 {
2103         struct drm_device *dev = data;
2104         struct drm_i915_private *dev_priv = dev->dev_private;
2105         int ret;
2106
2107         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2108                 return -ENODEV;
2109
2110         DRM_DEBUG_DRIVER("Manually setting max freq to %llu\n", val);
2111
2112         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2113         if (ret)
2114                 return ret;
2115
2116         /*
2117          * Turbo will still be enabled, but won't go above the set value.
2118          */
2119         if (IS_VALLEYVIEW(dev)) {
2120                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2121                 dev_priv->rps.max_delay = val;
2122                 gen6_set_rps(dev, val);
2123         } else {
2124                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2125                 dev_priv->rps.max_delay = val;
2126                 gen6_set_rps(dev, val);
2127         }
2128
2129         mutex_unlock(&dev_priv->rps.hw_lock);
2130
2131         return 0;
2132 }
2133
2134 DEFINE_SIMPLE_ATTRIBUTE(i915_max_freq_fops,
2135                         i915_max_freq_get, i915_max_freq_set,
2136                         "%llu\n");
2137
2138 static int
2139 i915_min_freq_get(void *data, u64 *val)
2140 {
2141         struct drm_device *dev = data;
2142         drm_i915_private_t *dev_priv = dev->dev_private;
2143         int ret;
2144
2145         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2146                 return -ENODEV;
2147
2148         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2149         if (ret)
2150                 return ret;
2151
2152         if (IS_VALLEYVIEW(dev))
2153                 *val = vlv_gpu_freq(dev_priv->mem_freq,
2154                                     dev_priv->rps.min_delay);
2155         else
2156                 *val = dev_priv->rps.min_delay * GT_FREQUENCY_MULTIPLIER;
2157         mutex_unlock(&dev_priv->rps.hw_lock);
2158
2159         return 0;
2160 }
2161
2162 static int
2163 i915_min_freq_set(void *data, u64 val)
2164 {
2165         struct drm_device *dev = data;
2166         struct drm_i915_private *dev_priv = dev->dev_private;
2167         int ret;
2168
2169         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2170                 return -ENODEV;
2171
2172         DRM_DEBUG_DRIVER("Manually setting min freq to %llu\n", val);
2173
2174         ret = mutex_lock_interruptible(&dev_priv->rps.hw_lock);
2175         if (ret)
2176                 return ret;
2177
2178         /*
2179          * Turbo will still be enabled, but won't go below the set value.
2180          */
2181         if (IS_VALLEYVIEW(dev)) {
2182                 val = vlv_freq_opcode(dev_priv->mem_freq, val);
2183                 dev_priv->rps.min_delay = val;
2184                 valleyview_set_rps(dev, val);
2185         } else {
2186                 do_div(val, GT_FREQUENCY_MULTIPLIER);
2187                 dev_priv->rps.min_delay = val;
2188                 gen6_set_rps(dev, val);
2189         }
2190         mutex_unlock(&dev_priv->rps.hw_lock);
2191
2192         return 0;
2193 }
2194
2195 DEFINE_SIMPLE_ATTRIBUTE(i915_min_freq_fops,
2196                         i915_min_freq_get, i915_min_freq_set,
2197                         "%llu\n");
2198
2199 static int
2200 i915_cache_sharing_get(void *data, u64 *val)
2201 {
2202         struct drm_device *dev = data;
2203         drm_i915_private_t *dev_priv = dev->dev_private;
2204         u32 snpcr;
2205         int ret;
2206
2207         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2208                 return -ENODEV;
2209
2210         ret = mutex_lock_interruptible(&dev->struct_mutex);
2211         if (ret)
2212                 return ret;
2213
2214         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2215         mutex_unlock(&dev_priv->dev->struct_mutex);
2216
2217         *val = (snpcr & GEN6_MBC_SNPCR_MASK) >> GEN6_MBC_SNPCR_SHIFT;
2218
2219         return 0;
2220 }
2221
2222 static int
2223 i915_cache_sharing_set(void *data, u64 val)
2224 {
2225         struct drm_device *dev = data;
2226         struct drm_i915_private *dev_priv = dev->dev_private;
2227         u32 snpcr;
2228
2229         if (!(IS_GEN6(dev) || IS_GEN7(dev)))
2230                 return -ENODEV;
2231
2232         if (val > 3)
2233                 return -EINVAL;
2234
2235         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %llu\n", val);
2236
2237         /* Update the cache sharing policy here as well */
2238         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
2239         snpcr &= ~GEN6_MBC_SNPCR_MASK;
2240         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
2241         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
2242
2243         return 0;
2244 }
2245
2246 DEFINE_SIMPLE_ATTRIBUTE(i915_cache_sharing_fops,
2247                         i915_cache_sharing_get, i915_cache_sharing_set,
2248                         "%llu\n");
2249
2250 /* As the drm_debugfs_init() routines are called before dev->dev_private is
2251  * allocated we need to hook into the minor for release. */
2252 static int
2253 drm_add_fake_info_node(struct drm_minor *minor,
2254                        struct dentry *ent,
2255                        const void *key)
2256 {
2257         struct drm_info_node *node;
2258
2259         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
2260         if (node == NULL) {
2261                 debugfs_remove(ent);
2262                 return -ENOMEM;
2263         }
2264
2265         node->minor = minor;
2266         node->dent = ent;
2267         node->info_ent = (void *) key;
2268
2269         mutex_lock(&minor->debugfs_lock);
2270         list_add(&node->list, &minor->debugfs_list);
2271         mutex_unlock(&minor->debugfs_lock);
2272
2273         return 0;
2274 }
2275
2276 static int i915_forcewake_open(struct inode *inode, struct file *file)
2277 {
2278         struct drm_device *dev = inode->i_private;
2279         struct drm_i915_private *dev_priv = dev->dev_private;
2280
2281         if (INTEL_INFO(dev)->gen < 6)
2282                 return 0;
2283
2284         gen6_gt_force_wake_get(dev_priv);
2285
2286         return 0;
2287 }
2288
2289 static int i915_forcewake_release(struct inode *inode, struct file *file)
2290 {
2291         struct drm_device *dev = inode->i_private;
2292         struct drm_i915_private *dev_priv = dev->dev_private;
2293
2294         if (INTEL_INFO(dev)->gen < 6)
2295                 return 0;
2296
2297         gen6_gt_force_wake_put(dev_priv);
2298
2299         return 0;
2300 }
2301
2302 static const struct file_operations i915_forcewake_fops = {
2303         .owner = THIS_MODULE,
2304         .open = i915_forcewake_open,
2305         .release = i915_forcewake_release,
2306 };
2307
2308 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
2309 {
2310         struct drm_device *dev = minor->dev;
2311         struct dentry *ent;
2312
2313         ent = debugfs_create_file("i915_forcewake_user",
2314                                   S_IRUSR,
2315                                   root, dev,
2316                                   &i915_forcewake_fops);
2317         if (IS_ERR(ent))
2318                 return PTR_ERR(ent);
2319
2320         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
2321 }
2322
2323 static int i915_debugfs_create(struct dentry *root,
2324                                struct drm_minor *minor,
2325                                const char *name,
2326                                const struct file_operations *fops)
2327 {
2328         struct drm_device *dev = minor->dev;
2329         struct dentry *ent;
2330
2331         ent = debugfs_create_file(name,
2332                                   S_IRUGO | S_IWUSR,
2333                                   root, dev,
2334                                   fops);
2335         if (IS_ERR(ent))
2336                 return PTR_ERR(ent);
2337
2338         return drm_add_fake_info_node(minor, ent, fops);
2339 }
2340
2341 static struct drm_info_list i915_debugfs_list[] = {
2342         {"i915_capabilities", i915_capabilities, 0},
2343         {"i915_gem_objects", i915_gem_object_info, 0},
2344         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2345         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2346         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2347         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2348         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2349         {"i915_gem_request", i915_gem_request_info, 0},
2350         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2351         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2352         {"i915_gem_interrupt", i915_interrupt_info, 0},
2353         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2354         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2355         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2356         {"i915_gem_hws_vebox", i915_hws_info, 0, (void *)VECS},
2357         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2358         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2359         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2360         {"i915_inttoext_table", i915_inttoext_table, 0},
2361         {"i915_drpc_info", i915_drpc_info, 0},
2362         {"i915_emon_status", i915_emon_status, 0},
2363         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2364         {"i915_gfxec", i915_gfxec, 0},
2365         {"i915_fbc_status", i915_fbc_status, 0},
2366         {"i915_ips_status", i915_ips_status, 0},
2367         {"i915_sr_status", i915_sr_status, 0},
2368         {"i915_opregion", i915_opregion, 0},
2369         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2370         {"i915_context_status", i915_context_status, 0},
2371         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2372         {"i915_swizzle_info", i915_swizzle_info, 0},
2373         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2374         {"i915_dpio", i915_dpio_info, 0},
2375 };
2376 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2377
2378 int i915_debugfs_init(struct drm_minor *minor)
2379 {
2380         int ret;
2381
2382         ret = i915_debugfs_create(minor->debugfs_root, minor,
2383                                   "i915_wedged",
2384                                   &i915_wedged_fops);
2385         if (ret)
2386                 return ret;
2387
2388         ret = i915_forcewake_create(minor->debugfs_root, minor);
2389         if (ret)
2390                 return ret;
2391
2392         ret = i915_debugfs_create(minor->debugfs_root, minor,
2393                                   "i915_max_freq",
2394                                   &i915_max_freq_fops);
2395         if (ret)
2396                 return ret;
2397
2398         ret = i915_debugfs_create(minor->debugfs_root, minor,
2399                                   "i915_min_freq",
2400                                   &i915_min_freq_fops);
2401         if (ret)
2402                 return ret;
2403
2404         ret = i915_debugfs_create(minor->debugfs_root, minor,
2405                                   "i915_cache_sharing",
2406                                   &i915_cache_sharing_fops);
2407         if (ret)
2408                 return ret;
2409
2410         ret = i915_debugfs_create(minor->debugfs_root, minor,
2411                                   "i915_ring_stop",
2412                                   &i915_ring_stop_fops);
2413         if (ret)
2414                 return ret;
2415
2416         ret = i915_debugfs_create(minor->debugfs_root, minor,
2417                                   "i915_gem_drop_caches",
2418                                   &i915_drop_caches_fops);
2419         if (ret)
2420                 return ret;
2421
2422         ret = i915_debugfs_create(minor->debugfs_root, minor,
2423                                   "i915_error_state",
2424                                   &i915_error_state_fops);
2425         if (ret)
2426                 return ret;
2427
2428         ret = i915_debugfs_create(minor->debugfs_root, minor,
2429                                  "i915_next_seqno",
2430                                  &i915_next_seqno_fops);
2431         if (ret)
2432                 return ret;
2433
2434         return drm_debugfs_create_files(i915_debugfs_list,
2435                                         I915_DEBUGFS_ENTRIES,
2436                                         minor->debugfs_root, minor);
2437 }
2438
2439 void i915_debugfs_cleanup(struct drm_minor *minor)
2440 {
2441         drm_debugfs_remove_files(i915_debugfs_list,
2442                                  I915_DEBUGFS_ENTRIES, minor);
2443         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2444                                  1, minor);
2445         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2446                                  1, minor);
2447         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2448                                  1, minor);
2449         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2450                                  1, minor);
2451         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2452                                  1, minor);
2453         drm_debugfs_remove_files((struct drm_info_list *) &i915_drop_caches_fops,
2454                                  1, minor);
2455         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2456                                  1, minor);
2457         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2458                                  1, minor);
2459         drm_debugfs_remove_files((struct drm_info_list *) &i915_next_seqno_fops,
2460                                  1, minor);
2461 }
2462
2463 #endif /* CONFIG_DEBUG_FS */