uapi/drm/i915: Document memory residency and Flat-CCS capability of obj
[linux-block.git] / drivers / gpu / drm / i915 / gem / i915_gem_execbuffer.c
1 /*
2  * SPDX-License-Identifier: MIT
3  *
4  * Copyright © 2008,2010 Intel Corporation
5  */
6
7 #include <linux/dma-resv.h>
8 #include <linux/highmem.h>
9 #include <linux/intel-iommu.h>
10 #include <linux/sync_file.h>
11 #include <linux/uaccess.h>
12
13 #include <drm/drm_syncobj.h>
14
15 #include "display/intel_frontbuffer.h"
16
17 #include "gem/i915_gem_ioctls.h"
18 #include "gt/intel_context.h"
19 #include "gt/intel_gpu_commands.h"
20 #include "gt/intel_gt.h"
21 #include "gt/intel_gt_buffer_pool.h"
22 #include "gt/intel_gt_pm.h"
23 #include "gt/intel_ring.h"
24
25 #include "pxp/intel_pxp.h"
26
27 #include "i915_cmd_parser.h"
28 #include "i915_drv.h"
29 #include "i915_file_private.h"
30 #include "i915_gem_clflush.h"
31 #include "i915_gem_context.h"
32 #include "i915_gem_evict.h"
33 #include "i915_gem_ioctls.h"
34 #include "i915_trace.h"
35 #include "i915_user_extensions.h"
36
37 struct eb_vma {
38         struct i915_vma *vma;
39         unsigned int flags;
40
41         /** This vma's place in the execbuf reservation list */
42         struct drm_i915_gem_exec_object2 *exec;
43         struct list_head bind_link;
44         struct list_head reloc_link;
45
46         struct hlist_node node;
47         u32 handle;
48 };
49
50 enum {
51         FORCE_CPU_RELOC = 1,
52         FORCE_GTT_RELOC,
53         FORCE_GPU_RELOC,
54 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
55 };
56
57 /* __EXEC_OBJECT_NO_RESERVE is BIT(31), defined in i915_vma.h */
58 #define __EXEC_OBJECT_HAS_PIN           BIT(30)
59 #define __EXEC_OBJECT_HAS_FENCE         BIT(29)
60 #define __EXEC_OBJECT_USERPTR_INIT      BIT(28)
61 #define __EXEC_OBJECT_NEEDS_MAP         BIT(27)
62 #define __EXEC_OBJECT_NEEDS_BIAS        BIT(26)
63 #define __EXEC_OBJECT_INTERNAL_FLAGS    (~0u << 26) /* all of the above + */
64 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
65
66 #define __EXEC_HAS_RELOC        BIT(31)
67 #define __EXEC_ENGINE_PINNED    BIT(30)
68 #define __EXEC_USERPTR_USED     BIT(29)
69 #define __EXEC_INTERNAL_FLAGS   (~0u << 29)
70 #define UPDATE                  PIN_OFFSET_FIXED
71
72 #define BATCH_OFFSET_BIAS (256*1024)
73
74 #define __I915_EXEC_ILLEGAL_FLAGS \
75         (__I915_EXEC_UNKNOWN_FLAGS | \
76          I915_EXEC_CONSTANTS_MASK  | \
77          I915_EXEC_RESOURCE_STREAMER)
78
79 /* Catch emission of unexpected errors for CI! */
80 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
81 #undef EINVAL
82 #define EINVAL ({ \
83         DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \
84         22; \
85 })
86 #endif
87
88 /**
89  * DOC: User command execution
90  *
91  * Userspace submits commands to be executed on the GPU as an instruction
92  * stream within a GEM object we call a batchbuffer. This instructions may
93  * refer to other GEM objects containing auxiliary state such as kernels,
94  * samplers, render targets and even secondary batchbuffers. Userspace does
95  * not know where in the GPU memory these objects reside and so before the
96  * batchbuffer is passed to the GPU for execution, those addresses in the
97  * batchbuffer and auxiliary objects are updated. This is known as relocation,
98  * or patching. To try and avoid having to relocate each object on the next
99  * execution, userspace is told the location of those objects in this pass,
100  * but this remains just a hint as the kernel may choose a new location for
101  * any object in the future.
102  *
103  * At the level of talking to the hardware, submitting a batchbuffer for the
104  * GPU to execute is to add content to a buffer from which the HW
105  * command streamer is reading.
106  *
107  * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e.
108  *    Execlists, this command is not placed on the same buffer as the
109  *    remaining items.
110  *
111  * 2. Add a command to invalidate caches to the buffer.
112  *
113  * 3. Add a batchbuffer start command to the buffer; the start command is
114  *    essentially a token together with the GPU address of the batchbuffer
115  *    to be executed.
116  *
117  * 4. Add a pipeline flush to the buffer.
118  *
119  * 5. Add a memory write command to the buffer to record when the GPU
120  *    is done executing the batchbuffer. The memory write writes the
121  *    global sequence number of the request, ``i915_request::global_seqno``;
122  *    the i915 driver uses the current value in the register to determine
123  *    if the GPU has completed the batchbuffer.
124  *
125  * 6. Add a user interrupt command to the buffer. This command instructs
126  *    the GPU to issue an interrupt when the command, pipeline flush and
127  *    memory write are completed.
128  *
129  * 7. Inform the hardware of the additional commands added to the buffer
130  *    (by updating the tail pointer).
131  *
132  * Processing an execbuf ioctl is conceptually split up into a few phases.
133  *
134  * 1. Validation - Ensure all the pointers, handles and flags are valid.
135  * 2. Reservation - Assign GPU address space for every object
136  * 3. Relocation - Update any addresses to point to the final locations
137  * 4. Serialisation - Order the request with respect to its dependencies
138  * 5. Construction - Construct a request to execute the batchbuffer
139  * 6. Submission (at some point in the future execution)
140  *
141  * Reserving resources for the execbuf is the most complicated phase. We
142  * neither want to have to migrate the object in the address space, nor do
143  * we want to have to update any relocations pointing to this object. Ideally,
144  * we want to leave the object where it is and for all the existing relocations
145  * to match. If the object is given a new address, or if userspace thinks the
146  * object is elsewhere, we have to parse all the relocation entries and update
147  * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that
148  * all the target addresses in all of its objects match the value in the
149  * relocation entries and that they all match the presumed offsets given by the
150  * list of execbuffer objects. Using this knowledge, we know that if we haven't
151  * moved any buffers, all the relocation entries are valid and we can skip
152  * the update. (If userspace is wrong, the likely outcome is an impromptu GPU
153  * hang.) The requirement for using I915_EXEC_NO_RELOC are:
154  *
155  *      The addresses written in the objects must match the corresponding
156  *      reloc.presumed_offset which in turn must match the corresponding
157  *      execobject.offset.
158  *
159  *      Any render targets written to in the batch must be flagged with
160  *      EXEC_OBJECT_WRITE.
161  *
162  *      To avoid stalling, execobject.offset should match the current
163  *      address of that object within the active context.
164  *
165  * The reservation is done is multiple phases. First we try and keep any
166  * object already bound in its current location - so as long as meets the
167  * constraints imposed by the new execbuffer. Any object left unbound after the
168  * first pass is then fitted into any available idle space. If an object does
169  * not fit, all objects are removed from the reservation and the process rerun
170  * after sorting the objects into a priority order (more difficult to fit
171  * objects are tried first). Failing that, the entire VM is cleared and we try
172  * to fit the execbuf once last time before concluding that it simply will not
173  * fit.
174  *
175  * A small complication to all of this is that we allow userspace not only to
176  * specify an alignment and a size for the object in the address space, but
177  * we also allow userspace to specify the exact offset. This objects are
178  * simpler to place (the location is known a priori) all we have to do is make
179  * sure the space is available.
180  *
181  * Once all the objects are in place, patching up the buried pointers to point
182  * to the final locations is a fairly simple job of walking over the relocation
183  * entry arrays, looking up the right address and rewriting the value into
184  * the object. Simple! ... The relocation entries are stored in user memory
185  * and so to access them we have to copy them into a local buffer. That copy
186  * has to avoid taking any pagefaults as they may lead back to a GEM object
187  * requiring the struct_mutex (i.e. recursive deadlock). So once again we split
188  * the relocation into multiple passes. First we try to do everything within an
189  * atomic context (avoid the pagefaults) which requires that we never wait. If
190  * we detect that we may wait, or if we need to fault, then we have to fallback
191  * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm
192  * bells yet?) Dropping the mutex means that we lose all the state we have
193  * built up so far for the execbuf and we must reset any global data. However,
194  * we do leave the objects pinned in their final locations - which is a
195  * potential issue for concurrent execbufs. Once we have left the mutex, we can
196  * allocate and copy all the relocation entries into a large array at our
197  * leisure, reacquire the mutex, reclaim all the objects and other state and
198  * then proceed to update any incorrect addresses with the objects.
199  *
200  * As we process the relocation entries, we maintain a record of whether the
201  * object is being written to. Using NORELOC, we expect userspace to provide
202  * this information instead. We also check whether we can skip the relocation
203  * by comparing the expected value inside the relocation entry with the target's
204  * final address. If they differ, we have to map the current object and rewrite
205  * the 4 or 8 byte pointer within.
206  *
207  * Serialising an execbuf is quite simple according to the rules of the GEM
208  * ABI. Execution within each context is ordered by the order of submission.
209  * Writes to any GEM object are in order of submission and are exclusive. Reads
210  * from a GEM object are unordered with respect to other reads, but ordered by
211  * writes. A write submitted after a read cannot occur before the read, and
212  * similarly any read submitted after a write cannot occur before the write.
213  * Writes are ordered between engines such that only one write occurs at any
214  * time (completing any reads beforehand) - using semaphores where available
215  * and CPU serialisation otherwise. Other GEM access obey the same rules, any
216  * write (either via mmaps using set-domain, or via pwrite) must flush all GPU
217  * reads before starting, and any read (either using set-domain or pread) must
218  * flush all GPU writes before starting. (Note we only employ a barrier before,
219  * we currently rely on userspace not concurrently starting a new execution
220  * whilst reading or writing to an object. This may be an advantage or not
221  * depending on how much you trust userspace not to shoot themselves in the
222  * foot.) Serialisation may just result in the request being inserted into
223  * a DAG awaiting its turn, but most simple is to wait on the CPU until
224  * all dependencies are resolved.
225  *
226  * After all of that, is just a matter of closing the request and handing it to
227  * the hardware (well, leaving it in a queue to be executed). However, we also
228  * offer the ability for batchbuffers to be run with elevated privileges so
229  * that they access otherwise hidden registers. (Used to adjust L3 cache etc.)
230  * Before any batch is given extra privileges we first must check that it
231  * contains no nefarious instructions, we check that each instruction is from
232  * our whitelist and all registers are also from an allowed list. We first
233  * copy the user's batchbuffer to a shadow (so that the user doesn't have
234  * access to it, either by the CPU or GPU as we scan it) and then parse each
235  * instruction. If everything is ok, we set a flag telling the hardware to run
236  * the batchbuffer in trusted mode, otherwise the ioctl is rejected.
237  */
238
239 struct eb_fence {
240         struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */
241         struct dma_fence *dma_fence;
242         u64 value;
243         struct dma_fence_chain *chain_fence;
244 };
245
246 struct i915_execbuffer {
247         struct drm_i915_private *i915; /** i915 backpointer */
248         struct drm_file *file; /** per-file lookup tables and limits */
249         struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */
250         struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */
251         struct eb_vma *vma;
252
253         struct intel_gt *gt; /* gt for the execbuf */
254         struct intel_context *context; /* logical state for the request */
255         struct i915_gem_context *gem_context; /** caller's context */
256
257         /** our requests to build */
258         struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
259         /** identity of the batch obj/vma */
260         struct eb_vma *batches[MAX_ENGINE_INSTANCE + 1];
261         struct i915_vma *trampoline; /** trampoline used for chaining */
262
263         /** used for excl fence in dma_resv objects when > 1 BB submitted */
264         struct dma_fence *composite_fence;
265
266         /** actual size of execobj[] as we may extend it for the cmdparser */
267         unsigned int buffer_count;
268
269         /* number of batches in execbuf IOCTL */
270         unsigned int num_batches;
271
272         /** list of vma not yet bound during reservation phase */
273         struct list_head unbound;
274
275         /** list of vma that have execobj.relocation_count */
276         struct list_head relocs;
277
278         struct i915_gem_ww_ctx ww;
279
280         /**
281          * Track the most recently used object for relocations, as we
282          * frequently have to perform multiple relocations within the same
283          * obj/page
284          */
285         struct reloc_cache {
286                 struct drm_mm_node node; /** temporary GTT binding */
287                 unsigned long vaddr; /** Current kmap address */
288                 unsigned long page; /** Currently mapped page index */
289                 unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */
290                 bool use_64bit_reloc : 1;
291                 bool has_llc : 1;
292                 bool has_fence : 1;
293                 bool needs_unfenced : 1;
294         } reloc_cache;
295
296         u64 invalid_flags; /** Set of execobj.flags that are invalid */
297
298         /** Length of batch within object */
299         u64 batch_len[MAX_ENGINE_INSTANCE + 1];
300         u32 batch_start_offset; /** Location within object of batch */
301         u32 batch_flags; /** Flags composed for emit_bb_start() */
302         struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */
303
304         /**
305          * Indicate either the size of the hastable used to resolve
306          * relocation handles, or if negative that we are using a direct
307          * index into the execobj[].
308          */
309         int lut_size;
310         struct hlist_head *buckets; /** ht for relocation handles */
311
312         struct eb_fence *fences;
313         unsigned long num_fences;
314 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
315         struct i915_capture_list *capture_lists[MAX_ENGINE_INSTANCE + 1];
316 #endif
317 };
318
319 static int eb_parse(struct i915_execbuffer *eb);
320 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle);
321 static void eb_unpin_engine(struct i915_execbuffer *eb);
322 static void eb_capture_release(struct i915_execbuffer *eb);
323
324 static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
325 {
326         return intel_engine_requires_cmd_parser(eb->context->engine) ||
327                 (intel_engine_using_cmd_parser(eb->context->engine) &&
328                  eb->args->batch_len);
329 }
330
331 static int eb_create(struct i915_execbuffer *eb)
332 {
333         if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) {
334                 unsigned int size = 1 + ilog2(eb->buffer_count);
335
336                 /*
337                  * Without a 1:1 association between relocation handles and
338                  * the execobject[] index, we instead create a hashtable.
339                  * We size it dynamically based on available memory, starting
340                  * first with 1:1 assocative hash and scaling back until
341                  * the allocation succeeds.
342                  *
343                  * Later on we use a positive lut_size to indicate we are
344                  * using this hashtable, and a negative value to indicate a
345                  * direct lookup.
346                  */
347                 do {
348                         gfp_t flags;
349
350                         /* While we can still reduce the allocation size, don't
351                          * raise a warning and allow the allocation to fail.
352                          * On the last pass though, we want to try as hard
353                          * as possible to perform the allocation and warn
354                          * if it fails.
355                          */
356                         flags = GFP_KERNEL;
357                         if (size > 1)
358                                 flags |= __GFP_NORETRY | __GFP_NOWARN;
359
360                         eb->buckets = kzalloc(sizeof(struct hlist_head) << size,
361                                               flags);
362                         if (eb->buckets)
363                                 break;
364                 } while (--size);
365
366                 if (unlikely(!size))
367                         return -ENOMEM;
368
369                 eb->lut_size = size;
370         } else {
371                 eb->lut_size = -eb->buffer_count;
372         }
373
374         return 0;
375 }
376
377 static bool
378 eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
379                  const struct i915_vma *vma,
380                  unsigned int flags)
381 {
382         if (vma->node.size < entry->pad_to_size)
383                 return true;
384
385         if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment))
386                 return true;
387
388         if (flags & EXEC_OBJECT_PINNED &&
389             vma->node.start != entry->offset)
390                 return true;
391
392         if (flags & __EXEC_OBJECT_NEEDS_BIAS &&
393             vma->node.start < BATCH_OFFSET_BIAS)
394                 return true;
395
396         if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
397             (vma->node.start + vma->node.size + 4095) >> 32)
398                 return true;
399
400         if (flags & __EXEC_OBJECT_NEEDS_MAP &&
401             !i915_vma_is_map_and_fenceable(vma))
402                 return true;
403
404         return false;
405 }
406
407 static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry,
408                         unsigned int exec_flags)
409 {
410         u64 pin_flags = 0;
411
412         if (exec_flags & EXEC_OBJECT_NEEDS_GTT)
413                 pin_flags |= PIN_GLOBAL;
414
415         /*
416          * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset,
417          * limit address to the first 4GBs for unflagged objects.
418          */
419         if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
420                 pin_flags |= PIN_ZONE_4G;
421
422         if (exec_flags & __EXEC_OBJECT_NEEDS_MAP)
423                 pin_flags |= PIN_MAPPABLE;
424
425         if (exec_flags & EXEC_OBJECT_PINNED)
426                 pin_flags |= entry->offset | PIN_OFFSET_FIXED;
427         else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS)
428                 pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
429
430         return pin_flags;
431 }
432
433 static inline int
434 eb_pin_vma(struct i915_execbuffer *eb,
435            const struct drm_i915_gem_exec_object2 *entry,
436            struct eb_vma *ev)
437 {
438         struct i915_vma *vma = ev->vma;
439         u64 pin_flags;
440         int err;
441
442         if (vma->node.size)
443                 pin_flags = vma->node.start;
444         else
445                 pin_flags = entry->offset & PIN_OFFSET_MASK;
446
447         pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED | PIN_VALIDATE;
448         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT))
449                 pin_flags |= PIN_GLOBAL;
450
451         /* Attempt to reuse the current location if available */
452         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
453         if (err == -EDEADLK)
454                 return err;
455
456         if (unlikely(err)) {
457                 if (entry->flags & EXEC_OBJECT_PINNED)
458                         return err;
459
460                 /* Failing that pick any _free_ space if suitable */
461                 err = i915_vma_pin_ww(vma, &eb->ww,
462                                              entry->pad_to_size,
463                                              entry->alignment,
464                                              eb_pin_flags(entry, ev->flags) |
465                                              PIN_USER | PIN_NOEVICT | PIN_VALIDATE);
466                 if (unlikely(err))
467                         return err;
468         }
469
470         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
471                 err = i915_vma_pin_fence(vma);
472                 if (unlikely(err))
473                         return err;
474
475                 if (vma->fence)
476                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
477         }
478
479         ev->flags |= __EXEC_OBJECT_HAS_PIN;
480         if (eb_vma_misplaced(entry, vma, ev->flags))
481                 return -EBADSLT;
482
483         return 0;
484 }
485
486 static inline void
487 eb_unreserve_vma(struct eb_vma *ev)
488 {
489         if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE))
490                 __i915_vma_unpin_fence(ev->vma);
491
492         ev->flags &= ~__EXEC_OBJECT_RESERVED;
493 }
494
495 static int
496 eb_validate_vma(struct i915_execbuffer *eb,
497                 struct drm_i915_gem_exec_object2 *entry,
498                 struct i915_vma *vma)
499 {
500         /* Relocations are disallowed for all platforms after TGL-LP.  This
501          * also covers all platforms with local memory.
502          */
503         if (entry->relocation_count &&
504             GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
505                 return -EINVAL;
506
507         if (unlikely(entry->flags & eb->invalid_flags))
508                 return -EINVAL;
509
510         if (unlikely(entry->alignment &&
511                      !is_power_of_2_u64(entry->alignment)))
512                 return -EINVAL;
513
514         /*
515          * Offset can be used as input (EXEC_OBJECT_PINNED), reject
516          * any non-page-aligned or non-canonical addresses.
517          */
518         if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
519                      entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
520                 return -EINVAL;
521
522         /* pad_to_size was once a reserved field, so sanitize it */
523         if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) {
524                 if (unlikely(offset_in_page(entry->pad_to_size)))
525                         return -EINVAL;
526         } else {
527                 entry->pad_to_size = 0;
528         }
529         /*
530          * From drm_mm perspective address space is continuous,
531          * so from this point we're always using non-canonical
532          * form internally.
533          */
534         entry->offset = gen8_noncanonical_addr(entry->offset);
535
536         if (!eb->reloc_cache.has_fence) {
537                 entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE;
538         } else {
539                 if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE ||
540                      eb->reloc_cache.needs_unfenced) &&
541                     i915_gem_object_is_tiled(vma->obj))
542                         entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP;
543         }
544
545         return 0;
546 }
547
548 static inline bool
549 is_batch_buffer(struct i915_execbuffer *eb, unsigned int buffer_idx)
550 {
551         return eb->args->flags & I915_EXEC_BATCH_FIRST ?
552                 buffer_idx < eb->num_batches :
553                 buffer_idx >= eb->args->buffer_count - eb->num_batches;
554 }
555
556 static int
557 eb_add_vma(struct i915_execbuffer *eb,
558            unsigned int *current_batch,
559            unsigned int i,
560            struct i915_vma *vma)
561 {
562         struct drm_i915_private *i915 = eb->i915;
563         struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
564         struct eb_vma *ev = &eb->vma[i];
565
566         ev->vma = vma;
567         ev->exec = entry;
568         ev->flags = entry->flags;
569
570         if (eb->lut_size > 0) {
571                 ev->handle = entry->handle;
572                 hlist_add_head(&ev->node,
573                                &eb->buckets[hash_32(entry->handle,
574                                                     eb->lut_size)]);
575         }
576
577         if (entry->relocation_count)
578                 list_add_tail(&ev->reloc_link, &eb->relocs);
579
580         /*
581          * SNA is doing fancy tricks with compressing batch buffers, which leads
582          * to negative relocation deltas. Usually that works out ok since the
583          * relocate address is still positive, except when the batch is placed
584          * very low in the GTT. Ensure this doesn't happen.
585          *
586          * Note that actual hangs have only been observed on gen7, but for
587          * paranoia do it everywhere.
588          */
589         if (is_batch_buffer(eb, i)) {
590                 if (entry->relocation_count &&
591                     !(ev->flags & EXEC_OBJECT_PINNED))
592                         ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
593                 if (eb->reloc_cache.has_fence)
594                         ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
595
596                 eb->batches[*current_batch] = ev;
597
598                 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
599                         drm_dbg(&i915->drm,
600                                 "Attempting to use self-modifying batch buffer\n");
601                         return -EINVAL;
602                 }
603
604                 if (range_overflows_t(u64,
605                                       eb->batch_start_offset,
606                                       eb->args->batch_len,
607                                       ev->vma->size)) {
608                         drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
609                         return -EINVAL;
610                 }
611
612                 if (eb->args->batch_len == 0)
613                         eb->batch_len[*current_batch] = ev->vma->size -
614                                 eb->batch_start_offset;
615                 else
616                         eb->batch_len[*current_batch] = eb->args->batch_len;
617                 if (unlikely(eb->batch_len[*current_batch] == 0)) { /* impossible! */
618                         drm_dbg(&i915->drm, "Invalid batch length\n");
619                         return -EINVAL;
620                 }
621
622                 ++*current_batch;
623         }
624
625         return 0;
626 }
627
628 static inline int use_cpu_reloc(const struct reloc_cache *cache,
629                                 const struct drm_i915_gem_object *obj)
630 {
631         if (!i915_gem_object_has_struct_page(obj))
632                 return false;
633
634         if (DBG_FORCE_RELOC == FORCE_CPU_RELOC)
635                 return true;
636
637         if (DBG_FORCE_RELOC == FORCE_GTT_RELOC)
638                 return false;
639
640         return (cache->has_llc ||
641                 obj->cache_dirty ||
642                 obj->cache_level != I915_CACHE_NONE);
643 }
644
645 static int eb_reserve_vma(struct i915_execbuffer *eb,
646                           struct eb_vma *ev,
647                           u64 pin_flags)
648 {
649         struct drm_i915_gem_exec_object2 *entry = ev->exec;
650         struct i915_vma *vma = ev->vma;
651         int err;
652
653         if (drm_mm_node_allocated(&vma->node) &&
654             eb_vma_misplaced(entry, vma, ev->flags)) {
655                 err = i915_vma_unbind(vma);
656                 if (err)
657                         return err;
658         }
659
660         err = i915_vma_pin_ww(vma, &eb->ww,
661                            entry->pad_to_size, entry->alignment,
662                            eb_pin_flags(entry, ev->flags) | pin_flags);
663         if (err)
664                 return err;
665
666         if (entry->offset != vma->node.start) {
667                 entry->offset = vma->node.start | UPDATE;
668                 eb->args->flags |= __EXEC_HAS_RELOC;
669         }
670
671         if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
672                 err = i915_vma_pin_fence(vma);
673                 if (unlikely(err))
674                         return err;
675
676                 if (vma->fence)
677                         ev->flags |= __EXEC_OBJECT_HAS_FENCE;
678         }
679
680         ev->flags |= __EXEC_OBJECT_HAS_PIN;
681         GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags));
682
683         return 0;
684 }
685
686 static bool eb_unbind(struct i915_execbuffer *eb, bool force)
687 {
688         const unsigned int count = eb->buffer_count;
689         unsigned int i;
690         struct list_head last;
691         bool unpinned = false;
692
693         /* Resort *all* the objects into priority order */
694         INIT_LIST_HEAD(&eb->unbound);
695         INIT_LIST_HEAD(&last);
696
697         for (i = 0; i < count; i++) {
698                 struct eb_vma *ev = &eb->vma[i];
699                 unsigned int flags = ev->flags;
700
701                 if (!force && flags & EXEC_OBJECT_PINNED &&
702                     flags & __EXEC_OBJECT_HAS_PIN)
703                         continue;
704
705                 unpinned = true;
706                 eb_unreserve_vma(ev);
707
708                 if (flags & EXEC_OBJECT_PINNED)
709                         /* Pinned must have their slot */
710                         list_add(&ev->bind_link, &eb->unbound);
711                 else if (flags & __EXEC_OBJECT_NEEDS_MAP)
712                         /* Map require the lowest 256MiB (aperture) */
713                         list_add_tail(&ev->bind_link, &eb->unbound);
714                 else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
715                         /* Prioritise 4GiB region for restricted bo */
716                         list_add(&ev->bind_link, &last);
717                 else
718                         list_add_tail(&ev->bind_link, &last);
719         }
720
721         list_splice_tail(&last, &eb->unbound);
722         return unpinned;
723 }
724
725 static int eb_reserve(struct i915_execbuffer *eb)
726 {
727         struct eb_vma *ev;
728         unsigned int pass;
729         int err = 0;
730         bool unpinned;
731
732         /*
733          * Attempt to pin all of the buffers into the GTT.
734          * This is done in 2 phases:
735          *
736          * 1. Unbind all objects that do not match the GTT constraints for
737          *    the execbuffer (fenceable, mappable, alignment etc).
738          * 2. Bind new objects.
739          *
740          * This avoid unnecessary unbinding of later objects in order to make
741          * room for the earlier objects *unless* we need to defragment.
742          *
743          * Defragmenting is skipped if all objects are pinned at a fixed location.
744          */
745         for (pass = 0; pass <= 2; pass++) {
746                 int pin_flags = PIN_USER | PIN_VALIDATE;
747
748                 if (pass == 0)
749                         pin_flags |= PIN_NONBLOCK;
750
751                 if (pass >= 1)
752                         unpinned = eb_unbind(eb, pass == 2);
753
754                 if (pass == 2) {
755                         err = mutex_lock_interruptible(&eb->context->vm->mutex);
756                         if (!err) {
757                                 err = i915_gem_evict_vm(eb->context->vm, &eb->ww);
758                                 mutex_unlock(&eb->context->vm->mutex);
759                         }
760                         if (err)
761                                 return err;
762                 }
763
764                 list_for_each_entry(ev, &eb->unbound, bind_link) {
765                         err = eb_reserve_vma(eb, ev, pin_flags);
766                         if (err)
767                                 break;
768                 }
769
770                 if (err != -ENOSPC)
771                         break;
772         }
773
774         return err;
775 }
776
777 static int eb_select_context(struct i915_execbuffer *eb)
778 {
779         struct i915_gem_context *ctx;
780
781         ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1);
782         if (unlikely(IS_ERR(ctx)))
783                 return PTR_ERR(ctx);
784
785         eb->gem_context = ctx;
786         if (i915_gem_context_has_full_ppgtt(ctx))
787                 eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT;
788
789         return 0;
790 }
791
792 static int __eb_add_lut(struct i915_execbuffer *eb,
793                         u32 handle, struct i915_vma *vma)
794 {
795         struct i915_gem_context *ctx = eb->gem_context;
796         struct i915_lut_handle *lut;
797         int err;
798
799         lut = i915_lut_handle_alloc();
800         if (unlikely(!lut))
801                 return -ENOMEM;
802
803         i915_vma_get(vma);
804         if (!atomic_fetch_inc(&vma->open_count))
805                 i915_vma_reopen(vma);
806         lut->handle = handle;
807         lut->ctx = ctx;
808
809         /* Check that the context hasn't been closed in the meantime */
810         err = -EINTR;
811         if (!mutex_lock_interruptible(&ctx->lut_mutex)) {
812                 if (likely(!i915_gem_context_is_closed(ctx)))
813                         err = radix_tree_insert(&ctx->handles_vma, handle, vma);
814                 else
815                         err = -ENOENT;
816                 if (err == 0) { /* And nor has this handle */
817                         struct drm_i915_gem_object *obj = vma->obj;
818
819                         spin_lock(&obj->lut_lock);
820                         if (idr_find(&eb->file->object_idr, handle) == obj) {
821                                 list_add(&lut->obj_link, &obj->lut_list);
822                         } else {
823                                 radix_tree_delete(&ctx->handles_vma, handle);
824                                 err = -ENOENT;
825                         }
826                         spin_unlock(&obj->lut_lock);
827                 }
828                 mutex_unlock(&ctx->lut_mutex);
829         }
830         if (unlikely(err))
831                 goto err;
832
833         return 0;
834
835 err:
836         i915_vma_close(vma);
837         i915_vma_put(vma);
838         i915_lut_handle_free(lut);
839         return err;
840 }
841
842 static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
843 {
844         struct i915_address_space *vm = eb->context->vm;
845
846         do {
847                 struct drm_i915_gem_object *obj;
848                 struct i915_vma *vma;
849                 int err;
850
851                 rcu_read_lock();
852                 vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle);
853                 if (likely(vma && vma->vm == vm))
854                         vma = i915_vma_tryget(vma);
855                 rcu_read_unlock();
856                 if (likely(vma))
857                         return vma;
858
859                 obj = i915_gem_object_lookup(eb->file, handle);
860                 if (unlikely(!obj))
861                         return ERR_PTR(-ENOENT);
862
863                 /*
864                  * If the user has opted-in for protected-object tracking, make
865                  * sure the object encryption can be used.
866                  * We only need to do this when the object is first used with
867                  * this context, because the context itself will be banned when
868                  * the protected objects become invalid.
869                  */
870                 if (i915_gem_context_uses_protected_content(eb->gem_context) &&
871                     i915_gem_object_is_protected(obj)) {
872                         err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
873                         if (err) {
874                                 i915_gem_object_put(obj);
875                                 return ERR_PTR(err);
876                         }
877                 }
878
879                 vma = i915_vma_instance(obj, vm, NULL);
880                 if (IS_ERR(vma)) {
881                         i915_gem_object_put(obj);
882                         return vma;
883                 }
884
885                 err = __eb_add_lut(eb, handle, vma);
886                 if (likely(!err))
887                         return vma;
888
889                 i915_gem_object_put(obj);
890                 if (err != -EEXIST)
891                         return ERR_PTR(err);
892         } while (1);
893 }
894
895 static int eb_lookup_vmas(struct i915_execbuffer *eb)
896 {
897         unsigned int i, current_batch = 0;
898         int err = 0;
899
900         INIT_LIST_HEAD(&eb->relocs);
901
902         for (i = 0; i < eb->buffer_count; i++) {
903                 struct i915_vma *vma;
904
905                 vma = eb_lookup_vma(eb, eb->exec[i].handle);
906                 if (IS_ERR(vma)) {
907                         err = PTR_ERR(vma);
908                         goto err;
909                 }
910
911                 err = eb_validate_vma(eb, &eb->exec[i], vma);
912                 if (unlikely(err)) {
913                         i915_vma_put(vma);
914                         goto err;
915                 }
916
917                 err = eb_add_vma(eb, &current_batch, i, vma);
918                 if (err)
919                         return err;
920
921                 if (i915_gem_object_is_userptr(vma->obj)) {
922                         err = i915_gem_object_userptr_submit_init(vma->obj);
923                         if (err) {
924                                 if (i + 1 < eb->buffer_count) {
925                                         /*
926                                          * Execbuffer code expects last vma entry to be NULL,
927                                          * since we already initialized this entry,
928                                          * set the next value to NULL or we mess up
929                                          * cleanup handling.
930                                          */
931                                         eb->vma[i + 1].vma = NULL;
932                                 }
933
934                                 return err;
935                         }
936
937                         eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT;
938                         eb->args->flags |= __EXEC_USERPTR_USED;
939                 }
940         }
941
942         return 0;
943
944 err:
945         eb->vma[i].vma = NULL;
946         return err;
947 }
948
949 static int eb_lock_vmas(struct i915_execbuffer *eb)
950 {
951         unsigned int i;
952         int err;
953
954         for (i = 0; i < eb->buffer_count; i++) {
955                 struct eb_vma *ev = &eb->vma[i];
956                 struct i915_vma *vma = ev->vma;
957
958                 err = i915_gem_object_lock(vma->obj, &eb->ww);
959                 if (err)
960                         return err;
961         }
962
963         return 0;
964 }
965
966 static int eb_validate_vmas(struct i915_execbuffer *eb)
967 {
968         unsigned int i;
969         int err;
970
971         INIT_LIST_HEAD(&eb->unbound);
972
973         err = eb_lock_vmas(eb);
974         if (err)
975                 return err;
976
977         for (i = 0; i < eb->buffer_count; i++) {
978                 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
979                 struct eb_vma *ev = &eb->vma[i];
980                 struct i915_vma *vma = ev->vma;
981
982                 err = eb_pin_vma(eb, entry, ev);
983                 if (err == -EDEADLK)
984                         return err;
985
986                 if (!err) {
987                         if (entry->offset != vma->node.start) {
988                                 entry->offset = vma->node.start | UPDATE;
989                                 eb->args->flags |= __EXEC_HAS_RELOC;
990                         }
991                 } else {
992                         eb_unreserve_vma(ev);
993
994                         list_add_tail(&ev->bind_link, &eb->unbound);
995                         if (drm_mm_node_allocated(&vma->node)) {
996                                 err = i915_vma_unbind(vma);
997                                 if (err)
998                                         return err;
999                         }
1000                 }
1001
1002                 err = dma_resv_reserve_fences(vma->obj->base.resv, 1);
1003                 if (err)
1004                         return err;
1005
1006                 GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
1007                            eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
1008         }
1009
1010         if (!list_empty(&eb->unbound))
1011                 return eb_reserve(eb);
1012
1013         return 0;
1014 }
1015
1016 static struct eb_vma *
1017 eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle)
1018 {
1019         if (eb->lut_size < 0) {
1020                 if (handle >= -eb->lut_size)
1021                         return NULL;
1022                 return &eb->vma[handle];
1023         } else {
1024                 struct hlist_head *head;
1025                 struct eb_vma *ev;
1026
1027                 head = &eb->buckets[hash_32(handle, eb->lut_size)];
1028                 hlist_for_each_entry(ev, head, node) {
1029                         if (ev->handle == handle)
1030                                 return ev;
1031                 }
1032                 return NULL;
1033         }
1034 }
1035
1036 static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
1037 {
1038         const unsigned int count = eb->buffer_count;
1039         unsigned int i;
1040
1041         for (i = 0; i < count; i++) {
1042                 struct eb_vma *ev = &eb->vma[i];
1043                 struct i915_vma *vma = ev->vma;
1044
1045                 if (!vma)
1046                         break;
1047
1048                 eb_unreserve_vma(ev);
1049
1050                 if (final)
1051                         i915_vma_put(vma);
1052         }
1053
1054         eb_capture_release(eb);
1055         eb_unpin_engine(eb);
1056 }
1057
1058 static void eb_destroy(const struct i915_execbuffer *eb)
1059 {
1060         if (eb->lut_size > 0)
1061                 kfree(eb->buckets);
1062 }
1063
1064 static inline u64
1065 relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
1066                   const struct i915_vma *target)
1067 {
1068         return gen8_canonical_addr((int)reloc->delta + target->node.start);
1069 }
1070
1071 static void reloc_cache_init(struct reloc_cache *cache,
1072                              struct drm_i915_private *i915)
1073 {
1074         cache->page = -1;
1075         cache->vaddr = 0;
1076         /* Must be a variable in the struct to allow GCC to unroll. */
1077         cache->graphics_ver = GRAPHICS_VER(i915);
1078         cache->has_llc = HAS_LLC(i915);
1079         cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
1080         cache->has_fence = cache->graphics_ver < 4;
1081         cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
1082         cache->node.flags = 0;
1083 }
1084
1085 static inline void *unmask_page(unsigned long p)
1086 {
1087         return (void *)(uintptr_t)(p & PAGE_MASK);
1088 }
1089
1090 static inline unsigned int unmask_flags(unsigned long p)
1091 {
1092         return p & ~PAGE_MASK;
1093 }
1094
1095 #define KMAP 0x4 /* after CLFLUSH_FLAGS */
1096
1097 static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
1098 {
1099         struct drm_i915_private *i915 =
1100                 container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
1101         return to_gt(i915)->ggtt;
1102 }
1103
1104 static void reloc_cache_unmap(struct reloc_cache *cache)
1105 {
1106         void *vaddr;
1107
1108         if (!cache->vaddr)
1109                 return;
1110
1111         vaddr = unmask_page(cache->vaddr);
1112         if (cache->vaddr & KMAP)
1113                 kunmap_atomic(vaddr);
1114         else
1115                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1116 }
1117
1118 static void reloc_cache_remap(struct reloc_cache *cache,
1119                               struct drm_i915_gem_object *obj)
1120 {
1121         void *vaddr;
1122
1123         if (!cache->vaddr)
1124                 return;
1125
1126         if (cache->vaddr & KMAP) {
1127                 struct page *page = i915_gem_object_get_page(obj, cache->page);
1128
1129                 vaddr = kmap_atomic(page);
1130                 cache->vaddr = unmask_flags(cache->vaddr) |
1131                         (unsigned long)vaddr;
1132         } else {
1133                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1134                 unsigned long offset;
1135
1136                 offset = cache->node.start;
1137                 if (!drm_mm_node_allocated(&cache->node))
1138                         offset += cache->page << PAGE_SHIFT;
1139
1140                 cache->vaddr = (unsigned long)
1141                         io_mapping_map_atomic_wc(&ggtt->iomap, offset);
1142         }
1143 }
1144
1145 static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb)
1146 {
1147         void *vaddr;
1148
1149         if (!cache->vaddr)
1150                 return;
1151
1152         vaddr = unmask_page(cache->vaddr);
1153         if (cache->vaddr & KMAP) {
1154                 struct drm_i915_gem_object *obj =
1155                         (struct drm_i915_gem_object *)cache->node.mm;
1156                 if (cache->vaddr & CLFLUSH_AFTER)
1157                         mb();
1158
1159                 kunmap_atomic(vaddr);
1160                 i915_gem_object_finish_access(obj);
1161         } else {
1162                 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1163
1164                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1165                 io_mapping_unmap_atomic((void __iomem *)vaddr);
1166
1167                 if (drm_mm_node_allocated(&cache->node)) {
1168                         ggtt->vm.clear_range(&ggtt->vm,
1169                                              cache->node.start,
1170                                              cache->node.size);
1171                         mutex_lock(&ggtt->vm.mutex);
1172                         drm_mm_remove_node(&cache->node);
1173                         mutex_unlock(&ggtt->vm.mutex);
1174                 } else {
1175                         i915_vma_unpin((struct i915_vma *)cache->node.mm);
1176                 }
1177         }
1178
1179         cache->vaddr = 0;
1180         cache->page = -1;
1181 }
1182
1183 static void *reloc_kmap(struct drm_i915_gem_object *obj,
1184                         struct reloc_cache *cache,
1185                         unsigned long pageno)
1186 {
1187         void *vaddr;
1188         struct page *page;
1189
1190         if (cache->vaddr) {
1191                 kunmap_atomic(unmask_page(cache->vaddr));
1192         } else {
1193                 unsigned int flushes;
1194                 int err;
1195
1196                 err = i915_gem_object_prepare_write(obj, &flushes);
1197                 if (err)
1198                         return ERR_PTR(err);
1199
1200                 BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS);
1201                 BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK);
1202
1203                 cache->vaddr = flushes | KMAP;
1204                 cache->node.mm = (void *)obj;
1205                 if (flushes)
1206                         mb();
1207         }
1208
1209         page = i915_gem_object_get_page(obj, pageno);
1210         if (!obj->mm.dirty)
1211                 set_page_dirty(page);
1212
1213         vaddr = kmap_atomic(page);
1214         cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr;
1215         cache->page = pageno;
1216
1217         return vaddr;
1218 }
1219
1220 static void *reloc_iomap(struct i915_vma *batch,
1221                          struct i915_execbuffer *eb,
1222                          unsigned long page)
1223 {
1224         struct drm_i915_gem_object *obj = batch->obj;
1225         struct reloc_cache *cache = &eb->reloc_cache;
1226         struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1227         unsigned long offset;
1228         void *vaddr;
1229
1230         if (cache->vaddr) {
1231                 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1232                 io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr));
1233         } else {
1234                 struct i915_vma *vma = ERR_PTR(-ENODEV);
1235                 int err;
1236
1237                 if (i915_gem_object_is_tiled(obj))
1238                         return ERR_PTR(-EINVAL);
1239
1240                 if (use_cpu_reloc(cache, obj))
1241                         return NULL;
1242
1243                 err = i915_gem_object_set_to_gtt_domain(obj, true);
1244                 if (err)
1245                         return ERR_PTR(err);
1246
1247                 /*
1248                  * i915_gem_object_ggtt_pin_ww may attempt to remove the batch
1249                  * VMA from the object list because we no longer pin.
1250                  *
1251                  * Only attempt to pin the batch buffer to ggtt if the current batch
1252                  * is not inside ggtt, or the batch buffer is not misplaced.
1253                  */
1254                 if (!i915_is_ggtt(batch->vm)) {
1255                         vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0,
1256                                                           PIN_MAPPABLE |
1257                                                           PIN_NONBLOCK /* NOWARN */ |
1258                                                           PIN_NOEVICT);
1259                 } else if (i915_vma_is_map_and_fenceable(batch)) {
1260                         __i915_vma_pin(batch);
1261                         vma = batch;
1262                 }
1263
1264                 if (vma == ERR_PTR(-EDEADLK))
1265                         return vma;
1266
1267                 if (IS_ERR(vma)) {
1268                         memset(&cache->node, 0, sizeof(cache->node));
1269                         mutex_lock(&ggtt->vm.mutex);
1270                         err = drm_mm_insert_node_in_range
1271                                 (&ggtt->vm.mm, &cache->node,
1272                                  PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
1273                                  0, ggtt->mappable_end,
1274                                  DRM_MM_INSERT_LOW);
1275                         mutex_unlock(&ggtt->vm.mutex);
1276                         if (err) /* no inactive aperture space, use cpu reloc */
1277                                 return NULL;
1278                 } else {
1279                         cache->node.start = vma->node.start;
1280                         cache->node.mm = (void *)vma;
1281                 }
1282         }
1283
1284         offset = cache->node.start;
1285         if (drm_mm_node_allocated(&cache->node)) {
1286                 ggtt->vm.insert_page(&ggtt->vm,
1287                                      i915_gem_object_get_dma_address(obj, page),
1288                                      offset, I915_CACHE_NONE, 0);
1289         } else {
1290                 offset += page << PAGE_SHIFT;
1291         }
1292
1293         vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap,
1294                                                          offset);
1295         cache->page = page;
1296         cache->vaddr = (unsigned long)vaddr;
1297
1298         return vaddr;
1299 }
1300
1301 static void *reloc_vaddr(struct i915_vma *vma,
1302                          struct i915_execbuffer *eb,
1303                          unsigned long page)
1304 {
1305         struct reloc_cache *cache = &eb->reloc_cache;
1306         void *vaddr;
1307
1308         if (cache->page == page) {
1309                 vaddr = unmask_page(cache->vaddr);
1310         } else {
1311                 vaddr = NULL;
1312                 if ((cache->vaddr & KMAP) == 0)
1313                         vaddr = reloc_iomap(vma, eb, page);
1314                 if (!vaddr)
1315                         vaddr = reloc_kmap(vma->obj, cache, page);
1316         }
1317
1318         return vaddr;
1319 }
1320
1321 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
1322 {
1323         if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
1324                 if (flushes & CLFLUSH_BEFORE)
1325                         drm_clflush_virt_range(addr, sizeof(*addr));
1326
1327                 *addr = value;
1328
1329                 /*
1330                  * Writes to the same cacheline are serialised by the CPU
1331                  * (including clflush). On the write path, we only require
1332                  * that it hits memory in an orderly fashion and place
1333                  * mb barriers at the start and end of the relocation phase
1334                  * to ensure ordering of clflush wrt to the system.
1335                  */
1336                 if (flushes & CLFLUSH_AFTER)
1337                         drm_clflush_virt_range(addr, sizeof(*addr));
1338         } else
1339                 *addr = value;
1340 }
1341
1342 static u64
1343 relocate_entry(struct i915_vma *vma,
1344                const struct drm_i915_gem_relocation_entry *reloc,
1345                struct i915_execbuffer *eb,
1346                const struct i915_vma *target)
1347 {
1348         u64 target_addr = relocation_target(reloc, target);
1349         u64 offset = reloc->offset;
1350         bool wide = eb->reloc_cache.use_64bit_reloc;
1351         void *vaddr;
1352
1353 repeat:
1354         vaddr = reloc_vaddr(vma, eb,
1355                             offset >> PAGE_SHIFT);
1356         if (IS_ERR(vaddr))
1357                 return PTR_ERR(vaddr);
1358
1359         GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32)));
1360         clflush_write32(vaddr + offset_in_page(offset),
1361                         lower_32_bits(target_addr),
1362                         eb->reloc_cache.vaddr);
1363
1364         if (wide) {
1365                 offset += sizeof(u32);
1366                 target_addr >>= 32;
1367                 wide = false;
1368                 goto repeat;
1369         }
1370
1371         return target->node.start | UPDATE;
1372 }
1373
1374 static u64
1375 eb_relocate_entry(struct i915_execbuffer *eb,
1376                   struct eb_vma *ev,
1377                   const struct drm_i915_gem_relocation_entry *reloc)
1378 {
1379         struct drm_i915_private *i915 = eb->i915;
1380         struct eb_vma *target;
1381         int err;
1382
1383         /* we've already hold a reference to all valid objects */
1384         target = eb_get_vma(eb, reloc->target_handle);
1385         if (unlikely(!target))
1386                 return -ENOENT;
1387
1388         /* Validate that the target is in a valid r/w GPU domain */
1389         if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
1390                 drm_dbg(&i915->drm, "reloc with multiple write domains: "
1391                           "target %d offset %d "
1392                           "read %08x write %08x",
1393                           reloc->target_handle,
1394                           (int) reloc->offset,
1395                           reloc->read_domains,
1396                           reloc->write_domain);
1397                 return -EINVAL;
1398         }
1399         if (unlikely((reloc->write_domain | reloc->read_domains)
1400                      & ~I915_GEM_GPU_DOMAINS)) {
1401                 drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: "
1402                           "target %d offset %d "
1403                           "read %08x write %08x",
1404                           reloc->target_handle,
1405                           (int) reloc->offset,
1406                           reloc->read_domains,
1407                           reloc->write_domain);
1408                 return -EINVAL;
1409         }
1410
1411         if (reloc->write_domain) {
1412                 target->flags |= EXEC_OBJECT_WRITE;
1413
1414                 /*
1415                  * Sandybridge PPGTT errata: We need a global gtt mapping
1416                  * for MI and pipe_control writes because the gpu doesn't
1417                  * properly redirect them through the ppgtt for non_secure
1418                  * batchbuffers.
1419                  */
1420                 if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
1421                     GRAPHICS_VER(eb->i915) == 6 &&
1422                     !i915_vma_is_bound(target->vma, I915_VMA_GLOBAL_BIND)) {
1423                         struct i915_vma *vma = target->vma;
1424
1425                         reloc_cache_unmap(&eb->reloc_cache);
1426                         mutex_lock(&vma->vm->mutex);
1427                         err = i915_vma_bind(target->vma,
1428                                             target->vma->obj->cache_level,
1429                                             PIN_GLOBAL, NULL, NULL);
1430                         mutex_unlock(&vma->vm->mutex);
1431                         reloc_cache_remap(&eb->reloc_cache, ev->vma->obj);
1432                         if (err)
1433                                 return err;
1434                 }
1435         }
1436
1437         /*
1438          * If the relocation already has the right value in it, no
1439          * more work needs to be done.
1440          */
1441         if (!DBG_FORCE_RELOC &&
1442             gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset)
1443                 return 0;
1444
1445         /* Check that the relocation address is valid... */
1446         if (unlikely(reloc->offset >
1447                      ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) {
1448                 drm_dbg(&i915->drm, "Relocation beyond object bounds: "
1449                           "target %d offset %d size %d.\n",
1450                           reloc->target_handle,
1451                           (int)reloc->offset,
1452                           (int)ev->vma->size);
1453                 return -EINVAL;
1454         }
1455         if (unlikely(reloc->offset & 3)) {
1456                 drm_dbg(&i915->drm, "Relocation not 4-byte aligned: "
1457                           "target %d offset %d.\n",
1458                           reloc->target_handle,
1459                           (int)reloc->offset);
1460                 return -EINVAL;
1461         }
1462
1463         /*
1464          * If we write into the object, we need to force the synchronisation
1465          * barrier, either with an asynchronous clflush or if we executed the
1466          * patching using the GPU (though that should be serialised by the
1467          * timeline). To be completely sure, and since we are required to
1468          * do relocations we are already stalling, disable the user's opt
1469          * out of our synchronisation.
1470          */
1471         ev->flags &= ~EXEC_OBJECT_ASYNC;
1472
1473         /* and update the user's relocation entry */
1474         return relocate_entry(ev->vma, reloc, eb, target->vma);
1475 }
1476
1477 static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev)
1478 {
1479 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
1480         struct drm_i915_gem_relocation_entry stack[N_RELOC(512)];
1481         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1482         struct drm_i915_gem_relocation_entry __user *urelocs =
1483                 u64_to_user_ptr(entry->relocs_ptr);
1484         unsigned long remain = entry->relocation_count;
1485
1486         if (unlikely(remain > N_RELOC(ULONG_MAX)))
1487                 return -EINVAL;
1488
1489         /*
1490          * We must check that the entire relocation array is safe
1491          * to read. However, if the array is not writable the user loses
1492          * the updated relocation values.
1493          */
1494         if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs))))
1495                 return -EFAULT;
1496
1497         do {
1498                 struct drm_i915_gem_relocation_entry *r = stack;
1499                 unsigned int count =
1500                         min_t(unsigned long, remain, ARRAY_SIZE(stack));
1501                 unsigned int copied;
1502
1503                 /*
1504                  * This is the fast path and we cannot handle a pagefault
1505                  * whilst holding the struct mutex lest the user pass in the
1506                  * relocations contained within a mmaped bo. For in such a case
1507                  * we, the page fault handler would call i915_gem_fault() and
1508                  * we would try to acquire the struct mutex again. Obviously
1509                  * this is bad and so lockdep complains vehemently.
1510                  */
1511                 pagefault_disable();
1512                 copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0]));
1513                 pagefault_enable();
1514                 if (unlikely(copied)) {
1515                         remain = -EFAULT;
1516                         goto out;
1517                 }
1518
1519                 remain -= count;
1520                 do {
1521                         u64 offset = eb_relocate_entry(eb, ev, r);
1522
1523                         if (likely(offset == 0)) {
1524                         } else if ((s64)offset < 0) {
1525                                 remain = (int)offset;
1526                                 goto out;
1527                         } else {
1528                                 /*
1529                                  * Note that reporting an error now
1530                                  * leaves everything in an inconsistent
1531                                  * state as we have *already* changed
1532                                  * the relocation value inside the
1533                                  * object. As we have not changed the
1534                                  * reloc.presumed_offset or will not
1535                                  * change the execobject.offset, on the
1536                                  * call we may not rewrite the value
1537                                  * inside the object, leaving it
1538                                  * dangling and causing a GPU hang. Unless
1539                                  * userspace dynamically rebuilds the
1540                                  * relocations on each execbuf rather than
1541                                  * presume a static tree.
1542                                  *
1543                                  * We did previously check if the relocations
1544                                  * were writable (access_ok), an error now
1545                                  * would be a strange race with mprotect,
1546                                  * having already demonstrated that we
1547                                  * can read from this userspace address.
1548                                  */
1549                                 offset = gen8_canonical_addr(offset & ~UPDATE);
1550                                 __put_user(offset,
1551                                            &urelocs[r - stack].presumed_offset);
1552                         }
1553                 } while (r++, --count);
1554                 urelocs += ARRAY_SIZE(stack);
1555         } while (remain);
1556 out:
1557         reloc_cache_reset(&eb->reloc_cache, eb);
1558         return remain;
1559 }
1560
1561 static int
1562 eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev)
1563 {
1564         const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1565         struct drm_i915_gem_relocation_entry *relocs =
1566                 u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1567         unsigned int i;
1568         int err;
1569
1570         for (i = 0; i < entry->relocation_count; i++) {
1571                 u64 offset = eb_relocate_entry(eb, ev, &relocs[i]);
1572
1573                 if ((s64)offset < 0) {
1574                         err = (int)offset;
1575                         goto err;
1576                 }
1577         }
1578         err = 0;
1579 err:
1580         reloc_cache_reset(&eb->reloc_cache, eb);
1581         return err;
1582 }
1583
1584 static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
1585 {
1586         const char __user *addr, *end;
1587         unsigned long size;
1588         char __maybe_unused c;
1589
1590         size = entry->relocation_count;
1591         if (size == 0)
1592                 return 0;
1593
1594         if (size > N_RELOC(ULONG_MAX))
1595                 return -EINVAL;
1596
1597         addr = u64_to_user_ptr(entry->relocs_ptr);
1598         size *= sizeof(struct drm_i915_gem_relocation_entry);
1599         if (!access_ok(addr, size))
1600                 return -EFAULT;
1601
1602         end = addr + size;
1603         for (; addr < end; addr += PAGE_SIZE) {
1604                 int err = __get_user(c, addr);
1605                 if (err)
1606                         return err;
1607         }
1608         return __get_user(c, end - 1);
1609 }
1610
1611 static int eb_copy_relocations(const struct i915_execbuffer *eb)
1612 {
1613         struct drm_i915_gem_relocation_entry *relocs;
1614         const unsigned int count = eb->buffer_count;
1615         unsigned int i;
1616         int err;
1617
1618         for (i = 0; i < count; i++) {
1619                 const unsigned int nreloc = eb->exec[i].relocation_count;
1620                 struct drm_i915_gem_relocation_entry __user *urelocs;
1621                 unsigned long size;
1622                 unsigned long copied;
1623
1624                 if (nreloc == 0)
1625                         continue;
1626
1627                 err = check_relocations(&eb->exec[i]);
1628                 if (err)
1629                         goto err;
1630
1631                 urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
1632                 size = nreloc * sizeof(*relocs);
1633
1634                 relocs = kvmalloc_array(size, 1, GFP_KERNEL);
1635                 if (!relocs) {
1636                         err = -ENOMEM;
1637                         goto err;
1638                 }
1639
1640                 /* copy_from_user is limited to < 4GiB */
1641                 copied = 0;
1642                 do {
1643                         unsigned int len =
1644                                 min_t(u64, BIT_ULL(31), size - copied);
1645
1646                         if (__copy_from_user((char *)relocs + copied,
1647                                              (char __user *)urelocs + copied,
1648                                              len))
1649                                 goto end;
1650
1651                         copied += len;
1652                 } while (copied < size);
1653
1654                 /*
1655                  * As we do not update the known relocation offsets after
1656                  * relocating (due to the complexities in lock handling),
1657                  * we need to mark them as invalid now so that we force the
1658                  * relocation processing next time. Just in case the target
1659                  * object is evicted and then rebound into its old
1660                  * presumed_offset before the next execbuffer - if that
1661                  * happened we would make the mistake of assuming that the
1662                  * relocations were valid.
1663                  */
1664                 if (!user_access_begin(urelocs, size))
1665                         goto end;
1666
1667                 for (copied = 0; copied < nreloc; copied++)
1668                         unsafe_put_user(-1,
1669                                         &urelocs[copied].presumed_offset,
1670                                         end_user);
1671                 user_access_end();
1672
1673                 eb->exec[i].relocs_ptr = (uintptr_t)relocs;
1674         }
1675
1676         return 0;
1677
1678 end_user:
1679         user_access_end();
1680 end:
1681         kvfree(relocs);
1682         err = -EFAULT;
1683 err:
1684         while (i--) {
1685                 relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
1686                 if (eb->exec[i].relocation_count)
1687                         kvfree(relocs);
1688         }
1689         return err;
1690 }
1691
1692 static int eb_prefault_relocations(const struct i915_execbuffer *eb)
1693 {
1694         const unsigned int count = eb->buffer_count;
1695         unsigned int i;
1696
1697         for (i = 0; i < count; i++) {
1698                 int err;
1699
1700                 err = check_relocations(&eb->exec[i]);
1701                 if (err)
1702                         return err;
1703         }
1704
1705         return 0;
1706 }
1707
1708 static int eb_reinit_userptr(struct i915_execbuffer *eb)
1709 {
1710         const unsigned int count = eb->buffer_count;
1711         unsigned int i;
1712         int ret;
1713
1714         if (likely(!(eb->args->flags & __EXEC_USERPTR_USED)))
1715                 return 0;
1716
1717         for (i = 0; i < count; i++) {
1718                 struct eb_vma *ev = &eb->vma[i];
1719
1720                 if (!i915_gem_object_is_userptr(ev->vma->obj))
1721                         continue;
1722
1723                 ret = i915_gem_object_userptr_submit_init(ev->vma->obj);
1724                 if (ret)
1725                         return ret;
1726
1727                 ev->flags |= __EXEC_OBJECT_USERPTR_INIT;
1728         }
1729
1730         return 0;
1731 }
1732
1733 static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb)
1734 {
1735         bool have_copy = false;
1736         struct eb_vma *ev;
1737         int err = 0;
1738
1739 repeat:
1740         if (signal_pending(current)) {
1741                 err = -ERESTARTSYS;
1742                 goto out;
1743         }
1744
1745         /* We may process another execbuffer during the unlock... */
1746         eb_release_vmas(eb, false);
1747         i915_gem_ww_ctx_fini(&eb->ww);
1748
1749         /*
1750          * We take 3 passes through the slowpatch.
1751          *
1752          * 1 - we try to just prefault all the user relocation entries and
1753          * then attempt to reuse the atomic pagefault disabled fast path again.
1754          *
1755          * 2 - we copy the user entries to a local buffer here outside of the
1756          * local and allow ourselves to wait upon any rendering before
1757          * relocations
1758          *
1759          * 3 - we already have a local copy of the relocation entries, but
1760          * were interrupted (EAGAIN) whilst waiting for the objects, try again.
1761          */
1762         if (!err) {
1763                 err = eb_prefault_relocations(eb);
1764         } else if (!have_copy) {
1765                 err = eb_copy_relocations(eb);
1766                 have_copy = err == 0;
1767         } else {
1768                 cond_resched();
1769                 err = 0;
1770         }
1771
1772         if (!err)
1773                 err = eb_reinit_userptr(eb);
1774
1775         i915_gem_ww_ctx_init(&eb->ww, true);
1776         if (err)
1777                 goto out;
1778
1779         /* reacquire the objects */
1780 repeat_validate:
1781         err = eb_pin_engine(eb, false);
1782         if (err)
1783                 goto err;
1784
1785         err = eb_validate_vmas(eb);
1786         if (err)
1787                 goto err;
1788
1789         GEM_BUG_ON(!eb->batches[0]);
1790
1791         list_for_each_entry(ev, &eb->relocs, reloc_link) {
1792                 if (!have_copy) {
1793                         err = eb_relocate_vma(eb, ev);
1794                         if (err)
1795                                 break;
1796                 } else {
1797                         err = eb_relocate_vma_slow(eb, ev);
1798                         if (err)
1799                                 break;
1800                 }
1801         }
1802
1803         if (err == -EDEADLK)
1804                 goto err;
1805
1806         if (err && !have_copy)
1807                 goto repeat;
1808
1809         if (err)
1810                 goto err;
1811
1812         /* as last step, parse the command buffer */
1813         err = eb_parse(eb);
1814         if (err)
1815                 goto err;
1816
1817         /*
1818          * Leave the user relocations as are, this is the painfully slow path,
1819          * and we want to avoid the complication of dropping the lock whilst
1820          * having buffers reserved in the aperture and so causing spurious
1821          * ENOSPC for random operations.
1822          */
1823
1824 err:
1825         if (err == -EDEADLK) {
1826                 eb_release_vmas(eb, false);
1827                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1828                 if (!err)
1829                         goto repeat_validate;
1830         }
1831
1832         if (err == -EAGAIN)
1833                 goto repeat;
1834
1835 out:
1836         if (have_copy) {
1837                 const unsigned int count = eb->buffer_count;
1838                 unsigned int i;
1839
1840                 for (i = 0; i < count; i++) {
1841                         const struct drm_i915_gem_exec_object2 *entry =
1842                                 &eb->exec[i];
1843                         struct drm_i915_gem_relocation_entry *relocs;
1844
1845                         if (!entry->relocation_count)
1846                                 continue;
1847
1848                         relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1849                         kvfree(relocs);
1850                 }
1851         }
1852
1853         return err;
1854 }
1855
1856 static int eb_relocate_parse(struct i915_execbuffer *eb)
1857 {
1858         int err;
1859         bool throttle = true;
1860
1861 retry:
1862         err = eb_pin_engine(eb, throttle);
1863         if (err) {
1864                 if (err != -EDEADLK)
1865                         return err;
1866
1867                 goto err;
1868         }
1869
1870         /* only throttle once, even if we didn't need to throttle */
1871         throttle = false;
1872
1873         err = eb_validate_vmas(eb);
1874         if (err == -EAGAIN)
1875                 goto slow;
1876         else if (err)
1877                 goto err;
1878
1879         /* The objects are in their final locations, apply the relocations. */
1880         if (eb->args->flags & __EXEC_HAS_RELOC) {
1881                 struct eb_vma *ev;
1882
1883                 list_for_each_entry(ev, &eb->relocs, reloc_link) {
1884                         err = eb_relocate_vma(eb, ev);
1885                         if (err)
1886                                 break;
1887                 }
1888
1889                 if (err == -EDEADLK)
1890                         goto err;
1891                 else if (err)
1892                         goto slow;
1893         }
1894
1895         if (!err)
1896                 err = eb_parse(eb);
1897
1898 err:
1899         if (err == -EDEADLK) {
1900                 eb_release_vmas(eb, false);
1901                 err = i915_gem_ww_ctx_backoff(&eb->ww);
1902                 if (!err)
1903                         goto retry;
1904         }
1905
1906         return err;
1907
1908 slow:
1909         err = eb_relocate_parse_slow(eb);
1910         if (err)
1911                 /*
1912                  * If the user expects the execobject.offset and
1913                  * reloc.presumed_offset to be an exact match,
1914                  * as for using NO_RELOC, then we cannot update
1915                  * the execobject.offset until we have completed
1916                  * relocation.
1917                  */
1918                 eb->args->flags &= ~__EXEC_HAS_RELOC;
1919
1920         return err;
1921 }
1922
1923 /*
1924  * Using two helper loops for the order of which requests / batches are created
1925  * and added the to backend. Requests are created in order from the parent to
1926  * the last child. Requests are added in the reverse order, from the last child
1927  * to parent. This is done for locking reasons as the timeline lock is acquired
1928  * during request creation and released when the request is added to the
1929  * backend. To make lockdep happy (see intel_context_timeline_lock) this must be
1930  * the ordering.
1931  */
1932 #define for_each_batch_create_order(_eb, _i) \
1933         for ((_i) = 0; (_i) < (_eb)->num_batches; ++(_i))
1934 #define for_each_batch_add_order(_eb, _i) \
1935         BUILD_BUG_ON(!typecheck(int, _i)); \
1936         for ((_i) = (_eb)->num_batches - 1; (_i) >= 0; --(_i))
1937
1938 static struct i915_request *
1939 eb_find_first_request_added(struct i915_execbuffer *eb)
1940 {
1941         int i;
1942
1943         for_each_batch_add_order(eb, i)
1944                 if (eb->requests[i])
1945                         return eb->requests[i];
1946
1947         GEM_BUG_ON("Request not found");
1948
1949         return NULL;
1950 }
1951
1952 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
1953
1954 /* Stage with GFP_KERNEL allocations before we enter the signaling critical path */
1955 static void eb_capture_stage(struct i915_execbuffer *eb)
1956 {
1957         const unsigned int count = eb->buffer_count;
1958         unsigned int i = count, j;
1959
1960         while (i--) {
1961                 struct eb_vma *ev = &eb->vma[i];
1962                 struct i915_vma *vma = ev->vma;
1963                 unsigned int flags = ev->flags;
1964
1965                 if (!(flags & EXEC_OBJECT_CAPTURE))
1966                         continue;
1967
1968                 for_each_batch_create_order(eb, j) {
1969                         struct i915_capture_list *capture;
1970
1971                         capture = kmalloc(sizeof(*capture), GFP_KERNEL);
1972                         if (!capture)
1973                                 continue;
1974
1975                         capture->next = eb->capture_lists[j];
1976                         capture->vma_res = i915_vma_resource_get(vma->resource);
1977                         eb->capture_lists[j] = capture;
1978                 }
1979         }
1980 }
1981
1982 /* Commit once we're in the critical path */
1983 static void eb_capture_commit(struct i915_execbuffer *eb)
1984 {
1985         unsigned int j;
1986
1987         for_each_batch_create_order(eb, j) {
1988                 struct i915_request *rq = eb->requests[j];
1989
1990                 if (!rq)
1991                         break;
1992
1993                 rq->capture_list = eb->capture_lists[j];
1994                 eb->capture_lists[j] = NULL;
1995         }
1996 }
1997
1998 /*
1999  * Release anything that didn't get committed due to errors.
2000  * The capture_list will otherwise be freed at request retire.
2001  */
2002 static void eb_capture_release(struct i915_execbuffer *eb)
2003 {
2004         unsigned int j;
2005
2006         for_each_batch_create_order(eb, j) {
2007                 if (eb->capture_lists[j]) {
2008                         i915_request_free_capture_list(eb->capture_lists[j]);
2009                         eb->capture_lists[j] = NULL;
2010                 }
2011         }
2012 }
2013
2014 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2015 {
2016         memset(eb->capture_lists, 0, sizeof(eb->capture_lists));
2017 }
2018
2019 #else
2020
2021 static void eb_capture_stage(struct i915_execbuffer *eb)
2022 {
2023 }
2024
2025 static void eb_capture_commit(struct i915_execbuffer *eb)
2026 {
2027 }
2028
2029 static void eb_capture_release(struct i915_execbuffer *eb)
2030 {
2031 }
2032
2033 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2034 {
2035 }
2036
2037 #endif
2038
2039 static int eb_move_to_gpu(struct i915_execbuffer *eb)
2040 {
2041         const unsigned int count = eb->buffer_count;
2042         unsigned int i = count;
2043         int err = 0, j;
2044
2045         while (i--) {
2046                 struct eb_vma *ev = &eb->vma[i];
2047                 struct i915_vma *vma = ev->vma;
2048                 unsigned int flags = ev->flags;
2049                 struct drm_i915_gem_object *obj = vma->obj;
2050
2051                 assert_vma_held(vma);
2052
2053                 /*
2054                  * If the GPU is not _reading_ through the CPU cache, we need
2055                  * to make sure that any writes (both previous GPU writes from
2056                  * before a change in snooping levels and normal CPU writes)
2057                  * caught in that cache are flushed to main memory.
2058                  *
2059                  * We want to say
2060                  *   obj->cache_dirty &&
2061                  *   !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)
2062                  * but gcc's optimiser doesn't handle that as well and emits
2063                  * two jumps instead of one. Maybe one day...
2064                  *
2065                  * FIXME: There is also sync flushing in set_pages(), which
2066                  * serves a different purpose(some of the time at least).
2067                  *
2068                  * We should consider:
2069                  *
2070                  *   1. Rip out the async flush code.
2071                  *
2072                  *   2. Or make the sync flushing use the async clflush path
2073                  *   using mandatory fences underneath. Currently the below
2074                  *   async flush happens after we bind the object.
2075                  */
2076                 if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) {
2077                         if (i915_gem_clflush_object(obj, 0))
2078                                 flags &= ~EXEC_OBJECT_ASYNC;
2079                 }
2080
2081                 /* We only need to await on the first request */
2082                 if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) {
2083                         err = i915_request_await_object
2084                                 (eb_find_first_request_added(eb), obj,
2085                                  flags & EXEC_OBJECT_WRITE);
2086                 }
2087
2088                 for_each_batch_add_order(eb, j) {
2089                         if (err)
2090                                 break;
2091                         if (!eb->requests[j])
2092                                 continue;
2093
2094                         err = _i915_vma_move_to_active(vma, eb->requests[j],
2095                                                        j ? NULL :
2096                                                        eb->composite_fence ?
2097                                                        eb->composite_fence :
2098                                                        &eb->requests[j]->fence,
2099                                                        flags | __EXEC_OBJECT_NO_RESERVE);
2100                 }
2101         }
2102
2103 #ifdef CONFIG_MMU_NOTIFIER
2104         if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
2105                 read_lock(&eb->i915->mm.notifier_lock);
2106
2107                 /*
2108                  * count is always at least 1, otherwise __EXEC_USERPTR_USED
2109                  * could not have been set
2110                  */
2111                 for (i = 0; i < count; i++) {
2112                         struct eb_vma *ev = &eb->vma[i];
2113                         struct drm_i915_gem_object *obj = ev->vma->obj;
2114
2115                         if (!i915_gem_object_is_userptr(obj))
2116                                 continue;
2117
2118                         err = i915_gem_object_userptr_submit_done(obj);
2119                         if (err)
2120                                 break;
2121                 }
2122
2123                 read_unlock(&eb->i915->mm.notifier_lock);
2124         }
2125 #endif
2126
2127         if (unlikely(err))
2128                 goto err_skip;
2129
2130         /* Unconditionally flush any chipset caches (for streaming writes). */
2131         intel_gt_chipset_flush(eb->gt);
2132         eb_capture_commit(eb);
2133
2134         return 0;
2135
2136 err_skip:
2137         for_each_batch_create_order(eb, j) {
2138                 if (!eb->requests[j])
2139                         break;
2140
2141                 i915_request_set_error_once(eb->requests[j], err);
2142         }
2143         return err;
2144 }
2145
2146 static int i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec)
2147 {
2148         if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
2149                 return -EINVAL;
2150
2151         /* Kernel clipping was a DRI1 misfeature */
2152         if (!(exec->flags & (I915_EXEC_FENCE_ARRAY |
2153                              I915_EXEC_USE_EXTENSIONS))) {
2154                 if (exec->num_cliprects || exec->cliprects_ptr)
2155                         return -EINVAL;
2156         }
2157
2158         if (exec->DR4 == 0xffffffff) {
2159                 DRM_DEBUG("UXA submitting garbage DR4, fixing up\n");
2160                 exec->DR4 = 0;
2161         }
2162         if (exec->DR1 || exec->DR4)
2163                 return -EINVAL;
2164
2165         if ((exec->batch_start_offset | exec->batch_len) & 0x7)
2166                 return -EINVAL;
2167
2168         return 0;
2169 }
2170
2171 static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
2172 {
2173         u32 *cs;
2174         int i;
2175
2176         if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) {
2177                 drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n");
2178                 return -EINVAL;
2179         }
2180
2181         cs = intel_ring_begin(rq, 4 * 2 + 2);
2182         if (IS_ERR(cs))
2183                 return PTR_ERR(cs);
2184
2185         *cs++ = MI_LOAD_REGISTER_IMM(4);
2186         for (i = 0; i < 4; i++) {
2187                 *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i));
2188                 *cs++ = 0;
2189         }
2190         *cs++ = MI_NOOP;
2191         intel_ring_advance(rq, cs);
2192
2193         return 0;
2194 }
2195
2196 static struct i915_vma *
2197 shadow_batch_pin(struct i915_execbuffer *eb,
2198                  struct drm_i915_gem_object *obj,
2199                  struct i915_address_space *vm,
2200                  unsigned int flags)
2201 {
2202         struct i915_vma *vma;
2203         int err;
2204
2205         vma = i915_vma_instance(obj, vm, NULL);
2206         if (IS_ERR(vma))
2207                 return vma;
2208
2209         err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags | PIN_VALIDATE);
2210         if (err)
2211                 return ERR_PTR(err);
2212
2213         return vma;
2214 }
2215
2216 static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma)
2217 {
2218         /*
2219          * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
2220          * batch" bit. Hence we need to pin secure batches into the global gtt.
2221          * hsw should have this fixed, but bdw mucks it up again. */
2222         if (eb->batch_flags & I915_DISPATCH_SECURE)
2223                 return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, PIN_VALIDATE);
2224
2225         return NULL;
2226 }
2227
2228 static int eb_parse(struct i915_execbuffer *eb)
2229 {
2230         struct drm_i915_private *i915 = eb->i915;
2231         struct intel_gt_buffer_pool_node *pool = eb->batch_pool;
2232         struct i915_vma *shadow, *trampoline, *batch;
2233         unsigned long len;
2234         int err;
2235
2236         if (!eb_use_cmdparser(eb)) {
2237                 batch = eb_dispatch_secure(eb, eb->batches[0]->vma);
2238                 if (IS_ERR(batch))
2239                         return PTR_ERR(batch);
2240
2241                 goto secure_batch;
2242         }
2243
2244         if (intel_context_is_parallel(eb->context))
2245                 return -EINVAL;
2246
2247         len = eb->batch_len[0];
2248         if (!CMDPARSER_USES_GGTT(eb->i915)) {
2249                 /*
2250                  * ppGTT backed shadow buffers must be mapped RO, to prevent
2251                  * post-scan tampering
2252                  */
2253                 if (!eb->context->vm->has_read_only) {
2254                         drm_dbg(&i915->drm,
2255                                 "Cannot prevent post-scan tampering without RO capable vm\n");
2256                         return -EINVAL;
2257                 }
2258         } else {
2259                 len += I915_CMD_PARSER_TRAMPOLINE_SIZE;
2260         }
2261         if (unlikely(len < eb->batch_len[0])) /* last paranoid check of overflow */
2262                 return -EINVAL;
2263
2264         if (!pool) {
2265                 pool = intel_gt_get_buffer_pool(eb->gt, len,
2266                                                 I915_MAP_WB);
2267                 if (IS_ERR(pool))
2268                         return PTR_ERR(pool);
2269                 eb->batch_pool = pool;
2270         }
2271
2272         err = i915_gem_object_lock(pool->obj, &eb->ww);
2273         if (err)
2274                 return err;
2275
2276         shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER);
2277         if (IS_ERR(shadow))
2278                 return PTR_ERR(shadow);
2279
2280         intel_gt_buffer_pool_mark_used(pool);
2281         i915_gem_object_set_readonly(shadow->obj);
2282         shadow->private = pool;
2283
2284         trampoline = NULL;
2285         if (CMDPARSER_USES_GGTT(eb->i915)) {
2286                 trampoline = shadow;
2287
2288                 shadow = shadow_batch_pin(eb, pool->obj,
2289                                           &eb->gt->ggtt->vm,
2290                                           PIN_GLOBAL);
2291                 if (IS_ERR(shadow))
2292                         return PTR_ERR(shadow);
2293
2294                 shadow->private = pool;
2295
2296                 eb->batch_flags |= I915_DISPATCH_SECURE;
2297         }
2298
2299         batch = eb_dispatch_secure(eb, shadow);
2300         if (IS_ERR(batch))
2301                 return PTR_ERR(batch);
2302
2303         err = dma_resv_reserve_fences(shadow->obj->base.resv, 1);
2304         if (err)
2305                 return err;
2306
2307         err = intel_engine_cmd_parser(eb->context->engine,
2308                                       eb->batches[0]->vma,
2309                                       eb->batch_start_offset,
2310                                       eb->batch_len[0],
2311                                       shadow, trampoline);
2312         if (err)
2313                 return err;
2314
2315         eb->batches[0] = &eb->vma[eb->buffer_count++];
2316         eb->batches[0]->vma = i915_vma_get(shadow);
2317         eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2318
2319         eb->trampoline = trampoline;
2320         eb->batch_start_offset = 0;
2321
2322 secure_batch:
2323         if (batch) {
2324                 if (intel_context_is_parallel(eb->context))
2325                         return -EINVAL;
2326
2327                 eb->batches[0] = &eb->vma[eb->buffer_count++];
2328                 eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2329                 eb->batches[0]->vma = i915_vma_get(batch);
2330         }
2331         return 0;
2332 }
2333
2334 static int eb_request_submit(struct i915_execbuffer *eb,
2335                              struct i915_request *rq,
2336                              struct i915_vma *batch,
2337                              u64 batch_len)
2338 {
2339         int err;
2340
2341         if (intel_context_nopreempt(rq->context))
2342                 __set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
2343
2344         if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
2345                 err = i915_reset_gen7_sol_offsets(rq);
2346                 if (err)
2347                         return err;
2348         }
2349
2350         /*
2351          * After we completed waiting for other engines (using HW semaphores)
2352          * then we can signal that this request/batch is ready to run. This
2353          * allows us to determine if the batch is still waiting on the GPU
2354          * or actually running by checking the breadcrumb.
2355          */
2356         if (rq->context->engine->emit_init_breadcrumb) {
2357                 err = rq->context->engine->emit_init_breadcrumb(rq);
2358                 if (err)
2359                         return err;
2360         }
2361
2362         err = rq->context->engine->emit_bb_start(rq,
2363                                                  batch->node.start +
2364                                                  eb->batch_start_offset,
2365                                                  batch_len,
2366                                                  eb->batch_flags);
2367         if (err)
2368                 return err;
2369
2370         if (eb->trampoline) {
2371                 GEM_BUG_ON(intel_context_is_parallel(rq->context));
2372                 GEM_BUG_ON(eb->batch_start_offset);
2373                 err = rq->context->engine->emit_bb_start(rq,
2374                                                          eb->trampoline->node.start +
2375                                                          batch_len, 0, 0);
2376                 if (err)
2377                         return err;
2378         }
2379
2380         return 0;
2381 }
2382
2383 static int eb_submit(struct i915_execbuffer *eb)
2384 {
2385         unsigned int i;
2386         int err;
2387
2388         err = eb_move_to_gpu(eb);
2389
2390         for_each_batch_create_order(eb, i) {
2391                 if (!eb->requests[i])
2392                         break;
2393
2394                 trace_i915_request_queue(eb->requests[i], eb->batch_flags);
2395                 if (!err)
2396                         err = eb_request_submit(eb, eb->requests[i],
2397                                                 eb->batches[i]->vma,
2398                                                 eb->batch_len[i]);
2399         }
2400
2401         return err;
2402 }
2403
2404 static int num_vcs_engines(struct drm_i915_private *i915)
2405 {
2406         return hweight_long(VDBOX_MASK(to_gt(i915)));
2407 }
2408
2409 /*
2410  * Find one BSD ring to dispatch the corresponding BSD command.
2411  * The engine index is returned.
2412  */
2413 static unsigned int
2414 gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
2415                          struct drm_file *file)
2416 {
2417         struct drm_i915_file_private *file_priv = file->driver_priv;
2418
2419         /* Check whether the file_priv has already selected one ring. */
2420         if ((int)file_priv->bsd_engine < 0)
2421                 file_priv->bsd_engine =
2422                         get_random_int() % num_vcs_engines(dev_priv);
2423
2424         return file_priv->bsd_engine;
2425 }
2426
2427 static const enum intel_engine_id user_ring_map[] = {
2428         [I915_EXEC_DEFAULT]     = RCS0,
2429         [I915_EXEC_RENDER]      = RCS0,
2430         [I915_EXEC_BLT]         = BCS0,
2431         [I915_EXEC_BSD]         = VCS0,
2432         [I915_EXEC_VEBOX]       = VECS0
2433 };
2434
2435 static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce)
2436 {
2437         struct intel_ring *ring = ce->ring;
2438         struct intel_timeline *tl = ce->timeline;
2439         struct i915_request *rq;
2440
2441         /*
2442          * Completely unscientific finger-in-the-air estimates for suitable
2443          * maximum user request size (to avoid blocking) and then backoff.
2444          */
2445         if (intel_ring_update_space(ring) >= PAGE_SIZE)
2446                 return NULL;
2447
2448         /*
2449          * Find a request that after waiting upon, there will be at least half
2450          * the ring available. The hysteresis allows us to compete for the
2451          * shared ring and should mean that we sleep less often prior to
2452          * claiming our resources, but not so long that the ring completely
2453          * drains before we can submit our next request.
2454          */
2455         list_for_each_entry(rq, &tl->requests, link) {
2456                 if (rq->ring != ring)
2457                         continue;
2458
2459                 if (__intel_ring_space(rq->postfix,
2460                                        ring->emit, ring->size) > ring->size / 2)
2461                         break;
2462         }
2463         if (&rq->link == &tl->requests)
2464                 return NULL; /* weird, we will check again later for real */
2465
2466         return i915_request_get(rq);
2467 }
2468
2469 static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce,
2470                            bool throttle)
2471 {
2472         struct intel_timeline *tl;
2473         struct i915_request *rq = NULL;
2474
2475         /*
2476          * Take a local wakeref for preparing to dispatch the execbuf as
2477          * we expect to access the hardware fairly frequently in the
2478          * process, and require the engine to be kept awake between accesses.
2479          * Upon dispatch, we acquire another prolonged wakeref that we hold
2480          * until the timeline is idle, which in turn releases the wakeref
2481          * taken on the engine, and the parent device.
2482          */
2483         tl = intel_context_timeline_lock(ce);
2484         if (IS_ERR(tl))
2485                 return PTR_ERR(tl);
2486
2487         intel_context_enter(ce);
2488         if (throttle)
2489                 rq = eb_throttle(eb, ce);
2490         intel_context_timeline_unlock(tl);
2491
2492         if (rq) {
2493                 bool nonblock = eb->file->filp->f_flags & O_NONBLOCK;
2494                 long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT;
2495
2496                 if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
2497                                       timeout) < 0) {
2498                         i915_request_put(rq);
2499
2500                         /*
2501                          * Error path, cannot use intel_context_timeline_lock as
2502                          * that is user interruptable and this clean up step
2503                          * must be done.
2504                          */
2505                         mutex_lock(&ce->timeline->mutex);
2506                         intel_context_exit(ce);
2507                         mutex_unlock(&ce->timeline->mutex);
2508
2509                         if (nonblock)
2510                                 return -EWOULDBLOCK;
2511                         else
2512                                 return -EINTR;
2513                 }
2514                 i915_request_put(rq);
2515         }
2516
2517         return 0;
2518 }
2519
2520 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle)
2521 {
2522         struct intel_context *ce = eb->context, *child;
2523         int err;
2524         int i = 0, j = 0;
2525
2526         GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED);
2527
2528         if (unlikely(intel_context_is_banned(ce)))
2529                 return -EIO;
2530
2531         /*
2532          * Pinning the contexts may generate requests in order to acquire
2533          * GGTT space, so do this first before we reserve a seqno for
2534          * ourselves.
2535          */
2536         err = intel_context_pin_ww(ce, &eb->ww);
2537         if (err)
2538                 return err;
2539         for_each_child(ce, child) {
2540                 err = intel_context_pin_ww(child, &eb->ww);
2541                 GEM_BUG_ON(err);        /* perma-pinned should incr a counter */
2542         }
2543
2544         for_each_child(ce, child) {
2545                 err = eb_pin_timeline(eb, child, throttle);
2546                 if (err)
2547                         goto unwind;
2548                 ++i;
2549         }
2550         err = eb_pin_timeline(eb, ce, throttle);
2551         if (err)
2552                 goto unwind;
2553
2554         eb->args->flags |= __EXEC_ENGINE_PINNED;
2555         return 0;
2556
2557 unwind:
2558         for_each_child(ce, child) {
2559                 if (j++ < i) {
2560                         mutex_lock(&child->timeline->mutex);
2561                         intel_context_exit(child);
2562                         mutex_unlock(&child->timeline->mutex);
2563                 }
2564         }
2565         for_each_child(ce, child)
2566                 intel_context_unpin(child);
2567         intel_context_unpin(ce);
2568         return err;
2569 }
2570
2571 static void eb_unpin_engine(struct i915_execbuffer *eb)
2572 {
2573         struct intel_context *ce = eb->context, *child;
2574
2575         if (!(eb->args->flags & __EXEC_ENGINE_PINNED))
2576                 return;
2577
2578         eb->args->flags &= ~__EXEC_ENGINE_PINNED;
2579
2580         for_each_child(ce, child) {
2581                 mutex_lock(&child->timeline->mutex);
2582                 intel_context_exit(child);
2583                 mutex_unlock(&child->timeline->mutex);
2584
2585                 intel_context_unpin(child);
2586         }
2587
2588         mutex_lock(&ce->timeline->mutex);
2589         intel_context_exit(ce);
2590         mutex_unlock(&ce->timeline->mutex);
2591
2592         intel_context_unpin(ce);
2593 }
2594
2595 static unsigned int
2596 eb_select_legacy_ring(struct i915_execbuffer *eb)
2597 {
2598         struct drm_i915_private *i915 = eb->i915;
2599         struct drm_i915_gem_execbuffer2 *args = eb->args;
2600         unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
2601
2602         if (user_ring_id != I915_EXEC_BSD &&
2603             (args->flags & I915_EXEC_BSD_MASK)) {
2604                 drm_dbg(&i915->drm,
2605                         "execbuf with non bsd ring but with invalid "
2606                         "bsd dispatch flags: %d\n", (int)(args->flags));
2607                 return -1;
2608         }
2609
2610         if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
2611                 unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
2612
2613                 if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
2614                         bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
2615                 } else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
2616                            bsd_idx <= I915_EXEC_BSD_RING2) {
2617                         bsd_idx >>= I915_EXEC_BSD_SHIFT;
2618                         bsd_idx--;
2619                 } else {
2620                         drm_dbg(&i915->drm,
2621                                 "execbuf with unknown bsd ring: %u\n",
2622                                 bsd_idx);
2623                         return -1;
2624                 }
2625
2626                 return _VCS(bsd_idx);
2627         }
2628
2629         if (user_ring_id >= ARRAY_SIZE(user_ring_map)) {
2630                 drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n",
2631                         user_ring_id);
2632                 return -1;
2633         }
2634
2635         return user_ring_map[user_ring_id];
2636 }
2637
2638 static int
2639 eb_select_engine(struct i915_execbuffer *eb)
2640 {
2641         struct intel_context *ce, *child;
2642         unsigned int idx;
2643         int err;
2644
2645         if (i915_gem_context_user_engines(eb->gem_context))
2646                 idx = eb->args->flags & I915_EXEC_RING_MASK;
2647         else
2648                 idx = eb_select_legacy_ring(eb);
2649
2650         ce = i915_gem_context_get_engine(eb->gem_context, idx);
2651         if (IS_ERR(ce))
2652                 return PTR_ERR(ce);
2653
2654         if (intel_context_is_parallel(ce)) {
2655                 if (eb->buffer_count < ce->parallel.number_children + 1) {
2656                         intel_context_put(ce);
2657                         return -EINVAL;
2658                 }
2659                 if (eb->batch_start_offset || eb->args->batch_len) {
2660                         intel_context_put(ce);
2661                         return -EINVAL;
2662                 }
2663         }
2664         eb->num_batches = ce->parallel.number_children + 1;
2665
2666         for_each_child(ce, child)
2667                 intel_context_get(child);
2668         intel_gt_pm_get(ce->engine->gt);
2669
2670         if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
2671                 err = intel_context_alloc_state(ce);
2672                 if (err)
2673                         goto err;
2674         }
2675         for_each_child(ce, child) {
2676                 if (!test_bit(CONTEXT_ALLOC_BIT, &child->flags)) {
2677                         err = intel_context_alloc_state(child);
2678                         if (err)
2679                                 goto err;
2680                 }
2681         }
2682
2683         /*
2684          * ABI: Before userspace accesses the GPU (e.g. execbuffer), report
2685          * EIO if the GPU is already wedged.
2686          */
2687         err = intel_gt_terminally_wedged(ce->engine->gt);
2688         if (err)
2689                 goto err;
2690
2691         if (!i915_vm_tryget(ce->vm)) {
2692                 err = -ENOENT;
2693                 goto err;
2694         }
2695
2696         eb->context = ce;
2697         eb->gt = ce->engine->gt;
2698
2699         /*
2700          * Make sure engine pool stays alive even if we call intel_context_put
2701          * during ww handling. The pool is destroyed when last pm reference
2702          * is dropped, which breaks our -EDEADLK handling.
2703          */
2704         return err;
2705
2706 err:
2707         intel_gt_pm_put(ce->engine->gt);
2708         for_each_child(ce, child)
2709                 intel_context_put(child);
2710         intel_context_put(ce);
2711         return err;
2712 }
2713
2714 static void
2715 eb_put_engine(struct i915_execbuffer *eb)
2716 {
2717         struct intel_context *child;
2718
2719         i915_vm_put(eb->context->vm);
2720         intel_gt_pm_put(eb->gt);
2721         for_each_child(eb->context, child)
2722                 intel_context_put(child);
2723         intel_context_put(eb->context);
2724 }
2725
2726 static void
2727 __free_fence_array(struct eb_fence *fences, unsigned int n)
2728 {
2729         while (n--) {
2730                 drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2));
2731                 dma_fence_put(fences[n].dma_fence);
2732                 dma_fence_chain_free(fences[n].chain_fence);
2733         }
2734         kvfree(fences);
2735 }
2736
2737 static int
2738 add_timeline_fence_array(struct i915_execbuffer *eb,
2739                          const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
2740 {
2741         struct drm_i915_gem_exec_fence __user *user_fences;
2742         u64 __user *user_values;
2743         struct eb_fence *f;
2744         u64 nfences;
2745         int err = 0;
2746
2747         nfences = timeline_fences->fence_count;
2748         if (!nfences)
2749                 return 0;
2750
2751         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2752         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2753         if (nfences > min_t(unsigned long,
2754                             ULONG_MAX / sizeof(*user_fences),
2755                             SIZE_MAX / sizeof(*f)) - eb->num_fences)
2756                 return -EINVAL;
2757
2758         user_fences = u64_to_user_ptr(timeline_fences->handles_ptr);
2759         if (!access_ok(user_fences, nfences * sizeof(*user_fences)))
2760                 return -EFAULT;
2761
2762         user_values = u64_to_user_ptr(timeline_fences->values_ptr);
2763         if (!access_ok(user_values, nfences * sizeof(*user_values)))
2764                 return -EFAULT;
2765
2766         f = krealloc(eb->fences,
2767                      (eb->num_fences + nfences) * sizeof(*f),
2768                      __GFP_NOWARN | GFP_KERNEL);
2769         if (!f)
2770                 return -ENOMEM;
2771
2772         eb->fences = f;
2773         f += eb->num_fences;
2774
2775         BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2776                      ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2777
2778         while (nfences--) {
2779                 struct drm_i915_gem_exec_fence user_fence;
2780                 struct drm_syncobj *syncobj;
2781                 struct dma_fence *fence = NULL;
2782                 u64 point;
2783
2784                 if (__copy_from_user(&user_fence,
2785                                      user_fences++,
2786                                      sizeof(user_fence)))
2787                         return -EFAULT;
2788
2789                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2790                         return -EINVAL;
2791
2792                 if (__get_user(point, user_values++))
2793                         return -EFAULT;
2794
2795                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2796                 if (!syncobj) {
2797                         DRM_DEBUG("Invalid syncobj handle provided\n");
2798                         return -ENOENT;
2799                 }
2800
2801                 fence = drm_syncobj_fence_get(syncobj);
2802
2803                 if (!fence && user_fence.flags &&
2804                     !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2805                         DRM_DEBUG("Syncobj handle has no fence\n");
2806                         drm_syncobj_put(syncobj);
2807                         return -EINVAL;
2808                 }
2809
2810                 if (fence)
2811                         err = dma_fence_chain_find_seqno(&fence, point);
2812
2813                 if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2814                         DRM_DEBUG("Syncobj handle missing requested point %llu\n", point);
2815                         dma_fence_put(fence);
2816                         drm_syncobj_put(syncobj);
2817                         return err;
2818                 }
2819
2820                 /*
2821                  * A point might have been signaled already and
2822                  * garbage collected from the timeline. In this case
2823                  * just ignore the point and carry on.
2824                  */
2825                 if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2826                         drm_syncobj_put(syncobj);
2827                         continue;
2828                 }
2829
2830                 /*
2831                  * For timeline syncobjs we need to preallocate chains for
2832                  * later signaling.
2833                  */
2834                 if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
2835                         /*
2836                          * Waiting and signaling the same point (when point !=
2837                          * 0) would break the timeline.
2838                          */
2839                         if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2840                                 DRM_DEBUG("Trying to wait & signal the same timeline point.\n");
2841                                 dma_fence_put(fence);
2842                                 drm_syncobj_put(syncobj);
2843                                 return -EINVAL;
2844                         }
2845
2846                         f->chain_fence = dma_fence_chain_alloc();
2847                         if (!f->chain_fence) {
2848                                 drm_syncobj_put(syncobj);
2849                                 dma_fence_put(fence);
2850                                 return -ENOMEM;
2851                         }
2852                 } else {
2853                         f->chain_fence = NULL;
2854                 }
2855
2856                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2857                 f->dma_fence = fence;
2858                 f->value = point;
2859                 f++;
2860                 eb->num_fences++;
2861         }
2862
2863         return 0;
2864 }
2865
2866 static int add_fence_array(struct i915_execbuffer *eb)
2867 {
2868         struct drm_i915_gem_execbuffer2 *args = eb->args;
2869         struct drm_i915_gem_exec_fence __user *user;
2870         unsigned long num_fences = args->num_cliprects;
2871         struct eb_fence *f;
2872
2873         if (!(args->flags & I915_EXEC_FENCE_ARRAY))
2874                 return 0;
2875
2876         if (!num_fences)
2877                 return 0;
2878
2879         /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2880         BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2881         if (num_fences > min_t(unsigned long,
2882                                ULONG_MAX / sizeof(*user),
2883                                SIZE_MAX / sizeof(*f) - eb->num_fences))
2884                 return -EINVAL;
2885
2886         user = u64_to_user_ptr(args->cliprects_ptr);
2887         if (!access_ok(user, num_fences * sizeof(*user)))
2888                 return -EFAULT;
2889
2890         f = krealloc(eb->fences,
2891                      (eb->num_fences + num_fences) * sizeof(*f),
2892                      __GFP_NOWARN | GFP_KERNEL);
2893         if (!f)
2894                 return -ENOMEM;
2895
2896         eb->fences = f;
2897         f += eb->num_fences;
2898         while (num_fences--) {
2899                 struct drm_i915_gem_exec_fence user_fence;
2900                 struct drm_syncobj *syncobj;
2901                 struct dma_fence *fence = NULL;
2902
2903                 if (__copy_from_user(&user_fence, user++, sizeof(user_fence)))
2904                         return -EFAULT;
2905
2906                 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2907                         return -EINVAL;
2908
2909                 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2910                 if (!syncobj) {
2911                         DRM_DEBUG("Invalid syncobj handle provided\n");
2912                         return -ENOENT;
2913                 }
2914
2915                 if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2916                         fence = drm_syncobj_fence_get(syncobj);
2917                         if (!fence) {
2918                                 DRM_DEBUG("Syncobj handle has no fence\n");
2919                                 drm_syncobj_put(syncobj);
2920                                 return -EINVAL;
2921                         }
2922                 }
2923
2924                 BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2925                              ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2926
2927                 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2928                 f->dma_fence = fence;
2929                 f->value = 0;
2930                 f->chain_fence = NULL;
2931                 f++;
2932                 eb->num_fences++;
2933         }
2934
2935         return 0;
2936 }
2937
2938 static void put_fence_array(struct eb_fence *fences, int num_fences)
2939 {
2940         if (fences)
2941                 __free_fence_array(fences, num_fences);
2942 }
2943
2944 static int
2945 await_fence_array(struct i915_execbuffer *eb,
2946                   struct i915_request *rq)
2947 {
2948         unsigned int n;
2949         int err;
2950
2951         for (n = 0; n < eb->num_fences; n++) {
2952                 struct drm_syncobj *syncobj;
2953                 unsigned int flags;
2954
2955                 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
2956
2957                 if (!eb->fences[n].dma_fence)
2958                         continue;
2959
2960                 err = i915_request_await_dma_fence(rq, eb->fences[n].dma_fence);
2961                 if (err < 0)
2962                         return err;
2963         }
2964
2965         return 0;
2966 }
2967
2968 static void signal_fence_array(const struct i915_execbuffer *eb,
2969                                struct dma_fence * const fence)
2970 {
2971         unsigned int n;
2972
2973         for (n = 0; n < eb->num_fences; n++) {
2974                 struct drm_syncobj *syncobj;
2975                 unsigned int flags;
2976
2977                 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
2978                 if (!(flags & I915_EXEC_FENCE_SIGNAL))
2979                         continue;
2980
2981                 if (eb->fences[n].chain_fence) {
2982                         drm_syncobj_add_point(syncobj,
2983                                               eb->fences[n].chain_fence,
2984                                               fence,
2985                                               eb->fences[n].value);
2986                         /*
2987                          * The chain's ownership is transferred to the
2988                          * timeline.
2989                          */
2990                         eb->fences[n].chain_fence = NULL;
2991                 } else {
2992                         drm_syncobj_replace_fence(syncobj, fence);
2993                 }
2994         }
2995 }
2996
2997 static int
2998 parse_timeline_fences(struct i915_user_extension __user *ext, void *data)
2999 {
3000         struct i915_execbuffer *eb = data;
3001         struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences;
3002
3003         if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences)))
3004                 return -EFAULT;
3005
3006         return add_timeline_fence_array(eb, &timeline_fences);
3007 }
3008
3009 static void retire_requests(struct intel_timeline *tl, struct i915_request *end)
3010 {
3011         struct i915_request *rq, *rn;
3012
3013         list_for_each_entry_safe(rq, rn, &tl->requests, link)
3014                 if (rq == end || !i915_request_retire(rq))
3015                         break;
3016 }
3017
3018 static int eb_request_add(struct i915_execbuffer *eb, struct i915_request *rq,
3019                           int err, bool last_parallel)
3020 {
3021         struct intel_timeline * const tl = i915_request_timeline(rq);
3022         struct i915_sched_attr attr = {};
3023         struct i915_request *prev;
3024
3025         lockdep_assert_held(&tl->mutex);
3026         lockdep_unpin_lock(&tl->mutex, rq->cookie);
3027
3028         trace_i915_request_add(rq);
3029
3030         prev = __i915_request_commit(rq);
3031
3032         /* Check that the context wasn't destroyed before submission */
3033         if (likely(!intel_context_is_closed(eb->context))) {
3034                 attr = eb->gem_context->sched;
3035         } else {
3036                 /* Serialise with context_close via the add_to_timeline */
3037                 i915_request_set_error_once(rq, -ENOENT);
3038                 __i915_request_skip(rq);
3039                 err = -ENOENT; /* override any transient errors */
3040         }
3041
3042         if (intel_context_is_parallel(eb->context)) {
3043                 if (err) {
3044                         __i915_request_skip(rq);
3045                         set_bit(I915_FENCE_FLAG_SKIP_PARALLEL,
3046                                 &rq->fence.flags);
3047                 }
3048                 if (last_parallel)
3049                         set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,
3050                                 &rq->fence.flags);
3051         }
3052
3053         __i915_request_queue(rq, &attr);
3054
3055         /* Try to clean up the client's timeline after submitting the request */
3056         if (prev)
3057                 retire_requests(tl, prev);
3058
3059         mutex_unlock(&tl->mutex);
3060
3061         return err;
3062 }
3063
3064 static int eb_requests_add(struct i915_execbuffer *eb, int err)
3065 {
3066         int i;
3067
3068         /*
3069          * We iterate in reverse order of creation to release timeline mutexes in
3070          * same order.
3071          */
3072         for_each_batch_add_order(eb, i) {
3073                 struct i915_request *rq = eb->requests[i];
3074
3075                 if (!rq)
3076                         continue;
3077                 err |= eb_request_add(eb, rq, err, i == 0);
3078         }
3079
3080         return err;
3081 }
3082
3083 static const i915_user_extension_fn execbuf_extensions[] = {
3084         [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences,
3085 };
3086
3087 static int
3088 parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args,
3089                           struct i915_execbuffer *eb)
3090 {
3091         if (!(args->flags & I915_EXEC_USE_EXTENSIONS))
3092                 return 0;
3093
3094         /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot
3095          * have another flag also using it at the same time.
3096          */
3097         if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
3098                 return -EINVAL;
3099
3100         if (args->num_cliprects != 0)
3101                 return -EINVAL;
3102
3103         return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr),
3104                                     execbuf_extensions,
3105                                     ARRAY_SIZE(execbuf_extensions),
3106                                     eb);
3107 }
3108
3109 static void eb_requests_get(struct i915_execbuffer *eb)
3110 {
3111         unsigned int i;
3112
3113         for_each_batch_create_order(eb, i) {
3114                 if (!eb->requests[i])
3115                         break;
3116
3117                 i915_request_get(eb->requests[i]);
3118         }
3119 }
3120
3121 static void eb_requests_put(struct i915_execbuffer *eb)
3122 {
3123         unsigned int i;
3124
3125         for_each_batch_create_order(eb, i) {
3126                 if (!eb->requests[i])
3127                         break;
3128
3129                 i915_request_put(eb->requests[i]);
3130         }
3131 }
3132
3133 static struct sync_file *
3134 eb_composite_fence_create(struct i915_execbuffer *eb, int out_fence_fd)
3135 {
3136         struct sync_file *out_fence = NULL;
3137         struct dma_fence_array *fence_array;
3138         struct dma_fence **fences;
3139         unsigned int i;
3140
3141         GEM_BUG_ON(!intel_context_is_parent(eb->context));
3142
3143         fences = kmalloc_array(eb->num_batches, sizeof(*fences), GFP_KERNEL);
3144         if (!fences)
3145                 return ERR_PTR(-ENOMEM);
3146
3147         for_each_batch_create_order(eb, i) {
3148                 fences[i] = &eb->requests[i]->fence;
3149                 __set_bit(I915_FENCE_FLAG_COMPOSITE,
3150                           &eb->requests[i]->fence.flags);
3151         }
3152
3153         fence_array = dma_fence_array_create(eb->num_batches,
3154                                              fences,
3155                                              eb->context->parallel.fence_context,
3156                                              eb->context->parallel.seqno++,
3157                                              false);
3158         if (!fence_array) {
3159                 kfree(fences);
3160                 return ERR_PTR(-ENOMEM);
3161         }
3162
3163         /* Move ownership to the dma_fence_array created above */
3164         for_each_batch_create_order(eb, i)
3165                 dma_fence_get(fences[i]);
3166
3167         if (out_fence_fd != -1) {
3168                 out_fence = sync_file_create(&fence_array->base);
3169                 /* sync_file now owns fence_arry, drop creation ref */
3170                 dma_fence_put(&fence_array->base);
3171                 if (!out_fence)
3172                         return ERR_PTR(-ENOMEM);
3173         }
3174
3175         eb->composite_fence = &fence_array->base;
3176
3177         return out_fence;
3178 }
3179
3180 static struct sync_file *
3181 eb_fences_add(struct i915_execbuffer *eb, struct i915_request *rq,
3182               struct dma_fence *in_fence, int out_fence_fd)
3183 {
3184         struct sync_file *out_fence = NULL;
3185         int err;
3186
3187         if (unlikely(eb->gem_context->syncobj)) {
3188                 struct dma_fence *fence;
3189
3190                 fence = drm_syncobj_fence_get(eb->gem_context->syncobj);
3191                 err = i915_request_await_dma_fence(rq, fence);
3192                 dma_fence_put(fence);
3193                 if (err)
3194                         return ERR_PTR(err);
3195         }
3196
3197         if (in_fence) {
3198                 if (eb->args->flags & I915_EXEC_FENCE_SUBMIT)
3199                         err = i915_request_await_execution(rq, in_fence);
3200                 else
3201                         err = i915_request_await_dma_fence(rq, in_fence);
3202                 if (err < 0)
3203                         return ERR_PTR(err);
3204         }
3205
3206         if (eb->fences) {
3207                 err = await_fence_array(eb, rq);
3208                 if (err)
3209                         return ERR_PTR(err);
3210         }
3211
3212         if (intel_context_is_parallel(eb->context)) {
3213                 out_fence = eb_composite_fence_create(eb, out_fence_fd);
3214                 if (IS_ERR(out_fence))
3215                         return ERR_PTR(-ENOMEM);
3216         } else if (out_fence_fd != -1) {
3217                 out_fence = sync_file_create(&rq->fence);
3218                 if (!out_fence)
3219                         return ERR_PTR(-ENOMEM);
3220         }
3221
3222         return out_fence;
3223 }
3224
3225 static struct intel_context *
3226 eb_find_context(struct i915_execbuffer *eb, unsigned int context_number)
3227 {
3228         struct intel_context *child;
3229
3230         if (likely(context_number == 0))
3231                 return eb->context;
3232
3233         for_each_child(eb->context, child)
3234                 if (!--context_number)
3235                         return child;
3236
3237         GEM_BUG_ON("Context not found");
3238
3239         return NULL;
3240 }
3241
3242 static struct sync_file *
3243 eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence,
3244                    int out_fence_fd)
3245 {
3246         struct sync_file *out_fence = NULL;
3247         unsigned int i;
3248
3249         for_each_batch_create_order(eb, i) {
3250                 /* Allocate a request for this batch buffer nice and early. */
3251                 eb->requests[i] = i915_request_create(eb_find_context(eb, i));
3252                 if (IS_ERR(eb->requests[i])) {
3253                         out_fence = ERR_CAST(eb->requests[i]);
3254                         eb->requests[i] = NULL;
3255                         return out_fence;
3256                 }
3257
3258                 /*
3259                  * Only the first request added (committed to backend) has to
3260                  * take the in fences into account as all subsequent requests
3261                  * will have fences inserted inbetween them.
3262                  */
3263                 if (i + 1 == eb->num_batches) {
3264                         out_fence = eb_fences_add(eb, eb->requests[i],
3265                                                   in_fence, out_fence_fd);
3266                         if (IS_ERR(out_fence))
3267                                 return out_fence;
3268                 }
3269
3270                 /*
3271                  * Not really on stack, but we don't want to call
3272                  * kfree on the batch_snapshot when we put it, so use the
3273                  * _onstack interface.
3274                  */
3275                 if (eb->batches[i]->vma)
3276                         eb->requests[i]->batch_res =
3277                                 i915_vma_resource_get(eb->batches[i]->vma->resource);
3278                 if (eb->batch_pool) {
3279                         GEM_BUG_ON(intel_context_is_parallel(eb->context));
3280                         intel_gt_buffer_pool_mark_active(eb->batch_pool,
3281                                                          eb->requests[i]);
3282                 }
3283         }
3284
3285         return out_fence;
3286 }
3287
3288 static int
3289 i915_gem_do_execbuffer(struct drm_device *dev,
3290                        struct drm_file *file,
3291                        struct drm_i915_gem_execbuffer2 *args,
3292                        struct drm_i915_gem_exec_object2 *exec)
3293 {
3294         struct drm_i915_private *i915 = to_i915(dev);
3295         struct i915_execbuffer eb;
3296         struct dma_fence *in_fence = NULL;
3297         struct sync_file *out_fence = NULL;
3298         int out_fence_fd = -1;
3299         int err;
3300
3301         BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
3302         BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS &
3303                      ~__EXEC_OBJECT_UNKNOWN_FLAGS);
3304
3305         eb.i915 = i915;
3306         eb.file = file;
3307         eb.args = args;
3308         if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC))
3309                 args->flags |= __EXEC_HAS_RELOC;
3310
3311         eb.exec = exec;
3312         eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1);
3313         eb.vma[0].vma = NULL;
3314         eb.batch_pool = NULL;
3315
3316         eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS;
3317         reloc_cache_init(&eb.reloc_cache, eb.i915);
3318
3319         eb.buffer_count = args->buffer_count;
3320         eb.batch_start_offset = args->batch_start_offset;
3321         eb.trampoline = NULL;
3322
3323         eb.fences = NULL;
3324         eb.num_fences = 0;
3325
3326         eb_capture_list_clear(&eb);
3327
3328         memset(eb.requests, 0, sizeof(struct i915_request *) *
3329                ARRAY_SIZE(eb.requests));
3330         eb.composite_fence = NULL;
3331
3332         eb.batch_flags = 0;
3333         if (args->flags & I915_EXEC_SECURE) {
3334                 if (GRAPHICS_VER(i915) >= 11)
3335                         return -ENODEV;
3336
3337                 /* Return -EPERM to trigger fallback code on old binaries. */
3338                 if (!HAS_SECURE_BATCHES(i915))
3339                         return -EPERM;
3340
3341                 if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN))
3342                         return -EPERM;
3343
3344                 eb.batch_flags |= I915_DISPATCH_SECURE;
3345         }
3346         if (args->flags & I915_EXEC_IS_PINNED)
3347                 eb.batch_flags |= I915_DISPATCH_PINNED;
3348
3349         err = parse_execbuf2_extensions(args, &eb);
3350         if (err)
3351                 goto err_ext;
3352
3353         err = add_fence_array(&eb);
3354         if (err)
3355                 goto err_ext;
3356
3357 #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT)
3358         if (args->flags & IN_FENCES) {
3359                 if ((args->flags & IN_FENCES) == IN_FENCES)
3360                         return -EINVAL;
3361
3362                 in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
3363                 if (!in_fence) {
3364                         err = -EINVAL;
3365                         goto err_ext;
3366                 }
3367         }
3368 #undef IN_FENCES
3369
3370         if (args->flags & I915_EXEC_FENCE_OUT) {
3371                 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
3372                 if (out_fence_fd < 0) {
3373                         err = out_fence_fd;
3374                         goto err_in_fence;
3375                 }
3376         }
3377
3378         err = eb_create(&eb);
3379         if (err)
3380                 goto err_out_fence;
3381
3382         GEM_BUG_ON(!eb.lut_size);
3383
3384         err = eb_select_context(&eb);
3385         if (unlikely(err))
3386                 goto err_destroy;
3387
3388         err = eb_select_engine(&eb);
3389         if (unlikely(err))
3390                 goto err_context;
3391
3392         err = eb_lookup_vmas(&eb);
3393         if (err) {
3394                 eb_release_vmas(&eb, true);
3395                 goto err_engine;
3396         }
3397
3398         i915_gem_ww_ctx_init(&eb.ww, true);
3399
3400         err = eb_relocate_parse(&eb);
3401         if (err) {
3402                 /*
3403                  * If the user expects the execobject.offset and
3404                  * reloc.presumed_offset to be an exact match,
3405                  * as for using NO_RELOC, then we cannot update
3406                  * the execobject.offset until we have completed
3407                  * relocation.
3408                  */
3409                 args->flags &= ~__EXEC_HAS_RELOC;
3410                 goto err_vma;
3411         }
3412
3413         ww_acquire_done(&eb.ww.ctx);
3414         eb_capture_stage(&eb);
3415
3416         out_fence = eb_requests_create(&eb, in_fence, out_fence_fd);
3417         if (IS_ERR(out_fence)) {
3418                 err = PTR_ERR(out_fence);
3419                 out_fence = NULL;
3420                 if (eb.requests[0])
3421                         goto err_request;
3422                 else
3423                         goto err_vma;
3424         }
3425
3426         err = eb_submit(&eb);
3427
3428 err_request:
3429         eb_requests_get(&eb);
3430         err = eb_requests_add(&eb, err);
3431
3432         if (eb.fences)
3433                 signal_fence_array(&eb, eb.composite_fence ?
3434                                    eb.composite_fence :
3435                                    &eb.requests[0]->fence);
3436
3437         if (out_fence) {
3438                 if (err == 0) {
3439                         fd_install(out_fence_fd, out_fence->file);
3440                         args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */
3441                         args->rsvd2 |= (u64)out_fence_fd << 32;
3442                         out_fence_fd = -1;
3443                 } else {
3444                         fput(out_fence->file);
3445                 }
3446         }
3447
3448         if (unlikely(eb.gem_context->syncobj)) {
3449                 drm_syncobj_replace_fence(eb.gem_context->syncobj,
3450                                           eb.composite_fence ?
3451                                           eb.composite_fence :
3452                                           &eb.requests[0]->fence);
3453         }
3454
3455         if (!out_fence && eb.composite_fence)
3456                 dma_fence_put(eb.composite_fence);
3457
3458         eb_requests_put(&eb);
3459
3460 err_vma:
3461         eb_release_vmas(&eb, true);
3462         WARN_ON(err == -EDEADLK);
3463         i915_gem_ww_ctx_fini(&eb.ww);
3464
3465         if (eb.batch_pool)
3466                 intel_gt_buffer_pool_put(eb.batch_pool);
3467 err_engine:
3468         eb_put_engine(&eb);
3469 err_context:
3470         i915_gem_context_put(eb.gem_context);
3471 err_destroy:
3472         eb_destroy(&eb);
3473 err_out_fence:
3474         if (out_fence_fd != -1)
3475                 put_unused_fd(out_fence_fd);
3476 err_in_fence:
3477         dma_fence_put(in_fence);
3478 err_ext:
3479         put_fence_array(eb.fences, eb.num_fences);
3480         return err;
3481 }
3482
3483 static size_t eb_element_size(void)
3484 {
3485         return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma);
3486 }
3487
3488 static bool check_buffer_count(size_t count)
3489 {
3490         const size_t sz = eb_element_size();
3491
3492         /*
3493          * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup
3494          * array size (see eb_create()). Otherwise, we can accept an array as
3495          * large as can be addressed (though use large arrays at your peril)!
3496          */
3497
3498         return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1);
3499 }
3500
3501 int
3502 i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
3503                            struct drm_file *file)
3504 {
3505         struct drm_i915_private *i915 = to_i915(dev);
3506         struct drm_i915_gem_execbuffer2 *args = data;
3507         struct drm_i915_gem_exec_object2 *exec2_list;
3508         const size_t count = args->buffer_count;
3509         int err;
3510
3511         if (!check_buffer_count(count)) {
3512                 drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count);
3513                 return -EINVAL;
3514         }
3515
3516         err = i915_gem_check_execbuffer(args);
3517         if (err)
3518                 return err;
3519
3520         /* Allocate extra slots for use by the command parser */
3521         exec2_list = kvmalloc_array(count + 2, eb_element_size(),
3522                                     __GFP_NOWARN | GFP_KERNEL);
3523         if (exec2_list == NULL) {
3524                 drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n",
3525                         count);
3526                 return -ENOMEM;
3527         }
3528         if (copy_from_user(exec2_list,
3529                            u64_to_user_ptr(args->buffers_ptr),
3530                            sizeof(*exec2_list) * count)) {
3531                 drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count);
3532                 kvfree(exec2_list);
3533                 return -EFAULT;
3534         }
3535
3536         err = i915_gem_do_execbuffer(dev, file, args, exec2_list);
3537
3538         /*
3539          * Now that we have begun execution of the batchbuffer, we ignore
3540          * any new error after this point. Also given that we have already
3541          * updated the associated relocations, we try to write out the current
3542          * object locations irrespective of any error.
3543          */
3544         if (args->flags & __EXEC_HAS_RELOC) {
3545                 struct drm_i915_gem_exec_object2 __user *user_exec_list =
3546                         u64_to_user_ptr(args->buffers_ptr);
3547                 unsigned int i;
3548
3549                 /* Copy the new buffer offsets back to the user's exec list. */
3550                 /*
3551                  * Note: count * sizeof(*user_exec_list) does not overflow,
3552                  * because we checked 'count' in check_buffer_count().
3553                  *
3554                  * And this range already got effectively checked earlier
3555                  * when we did the "copy_from_user()" above.
3556                  */
3557                 if (!user_write_access_begin(user_exec_list,
3558                                              count * sizeof(*user_exec_list)))
3559                         goto end;
3560
3561                 for (i = 0; i < args->buffer_count; i++) {
3562                         if (!(exec2_list[i].offset & UPDATE))
3563                                 continue;
3564
3565                         exec2_list[i].offset =
3566                                 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK);
3567                         unsafe_put_user(exec2_list[i].offset,
3568                                         &user_exec_list[i].offset,
3569                                         end_user);
3570                 }
3571 end_user:
3572                 user_write_access_end();
3573 end:;
3574         }
3575
3576         args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS;
3577         kvfree(exec2_list);
3578         return err;
3579 }