2 * SPDX-License-Identifier: MIT
4 * Copyright © 2008,2010 Intel Corporation
7 #include <linux/dma-resv.h>
8 #include <linux/highmem.h>
9 #include <linux/sync_file.h>
10 #include <linux/uaccess.h>
12 #include <drm/drm_syncobj.h>
14 #include "display/intel_frontbuffer.h"
16 #include "gem/i915_gem_ioctls.h"
17 #include "gt/intel_context.h"
18 #include "gt/intel_gpu_commands.h"
19 #include "gt/intel_gt.h"
20 #include "gt/intel_gt_buffer_pool.h"
21 #include "gt/intel_gt_pm.h"
22 #include "gt/intel_ring.h"
24 #include "pxp/intel_pxp.h"
26 #include "i915_cmd_parser.h"
28 #include "i915_file_private.h"
29 #include "i915_gem_clflush.h"
30 #include "i915_gem_context.h"
31 #include "i915_gem_evict.h"
32 #include "i915_gem_ioctls.h"
34 #include "i915_trace.h"
35 #include "i915_user_extensions.h"
41 /** This vma's place in the execbuf reservation list */
42 struct drm_i915_gem_exec_object2 *exec;
43 struct list_head bind_link;
44 struct list_head reloc_link;
46 struct hlist_node node;
54 #define DBG_FORCE_RELOC 0 /* choose one of the above! */
57 /* __EXEC_OBJECT_ flags > BIT(29) defined in i915_vma.h */
58 #define __EXEC_OBJECT_HAS_PIN BIT(29)
59 #define __EXEC_OBJECT_HAS_FENCE BIT(28)
60 #define __EXEC_OBJECT_USERPTR_INIT BIT(27)
61 #define __EXEC_OBJECT_NEEDS_MAP BIT(26)
62 #define __EXEC_OBJECT_NEEDS_BIAS BIT(25)
63 #define __EXEC_OBJECT_INTERNAL_FLAGS (~0u << 25) /* all of the above + */
64 #define __EXEC_OBJECT_RESERVED (__EXEC_OBJECT_HAS_PIN | __EXEC_OBJECT_HAS_FENCE)
66 #define __EXEC_HAS_RELOC BIT(31)
67 #define __EXEC_ENGINE_PINNED BIT(30)
68 #define __EXEC_USERPTR_USED BIT(29)
69 #define __EXEC_INTERNAL_FLAGS (~0u << 29)
70 #define UPDATE PIN_OFFSET_FIXED
72 #define BATCH_OFFSET_BIAS (256*1024)
74 #define __I915_EXEC_ILLEGAL_FLAGS \
75 (__I915_EXEC_UNKNOWN_FLAGS | \
76 I915_EXEC_CONSTANTS_MASK | \
77 I915_EXEC_RESOURCE_STREAMER)
79 /* Catch emission of unexpected errors for CI! */
80 #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
83 DRM_DEBUG_DRIVER("EINVAL at %s:%d\n", __func__, __LINE__); \
89 * DOC: User command execution
91 * Userspace submits commands to be executed on the GPU as an instruction
92 * stream within a GEM object we call a batchbuffer. This instructions may
93 * refer to other GEM objects containing auxiliary state such as kernels,
94 * samplers, render targets and even secondary batchbuffers. Userspace does
95 * not know where in the GPU memory these objects reside and so before the
96 * batchbuffer is passed to the GPU for execution, those addresses in the
97 * batchbuffer and auxiliary objects are updated. This is known as relocation,
98 * or patching. To try and avoid having to relocate each object on the next
99 * execution, userspace is told the location of those objects in this pass,
100 * but this remains just a hint as the kernel may choose a new location for
101 * any object in the future.
103 * At the level of talking to the hardware, submitting a batchbuffer for the
104 * GPU to execute is to add content to a buffer from which the HW
105 * command streamer is reading.
107 * 1. Add a command to load the HW context. For Logical Ring Contexts, i.e.
108 * Execlists, this command is not placed on the same buffer as the
111 * 2. Add a command to invalidate caches to the buffer.
113 * 3. Add a batchbuffer start command to the buffer; the start command is
114 * essentially a token together with the GPU address of the batchbuffer
117 * 4. Add a pipeline flush to the buffer.
119 * 5. Add a memory write command to the buffer to record when the GPU
120 * is done executing the batchbuffer. The memory write writes the
121 * global sequence number of the request, ``i915_request::global_seqno``;
122 * the i915 driver uses the current value in the register to determine
123 * if the GPU has completed the batchbuffer.
125 * 6. Add a user interrupt command to the buffer. This command instructs
126 * the GPU to issue an interrupt when the command, pipeline flush and
127 * memory write are completed.
129 * 7. Inform the hardware of the additional commands added to the buffer
130 * (by updating the tail pointer).
132 * Processing an execbuf ioctl is conceptually split up into a few phases.
134 * 1. Validation - Ensure all the pointers, handles and flags are valid.
135 * 2. Reservation - Assign GPU address space for every object
136 * 3. Relocation - Update any addresses to point to the final locations
137 * 4. Serialisation - Order the request with respect to its dependencies
138 * 5. Construction - Construct a request to execute the batchbuffer
139 * 6. Submission (at some point in the future execution)
141 * Reserving resources for the execbuf is the most complicated phase. We
142 * neither want to have to migrate the object in the address space, nor do
143 * we want to have to update any relocations pointing to this object. Ideally,
144 * we want to leave the object where it is and for all the existing relocations
145 * to match. If the object is given a new address, or if userspace thinks the
146 * object is elsewhere, we have to parse all the relocation entries and update
147 * the addresses. Userspace can set the I915_EXEC_NORELOC flag to hint that
148 * all the target addresses in all of its objects match the value in the
149 * relocation entries and that they all match the presumed offsets given by the
150 * list of execbuffer objects. Using this knowledge, we know that if we haven't
151 * moved any buffers, all the relocation entries are valid and we can skip
152 * the update. (If userspace is wrong, the likely outcome is an impromptu GPU
153 * hang.) The requirement for using I915_EXEC_NO_RELOC are:
155 * The addresses written in the objects must match the corresponding
156 * reloc.presumed_offset which in turn must match the corresponding
159 * Any render targets written to in the batch must be flagged with
162 * To avoid stalling, execobject.offset should match the current
163 * address of that object within the active context.
165 * The reservation is done is multiple phases. First we try and keep any
166 * object already bound in its current location - so as long as meets the
167 * constraints imposed by the new execbuffer. Any object left unbound after the
168 * first pass is then fitted into any available idle space. If an object does
169 * not fit, all objects are removed from the reservation and the process rerun
170 * after sorting the objects into a priority order (more difficult to fit
171 * objects are tried first). Failing that, the entire VM is cleared and we try
172 * to fit the execbuf once last time before concluding that it simply will not
175 * A small complication to all of this is that we allow userspace not only to
176 * specify an alignment and a size for the object in the address space, but
177 * we also allow userspace to specify the exact offset. This objects are
178 * simpler to place (the location is known a priori) all we have to do is make
179 * sure the space is available.
181 * Once all the objects are in place, patching up the buried pointers to point
182 * to the final locations is a fairly simple job of walking over the relocation
183 * entry arrays, looking up the right address and rewriting the value into
184 * the object. Simple! ... The relocation entries are stored in user memory
185 * and so to access them we have to copy them into a local buffer. That copy
186 * has to avoid taking any pagefaults as they may lead back to a GEM object
187 * requiring the struct_mutex (i.e. recursive deadlock). So once again we split
188 * the relocation into multiple passes. First we try to do everything within an
189 * atomic context (avoid the pagefaults) which requires that we never wait. If
190 * we detect that we may wait, or if we need to fault, then we have to fallback
191 * to a slower path. The slowpath has to drop the mutex. (Can you hear alarm
192 * bells yet?) Dropping the mutex means that we lose all the state we have
193 * built up so far for the execbuf and we must reset any global data. However,
194 * we do leave the objects pinned in their final locations - which is a
195 * potential issue for concurrent execbufs. Once we have left the mutex, we can
196 * allocate and copy all the relocation entries into a large array at our
197 * leisure, reacquire the mutex, reclaim all the objects and other state and
198 * then proceed to update any incorrect addresses with the objects.
200 * As we process the relocation entries, we maintain a record of whether the
201 * object is being written to. Using NORELOC, we expect userspace to provide
202 * this information instead. We also check whether we can skip the relocation
203 * by comparing the expected value inside the relocation entry with the target's
204 * final address. If they differ, we have to map the current object and rewrite
205 * the 4 or 8 byte pointer within.
207 * Serialising an execbuf is quite simple according to the rules of the GEM
208 * ABI. Execution within each context is ordered by the order of submission.
209 * Writes to any GEM object are in order of submission and are exclusive. Reads
210 * from a GEM object are unordered with respect to other reads, but ordered by
211 * writes. A write submitted after a read cannot occur before the read, and
212 * similarly any read submitted after a write cannot occur before the write.
213 * Writes are ordered between engines such that only one write occurs at any
214 * time (completing any reads beforehand) - using semaphores where available
215 * and CPU serialisation otherwise. Other GEM access obey the same rules, any
216 * write (either via mmaps using set-domain, or via pwrite) must flush all GPU
217 * reads before starting, and any read (either using set-domain or pread) must
218 * flush all GPU writes before starting. (Note we only employ a barrier before,
219 * we currently rely on userspace not concurrently starting a new execution
220 * whilst reading or writing to an object. This may be an advantage or not
221 * depending on how much you trust userspace not to shoot themselves in the
222 * foot.) Serialisation may just result in the request being inserted into
223 * a DAG awaiting its turn, but most simple is to wait on the CPU until
224 * all dependencies are resolved.
226 * After all of that, is just a matter of closing the request and handing it to
227 * the hardware (well, leaving it in a queue to be executed). However, we also
228 * offer the ability for batchbuffers to be run with elevated privileges so
229 * that they access otherwise hidden registers. (Used to adjust L3 cache etc.)
230 * Before any batch is given extra privileges we first must check that it
231 * contains no nefarious instructions, we check that each instruction is from
232 * our whitelist and all registers are also from an allowed list. We first
233 * copy the user's batchbuffer to a shadow (so that the user doesn't have
234 * access to it, either by the CPU or GPU as we scan it) and then parse each
235 * instruction. If everything is ok, we set a flag telling the hardware to run
236 * the batchbuffer in trusted mode, otherwise the ioctl is rejected.
240 struct drm_syncobj *syncobj; /* Use with ptr_mask_bits() */
241 struct dma_fence *dma_fence;
243 struct dma_fence_chain *chain_fence;
246 struct i915_execbuffer {
247 struct drm_i915_private *i915; /** i915 backpointer */
248 struct drm_file *file; /** per-file lookup tables and limits */
249 struct drm_i915_gem_execbuffer2 *args; /** ioctl parameters */
250 struct drm_i915_gem_exec_object2 *exec; /** ioctl execobj[] */
253 struct intel_gt *gt; /* gt for the execbuf */
254 struct intel_context *context; /* logical state for the request */
255 struct i915_gem_context *gem_context; /** caller's context */
257 /** our requests to build */
258 struct i915_request *requests[MAX_ENGINE_INSTANCE + 1];
259 /** identity of the batch obj/vma */
260 struct eb_vma *batches[MAX_ENGINE_INSTANCE + 1];
261 struct i915_vma *trampoline; /** trampoline used for chaining */
263 /** used for excl fence in dma_resv objects when > 1 BB submitted */
264 struct dma_fence *composite_fence;
266 /** actual size of execobj[] as we may extend it for the cmdparser */
267 unsigned int buffer_count;
269 /* number of batches in execbuf IOCTL */
270 unsigned int num_batches;
272 /** list of vma not yet bound during reservation phase */
273 struct list_head unbound;
275 /** list of vma that have execobj.relocation_count */
276 struct list_head relocs;
278 struct i915_gem_ww_ctx ww;
281 * Track the most recently used object for relocations, as we
282 * frequently have to perform multiple relocations within the same
286 struct drm_mm_node node; /** temporary GTT binding */
287 unsigned long vaddr; /** Current kmap address */
288 unsigned long page; /** Currently mapped page index */
289 unsigned int graphics_ver; /** Cached value of GRAPHICS_VER */
290 bool use_64bit_reloc : 1;
293 bool needs_unfenced : 1;
296 u64 invalid_flags; /** Set of execobj.flags that are invalid */
298 /** Length of batch within object */
299 u64 batch_len[MAX_ENGINE_INSTANCE + 1];
300 u32 batch_start_offset; /** Location within object of batch */
301 u32 batch_flags; /** Flags composed for emit_bb_start() */
302 struct intel_gt_buffer_pool_node *batch_pool; /** pool node for batch buffer */
305 * Indicate either the size of the hastable used to resolve
306 * relocation handles, or if negative that we are using a direct
307 * index into the execobj[].
310 struct hlist_head *buckets; /** ht for relocation handles */
312 struct eb_fence *fences;
313 unsigned long num_fences;
314 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
315 struct i915_capture_list *capture_lists[MAX_ENGINE_INSTANCE + 1];
319 static int eb_parse(struct i915_execbuffer *eb);
320 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle);
321 static void eb_unpin_engine(struct i915_execbuffer *eb);
322 static void eb_capture_release(struct i915_execbuffer *eb);
324 static inline bool eb_use_cmdparser(const struct i915_execbuffer *eb)
326 return intel_engine_requires_cmd_parser(eb->context->engine) ||
327 (intel_engine_using_cmd_parser(eb->context->engine) &&
328 eb->args->batch_len);
331 static int eb_create(struct i915_execbuffer *eb)
333 if (!(eb->args->flags & I915_EXEC_HANDLE_LUT)) {
334 unsigned int size = 1 + ilog2(eb->buffer_count);
337 * Without a 1:1 association between relocation handles and
338 * the execobject[] index, we instead create a hashtable.
339 * We size it dynamically based on available memory, starting
340 * first with 1:1 assocative hash and scaling back until
341 * the allocation succeeds.
343 * Later on we use a positive lut_size to indicate we are
344 * using this hashtable, and a negative value to indicate a
350 /* While we can still reduce the allocation size, don't
351 * raise a warning and allow the allocation to fail.
352 * On the last pass though, we want to try as hard
353 * as possible to perform the allocation and warn
358 flags |= __GFP_NORETRY | __GFP_NOWARN;
360 eb->buckets = kzalloc(sizeof(struct hlist_head) << size,
371 eb->lut_size = -eb->buffer_count;
378 eb_vma_misplaced(const struct drm_i915_gem_exec_object2 *entry,
379 const struct i915_vma *vma,
382 if (vma->node.size < entry->pad_to_size)
385 if (entry->alignment && !IS_ALIGNED(vma->node.start, entry->alignment))
388 if (flags & EXEC_OBJECT_PINNED &&
389 vma->node.start != entry->offset)
392 if (flags & __EXEC_OBJECT_NEEDS_BIAS &&
393 vma->node.start < BATCH_OFFSET_BIAS)
396 if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS) &&
397 (vma->node.start + vma->node.size + 4095) >> 32)
400 if (flags & __EXEC_OBJECT_NEEDS_MAP &&
401 !i915_vma_is_map_and_fenceable(vma))
407 static u64 eb_pin_flags(const struct drm_i915_gem_exec_object2 *entry,
408 unsigned int exec_flags)
412 if (exec_flags & EXEC_OBJECT_NEEDS_GTT)
413 pin_flags |= PIN_GLOBAL;
416 * Wa32bitGeneralStateOffset & Wa32bitInstructionBaseOffset,
417 * limit address to the first 4GBs for unflagged objects.
419 if (!(exec_flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
420 pin_flags |= PIN_ZONE_4G;
422 if (exec_flags & __EXEC_OBJECT_NEEDS_MAP)
423 pin_flags |= PIN_MAPPABLE;
425 if (exec_flags & EXEC_OBJECT_PINNED)
426 pin_flags |= entry->offset | PIN_OFFSET_FIXED;
427 else if (exec_flags & __EXEC_OBJECT_NEEDS_BIAS)
428 pin_flags |= BATCH_OFFSET_BIAS | PIN_OFFSET_BIAS;
434 eb_pin_vma(struct i915_execbuffer *eb,
435 const struct drm_i915_gem_exec_object2 *entry,
438 struct i915_vma *vma = ev->vma;
443 pin_flags = vma->node.start;
445 pin_flags = entry->offset & PIN_OFFSET_MASK;
447 pin_flags |= PIN_USER | PIN_NOEVICT | PIN_OFFSET_FIXED | PIN_VALIDATE;
448 if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_GTT))
449 pin_flags |= PIN_GLOBAL;
451 /* Attempt to reuse the current location if available */
452 err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, pin_flags);
457 if (entry->flags & EXEC_OBJECT_PINNED)
460 /* Failing that pick any _free_ space if suitable */
461 err = i915_vma_pin_ww(vma, &eb->ww,
464 eb_pin_flags(entry, ev->flags) |
465 PIN_USER | PIN_NOEVICT | PIN_VALIDATE);
470 if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
471 err = i915_vma_pin_fence(vma);
476 ev->flags |= __EXEC_OBJECT_HAS_FENCE;
479 ev->flags |= __EXEC_OBJECT_HAS_PIN;
480 if (eb_vma_misplaced(entry, vma, ev->flags))
487 eb_unreserve_vma(struct eb_vma *ev)
489 if (unlikely(ev->flags & __EXEC_OBJECT_HAS_FENCE))
490 __i915_vma_unpin_fence(ev->vma);
492 ev->flags &= ~__EXEC_OBJECT_RESERVED;
496 eb_validate_vma(struct i915_execbuffer *eb,
497 struct drm_i915_gem_exec_object2 *entry,
498 struct i915_vma *vma)
500 /* Relocations are disallowed for all platforms after TGL-LP. This
501 * also covers all platforms with local memory.
503 if (entry->relocation_count &&
504 GRAPHICS_VER(eb->i915) >= 12 && !IS_TIGERLAKE(eb->i915))
507 if (unlikely(entry->flags & eb->invalid_flags))
510 if (unlikely(entry->alignment &&
511 !is_power_of_2_u64(entry->alignment)))
515 * Offset can be used as input (EXEC_OBJECT_PINNED), reject
516 * any non-page-aligned or non-canonical addresses.
518 if (unlikely(entry->flags & EXEC_OBJECT_PINNED &&
519 entry->offset != gen8_canonical_addr(entry->offset & I915_GTT_PAGE_MASK)))
522 /* pad_to_size was once a reserved field, so sanitize it */
523 if (entry->flags & EXEC_OBJECT_PAD_TO_SIZE) {
524 if (unlikely(offset_in_page(entry->pad_to_size)))
527 entry->pad_to_size = 0;
530 * From drm_mm perspective address space is continuous,
531 * so from this point we're always using non-canonical
534 entry->offset = gen8_noncanonical_addr(entry->offset);
536 if (!eb->reloc_cache.has_fence) {
537 entry->flags &= ~EXEC_OBJECT_NEEDS_FENCE;
539 if ((entry->flags & EXEC_OBJECT_NEEDS_FENCE ||
540 eb->reloc_cache.needs_unfenced) &&
541 i915_gem_object_is_tiled(vma->obj))
542 entry->flags |= EXEC_OBJECT_NEEDS_GTT | __EXEC_OBJECT_NEEDS_MAP;
549 is_batch_buffer(struct i915_execbuffer *eb, unsigned int buffer_idx)
551 return eb->args->flags & I915_EXEC_BATCH_FIRST ?
552 buffer_idx < eb->num_batches :
553 buffer_idx >= eb->args->buffer_count - eb->num_batches;
557 eb_add_vma(struct i915_execbuffer *eb,
558 unsigned int *current_batch,
560 struct i915_vma *vma)
562 struct drm_i915_private *i915 = eb->i915;
563 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
564 struct eb_vma *ev = &eb->vma[i];
568 ev->flags = entry->flags;
570 if (eb->lut_size > 0) {
571 ev->handle = entry->handle;
572 hlist_add_head(&ev->node,
573 &eb->buckets[hash_32(entry->handle,
577 if (entry->relocation_count)
578 list_add_tail(&ev->reloc_link, &eb->relocs);
581 * SNA is doing fancy tricks with compressing batch buffers, which leads
582 * to negative relocation deltas. Usually that works out ok since the
583 * relocate address is still positive, except when the batch is placed
584 * very low in the GTT. Ensure this doesn't happen.
586 * Note that actual hangs have only been observed on gen7, but for
587 * paranoia do it everywhere.
589 if (is_batch_buffer(eb, i)) {
590 if (entry->relocation_count &&
591 !(ev->flags & EXEC_OBJECT_PINNED))
592 ev->flags |= __EXEC_OBJECT_NEEDS_BIAS;
593 if (eb->reloc_cache.has_fence)
594 ev->flags |= EXEC_OBJECT_NEEDS_FENCE;
596 eb->batches[*current_batch] = ev;
598 if (unlikely(ev->flags & EXEC_OBJECT_WRITE)) {
600 "Attempting to use self-modifying batch buffer\n");
604 if (range_overflows_t(u64,
605 eb->batch_start_offset,
608 drm_dbg(&i915->drm, "Attempting to use out-of-bounds batch\n");
612 if (eb->args->batch_len == 0)
613 eb->batch_len[*current_batch] = ev->vma->size -
614 eb->batch_start_offset;
616 eb->batch_len[*current_batch] = eb->args->batch_len;
617 if (unlikely(eb->batch_len[*current_batch] == 0)) { /* impossible! */
618 drm_dbg(&i915->drm, "Invalid batch length\n");
628 static inline int use_cpu_reloc(const struct reloc_cache *cache,
629 const struct drm_i915_gem_object *obj)
631 if (!i915_gem_object_has_struct_page(obj))
634 if (DBG_FORCE_RELOC == FORCE_CPU_RELOC)
637 if (DBG_FORCE_RELOC == FORCE_GTT_RELOC)
640 return (cache->has_llc ||
642 obj->cache_level != I915_CACHE_NONE);
645 static int eb_reserve_vma(struct i915_execbuffer *eb,
649 struct drm_i915_gem_exec_object2 *entry = ev->exec;
650 struct i915_vma *vma = ev->vma;
653 if (drm_mm_node_allocated(&vma->node) &&
654 eb_vma_misplaced(entry, vma, ev->flags)) {
655 err = i915_vma_unbind(vma);
660 err = i915_vma_pin_ww(vma, &eb->ww,
661 entry->pad_to_size, entry->alignment,
662 eb_pin_flags(entry, ev->flags) | pin_flags);
666 if (entry->offset != vma->node.start) {
667 entry->offset = vma->node.start | UPDATE;
668 eb->args->flags |= __EXEC_HAS_RELOC;
671 if (unlikely(ev->flags & EXEC_OBJECT_NEEDS_FENCE)) {
672 err = i915_vma_pin_fence(vma);
677 ev->flags |= __EXEC_OBJECT_HAS_FENCE;
680 ev->flags |= __EXEC_OBJECT_HAS_PIN;
681 GEM_BUG_ON(eb_vma_misplaced(entry, vma, ev->flags));
686 static bool eb_unbind(struct i915_execbuffer *eb, bool force)
688 const unsigned int count = eb->buffer_count;
690 struct list_head last;
691 bool unpinned = false;
693 /* Resort *all* the objects into priority order */
694 INIT_LIST_HEAD(&eb->unbound);
695 INIT_LIST_HEAD(&last);
697 for (i = 0; i < count; i++) {
698 struct eb_vma *ev = &eb->vma[i];
699 unsigned int flags = ev->flags;
701 if (!force && flags & EXEC_OBJECT_PINNED &&
702 flags & __EXEC_OBJECT_HAS_PIN)
706 eb_unreserve_vma(ev);
708 if (flags & EXEC_OBJECT_PINNED)
709 /* Pinned must have their slot */
710 list_add(&ev->bind_link, &eb->unbound);
711 else if (flags & __EXEC_OBJECT_NEEDS_MAP)
712 /* Map require the lowest 256MiB (aperture) */
713 list_add_tail(&ev->bind_link, &eb->unbound);
714 else if (!(flags & EXEC_OBJECT_SUPPORTS_48B_ADDRESS))
715 /* Prioritise 4GiB region for restricted bo */
716 list_add(&ev->bind_link, &last);
718 list_add_tail(&ev->bind_link, &last);
721 list_splice_tail(&last, &eb->unbound);
725 static int eb_reserve(struct i915_execbuffer *eb)
733 * We have one more buffers that we couldn't bind, which could be due to
734 * various reasons. To resolve this we have 4 passes, with every next
735 * level turning the screws tighter:
737 * 0. Unbind all objects that do not match the GTT constraints for the
738 * execbuffer (fenceable, mappable, alignment etc). Bind all new
739 * objects. This avoids unnecessary unbinding of later objects in order
740 * to make room for the earlier objects *unless* we need to defragment.
742 * 1. Reorder the buffers, where objects with the most restrictive
743 * placement requirements go first (ignoring fixed location buffers for
744 * now). For example, objects needing the mappable aperture (the first
745 * 256M of GTT), should go first vs objects that can be placed just
746 * about anywhere. Repeat the previous pass.
748 * 2. Consider buffers that are pinned at a fixed location. Also try to
749 * evict the entire VM this time, leaving only objects that we were
750 * unable to lock. Try again to bind the buffers. (still using the new
753 * 3. We likely have object lock contention for one or more stubborn
754 * objects in the VM, for which we need to evict to make forward
755 * progress (perhaps we are fighting the shrinker?). When evicting the
756 * VM this time around, anything that we can't lock we now track using
757 * the busy_bo, using the full lock (after dropping the vm->mutex to
758 * prevent deadlocks), instead of trylock. We then continue to evict the
759 * VM, this time with the stubborn object locked, which we can now
760 * hopefully unbind (if still bound in the VM). Repeat until the VM is
761 * evicted. Finally we should be able bind everything.
763 for (pass = 0; pass <= 3; pass++) {
764 int pin_flags = PIN_USER | PIN_VALIDATE;
767 pin_flags |= PIN_NONBLOCK;
770 unpinned = eb_unbind(eb, pass >= 2);
773 err = mutex_lock_interruptible(&eb->context->vm->mutex);
775 err = i915_gem_evict_vm(eb->context->vm, &eb->ww, NULL);
776 mutex_unlock(&eb->context->vm->mutex);
784 err = mutex_lock_interruptible(&eb->context->vm->mutex);
786 struct drm_i915_gem_object *busy_bo = NULL;
788 err = i915_gem_evict_vm(eb->context->vm, &eb->ww, &busy_bo);
789 mutex_unlock(&eb->context->vm->mutex);
790 if (err && busy_bo) {
791 err = i915_gem_object_lock(busy_bo, &eb->ww);
792 i915_gem_object_put(busy_bo);
801 list_for_each_entry(ev, &eb->unbound, bind_link) {
802 err = eb_reserve_vma(eb, ev, pin_flags);
814 static int eb_select_context(struct i915_execbuffer *eb)
816 struct i915_gem_context *ctx;
818 ctx = i915_gem_context_lookup(eb->file->driver_priv, eb->args->rsvd1);
819 if (unlikely(IS_ERR(ctx)))
822 eb->gem_context = ctx;
823 if (i915_gem_context_has_full_ppgtt(ctx))
824 eb->invalid_flags |= EXEC_OBJECT_NEEDS_GTT;
829 static int __eb_add_lut(struct i915_execbuffer *eb,
830 u32 handle, struct i915_vma *vma)
832 struct i915_gem_context *ctx = eb->gem_context;
833 struct i915_lut_handle *lut;
836 lut = i915_lut_handle_alloc();
841 if (!atomic_fetch_inc(&vma->open_count))
842 i915_vma_reopen(vma);
843 lut->handle = handle;
846 /* Check that the context hasn't been closed in the meantime */
848 if (!mutex_lock_interruptible(&ctx->lut_mutex)) {
849 if (likely(!i915_gem_context_is_closed(ctx)))
850 err = radix_tree_insert(&ctx->handles_vma, handle, vma);
853 if (err == 0) { /* And nor has this handle */
854 struct drm_i915_gem_object *obj = vma->obj;
856 spin_lock(&obj->lut_lock);
857 if (idr_find(&eb->file->object_idr, handle) == obj) {
858 list_add(&lut->obj_link, &obj->lut_list);
860 radix_tree_delete(&ctx->handles_vma, handle);
863 spin_unlock(&obj->lut_lock);
865 mutex_unlock(&ctx->lut_mutex);
875 i915_lut_handle_free(lut);
879 static struct i915_vma *eb_lookup_vma(struct i915_execbuffer *eb, u32 handle)
881 struct i915_address_space *vm = eb->context->vm;
884 struct drm_i915_gem_object *obj;
885 struct i915_vma *vma;
889 vma = radix_tree_lookup(&eb->gem_context->handles_vma, handle);
890 if (likely(vma && vma->vm == vm))
891 vma = i915_vma_tryget(vma);
896 obj = i915_gem_object_lookup(eb->file, handle);
898 return ERR_PTR(-ENOENT);
901 * If the user has opted-in for protected-object tracking, make
902 * sure the object encryption can be used.
903 * We only need to do this when the object is first used with
904 * this context, because the context itself will be banned when
905 * the protected objects become invalid.
907 if (i915_gem_context_uses_protected_content(eb->gem_context) &&
908 i915_gem_object_is_protected(obj)) {
909 err = intel_pxp_key_check(&vm->gt->pxp, obj, true);
911 i915_gem_object_put(obj);
916 vma = i915_vma_instance(obj, vm, NULL);
918 i915_gem_object_put(obj);
922 err = __eb_add_lut(eb, handle, vma);
926 i915_gem_object_put(obj);
932 static int eb_lookup_vmas(struct i915_execbuffer *eb)
934 unsigned int i, current_batch = 0;
937 INIT_LIST_HEAD(&eb->relocs);
939 for (i = 0; i < eb->buffer_count; i++) {
940 struct i915_vma *vma;
942 vma = eb_lookup_vma(eb, eb->exec[i].handle);
948 err = eb_validate_vma(eb, &eb->exec[i], vma);
954 err = eb_add_vma(eb, ¤t_batch, i, vma);
958 if (i915_gem_object_is_userptr(vma->obj)) {
959 err = i915_gem_object_userptr_submit_init(vma->obj);
961 if (i + 1 < eb->buffer_count) {
963 * Execbuffer code expects last vma entry to be NULL,
964 * since we already initialized this entry,
965 * set the next value to NULL or we mess up
968 eb->vma[i + 1].vma = NULL;
974 eb->vma[i].flags |= __EXEC_OBJECT_USERPTR_INIT;
975 eb->args->flags |= __EXEC_USERPTR_USED;
982 eb->vma[i].vma = NULL;
986 static int eb_lock_vmas(struct i915_execbuffer *eb)
991 for (i = 0; i < eb->buffer_count; i++) {
992 struct eb_vma *ev = &eb->vma[i];
993 struct i915_vma *vma = ev->vma;
995 err = i915_gem_object_lock(vma->obj, &eb->ww);
1003 static int eb_validate_vmas(struct i915_execbuffer *eb)
1008 INIT_LIST_HEAD(&eb->unbound);
1010 err = eb_lock_vmas(eb);
1014 for (i = 0; i < eb->buffer_count; i++) {
1015 struct drm_i915_gem_exec_object2 *entry = &eb->exec[i];
1016 struct eb_vma *ev = &eb->vma[i];
1017 struct i915_vma *vma = ev->vma;
1019 err = eb_pin_vma(eb, entry, ev);
1020 if (err == -EDEADLK)
1024 if (entry->offset != vma->node.start) {
1025 entry->offset = vma->node.start | UPDATE;
1026 eb->args->flags |= __EXEC_HAS_RELOC;
1029 eb_unreserve_vma(ev);
1031 list_add_tail(&ev->bind_link, &eb->unbound);
1032 if (drm_mm_node_allocated(&vma->node)) {
1033 err = i915_vma_unbind(vma);
1039 /* Reserve enough slots to accommodate composite fences */
1040 err = dma_resv_reserve_fences(vma->obj->base.resv, eb->num_batches);
1044 GEM_BUG_ON(drm_mm_node_allocated(&vma->node) &&
1045 eb_vma_misplaced(&eb->exec[i], vma, ev->flags));
1048 if (!list_empty(&eb->unbound))
1049 return eb_reserve(eb);
1054 static struct eb_vma *
1055 eb_get_vma(const struct i915_execbuffer *eb, unsigned long handle)
1057 if (eb->lut_size < 0) {
1058 if (handle >= -eb->lut_size)
1060 return &eb->vma[handle];
1062 struct hlist_head *head;
1065 head = &eb->buckets[hash_32(handle, eb->lut_size)];
1066 hlist_for_each_entry(ev, head, node) {
1067 if (ev->handle == handle)
1074 static void eb_release_vmas(struct i915_execbuffer *eb, bool final)
1076 const unsigned int count = eb->buffer_count;
1079 for (i = 0; i < count; i++) {
1080 struct eb_vma *ev = &eb->vma[i];
1081 struct i915_vma *vma = ev->vma;
1086 eb_unreserve_vma(ev);
1092 eb_capture_release(eb);
1093 eb_unpin_engine(eb);
1096 static void eb_destroy(const struct i915_execbuffer *eb)
1098 if (eb->lut_size > 0)
1103 relocation_target(const struct drm_i915_gem_relocation_entry *reloc,
1104 const struct i915_vma *target)
1106 return gen8_canonical_addr((int)reloc->delta + target->node.start);
1109 static void reloc_cache_init(struct reloc_cache *cache,
1110 struct drm_i915_private *i915)
1114 /* Must be a variable in the struct to allow GCC to unroll. */
1115 cache->graphics_ver = GRAPHICS_VER(i915);
1116 cache->has_llc = HAS_LLC(i915);
1117 cache->use_64bit_reloc = HAS_64BIT_RELOC(i915);
1118 cache->has_fence = cache->graphics_ver < 4;
1119 cache->needs_unfenced = INTEL_INFO(i915)->unfenced_needs_alignment;
1120 cache->node.flags = 0;
1123 static inline void *unmask_page(unsigned long p)
1125 return (void *)(uintptr_t)(p & PAGE_MASK);
1128 static inline unsigned int unmask_flags(unsigned long p)
1130 return p & ~PAGE_MASK;
1133 #define KMAP 0x4 /* after CLFLUSH_FLAGS */
1135 static inline struct i915_ggtt *cache_to_ggtt(struct reloc_cache *cache)
1137 struct drm_i915_private *i915 =
1138 container_of(cache, struct i915_execbuffer, reloc_cache)->i915;
1139 return to_gt(i915)->ggtt;
1142 static void reloc_cache_unmap(struct reloc_cache *cache)
1149 vaddr = unmask_page(cache->vaddr);
1150 if (cache->vaddr & KMAP)
1151 kunmap_atomic(vaddr);
1153 io_mapping_unmap_atomic((void __iomem *)vaddr);
1156 static void reloc_cache_remap(struct reloc_cache *cache,
1157 struct drm_i915_gem_object *obj)
1164 if (cache->vaddr & KMAP) {
1165 struct page *page = i915_gem_object_get_page(obj, cache->page);
1167 vaddr = kmap_atomic(page);
1168 cache->vaddr = unmask_flags(cache->vaddr) |
1169 (unsigned long)vaddr;
1171 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1172 unsigned long offset;
1174 offset = cache->node.start;
1175 if (!drm_mm_node_allocated(&cache->node))
1176 offset += cache->page << PAGE_SHIFT;
1178 cache->vaddr = (unsigned long)
1179 io_mapping_map_atomic_wc(&ggtt->iomap, offset);
1183 static void reloc_cache_reset(struct reloc_cache *cache, struct i915_execbuffer *eb)
1190 vaddr = unmask_page(cache->vaddr);
1191 if (cache->vaddr & KMAP) {
1192 struct drm_i915_gem_object *obj =
1193 (struct drm_i915_gem_object *)cache->node.mm;
1194 if (cache->vaddr & CLFLUSH_AFTER)
1197 kunmap_atomic(vaddr);
1198 i915_gem_object_finish_access(obj);
1200 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1202 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1203 io_mapping_unmap_atomic((void __iomem *)vaddr);
1205 if (drm_mm_node_allocated(&cache->node)) {
1206 ggtt->vm.clear_range(&ggtt->vm,
1209 mutex_lock(&ggtt->vm.mutex);
1210 drm_mm_remove_node(&cache->node);
1211 mutex_unlock(&ggtt->vm.mutex);
1213 i915_vma_unpin((struct i915_vma *)cache->node.mm);
1221 static void *reloc_kmap(struct drm_i915_gem_object *obj,
1222 struct reloc_cache *cache,
1223 unsigned long pageno)
1229 kunmap_atomic(unmask_page(cache->vaddr));
1231 unsigned int flushes;
1234 err = i915_gem_object_prepare_write(obj, &flushes);
1236 return ERR_PTR(err);
1238 BUILD_BUG_ON(KMAP & CLFLUSH_FLAGS);
1239 BUILD_BUG_ON((KMAP | CLFLUSH_FLAGS) & PAGE_MASK);
1241 cache->vaddr = flushes | KMAP;
1242 cache->node.mm = (void *)obj;
1247 page = i915_gem_object_get_page(obj, pageno);
1249 set_page_dirty(page);
1251 vaddr = kmap_atomic(page);
1252 cache->vaddr = unmask_flags(cache->vaddr) | (unsigned long)vaddr;
1253 cache->page = pageno;
1258 static void *reloc_iomap(struct i915_vma *batch,
1259 struct i915_execbuffer *eb,
1262 struct drm_i915_gem_object *obj = batch->obj;
1263 struct reloc_cache *cache = &eb->reloc_cache;
1264 struct i915_ggtt *ggtt = cache_to_ggtt(cache);
1265 unsigned long offset;
1269 intel_gt_flush_ggtt_writes(ggtt->vm.gt);
1270 io_mapping_unmap_atomic((void __force __iomem *) unmask_page(cache->vaddr));
1272 struct i915_vma *vma = ERR_PTR(-ENODEV);
1275 if (i915_gem_object_is_tiled(obj))
1276 return ERR_PTR(-EINVAL);
1278 if (use_cpu_reloc(cache, obj))
1281 err = i915_gem_object_set_to_gtt_domain(obj, true);
1283 return ERR_PTR(err);
1286 * i915_gem_object_ggtt_pin_ww may attempt to remove the batch
1287 * VMA from the object list because we no longer pin.
1289 * Only attempt to pin the batch buffer to ggtt if the current batch
1290 * is not inside ggtt, or the batch buffer is not misplaced.
1292 if (!i915_is_ggtt(batch->vm) ||
1293 !i915_vma_misplaced(batch, 0, 0, PIN_MAPPABLE)) {
1294 vma = i915_gem_object_ggtt_pin_ww(obj, &eb->ww, NULL, 0, 0,
1296 PIN_NONBLOCK /* NOWARN */ |
1300 if (vma == ERR_PTR(-EDEADLK))
1304 memset(&cache->node, 0, sizeof(cache->node));
1305 mutex_lock(&ggtt->vm.mutex);
1306 err = drm_mm_insert_node_in_range
1307 (&ggtt->vm.mm, &cache->node,
1308 PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
1309 0, ggtt->mappable_end,
1311 mutex_unlock(&ggtt->vm.mutex);
1312 if (err) /* no inactive aperture space, use cpu reloc */
1315 cache->node.start = vma->node.start;
1316 cache->node.mm = (void *)vma;
1320 offset = cache->node.start;
1321 if (drm_mm_node_allocated(&cache->node)) {
1322 ggtt->vm.insert_page(&ggtt->vm,
1323 i915_gem_object_get_dma_address(obj, page),
1324 offset, I915_CACHE_NONE, 0);
1326 offset += page << PAGE_SHIFT;
1329 vaddr = (void __force *)io_mapping_map_atomic_wc(&ggtt->iomap,
1332 cache->vaddr = (unsigned long)vaddr;
1337 static void *reloc_vaddr(struct i915_vma *vma,
1338 struct i915_execbuffer *eb,
1341 struct reloc_cache *cache = &eb->reloc_cache;
1344 if (cache->page == page) {
1345 vaddr = unmask_page(cache->vaddr);
1348 if ((cache->vaddr & KMAP) == 0)
1349 vaddr = reloc_iomap(vma, eb, page);
1351 vaddr = reloc_kmap(vma->obj, cache, page);
1357 static void clflush_write32(u32 *addr, u32 value, unsigned int flushes)
1359 if (unlikely(flushes & (CLFLUSH_BEFORE | CLFLUSH_AFTER))) {
1360 if (flushes & CLFLUSH_BEFORE)
1361 drm_clflush_virt_range(addr, sizeof(*addr));
1366 * Writes to the same cacheline are serialised by the CPU
1367 * (including clflush). On the write path, we only require
1368 * that it hits memory in an orderly fashion and place
1369 * mb barriers at the start and end of the relocation phase
1370 * to ensure ordering of clflush wrt to the system.
1372 if (flushes & CLFLUSH_AFTER)
1373 drm_clflush_virt_range(addr, sizeof(*addr));
1379 relocate_entry(struct i915_vma *vma,
1380 const struct drm_i915_gem_relocation_entry *reloc,
1381 struct i915_execbuffer *eb,
1382 const struct i915_vma *target)
1384 u64 target_addr = relocation_target(reloc, target);
1385 u64 offset = reloc->offset;
1386 bool wide = eb->reloc_cache.use_64bit_reloc;
1390 vaddr = reloc_vaddr(vma, eb,
1391 offset >> PAGE_SHIFT);
1393 return PTR_ERR(vaddr);
1395 GEM_BUG_ON(!IS_ALIGNED(offset, sizeof(u32)));
1396 clflush_write32(vaddr + offset_in_page(offset),
1397 lower_32_bits(target_addr),
1398 eb->reloc_cache.vaddr);
1401 offset += sizeof(u32);
1407 return target->node.start | UPDATE;
1411 eb_relocate_entry(struct i915_execbuffer *eb,
1413 const struct drm_i915_gem_relocation_entry *reloc)
1415 struct drm_i915_private *i915 = eb->i915;
1416 struct eb_vma *target;
1419 /* we've already hold a reference to all valid objects */
1420 target = eb_get_vma(eb, reloc->target_handle);
1421 if (unlikely(!target))
1424 /* Validate that the target is in a valid r/w GPU domain */
1425 if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) {
1426 drm_dbg(&i915->drm, "reloc with multiple write domains: "
1427 "target %d offset %d "
1428 "read %08x write %08x",
1429 reloc->target_handle,
1430 (int) reloc->offset,
1431 reloc->read_domains,
1432 reloc->write_domain);
1435 if (unlikely((reloc->write_domain | reloc->read_domains)
1436 & ~I915_GEM_GPU_DOMAINS)) {
1437 drm_dbg(&i915->drm, "reloc with read/write non-GPU domains: "
1438 "target %d offset %d "
1439 "read %08x write %08x",
1440 reloc->target_handle,
1441 (int) reloc->offset,
1442 reloc->read_domains,
1443 reloc->write_domain);
1447 if (reloc->write_domain) {
1448 target->flags |= EXEC_OBJECT_WRITE;
1451 * Sandybridge PPGTT errata: We need a global gtt mapping
1452 * for MI and pipe_control writes because the gpu doesn't
1453 * properly redirect them through the ppgtt for non_secure
1456 if (reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION &&
1457 GRAPHICS_VER(eb->i915) == 6 &&
1458 !i915_vma_is_bound(target->vma, I915_VMA_GLOBAL_BIND)) {
1459 struct i915_vma *vma = target->vma;
1461 reloc_cache_unmap(&eb->reloc_cache);
1462 mutex_lock(&vma->vm->mutex);
1463 err = i915_vma_bind(target->vma,
1464 target->vma->obj->cache_level,
1465 PIN_GLOBAL, NULL, NULL);
1466 mutex_unlock(&vma->vm->mutex);
1467 reloc_cache_remap(&eb->reloc_cache, ev->vma->obj);
1474 * If the relocation already has the right value in it, no
1475 * more work needs to be done.
1477 if (!DBG_FORCE_RELOC &&
1478 gen8_canonical_addr(target->vma->node.start) == reloc->presumed_offset)
1481 /* Check that the relocation address is valid... */
1482 if (unlikely(reloc->offset >
1483 ev->vma->size - (eb->reloc_cache.use_64bit_reloc ? 8 : 4))) {
1484 drm_dbg(&i915->drm, "Relocation beyond object bounds: "
1485 "target %d offset %d size %d.\n",
1486 reloc->target_handle,
1488 (int)ev->vma->size);
1491 if (unlikely(reloc->offset & 3)) {
1492 drm_dbg(&i915->drm, "Relocation not 4-byte aligned: "
1493 "target %d offset %d.\n",
1494 reloc->target_handle,
1495 (int)reloc->offset);
1500 * If we write into the object, we need to force the synchronisation
1501 * barrier, either with an asynchronous clflush or if we executed the
1502 * patching using the GPU (though that should be serialised by the
1503 * timeline). To be completely sure, and since we are required to
1504 * do relocations we are already stalling, disable the user's opt
1505 * out of our synchronisation.
1507 ev->flags &= ~EXEC_OBJECT_ASYNC;
1509 /* and update the user's relocation entry */
1510 return relocate_entry(ev->vma, reloc, eb, target->vma);
1513 static int eb_relocate_vma(struct i915_execbuffer *eb, struct eb_vma *ev)
1515 #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry))
1516 struct drm_i915_gem_relocation_entry stack[N_RELOC(512)];
1517 const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1518 struct drm_i915_gem_relocation_entry __user *urelocs =
1519 u64_to_user_ptr(entry->relocs_ptr);
1520 unsigned long remain = entry->relocation_count;
1522 if (unlikely(remain > N_RELOC(ULONG_MAX)))
1526 * We must check that the entire relocation array is safe
1527 * to read. However, if the array is not writable the user loses
1528 * the updated relocation values.
1530 if (unlikely(!access_ok(urelocs, remain * sizeof(*urelocs))))
1534 struct drm_i915_gem_relocation_entry *r = stack;
1535 unsigned int count =
1536 min_t(unsigned long, remain, ARRAY_SIZE(stack));
1537 unsigned int copied;
1540 * This is the fast path and we cannot handle a pagefault
1541 * whilst holding the struct mutex lest the user pass in the
1542 * relocations contained within a mmaped bo. For in such a case
1543 * we, the page fault handler would call i915_gem_fault() and
1544 * we would try to acquire the struct mutex again. Obviously
1545 * this is bad and so lockdep complains vehemently.
1547 pagefault_disable();
1548 copied = __copy_from_user_inatomic(r, urelocs, count * sizeof(r[0]));
1550 if (unlikely(copied)) {
1557 u64 offset = eb_relocate_entry(eb, ev, r);
1559 if (likely(offset == 0)) {
1560 } else if ((s64)offset < 0) {
1561 remain = (int)offset;
1565 * Note that reporting an error now
1566 * leaves everything in an inconsistent
1567 * state as we have *already* changed
1568 * the relocation value inside the
1569 * object. As we have not changed the
1570 * reloc.presumed_offset or will not
1571 * change the execobject.offset, on the
1572 * call we may not rewrite the value
1573 * inside the object, leaving it
1574 * dangling and causing a GPU hang. Unless
1575 * userspace dynamically rebuilds the
1576 * relocations on each execbuf rather than
1577 * presume a static tree.
1579 * We did previously check if the relocations
1580 * were writable (access_ok), an error now
1581 * would be a strange race with mprotect,
1582 * having already demonstrated that we
1583 * can read from this userspace address.
1585 offset = gen8_canonical_addr(offset & ~UPDATE);
1587 &urelocs[r - stack].presumed_offset);
1589 } while (r++, --count);
1590 urelocs += ARRAY_SIZE(stack);
1593 reloc_cache_reset(&eb->reloc_cache, eb);
1598 eb_relocate_vma_slow(struct i915_execbuffer *eb, struct eb_vma *ev)
1600 const struct drm_i915_gem_exec_object2 *entry = ev->exec;
1601 struct drm_i915_gem_relocation_entry *relocs =
1602 u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1606 for (i = 0; i < entry->relocation_count; i++) {
1607 u64 offset = eb_relocate_entry(eb, ev, &relocs[i]);
1609 if ((s64)offset < 0) {
1616 reloc_cache_reset(&eb->reloc_cache, eb);
1620 static int check_relocations(const struct drm_i915_gem_exec_object2 *entry)
1622 const char __user *addr, *end;
1624 char __maybe_unused c;
1626 size = entry->relocation_count;
1630 if (size > N_RELOC(ULONG_MAX))
1633 addr = u64_to_user_ptr(entry->relocs_ptr);
1634 size *= sizeof(struct drm_i915_gem_relocation_entry);
1635 if (!access_ok(addr, size))
1639 for (; addr < end; addr += PAGE_SIZE) {
1640 int err = __get_user(c, addr);
1644 return __get_user(c, end - 1);
1647 static int eb_copy_relocations(const struct i915_execbuffer *eb)
1649 struct drm_i915_gem_relocation_entry *relocs;
1650 const unsigned int count = eb->buffer_count;
1654 for (i = 0; i < count; i++) {
1655 const unsigned int nreloc = eb->exec[i].relocation_count;
1656 struct drm_i915_gem_relocation_entry __user *urelocs;
1658 unsigned long copied;
1663 err = check_relocations(&eb->exec[i]);
1667 urelocs = u64_to_user_ptr(eb->exec[i].relocs_ptr);
1668 size = nreloc * sizeof(*relocs);
1670 relocs = kvmalloc_array(size, 1, GFP_KERNEL);
1676 /* copy_from_user is limited to < 4GiB */
1680 min_t(u64, BIT_ULL(31), size - copied);
1682 if (__copy_from_user((char *)relocs + copied,
1683 (char __user *)urelocs + copied,
1688 } while (copied < size);
1691 * As we do not update the known relocation offsets after
1692 * relocating (due to the complexities in lock handling),
1693 * we need to mark them as invalid now so that we force the
1694 * relocation processing next time. Just in case the target
1695 * object is evicted and then rebound into its old
1696 * presumed_offset before the next execbuffer - if that
1697 * happened we would make the mistake of assuming that the
1698 * relocations were valid.
1700 if (!user_access_begin(urelocs, size))
1703 for (copied = 0; copied < nreloc; copied++)
1705 &urelocs[copied].presumed_offset,
1709 eb->exec[i].relocs_ptr = (uintptr_t)relocs;
1721 relocs = u64_to_ptr(typeof(*relocs), eb->exec[i].relocs_ptr);
1722 if (eb->exec[i].relocation_count)
1728 static int eb_prefault_relocations(const struct i915_execbuffer *eb)
1730 const unsigned int count = eb->buffer_count;
1733 for (i = 0; i < count; i++) {
1736 err = check_relocations(&eb->exec[i]);
1744 static int eb_reinit_userptr(struct i915_execbuffer *eb)
1746 const unsigned int count = eb->buffer_count;
1750 if (likely(!(eb->args->flags & __EXEC_USERPTR_USED)))
1753 for (i = 0; i < count; i++) {
1754 struct eb_vma *ev = &eb->vma[i];
1756 if (!i915_gem_object_is_userptr(ev->vma->obj))
1759 ret = i915_gem_object_userptr_submit_init(ev->vma->obj);
1763 ev->flags |= __EXEC_OBJECT_USERPTR_INIT;
1769 static noinline int eb_relocate_parse_slow(struct i915_execbuffer *eb)
1771 bool have_copy = false;
1776 if (signal_pending(current)) {
1781 /* We may process another execbuffer during the unlock... */
1782 eb_release_vmas(eb, false);
1783 i915_gem_ww_ctx_fini(&eb->ww);
1786 * We take 3 passes through the slowpatch.
1788 * 1 - we try to just prefault all the user relocation entries and
1789 * then attempt to reuse the atomic pagefault disabled fast path again.
1791 * 2 - we copy the user entries to a local buffer here outside of the
1792 * local and allow ourselves to wait upon any rendering before
1795 * 3 - we already have a local copy of the relocation entries, but
1796 * were interrupted (EAGAIN) whilst waiting for the objects, try again.
1799 err = eb_prefault_relocations(eb);
1800 } else if (!have_copy) {
1801 err = eb_copy_relocations(eb);
1802 have_copy = err == 0;
1809 err = eb_reinit_userptr(eb);
1811 i915_gem_ww_ctx_init(&eb->ww, true);
1815 /* reacquire the objects */
1817 err = eb_pin_engine(eb, false);
1821 err = eb_validate_vmas(eb);
1825 GEM_BUG_ON(!eb->batches[0]);
1827 list_for_each_entry(ev, &eb->relocs, reloc_link) {
1829 err = eb_relocate_vma(eb, ev);
1833 err = eb_relocate_vma_slow(eb, ev);
1839 if (err == -EDEADLK)
1842 if (err && !have_copy)
1848 /* as last step, parse the command buffer */
1854 * Leave the user relocations as are, this is the painfully slow path,
1855 * and we want to avoid the complication of dropping the lock whilst
1856 * having buffers reserved in the aperture and so causing spurious
1857 * ENOSPC for random operations.
1861 if (err == -EDEADLK) {
1862 eb_release_vmas(eb, false);
1863 err = i915_gem_ww_ctx_backoff(&eb->ww);
1865 goto repeat_validate;
1873 const unsigned int count = eb->buffer_count;
1876 for (i = 0; i < count; i++) {
1877 const struct drm_i915_gem_exec_object2 *entry =
1879 struct drm_i915_gem_relocation_entry *relocs;
1881 if (!entry->relocation_count)
1884 relocs = u64_to_ptr(typeof(*relocs), entry->relocs_ptr);
1892 static int eb_relocate_parse(struct i915_execbuffer *eb)
1895 bool throttle = true;
1898 err = eb_pin_engine(eb, throttle);
1900 if (err != -EDEADLK)
1906 /* only throttle once, even if we didn't need to throttle */
1909 err = eb_validate_vmas(eb);
1915 /* The objects are in their final locations, apply the relocations. */
1916 if (eb->args->flags & __EXEC_HAS_RELOC) {
1919 list_for_each_entry(ev, &eb->relocs, reloc_link) {
1920 err = eb_relocate_vma(eb, ev);
1925 if (err == -EDEADLK)
1935 if (err == -EDEADLK) {
1936 eb_release_vmas(eb, false);
1937 err = i915_gem_ww_ctx_backoff(&eb->ww);
1945 err = eb_relocate_parse_slow(eb);
1948 * If the user expects the execobject.offset and
1949 * reloc.presumed_offset to be an exact match,
1950 * as for using NO_RELOC, then we cannot update
1951 * the execobject.offset until we have completed
1954 eb->args->flags &= ~__EXEC_HAS_RELOC;
1960 * Using two helper loops for the order of which requests / batches are created
1961 * and added the to backend. Requests are created in order from the parent to
1962 * the last child. Requests are added in the reverse order, from the last child
1963 * to parent. This is done for locking reasons as the timeline lock is acquired
1964 * during request creation and released when the request is added to the
1965 * backend. To make lockdep happy (see intel_context_timeline_lock) this must be
1968 #define for_each_batch_create_order(_eb, _i) \
1969 for ((_i) = 0; (_i) < (_eb)->num_batches; ++(_i))
1970 #define for_each_batch_add_order(_eb, _i) \
1971 BUILD_BUG_ON(!typecheck(int, _i)); \
1972 for ((_i) = (_eb)->num_batches - 1; (_i) >= 0; --(_i))
1974 static struct i915_request *
1975 eb_find_first_request_added(struct i915_execbuffer *eb)
1979 for_each_batch_add_order(eb, i)
1980 if (eb->requests[i])
1981 return eb->requests[i];
1983 GEM_BUG_ON("Request not found");
1988 #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
1990 /* Stage with GFP_KERNEL allocations before we enter the signaling critical path */
1991 static int eb_capture_stage(struct i915_execbuffer *eb)
1993 const unsigned int count = eb->buffer_count;
1994 unsigned int i = count, j;
1997 struct eb_vma *ev = &eb->vma[i];
1998 struct i915_vma *vma = ev->vma;
1999 unsigned int flags = ev->flags;
2001 if (!(flags & EXEC_OBJECT_CAPTURE))
2004 if (i915_gem_context_is_recoverable(eb->gem_context) &&
2005 (IS_DGFX(eb->i915) || GRAPHICS_VER_FULL(eb->i915) > IP_VER(12, 0)))
2008 for_each_batch_create_order(eb, j) {
2009 struct i915_capture_list *capture;
2011 capture = kmalloc(sizeof(*capture), GFP_KERNEL);
2015 capture->next = eb->capture_lists[j];
2016 capture->vma_res = i915_vma_resource_get(vma->resource);
2017 eb->capture_lists[j] = capture;
2024 /* Commit once we're in the critical path */
2025 static void eb_capture_commit(struct i915_execbuffer *eb)
2029 for_each_batch_create_order(eb, j) {
2030 struct i915_request *rq = eb->requests[j];
2035 rq->capture_list = eb->capture_lists[j];
2036 eb->capture_lists[j] = NULL;
2041 * Release anything that didn't get committed due to errors.
2042 * The capture_list will otherwise be freed at request retire.
2044 static void eb_capture_release(struct i915_execbuffer *eb)
2048 for_each_batch_create_order(eb, j) {
2049 if (eb->capture_lists[j]) {
2050 i915_request_free_capture_list(eb->capture_lists[j]);
2051 eb->capture_lists[j] = NULL;
2056 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2058 memset(eb->capture_lists, 0, sizeof(eb->capture_lists));
2063 static int eb_capture_stage(struct i915_execbuffer *eb)
2068 static void eb_capture_commit(struct i915_execbuffer *eb)
2072 static void eb_capture_release(struct i915_execbuffer *eb)
2076 static void eb_capture_list_clear(struct i915_execbuffer *eb)
2082 static int eb_move_to_gpu(struct i915_execbuffer *eb)
2084 const unsigned int count = eb->buffer_count;
2085 unsigned int i = count;
2089 struct eb_vma *ev = &eb->vma[i];
2090 struct i915_vma *vma = ev->vma;
2091 unsigned int flags = ev->flags;
2092 struct drm_i915_gem_object *obj = vma->obj;
2094 assert_vma_held(vma);
2097 * If the GPU is not _reading_ through the CPU cache, we need
2098 * to make sure that any writes (both previous GPU writes from
2099 * before a change in snooping levels and normal CPU writes)
2100 * caught in that cache are flushed to main memory.
2103 * obj->cache_dirty &&
2104 * !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_READ)
2105 * but gcc's optimiser doesn't handle that as well and emits
2106 * two jumps instead of one. Maybe one day...
2108 * FIXME: There is also sync flushing in set_pages(), which
2109 * serves a different purpose(some of the time at least).
2111 * We should consider:
2113 * 1. Rip out the async flush code.
2115 * 2. Or make the sync flushing use the async clflush path
2116 * using mandatory fences underneath. Currently the below
2117 * async flush happens after we bind the object.
2119 if (unlikely(obj->cache_dirty & ~obj->cache_coherent)) {
2120 if (i915_gem_clflush_object(obj, 0))
2121 flags &= ~EXEC_OBJECT_ASYNC;
2124 /* We only need to await on the first request */
2125 if (err == 0 && !(flags & EXEC_OBJECT_ASYNC)) {
2126 err = i915_request_await_object
2127 (eb_find_first_request_added(eb), obj,
2128 flags & EXEC_OBJECT_WRITE);
2131 for_each_batch_add_order(eb, j) {
2134 if (!eb->requests[j])
2137 err = _i915_vma_move_to_active(vma, eb->requests[j],
2139 eb->composite_fence ?
2140 eb->composite_fence :
2141 &eb->requests[j]->fence,
2142 flags | __EXEC_OBJECT_NO_RESERVE |
2143 __EXEC_OBJECT_NO_REQUEST_AWAIT);
2147 #ifdef CONFIG_MMU_NOTIFIER
2148 if (!err && (eb->args->flags & __EXEC_USERPTR_USED)) {
2149 read_lock(&eb->i915->mm.notifier_lock);
2152 * count is always at least 1, otherwise __EXEC_USERPTR_USED
2153 * could not have been set
2155 for (i = 0; i < count; i++) {
2156 struct eb_vma *ev = &eb->vma[i];
2157 struct drm_i915_gem_object *obj = ev->vma->obj;
2159 if (!i915_gem_object_is_userptr(obj))
2162 err = i915_gem_object_userptr_submit_done(obj);
2167 read_unlock(&eb->i915->mm.notifier_lock);
2174 /* Unconditionally flush any chipset caches (for streaming writes). */
2175 intel_gt_chipset_flush(eb->gt);
2176 eb_capture_commit(eb);
2181 for_each_batch_create_order(eb, j) {
2182 if (!eb->requests[j])
2185 i915_request_set_error_once(eb->requests[j], err);
2190 static int i915_gem_check_execbuffer(struct drm_i915_private *i915,
2191 struct drm_i915_gem_execbuffer2 *exec)
2193 if (exec->flags & __I915_EXEC_ILLEGAL_FLAGS)
2196 /* Kernel clipping was a DRI1 misfeature */
2197 if (!(exec->flags & (I915_EXEC_FENCE_ARRAY |
2198 I915_EXEC_USE_EXTENSIONS))) {
2199 if (exec->num_cliprects || exec->cliprects_ptr)
2203 if (exec->DR4 == 0xffffffff) {
2204 drm_dbg(&i915->drm, "UXA submitting garbage DR4, fixing up\n");
2207 if (exec->DR1 || exec->DR4)
2210 if ((exec->batch_start_offset | exec->batch_len) & 0x7)
2216 static int i915_reset_gen7_sol_offsets(struct i915_request *rq)
2221 if (GRAPHICS_VER(rq->engine->i915) != 7 || rq->engine->id != RCS0) {
2222 drm_dbg(&rq->engine->i915->drm, "sol reset is gen7/rcs only\n");
2226 cs = intel_ring_begin(rq, 4 * 2 + 2);
2230 *cs++ = MI_LOAD_REGISTER_IMM(4);
2231 for (i = 0; i < 4; i++) {
2232 *cs++ = i915_mmio_reg_offset(GEN7_SO_WRITE_OFFSET(i));
2236 intel_ring_advance(rq, cs);
2241 static struct i915_vma *
2242 shadow_batch_pin(struct i915_execbuffer *eb,
2243 struct drm_i915_gem_object *obj,
2244 struct i915_address_space *vm,
2247 struct i915_vma *vma;
2250 vma = i915_vma_instance(obj, vm, NULL);
2254 err = i915_vma_pin_ww(vma, &eb->ww, 0, 0, flags | PIN_VALIDATE);
2256 return ERR_PTR(err);
2261 static struct i915_vma *eb_dispatch_secure(struct i915_execbuffer *eb, struct i915_vma *vma)
2264 * snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure
2265 * batch" bit. Hence we need to pin secure batches into the global gtt.
2266 * hsw should have this fixed, but bdw mucks it up again. */
2267 if (eb->batch_flags & I915_DISPATCH_SECURE)
2268 return i915_gem_object_ggtt_pin_ww(vma->obj, &eb->ww, NULL, 0, 0, PIN_VALIDATE);
2273 static int eb_parse(struct i915_execbuffer *eb)
2275 struct drm_i915_private *i915 = eb->i915;
2276 struct intel_gt_buffer_pool_node *pool = eb->batch_pool;
2277 struct i915_vma *shadow, *trampoline, *batch;
2281 if (!eb_use_cmdparser(eb)) {
2282 batch = eb_dispatch_secure(eb, eb->batches[0]->vma);
2284 return PTR_ERR(batch);
2289 if (intel_context_is_parallel(eb->context))
2292 len = eb->batch_len[0];
2293 if (!CMDPARSER_USES_GGTT(eb->i915)) {
2295 * ppGTT backed shadow buffers must be mapped RO, to prevent
2296 * post-scan tampering
2298 if (!eb->context->vm->has_read_only) {
2300 "Cannot prevent post-scan tampering without RO capable vm\n");
2304 len += I915_CMD_PARSER_TRAMPOLINE_SIZE;
2306 if (unlikely(len < eb->batch_len[0])) /* last paranoid check of overflow */
2310 pool = intel_gt_get_buffer_pool(eb->gt, len,
2313 return PTR_ERR(pool);
2314 eb->batch_pool = pool;
2317 err = i915_gem_object_lock(pool->obj, &eb->ww);
2321 shadow = shadow_batch_pin(eb, pool->obj, eb->context->vm, PIN_USER);
2323 return PTR_ERR(shadow);
2325 intel_gt_buffer_pool_mark_used(pool);
2326 i915_gem_object_set_readonly(shadow->obj);
2327 shadow->private = pool;
2330 if (CMDPARSER_USES_GGTT(eb->i915)) {
2331 trampoline = shadow;
2333 shadow = shadow_batch_pin(eb, pool->obj,
2337 return PTR_ERR(shadow);
2339 shadow->private = pool;
2341 eb->batch_flags |= I915_DISPATCH_SECURE;
2344 batch = eb_dispatch_secure(eb, shadow);
2346 return PTR_ERR(batch);
2348 err = dma_resv_reserve_fences(shadow->obj->base.resv, 1);
2352 err = intel_engine_cmd_parser(eb->context->engine,
2353 eb->batches[0]->vma,
2354 eb->batch_start_offset,
2356 shadow, trampoline);
2360 eb->batches[0] = &eb->vma[eb->buffer_count++];
2361 eb->batches[0]->vma = i915_vma_get(shadow);
2362 eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2364 eb->trampoline = trampoline;
2365 eb->batch_start_offset = 0;
2369 if (intel_context_is_parallel(eb->context))
2372 eb->batches[0] = &eb->vma[eb->buffer_count++];
2373 eb->batches[0]->flags = __EXEC_OBJECT_HAS_PIN;
2374 eb->batches[0]->vma = i915_vma_get(batch);
2379 static int eb_request_submit(struct i915_execbuffer *eb,
2380 struct i915_request *rq,
2381 struct i915_vma *batch,
2386 if (intel_context_nopreempt(rq->context))
2387 __set_bit(I915_FENCE_FLAG_NOPREEMPT, &rq->fence.flags);
2389 if (eb->args->flags & I915_EXEC_GEN7_SOL_RESET) {
2390 err = i915_reset_gen7_sol_offsets(rq);
2396 * After we completed waiting for other engines (using HW semaphores)
2397 * then we can signal that this request/batch is ready to run. This
2398 * allows us to determine if the batch is still waiting on the GPU
2399 * or actually running by checking the breadcrumb.
2401 if (rq->context->engine->emit_init_breadcrumb) {
2402 err = rq->context->engine->emit_init_breadcrumb(rq);
2407 err = rq->context->engine->emit_bb_start(rq,
2409 eb->batch_start_offset,
2415 if (eb->trampoline) {
2416 GEM_BUG_ON(intel_context_is_parallel(rq->context));
2417 GEM_BUG_ON(eb->batch_start_offset);
2418 err = rq->context->engine->emit_bb_start(rq,
2419 eb->trampoline->node.start +
2428 static int eb_submit(struct i915_execbuffer *eb)
2433 err = eb_move_to_gpu(eb);
2435 for_each_batch_create_order(eb, i) {
2436 if (!eb->requests[i])
2439 trace_i915_request_queue(eb->requests[i], eb->batch_flags);
2441 err = eb_request_submit(eb, eb->requests[i],
2442 eb->batches[i]->vma,
2449 static int num_vcs_engines(struct drm_i915_private *i915)
2451 return hweight_long(VDBOX_MASK(to_gt(i915)));
2455 * Find one BSD ring to dispatch the corresponding BSD command.
2456 * The engine index is returned.
2459 gen8_dispatch_bsd_engine(struct drm_i915_private *dev_priv,
2460 struct drm_file *file)
2462 struct drm_i915_file_private *file_priv = file->driver_priv;
2464 /* Check whether the file_priv has already selected one ring. */
2465 if ((int)file_priv->bsd_engine < 0)
2466 file_priv->bsd_engine =
2467 get_random_u32_below(num_vcs_engines(dev_priv));
2469 return file_priv->bsd_engine;
2472 static const enum intel_engine_id user_ring_map[] = {
2473 [I915_EXEC_DEFAULT] = RCS0,
2474 [I915_EXEC_RENDER] = RCS0,
2475 [I915_EXEC_BLT] = BCS0,
2476 [I915_EXEC_BSD] = VCS0,
2477 [I915_EXEC_VEBOX] = VECS0
2480 static struct i915_request *eb_throttle(struct i915_execbuffer *eb, struct intel_context *ce)
2482 struct intel_ring *ring = ce->ring;
2483 struct intel_timeline *tl = ce->timeline;
2484 struct i915_request *rq;
2487 * Completely unscientific finger-in-the-air estimates for suitable
2488 * maximum user request size (to avoid blocking) and then backoff.
2490 if (intel_ring_update_space(ring) >= PAGE_SIZE)
2494 * Find a request that after waiting upon, there will be at least half
2495 * the ring available. The hysteresis allows us to compete for the
2496 * shared ring and should mean that we sleep less often prior to
2497 * claiming our resources, but not so long that the ring completely
2498 * drains before we can submit our next request.
2500 list_for_each_entry(rq, &tl->requests, link) {
2501 if (rq->ring != ring)
2504 if (__intel_ring_space(rq->postfix,
2505 ring->emit, ring->size) > ring->size / 2)
2508 if (&rq->link == &tl->requests)
2509 return NULL; /* weird, we will check again later for real */
2511 return i915_request_get(rq);
2514 static int eb_pin_timeline(struct i915_execbuffer *eb, struct intel_context *ce,
2517 struct intel_timeline *tl;
2518 struct i915_request *rq = NULL;
2521 * Take a local wakeref for preparing to dispatch the execbuf as
2522 * we expect to access the hardware fairly frequently in the
2523 * process, and require the engine to be kept awake between accesses.
2524 * Upon dispatch, we acquire another prolonged wakeref that we hold
2525 * until the timeline is idle, which in turn releases the wakeref
2526 * taken on the engine, and the parent device.
2528 tl = intel_context_timeline_lock(ce);
2532 intel_context_enter(ce);
2534 rq = eb_throttle(eb, ce);
2535 intel_context_timeline_unlock(tl);
2538 bool nonblock = eb->file->filp->f_flags & O_NONBLOCK;
2539 long timeout = nonblock ? 0 : MAX_SCHEDULE_TIMEOUT;
2541 if (i915_request_wait(rq, I915_WAIT_INTERRUPTIBLE,
2543 i915_request_put(rq);
2546 * Error path, cannot use intel_context_timeline_lock as
2547 * that is user interruptable and this clean up step
2550 mutex_lock(&ce->timeline->mutex);
2551 intel_context_exit(ce);
2552 mutex_unlock(&ce->timeline->mutex);
2555 return -EWOULDBLOCK;
2559 i915_request_put(rq);
2565 static int eb_pin_engine(struct i915_execbuffer *eb, bool throttle)
2567 struct intel_context *ce = eb->context, *child;
2571 GEM_BUG_ON(eb->args->flags & __EXEC_ENGINE_PINNED);
2573 if (unlikely(intel_context_is_banned(ce)))
2577 * Pinning the contexts may generate requests in order to acquire
2578 * GGTT space, so do this first before we reserve a seqno for
2581 err = intel_context_pin_ww(ce, &eb->ww);
2584 for_each_child(ce, child) {
2585 err = intel_context_pin_ww(child, &eb->ww);
2586 GEM_BUG_ON(err); /* perma-pinned should incr a counter */
2589 for_each_child(ce, child) {
2590 err = eb_pin_timeline(eb, child, throttle);
2595 err = eb_pin_timeline(eb, ce, throttle);
2599 eb->args->flags |= __EXEC_ENGINE_PINNED;
2603 for_each_child(ce, child) {
2605 mutex_lock(&child->timeline->mutex);
2606 intel_context_exit(child);
2607 mutex_unlock(&child->timeline->mutex);
2610 for_each_child(ce, child)
2611 intel_context_unpin(child);
2612 intel_context_unpin(ce);
2616 static void eb_unpin_engine(struct i915_execbuffer *eb)
2618 struct intel_context *ce = eb->context, *child;
2620 if (!(eb->args->flags & __EXEC_ENGINE_PINNED))
2623 eb->args->flags &= ~__EXEC_ENGINE_PINNED;
2625 for_each_child(ce, child) {
2626 mutex_lock(&child->timeline->mutex);
2627 intel_context_exit(child);
2628 mutex_unlock(&child->timeline->mutex);
2630 intel_context_unpin(child);
2633 mutex_lock(&ce->timeline->mutex);
2634 intel_context_exit(ce);
2635 mutex_unlock(&ce->timeline->mutex);
2637 intel_context_unpin(ce);
2641 eb_select_legacy_ring(struct i915_execbuffer *eb)
2643 struct drm_i915_private *i915 = eb->i915;
2644 struct drm_i915_gem_execbuffer2 *args = eb->args;
2645 unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
2647 if (user_ring_id != I915_EXEC_BSD &&
2648 (args->flags & I915_EXEC_BSD_MASK)) {
2650 "execbuf with non bsd ring but with invalid "
2651 "bsd dispatch flags: %d\n", (int)(args->flags));
2655 if (user_ring_id == I915_EXEC_BSD && num_vcs_engines(i915) > 1) {
2656 unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
2658 if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
2659 bsd_idx = gen8_dispatch_bsd_engine(i915, eb->file);
2660 } else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
2661 bsd_idx <= I915_EXEC_BSD_RING2) {
2662 bsd_idx >>= I915_EXEC_BSD_SHIFT;
2666 "execbuf with unknown bsd ring: %u\n",
2671 return _VCS(bsd_idx);
2674 if (user_ring_id >= ARRAY_SIZE(user_ring_map)) {
2675 drm_dbg(&i915->drm, "execbuf with unknown ring: %u\n",
2680 return user_ring_map[user_ring_id];
2684 eb_select_engine(struct i915_execbuffer *eb)
2686 struct intel_context *ce, *child;
2690 if (i915_gem_context_user_engines(eb->gem_context))
2691 idx = eb->args->flags & I915_EXEC_RING_MASK;
2693 idx = eb_select_legacy_ring(eb);
2695 ce = i915_gem_context_get_engine(eb->gem_context, idx);
2699 if (intel_context_is_parallel(ce)) {
2700 if (eb->buffer_count < ce->parallel.number_children + 1) {
2701 intel_context_put(ce);
2704 if (eb->batch_start_offset || eb->args->batch_len) {
2705 intel_context_put(ce);
2709 eb->num_batches = ce->parallel.number_children + 1;
2711 for_each_child(ce, child)
2712 intel_context_get(child);
2713 intel_gt_pm_get(ce->engine->gt);
2715 if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) {
2716 err = intel_context_alloc_state(ce);
2720 for_each_child(ce, child) {
2721 if (!test_bit(CONTEXT_ALLOC_BIT, &child->flags)) {
2722 err = intel_context_alloc_state(child);
2729 * ABI: Before userspace accesses the GPU (e.g. execbuffer), report
2730 * EIO if the GPU is already wedged.
2732 err = intel_gt_terminally_wedged(ce->engine->gt);
2736 if (!i915_vm_tryget(ce->vm)) {
2742 eb->gt = ce->engine->gt;
2745 * Make sure engine pool stays alive even if we call intel_context_put
2746 * during ww handling. The pool is destroyed when last pm reference
2747 * is dropped, which breaks our -EDEADLK handling.
2752 intel_gt_pm_put(ce->engine->gt);
2753 for_each_child(ce, child)
2754 intel_context_put(child);
2755 intel_context_put(ce);
2760 eb_put_engine(struct i915_execbuffer *eb)
2762 struct intel_context *child;
2764 i915_vm_put(eb->context->vm);
2765 intel_gt_pm_put(eb->gt);
2766 for_each_child(eb->context, child)
2767 intel_context_put(child);
2768 intel_context_put(eb->context);
2772 __free_fence_array(struct eb_fence *fences, unsigned int n)
2775 drm_syncobj_put(ptr_mask_bits(fences[n].syncobj, 2));
2776 dma_fence_put(fences[n].dma_fence);
2777 dma_fence_chain_free(fences[n].chain_fence);
2783 add_timeline_fence_array(struct i915_execbuffer *eb,
2784 const struct drm_i915_gem_execbuffer_ext_timeline_fences *timeline_fences)
2786 struct drm_i915_gem_exec_fence __user *user_fences;
2787 u64 __user *user_values;
2792 nfences = timeline_fences->fence_count;
2796 /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2797 BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2798 if (nfences > min_t(unsigned long,
2799 ULONG_MAX / sizeof(*user_fences),
2800 SIZE_MAX / sizeof(*f)) - eb->num_fences)
2803 user_fences = u64_to_user_ptr(timeline_fences->handles_ptr);
2804 if (!access_ok(user_fences, nfences * sizeof(*user_fences)))
2807 user_values = u64_to_user_ptr(timeline_fences->values_ptr);
2808 if (!access_ok(user_values, nfences * sizeof(*user_values)))
2811 f = krealloc(eb->fences,
2812 (eb->num_fences + nfences) * sizeof(*f),
2813 __GFP_NOWARN | GFP_KERNEL);
2818 f += eb->num_fences;
2820 BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2821 ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2824 struct drm_i915_gem_exec_fence user_fence;
2825 struct drm_syncobj *syncobj;
2826 struct dma_fence *fence = NULL;
2829 if (__copy_from_user(&user_fence,
2831 sizeof(user_fence)))
2834 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2837 if (__get_user(point, user_values++))
2840 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2842 drm_dbg(&eb->i915->drm,
2843 "Invalid syncobj handle provided\n");
2847 fence = drm_syncobj_fence_get(syncobj);
2849 if (!fence && user_fence.flags &&
2850 !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2851 drm_dbg(&eb->i915->drm,
2852 "Syncobj handle has no fence\n");
2853 drm_syncobj_put(syncobj);
2858 err = dma_fence_chain_find_seqno(&fence, point);
2860 if (err && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2861 drm_dbg(&eb->i915->drm,
2862 "Syncobj handle missing requested point %llu\n",
2864 dma_fence_put(fence);
2865 drm_syncobj_put(syncobj);
2870 * A point might have been signaled already and
2871 * garbage collected from the timeline. In this case
2872 * just ignore the point and carry on.
2874 if (!fence && !(user_fence.flags & I915_EXEC_FENCE_SIGNAL)) {
2875 drm_syncobj_put(syncobj);
2880 * For timeline syncobjs we need to preallocate chains for
2883 if (point != 0 && user_fence.flags & I915_EXEC_FENCE_SIGNAL) {
2885 * Waiting and signaling the same point (when point !=
2886 * 0) would break the timeline.
2888 if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2889 drm_dbg(&eb->i915->drm,
2890 "Trying to wait & signal the same timeline point.\n");
2891 dma_fence_put(fence);
2892 drm_syncobj_put(syncobj);
2896 f->chain_fence = dma_fence_chain_alloc();
2897 if (!f->chain_fence) {
2898 drm_syncobj_put(syncobj);
2899 dma_fence_put(fence);
2903 f->chain_fence = NULL;
2906 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2907 f->dma_fence = fence;
2916 static int add_fence_array(struct i915_execbuffer *eb)
2918 struct drm_i915_gem_execbuffer2 *args = eb->args;
2919 struct drm_i915_gem_exec_fence __user *user;
2920 unsigned long num_fences = args->num_cliprects;
2923 if (!(args->flags & I915_EXEC_FENCE_ARRAY))
2929 /* Check multiplication overflow for access_ok() and kvmalloc_array() */
2930 BUILD_BUG_ON(sizeof(size_t) > sizeof(unsigned long));
2931 if (num_fences > min_t(unsigned long,
2932 ULONG_MAX / sizeof(*user),
2933 SIZE_MAX / sizeof(*f) - eb->num_fences))
2936 user = u64_to_user_ptr(args->cliprects_ptr);
2937 if (!access_ok(user, num_fences * sizeof(*user)))
2940 f = krealloc(eb->fences,
2941 (eb->num_fences + num_fences) * sizeof(*f),
2942 __GFP_NOWARN | GFP_KERNEL);
2947 f += eb->num_fences;
2948 while (num_fences--) {
2949 struct drm_i915_gem_exec_fence user_fence;
2950 struct drm_syncobj *syncobj;
2951 struct dma_fence *fence = NULL;
2953 if (__copy_from_user(&user_fence, user++, sizeof(user_fence)))
2956 if (user_fence.flags & __I915_EXEC_FENCE_UNKNOWN_FLAGS)
2959 syncobj = drm_syncobj_find(eb->file, user_fence.handle);
2961 drm_dbg(&eb->i915->drm,
2962 "Invalid syncobj handle provided\n");
2966 if (user_fence.flags & I915_EXEC_FENCE_WAIT) {
2967 fence = drm_syncobj_fence_get(syncobj);
2969 drm_dbg(&eb->i915->drm,
2970 "Syncobj handle has no fence\n");
2971 drm_syncobj_put(syncobj);
2976 BUILD_BUG_ON(~(ARCH_KMALLOC_MINALIGN - 1) &
2977 ~__I915_EXEC_FENCE_UNKNOWN_FLAGS);
2979 f->syncobj = ptr_pack_bits(syncobj, user_fence.flags, 2);
2980 f->dma_fence = fence;
2982 f->chain_fence = NULL;
2990 static void put_fence_array(struct eb_fence *fences, int num_fences)
2993 __free_fence_array(fences, num_fences);
2997 await_fence_array(struct i915_execbuffer *eb,
2998 struct i915_request *rq)
3003 for (n = 0; n < eb->num_fences; n++) {
3004 if (!eb->fences[n].dma_fence)
3007 err = i915_request_await_dma_fence(rq, eb->fences[n].dma_fence);
3015 static void signal_fence_array(const struct i915_execbuffer *eb,
3016 struct dma_fence * const fence)
3020 for (n = 0; n < eb->num_fences; n++) {
3021 struct drm_syncobj *syncobj;
3024 syncobj = ptr_unpack_bits(eb->fences[n].syncobj, &flags, 2);
3025 if (!(flags & I915_EXEC_FENCE_SIGNAL))
3028 if (eb->fences[n].chain_fence) {
3029 drm_syncobj_add_point(syncobj,
3030 eb->fences[n].chain_fence,
3032 eb->fences[n].value);
3034 * The chain's ownership is transferred to the
3037 eb->fences[n].chain_fence = NULL;
3039 drm_syncobj_replace_fence(syncobj, fence);
3045 parse_timeline_fences(struct i915_user_extension __user *ext, void *data)
3047 struct i915_execbuffer *eb = data;
3048 struct drm_i915_gem_execbuffer_ext_timeline_fences timeline_fences;
3050 if (copy_from_user(&timeline_fences, ext, sizeof(timeline_fences)))
3053 return add_timeline_fence_array(eb, &timeline_fences);
3056 static void retire_requests(struct intel_timeline *tl, struct i915_request *end)
3058 struct i915_request *rq, *rn;
3060 list_for_each_entry_safe(rq, rn, &tl->requests, link)
3061 if (rq == end || !i915_request_retire(rq))
3065 static int eb_request_add(struct i915_execbuffer *eb, struct i915_request *rq,
3066 int err, bool last_parallel)
3068 struct intel_timeline * const tl = i915_request_timeline(rq);
3069 struct i915_sched_attr attr = {};
3070 struct i915_request *prev;
3072 lockdep_assert_held(&tl->mutex);
3073 lockdep_unpin_lock(&tl->mutex, rq->cookie);
3075 trace_i915_request_add(rq);
3077 prev = __i915_request_commit(rq);
3079 /* Check that the context wasn't destroyed before submission */
3080 if (likely(!intel_context_is_closed(eb->context))) {
3081 attr = eb->gem_context->sched;
3083 /* Serialise with context_close via the add_to_timeline */
3084 i915_request_set_error_once(rq, -ENOENT);
3085 __i915_request_skip(rq);
3086 err = -ENOENT; /* override any transient errors */
3089 if (intel_context_is_parallel(eb->context)) {
3091 __i915_request_skip(rq);
3092 set_bit(I915_FENCE_FLAG_SKIP_PARALLEL,
3096 set_bit(I915_FENCE_FLAG_SUBMIT_PARALLEL,
3100 __i915_request_queue(rq, &attr);
3102 /* Try to clean up the client's timeline after submitting the request */
3104 retire_requests(tl, prev);
3106 mutex_unlock(&tl->mutex);
3111 static int eb_requests_add(struct i915_execbuffer *eb, int err)
3116 * We iterate in reverse order of creation to release timeline mutexes in
3119 for_each_batch_add_order(eb, i) {
3120 struct i915_request *rq = eb->requests[i];
3124 err |= eb_request_add(eb, rq, err, i == 0);
3130 static const i915_user_extension_fn execbuf_extensions[] = {
3131 [DRM_I915_GEM_EXECBUFFER_EXT_TIMELINE_FENCES] = parse_timeline_fences,
3135 parse_execbuf2_extensions(struct drm_i915_gem_execbuffer2 *args,
3136 struct i915_execbuffer *eb)
3138 if (!(args->flags & I915_EXEC_USE_EXTENSIONS))
3141 /* The execbuf2 extension mechanism reuses cliprects_ptr. So we cannot
3142 * have another flag also using it at the same time.
3144 if (eb->args->flags & I915_EXEC_FENCE_ARRAY)
3147 if (args->num_cliprects != 0)
3150 return i915_user_extensions(u64_to_user_ptr(args->cliprects_ptr),
3152 ARRAY_SIZE(execbuf_extensions),
3156 static void eb_requests_get(struct i915_execbuffer *eb)
3160 for_each_batch_create_order(eb, i) {
3161 if (!eb->requests[i])
3164 i915_request_get(eb->requests[i]);
3168 static void eb_requests_put(struct i915_execbuffer *eb)
3172 for_each_batch_create_order(eb, i) {
3173 if (!eb->requests[i])
3176 i915_request_put(eb->requests[i]);
3180 static struct sync_file *
3181 eb_composite_fence_create(struct i915_execbuffer *eb, int out_fence_fd)
3183 struct sync_file *out_fence = NULL;
3184 struct dma_fence_array *fence_array;
3185 struct dma_fence **fences;
3188 GEM_BUG_ON(!intel_context_is_parent(eb->context));
3190 fences = kmalloc_array(eb->num_batches, sizeof(*fences), GFP_KERNEL);
3192 return ERR_PTR(-ENOMEM);
3194 for_each_batch_create_order(eb, i) {
3195 fences[i] = &eb->requests[i]->fence;
3196 __set_bit(I915_FENCE_FLAG_COMPOSITE,
3197 &eb->requests[i]->fence.flags);
3200 fence_array = dma_fence_array_create(eb->num_batches,
3202 eb->context->parallel.fence_context,
3203 eb->context->parallel.seqno++,
3207 return ERR_PTR(-ENOMEM);
3210 /* Move ownership to the dma_fence_array created above */
3211 for_each_batch_create_order(eb, i)
3212 dma_fence_get(fences[i]);
3214 if (out_fence_fd != -1) {
3215 out_fence = sync_file_create(&fence_array->base);
3216 /* sync_file now owns fence_arry, drop creation ref */
3217 dma_fence_put(&fence_array->base);
3219 return ERR_PTR(-ENOMEM);
3222 eb->composite_fence = &fence_array->base;
3227 static struct sync_file *
3228 eb_fences_add(struct i915_execbuffer *eb, struct i915_request *rq,
3229 struct dma_fence *in_fence, int out_fence_fd)
3231 struct sync_file *out_fence = NULL;
3234 if (unlikely(eb->gem_context->syncobj)) {
3235 struct dma_fence *fence;
3237 fence = drm_syncobj_fence_get(eb->gem_context->syncobj);
3238 err = i915_request_await_dma_fence(rq, fence);
3239 dma_fence_put(fence);
3241 return ERR_PTR(err);
3245 if (eb->args->flags & I915_EXEC_FENCE_SUBMIT)
3246 err = i915_request_await_execution(rq, in_fence);
3248 err = i915_request_await_dma_fence(rq, in_fence);
3250 return ERR_PTR(err);
3254 err = await_fence_array(eb, rq);
3256 return ERR_PTR(err);
3259 if (intel_context_is_parallel(eb->context)) {
3260 out_fence = eb_composite_fence_create(eb, out_fence_fd);
3261 if (IS_ERR(out_fence))
3262 return ERR_PTR(-ENOMEM);
3263 } else if (out_fence_fd != -1) {
3264 out_fence = sync_file_create(&rq->fence);
3266 return ERR_PTR(-ENOMEM);
3272 static struct intel_context *
3273 eb_find_context(struct i915_execbuffer *eb, unsigned int context_number)
3275 struct intel_context *child;
3277 if (likely(context_number == 0))
3280 for_each_child(eb->context, child)
3281 if (!--context_number)
3284 GEM_BUG_ON("Context not found");
3289 static struct sync_file *
3290 eb_requests_create(struct i915_execbuffer *eb, struct dma_fence *in_fence,
3293 struct sync_file *out_fence = NULL;
3296 for_each_batch_create_order(eb, i) {
3297 /* Allocate a request for this batch buffer nice and early. */
3298 eb->requests[i] = i915_request_create(eb_find_context(eb, i));
3299 if (IS_ERR(eb->requests[i])) {
3300 out_fence = ERR_CAST(eb->requests[i]);
3301 eb->requests[i] = NULL;
3306 * Only the first request added (committed to backend) has to
3307 * take the in fences into account as all subsequent requests
3308 * will have fences inserted inbetween them.
3310 if (i + 1 == eb->num_batches) {
3311 out_fence = eb_fences_add(eb, eb->requests[i],
3312 in_fence, out_fence_fd);
3313 if (IS_ERR(out_fence))
3318 * Not really on stack, but we don't want to call
3319 * kfree on the batch_snapshot when we put it, so use the
3320 * _onstack interface.
3322 if (eb->batches[i]->vma)
3323 eb->requests[i]->batch_res =
3324 i915_vma_resource_get(eb->batches[i]->vma->resource);
3325 if (eb->batch_pool) {
3326 GEM_BUG_ON(intel_context_is_parallel(eb->context));
3327 intel_gt_buffer_pool_mark_active(eb->batch_pool,
3336 i915_gem_do_execbuffer(struct drm_device *dev,
3337 struct drm_file *file,
3338 struct drm_i915_gem_execbuffer2 *args,
3339 struct drm_i915_gem_exec_object2 *exec)
3341 struct drm_i915_private *i915 = to_i915(dev);
3342 struct i915_execbuffer eb;
3343 struct dma_fence *in_fence = NULL;
3344 struct sync_file *out_fence = NULL;
3345 int out_fence_fd = -1;
3348 BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS);
3349 BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS &
3350 ~__EXEC_OBJECT_UNKNOWN_FLAGS);
3355 if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC))
3356 args->flags |= __EXEC_HAS_RELOC;
3359 eb.vma = (struct eb_vma *)(exec + args->buffer_count + 1);
3360 eb.vma[0].vma = NULL;
3361 eb.batch_pool = NULL;
3363 eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS;
3364 reloc_cache_init(&eb.reloc_cache, eb.i915);
3366 eb.buffer_count = args->buffer_count;
3367 eb.batch_start_offset = args->batch_start_offset;
3368 eb.trampoline = NULL;
3373 eb_capture_list_clear(&eb);
3375 memset(eb.requests, 0, sizeof(struct i915_request *) *
3376 ARRAY_SIZE(eb.requests));
3377 eb.composite_fence = NULL;
3380 if (args->flags & I915_EXEC_SECURE) {
3381 if (GRAPHICS_VER(i915) >= 11)
3384 /* Return -EPERM to trigger fallback code on old binaries. */
3385 if (!HAS_SECURE_BATCHES(i915))
3388 if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN))
3391 eb.batch_flags |= I915_DISPATCH_SECURE;
3393 if (args->flags & I915_EXEC_IS_PINNED)
3394 eb.batch_flags |= I915_DISPATCH_PINNED;
3396 err = parse_execbuf2_extensions(args, &eb);
3400 err = add_fence_array(&eb);
3404 #define IN_FENCES (I915_EXEC_FENCE_IN | I915_EXEC_FENCE_SUBMIT)
3405 if (args->flags & IN_FENCES) {
3406 if ((args->flags & IN_FENCES) == IN_FENCES)
3409 in_fence = sync_file_get_fence(lower_32_bits(args->rsvd2));
3417 if (args->flags & I915_EXEC_FENCE_OUT) {
3418 out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
3419 if (out_fence_fd < 0) {
3425 err = eb_create(&eb);
3429 GEM_BUG_ON(!eb.lut_size);
3431 err = eb_select_context(&eb);
3435 err = eb_select_engine(&eb);
3439 err = eb_lookup_vmas(&eb);
3441 eb_release_vmas(&eb, true);
3445 i915_gem_ww_ctx_init(&eb.ww, true);
3447 err = eb_relocate_parse(&eb);
3450 * If the user expects the execobject.offset and
3451 * reloc.presumed_offset to be an exact match,
3452 * as for using NO_RELOC, then we cannot update
3453 * the execobject.offset until we have completed
3456 args->flags &= ~__EXEC_HAS_RELOC;
3460 ww_acquire_done(&eb.ww.ctx);
3461 err = eb_capture_stage(&eb);
3465 out_fence = eb_requests_create(&eb, in_fence, out_fence_fd);
3466 if (IS_ERR(out_fence)) {
3467 err = PTR_ERR(out_fence);
3475 err = eb_submit(&eb);
3478 eb_requests_get(&eb);
3479 err = eb_requests_add(&eb, err);
3482 signal_fence_array(&eb, eb.composite_fence ?
3483 eb.composite_fence :
3484 &eb.requests[0]->fence);
3486 if (unlikely(eb.gem_context->syncobj)) {
3487 drm_syncobj_replace_fence(eb.gem_context->syncobj,
3488 eb.composite_fence ?
3489 eb.composite_fence :
3490 &eb.requests[0]->fence);
3495 fd_install(out_fence_fd, out_fence->file);
3496 args->rsvd2 &= GENMASK_ULL(31, 0); /* keep in-fence */
3497 args->rsvd2 |= (u64)out_fence_fd << 32;
3500 fput(out_fence->file);
3504 if (!out_fence && eb.composite_fence)
3505 dma_fence_put(eb.composite_fence);
3507 eb_requests_put(&eb);
3510 eb_release_vmas(&eb, true);
3511 WARN_ON(err == -EDEADLK);
3512 i915_gem_ww_ctx_fini(&eb.ww);
3515 intel_gt_buffer_pool_put(eb.batch_pool);
3519 i915_gem_context_put(eb.gem_context);
3523 if (out_fence_fd != -1)
3524 put_unused_fd(out_fence_fd);
3526 dma_fence_put(in_fence);
3528 put_fence_array(eb.fences, eb.num_fences);
3532 static size_t eb_element_size(void)
3534 return sizeof(struct drm_i915_gem_exec_object2) + sizeof(struct eb_vma);
3537 static bool check_buffer_count(size_t count)
3539 const size_t sz = eb_element_size();
3542 * When using LUT_HANDLE, we impose a limit of INT_MAX for the lookup
3543 * array size (see eb_create()). Otherwise, we can accept an array as
3544 * large as can be addressed (though use large arrays at your peril)!
3547 return !(count < 1 || count > INT_MAX || count > SIZE_MAX / sz - 1);
3551 i915_gem_execbuffer2_ioctl(struct drm_device *dev, void *data,
3552 struct drm_file *file)
3554 struct drm_i915_private *i915 = to_i915(dev);
3555 struct drm_i915_gem_execbuffer2 *args = data;
3556 struct drm_i915_gem_exec_object2 *exec2_list;
3557 const size_t count = args->buffer_count;
3560 if (!check_buffer_count(count)) {
3561 drm_dbg(&i915->drm, "execbuf2 with %zd buffers\n", count);
3565 err = i915_gem_check_execbuffer(i915, args);
3569 /* Allocate extra slots for use by the command parser */
3570 exec2_list = kvmalloc_array(count + 2, eb_element_size(),
3571 __GFP_NOWARN | GFP_KERNEL);
3572 if (exec2_list == NULL) {
3573 drm_dbg(&i915->drm, "Failed to allocate exec list for %zd buffers\n",
3577 if (copy_from_user(exec2_list,
3578 u64_to_user_ptr(args->buffers_ptr),
3579 sizeof(*exec2_list) * count)) {
3580 drm_dbg(&i915->drm, "copy %zd exec entries failed\n", count);
3585 err = i915_gem_do_execbuffer(dev, file, args, exec2_list);
3588 * Now that we have begun execution of the batchbuffer, we ignore
3589 * any new error after this point. Also given that we have already
3590 * updated the associated relocations, we try to write out the current
3591 * object locations irrespective of any error.
3593 if (args->flags & __EXEC_HAS_RELOC) {
3594 struct drm_i915_gem_exec_object2 __user *user_exec_list =
3595 u64_to_user_ptr(args->buffers_ptr);
3598 /* Copy the new buffer offsets back to the user's exec list. */
3600 * Note: count * sizeof(*user_exec_list) does not overflow,
3601 * because we checked 'count' in check_buffer_count().
3603 * And this range already got effectively checked earlier
3604 * when we did the "copy_from_user()" above.
3606 if (!user_write_access_begin(user_exec_list,
3607 count * sizeof(*user_exec_list)))
3610 for (i = 0; i < args->buffer_count; i++) {
3611 if (!(exec2_list[i].offset & UPDATE))
3614 exec2_list[i].offset =
3615 gen8_canonical_addr(exec2_list[i].offset & PIN_OFFSET_MASK);
3616 unsafe_put_user(exec2_list[i].offset,
3617 &user_exec_list[i].offset,
3621 user_write_access_end();
3625 args->flags &= ~__I915_EXEC_UNKNOWN_FLAGS;