drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38
  39 #include "i915_drv.h"
  40 #include "i915_reg.h"
  41 #include "intel_atomic.h"
  42 #include "intel_connector.h"
  43 #include "intel_crtc.h"
  44 #include "intel_de.h"
  45 #include "intel_display_types.h"
  46 #include "intel_fifo_underrun.h"
  47 #include "intel_gmbus.h"
  48 #include "intel_hdmi.h"
  49 #include "intel_hotplug.h"
  50 #include "intel_panel.h"
  51 #include "intel_sdvo.h"
  52 #include "intel_sdvo_regs.h"
  53
  54 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  55 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  56 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  57 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  58
  59 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  60                         SDVO_TV_MASK)
  61
  62 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  63 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  64 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  65 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  66 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  67
  68
  69 static const char * const tv_format_names[] = {
  70         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  71         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  72         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  73         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  74         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  75         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  76         "SECAM_60"
  77 };
  78
  79 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  80
  81 struct intel_sdvo {
  82         struct intel_encoder base;
  83
  84         struct i2c_adapter *i2c;
  85         u8 slave_addr;
  86
  87         struct i2c_adapter ddc;
  88
  89         /* Register for the SDVO device: SDVOB or SDVOC */
  90         i915_reg_t sdvo_reg;
  91
  92         /* Active outputs controlled by this SDVO output */
  93         u16 controlled_output;
  94
  95         /*
  96          * Capabilities of the SDVO device returned by
  97          * intel_sdvo_get_capabilities()
  98          */
  99         struct intel_sdvo_caps caps;
 100
 101         u8 colorimetry_cap;
 102
 103         /* Pixel clock limitations reported by the SDVO device, in kHz */
 104         int pixel_clock_min, pixel_clock_max;
 105
 106         /*
 107         * For multiple function SDVO device,
 108         * this is for current attached outputs.
 109         */
 110         u16 attached_output;
 111
 112         /*
 113          * Hotplug activation bits for this device
 114          */
 115         u16 hotplug_active;
 116
 117         enum port port;
 118
 119         bool has_hdmi_monitor;
 120         bool has_hdmi_audio;
 121
 122         /* DDC bus used by this SDVO encoder */
 123         u8 ddc_bus;
 124
 125         /*
 126          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 127          */
 128         u8 dtd_sdvo_flags;
 129 };
 130
 131 struct intel_sdvo_connector {
 132         struct intel_connector base;
 133
 134         /* Mark the type of connector */
 135         u16 output_flag;
 136
 137         /* This contains all current supported TV format */
 138         u8 tv_format_supported[TV_FORMAT_NUM];
 139         int   format_supported_num;
 140         struct drm_property *tv_format;
 141
 142         /* add the property for the SDVO-TV */
 143         struct drm_property *left;
 144         struct drm_property *right;
 145         struct drm_property *top;
 146         struct drm_property *bottom;
 147         struct drm_property *hpos;
 148         struct drm_property *vpos;
 149         struct drm_property *contrast;
 150         struct drm_property *saturation;
 151         struct drm_property *hue;
 152         struct drm_property *sharpness;
 153         struct drm_property *flicker_filter;
 154         struct drm_property *flicker_filter_adaptive;
 155         struct drm_property *flicker_filter_2d;
 156         struct drm_property *tv_chroma_filter;
 157         struct drm_property *tv_luma_filter;
 158         struct drm_property *dot_crawl;
 159
 160         /* add the property for the SDVO-TV/LVDS */
 161         struct drm_property *brightness;
 162
 163         /* this is to get the range of margin.*/
 164         u32 max_hscan, max_vscan;
 165
 166         /**
 167          * This is set if we treat the device as HDMI, instead of DVI.
 168          */
 169         bool is_hdmi;
 170 };
 171
 172 struct intel_sdvo_connector_state {
 173         /* base.base: tv.saturation/contrast/hue/brightness */
 174         struct intel_digital_connector_state base;
 175
 176         struct {
 177                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 178                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 179                 unsigned chroma_filter, luma_filter, dot_crawl;
 180         } tv;
 181 };
 182
 183 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 184 {
 185         return container_of(encoder, struct intel_sdvo, base);
 186 }
 187
 188 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 189 {
 190         return to_sdvo(intel_attached_encoder(connector));
 191 }
 192
 193 static struct intel_sdvo_connector *
 194 to_intel_sdvo_connector(struct drm_connector *connector)
 195 {
 196         return container_of(connector, struct intel_sdvo_connector, base.base);
 197 }
 198
 199 #define to_intel_sdvo_connector_state(conn_state) \
 200         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 201
 202 static bool
 203 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 204 static bool
 205 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 206                               struct intel_sdvo_connector *intel_sdvo_connector,
 207                               int type);
 208 static bool
 209 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 210                                    struct intel_sdvo_connector *intel_sdvo_connector);
 211
 212 /*
 213  * Writes the SDVOB or SDVOC with the given value, but always writes both
 214  * SDVOB and SDVOC to work around apparent hardware issues (according to
 215  * comments in the BIOS).
 216  */
 217 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 218 {
 219         struct drm_device *dev = intel_sdvo->base.base.dev;
 220         struct drm_i915_private *dev_priv = to_i915(dev);
 221         u32 bval = val, cval = val;
 222         int i;
 223
 224         if (HAS_PCH_SPLIT(dev_priv)) {
 225                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 226                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 227                 /*
 228                  * HW workaround, need to write this twice for issue
 229                  * that may result in first write getting masked.
 230                  */
 231                 if (HAS_PCH_IBX(dev_priv)) {
 232                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 233                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 234                 }
 235                 return;
 236         }
 237
 238         if (intel_sdvo->port == PORT_B)
 239                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 240         else
 241                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 242
 243         /*
 244          * Write the registers twice for luck. Sometimes,
 245          * writing them only once doesn't appear to 'stick'.
 246          * The BIOS does this too. Yay, magic
 247          */
 248         for (i = 0; i < 2; i++) {
 249                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 250                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 251
 252                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 253                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 254         }
 255 }
 256
 257 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 258 {
 259         struct i2c_msg msgs[] = {
 260                 {
 261                         .addr = intel_sdvo->slave_addr,
 262                         .flags = 0,
 263                         .len = 1,
 264                         .buf = &addr,
 265                 },
 266                 {
 267                         .addr = intel_sdvo->slave_addr,
 268                         .flags = I2C_M_RD,
 269                         .len = 1,
 270                         .buf = ch,
 271                 }
 272         };
 273         int ret;
 274
 275         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 276                 return true;
 277
 278         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 279         return false;
 280 }
 281
 282 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 283
 284 /** Mapping of command numbers to names, for debug output */
 285 static const struct {
 286         u8 cmd;
 287         const char *name;
 288 } __packed sdvo_cmd_names[] = {
 289         SDVO_CMD_NAME_ENTRY(RESET),
 290         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 291         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 292         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 293         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 294         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 295         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 296         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 297         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 298         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 299         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 300         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 301         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 302         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 303         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 304         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 305         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 306         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 307         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 308         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 309         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 310         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 311         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 312         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 313         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 314         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 315         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 316         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 317         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 318         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 319         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 320         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 321         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 322         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 323         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 324         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 325         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 326         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 327         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 328         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 329         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 330         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 331
 332         /* Add the op code for SDVO enhancements */
 333         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 334         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 335         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 336         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 337         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 338         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 339         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 340         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 341         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 342         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 343         SDVO_CMD_NAME_ENTRY(GET_HUE),
 344         SDVO_CMD_NAME_ENTRY(SET_HUE),
 345         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 346         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 347         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 348         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 349         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 350         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 351         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 352         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 353         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 354         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 355         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 356         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 357         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 358         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 359         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 360         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 361         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 362         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 363         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 364         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 365         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 366         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 367         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 368         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 369         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 370         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 371         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 372         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 373         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 374         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 375         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 376         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 377
 378         /* HDMI op code */
 379         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 380         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 381         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 382         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 383         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 384         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 385         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 386         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 387         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 388         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 389         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 390         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 391         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 392         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 393         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 394         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 395         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 396         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 397         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 398         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 399 };
 400
 401 #undef SDVO_CMD_NAME_ENTRY
 402
 403 static const char *sdvo_cmd_name(u8 cmd)
 404 {
 405         int i;
 406
 407         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 408                 if (cmd == sdvo_cmd_names[i].cmd)
 409                         return sdvo_cmd_names[i].name;
 410         }
 411
 412         return NULL;
 413 }
 414
 415 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 416
 417 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 418                                    const void *args, int args_len)
 419 {
 420         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 421         const char *cmd_name;
 422         int i, pos = 0;
 423         char buffer[64];
 424
 425 #define BUF_PRINT(args...) \
 426         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 427
 428         for (i = 0; i < args_len; i++) {
 429                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 430         }
 431         for (; i < 8; i++) {
 432                 BUF_PRINT("   ");
 433         }
 434
 435         cmd_name = sdvo_cmd_name(cmd);
 436         if (cmd_name)
 437                 BUF_PRINT("(%s)", cmd_name);
 438         else
 439                 BUF_PRINT("(%02X)", cmd);
 440
 441         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 442 #undef BUF_PRINT
 443
 444         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 445 }
 446
 447 static const char * const cmd_status_names[] = {
 448         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 449         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 450         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 451         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 452         [SDVO_CMD_STATUS_PENDING] = "Pending",
 453         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 454         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 455 };
 456
 457 static const char *sdvo_cmd_status(u8 status)
 458 {
 459         if (status < ARRAY_SIZE(cmd_status_names))
 460                 return cmd_status_names[status];
 461         else
 462                 return NULL;
 463 }
 464
 465 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 466                                    const void *args, int args_len,
 467                                    bool unlocked)
 468 {
 469         u8 *buf, status;
 470         struct i2c_msg *msgs;
 471         int i, ret = true;
 472
 473         /* Would be simpler to allocate both in one go ? */
 474         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 475         if (!buf)
 476                 return false;
 477
 478         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 479         if (!msgs) {
 480                 kfree(buf);
 481                 return false;
 482         }
 483
 484         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 485
 486         for (i = 0; i < args_len; i++) {
 487                 msgs[i].addr = intel_sdvo->slave_addr;
 488                 msgs[i].flags = 0;
 489                 msgs[i].len = 2;
 490                 msgs[i].buf = buf + 2 *i;
 491                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 492                 buf[2*i + 1] = ((u8*)args)[i];
 493         }
 494         msgs[i].addr = intel_sdvo->slave_addr;
 495         msgs[i].flags = 0;
 496         msgs[i].len = 2;
 497         msgs[i].buf = buf + 2*i;
 498         buf[2*i + 0] = SDVO_I2C_OPCODE;
 499         buf[2*i + 1] = cmd;
 500
 501         /* the following two are to read the response */
 502         status = SDVO_I2C_CMD_STATUS;
 503         msgs[i+1].addr = intel_sdvo->slave_addr;
 504         msgs[i+1].flags = 0;
 505         msgs[i+1].len = 1;
 506         msgs[i+1].buf = &status;
 507
 508         msgs[i+2].addr = intel_sdvo->slave_addr;
 509         msgs[i+2].flags = I2C_M_RD;
 510         msgs[i+2].len = 1;
 511         msgs[i+2].buf = &status;
 512
 513         if (unlocked)
 514                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 515         else
 516                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 517         if (ret < 0) {
 518                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 519                 ret = false;
 520                 goto out;
 521         }
 522         if (ret != i+3) {
 523                 /* failure in I2C transfer */
 524                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 525                 ret = false;
 526         }
 527
 528 out:
 529         kfree(msgs);
 530         kfree(buf);
 531         return ret;
 532 }
 533
 534 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 535                                  const void *args, int args_len)
 536 {
 537         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 538 }
 539
 540 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 541                                      void *response, int response_len)
 542 {
 543         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 544         const char *cmd_status;
 545         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 546         u8 status;
 547         int i, pos = 0;
 548         char buffer[64];
 549
 550         buffer[0] = '\0';
 551
 552         /*
 553          * The documentation states that all commands will be
 554          * processed within 15µs, and that we need only poll
 555          * the status byte a maximum of 3 times in order for the
 556          * command to be complete.
 557          *
 558          * Check 5 times in case the hardware failed to read the docs.
 559          *
 560          * Also beware that the first response by many devices is to
 561          * reply PENDING and stall for time. TVs are notorious for
 562          * requiring longer than specified to complete their replies.
 563          * Originally (in the DDX long ago), the delay was only ever 15ms
 564          * with an additional delay of 30ms applied for TVs added later after
 565          * many experiments. To accommodate both sets of delays, we do a
 566          * sequence of slow checks if the device is falling behind and fails
 567          * to reply within 5*15µs.
 568          */
 569         if (!intel_sdvo_read_byte(intel_sdvo,
 570                                   SDVO_I2C_CMD_STATUS,
 571                                   &status))
 572                 goto log_fail;
 573
 574         while ((status == SDVO_CMD_STATUS_PENDING ||
 575                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 576                 if (retry < 10)
 577                         msleep(15);
 578                 else
 579                         udelay(15);
 580
 581                 if (!intel_sdvo_read_byte(intel_sdvo,
 582                                           SDVO_I2C_CMD_STATUS,
 583                                           &status))
 584                         goto log_fail;
 585         }
 586
 587 #define BUF_PRINT(args...) \
 588         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 589
 590         cmd_status = sdvo_cmd_status(status);
 591         if (cmd_status)
 592                 BUF_PRINT("(%s)", cmd_status);
 593         else
 594                 BUF_PRINT("(??? %d)", status);
 595
 596         if (status != SDVO_CMD_STATUS_SUCCESS)
 597                 goto log_fail;
 598
 599         /* Read the command response */
 600         for (i = 0; i < response_len; i++) {
 601                 if (!intel_sdvo_read_byte(intel_sdvo,
 602                                           SDVO_I2C_RETURN_0 + i,
 603                                           &((u8 *)response)[i]))
 604                         goto log_fail;
 605                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 606         }
 607
 608         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 609 #undef BUF_PRINT
 610
 611         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 612         return true;
 613
 614 log_fail:
 615         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 616                       SDVO_NAME(intel_sdvo), buffer);
 617         return false;
 618 }
 619
 620 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 621 {
 622         if (adjusted_mode->crtc_clock >= 100000)
 623                 return 1;
 624         else if (adjusted_mode->crtc_clock >= 50000)
 625                 return 2;
 626         else
 627                 return 4;
 628 }
 629
 630 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 631                                                 u8 ddc_bus)
 632 {
 633         /* This must be the immediately preceding write before the i2c xfer */
 634         return __intel_sdvo_write_cmd(intel_sdvo,
 635                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 636                                       &ddc_bus, 1, false);
 637 }
 638
 639 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 640 {
 641         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 642                 return false;
 643
 644         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 645 }
 646
 647 static bool
 648 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 649 {
 650         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 651                 return false;
 652
 653         return intel_sdvo_read_response(intel_sdvo, value, len);
 654 }
 655
 656 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 657 {
 658         struct intel_sdvo_set_target_input_args targets = {0};
 659         return intel_sdvo_set_value(intel_sdvo,
 660                                     SDVO_CMD_SET_TARGET_INPUT,
 661                                     &targets, sizeof(targets));
 662 }
 663
 664 /*
 665  * Return whether each input is trained.
 666  *
 667  * This function is making an assumption about the layout of the response,
 668  * which should be checked against the docs.
 669  */
 670 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 671 {
 672         struct intel_sdvo_get_trained_inputs_response response;
 673
 674         BUILD_BUG_ON(sizeof(response) != 1);
 675         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 676                                   &response, sizeof(response)))
 677                 return false;
 678
 679         *input_1 = response.input0_trained;
 680         *input_2 = response.input1_trained;
 681         return true;
 682 }
 683
 684 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 685                                           u16 outputs)
 686 {
 687         return intel_sdvo_set_value(intel_sdvo,
 688                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 689                                     &outputs, sizeof(outputs));
 690 }
 691
 692 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 693                                           u16 *outputs)
 694 {
 695         return intel_sdvo_get_value(intel_sdvo,
 696                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 697                                     outputs, sizeof(*outputs));
 698 }
 699
 700 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 701                                                int mode)
 702 {
 703         u8 state = SDVO_ENCODER_STATE_ON;
 704
 705         switch (mode) {
 706         case DRM_MODE_DPMS_ON:
 707                 state = SDVO_ENCODER_STATE_ON;
 708                 break;
 709         case DRM_MODE_DPMS_STANDBY:
 710                 state = SDVO_ENCODER_STATE_STANDBY;
 711                 break;
 712         case DRM_MODE_DPMS_SUSPEND:
 713                 state = SDVO_ENCODER_STATE_SUSPEND;
 714                 break;
 715         case DRM_MODE_DPMS_OFF:
 716                 state = SDVO_ENCODER_STATE_OFF;
 717                 break;
 718         }
 719
 720         return intel_sdvo_set_value(intel_sdvo,
 721                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 722 }
 723
 724 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 725                                                    int *clock_min,
 726                                                    int *clock_max)
 727 {
 728         struct intel_sdvo_pixel_clock_range clocks;
 729
 730         BUILD_BUG_ON(sizeof(clocks) != 4);
 731         if (!intel_sdvo_get_value(intel_sdvo,
 732                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 733                                   &clocks, sizeof(clocks)))
 734                 return false;
 735
 736         /* Convert the values from units of 10 kHz to kHz. */
 737         *clock_min = clocks.min * 10;
 738         *clock_max = clocks.max * 10;
 739         return true;
 740 }
 741
 742 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 743                                          u16 outputs)
 744 {
 745         return intel_sdvo_set_value(intel_sdvo,
 746                                     SDVO_CMD_SET_TARGET_OUTPUT,
 747                                     &outputs, sizeof(outputs));
 748 }
 749
 750 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 751                                   struct intel_sdvo_dtd *dtd)
 752 {
 753         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 754                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 755 }
 756
 757 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 758                                   struct intel_sdvo_dtd *dtd)
 759 {
 760         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 761                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 762 }
 763
 764 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 765                                          struct intel_sdvo_dtd *dtd)
 766 {
 767         return intel_sdvo_set_timing(intel_sdvo,
 768                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 769 }
 770
 771 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 772                                          struct intel_sdvo_dtd *dtd)
 773 {
 774         return intel_sdvo_set_timing(intel_sdvo,
 775                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 776 }
 777
 778 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 779                                         struct intel_sdvo_dtd *dtd)
 780 {
 781         return intel_sdvo_get_timing(intel_sdvo,
 782                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 783 }
 784
 785 static bool
 786 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 787                                          struct intel_sdvo_connector *intel_sdvo_connector,
 788                                          const struct drm_display_mode *mode)
 789 {
 790         struct intel_sdvo_preferred_input_timing_args args;
 791
 792         memset(&args, 0, sizeof(args));
 793         args.clock = mode->clock / 10;
 794         args.width = mode->hdisplay;
 795         args.height = mode->vdisplay;
 796         args.interlace = 0;
 797
 798         if (IS_LVDS(intel_sdvo_connector)) {
 799                 const struct drm_display_mode *fixed_mode =
 800                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 801
 802                 if (fixed_mode->hdisplay != args.width ||
 803                     fixed_mode->vdisplay != args.height)
 804                         args.scaled = 1;
 805         }
 806
 807         return intel_sdvo_set_value(intel_sdvo,
 808                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 809                                     &args, sizeof(args));
 810 }
 811
 812 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 813                                                   struct intel_sdvo_dtd *dtd)
 814 {
 815         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 816         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 817         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 818                                     &dtd->part1, sizeof(dtd->part1)) &&
 819                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 820                                      &dtd->part2, sizeof(dtd->part2));
 821 }
 822
 823 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 824 {
 825         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 826 }
 827
 828 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 829                                          const struct drm_display_mode *mode)
 830 {
 831         u16 width, height;
 832         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 833         u16 h_sync_offset, v_sync_offset;
 834         int mode_clock;
 835
 836         memset(dtd, 0, sizeof(*dtd));
 837
 838         width = mode->hdisplay;
 839         height = mode->vdisplay;
 840
 841         /* do some mode translations */
 842         h_blank_len = mode->htotal - mode->hdisplay;
 843         h_sync_len = mode->hsync_end - mode->hsync_start;
 844
 845         v_blank_len = mode->vtotal - mode->vdisplay;
 846         v_sync_len = mode->vsync_end - mode->vsync_start;
 847
 848         h_sync_offset = mode->hsync_start - mode->hdisplay;
 849         v_sync_offset = mode->vsync_start - mode->vdisplay;
 850
 851         mode_clock = mode->clock;
 852         mode_clock /= 10;
 853         dtd->part1.clock = mode_clock;
 854
 855         dtd->part1.h_active = width & 0xff;
 856         dtd->part1.h_blank = h_blank_len & 0xff;
 857         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 858                 ((h_blank_len >> 8) & 0xf);
 859         dtd->part1.v_active = height & 0xff;
 860         dtd->part1.v_blank = v_blank_len & 0xff;
 861         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 862                 ((v_blank_len >> 8) & 0xf);
 863
 864         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 865         dtd->part2.h_sync_width = h_sync_len & 0xff;
 866         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 867                 (v_sync_len & 0xf);
 868         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 869                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 870                 ((v_sync_len & 0x30) >> 4);
 871
 872         dtd->part2.dtd_flags = 0x18;
 873         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 874                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 875         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 876                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 877         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 878                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 879
 880         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 881 }
 882
 883 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 884                                          const struct intel_sdvo_dtd *dtd)
 885 {
 886         struct drm_display_mode mode = {};
 887
 888         mode.hdisplay = dtd->part1.h_active;
 889         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 890         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 891         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 892         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 893         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 894         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 895         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 896
 897         mode.vdisplay = dtd->part1.v_active;
 898         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 899         mode.vsync_start = mode.vdisplay;
 900         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 901         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 902         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 903         mode.vsync_end = mode.vsync_start +
 904                 (dtd->part2.v_sync_off_width & 0xf);
 905         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 906         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 907         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 908
 909         mode.clock = dtd->part1.clock * 10;
 910
 911         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 912                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 913         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 914                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 915         else
 916                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 917         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 918                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 919         else
 920                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 921
 922         drm_mode_set_crtcinfo(&mode, 0);
 923
 924         drm_mode_copy(pmode, &mode);
 925 }
 926
 927 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 928 {
 929         struct intel_sdvo_encode encode;
 930
 931         BUILD_BUG_ON(sizeof(encode) != 2);
 932         return intel_sdvo_get_value(intel_sdvo,
 933                                   SDVO_CMD_GET_SUPP_ENCODE,
 934                                   &encode, sizeof(encode));
 935 }
 936
 937 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 938                                   u8 mode)
 939 {
 940         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 941 }
 942
 943 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 944                                        u8 mode)
 945 {
 946         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 947 }
 948
 949 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 950                                              u8 pixel_repeat)
 951 {
 952         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 953                                     &pixel_repeat, 1);
 954 }
 955
 956 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 957                                        u8 audio_state)
 958 {
 959         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 960                                     &audio_state, 1);
 961 }
 962
 963 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 964                                      u8 *hbuf_size)
 965 {
 966         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 967                                   hbuf_size, 1))
 968                 return false;
 969
 970         /* Buffer size is 0 based, hooray! However zero means zero. */
 971         if (*hbuf_size)
 972                 (*hbuf_size)++;
 973
 974         return true;
 975 }
 976
 977 #if 0
 978 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 979 {
 980         int i, j;
 981         u8 set_buf_index[2];
 982         u8 av_split;
 983         u8 buf_size;
 984         u8 buf[48];
 985         u8 *pos;
 986
 987         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 988
 989         for (i = 0; i <= av_split; i++) {
 990                 set_buf_index[0] = i; set_buf_index[1] = 0;
 991                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 992                                      set_buf_index, 2);
 993                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 994                 intel_sdvo_read_response(encoder, &buf_size, 1);
 995
 996                 pos = buf;
 997                 for (j = 0; j <= buf_size; j += 8) {
 998                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 999                                              NULL, 0);
1000                         intel_sdvo_read_response(encoder, pos, 8);
1001                         pos += 8;
1002                 }
1003         }
1004 }
1005 #endif
1006
1007 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1008                                        unsigned int if_index, u8 tx_rate,
1009                                        const u8 *data, unsigned int length)
1010 {
1011         u8 set_buf_index[2] = { if_index, 0 };
1012         u8 hbuf_size, tmp[8];
1013         int i;
1014
1015         if (!intel_sdvo_set_value(intel_sdvo,
1016                                   SDVO_CMD_SET_HBUF_INDEX,
1017                                   set_buf_index, 2))
1018                 return false;
1019
1020         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1021                 return false;
1022
1023         DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1024                       if_index, length, hbuf_size);
1025
1026         if (hbuf_size < length)
1027                 return false;
1028
1029         for (i = 0; i < hbuf_size; i += 8) {
1030                 memset(tmp, 0, 8);
1031                 if (i < length)
1032                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1033
1034                 if (!intel_sdvo_set_value(intel_sdvo,
1035                                           SDVO_CMD_SET_HBUF_DATA,
1036                                           tmp, 8))
1037                         return false;
1038         }
1039
1040         return intel_sdvo_set_value(intel_sdvo,
1041                                     SDVO_CMD_SET_HBUF_TXRATE,
1042                                     &tx_rate, 1);
1043 }
1044
1045 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1046                                          unsigned int if_index,
1047                                          u8 *data, unsigned int length)
1048 {
1049         u8 set_buf_index[2] = { if_index, 0 };
1050         u8 hbuf_size, tx_rate, av_split;
1051         int i;
1052
1053         if (!intel_sdvo_get_value(intel_sdvo,
1054                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1055                                   &av_split, 1))
1056                 return -ENXIO;
1057
1058         if (av_split < if_index)
1059                 return 0;
1060
1061         if (!intel_sdvo_set_value(intel_sdvo,
1062                                   SDVO_CMD_SET_HBUF_INDEX,
1063                                   set_buf_index, 2))
1064                 return -ENXIO;
1065
1066         if (!intel_sdvo_get_value(intel_sdvo,
1067                                   SDVO_CMD_GET_HBUF_TXRATE,
1068                                   &tx_rate, 1))
1069                 return -ENXIO;
1070
1071         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1072                 return 0;
1073
1074         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1075                 return false;
1076
1077         DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1078                       if_index, length, hbuf_size);
1079
1080         hbuf_size = min_t(unsigned int, length, hbuf_size);
1081
1082         for (i = 0; i < hbuf_size; i += 8) {
1083                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1084                         return -ENXIO;
1085                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1086                                               min_t(unsigned int, 8, hbuf_size - i)))
1087                         return -ENXIO;
1088         }
1089
1090         return hbuf_size;
1091 }
1092
1093 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1094                                              struct intel_crtc_state *crtc_state,
1095                                              struct drm_connector_state *conn_state)
1096 {
1097         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1098         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1099         const struct drm_display_mode *adjusted_mode =
1100                 &crtc_state->hw.adjusted_mode;
1101         int ret;
1102
1103         if (!crtc_state->has_hdmi_sink)
1104                 return true;
1105
1106         crtc_state->infoframes.enable |=
1107                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1108
1109         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1110                                                        conn_state->connector,
1111                                                        adjusted_mode);
1112         if (ret)
1113                 return false;
1114
1115         drm_hdmi_avi_infoframe_quant_range(frame,
1116                                            conn_state->connector,
1117                                            adjusted_mode,
1118                                            crtc_state->limited_color_range ?
1119                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1120                                            HDMI_QUANTIZATION_RANGE_FULL);
1121
1122         ret = hdmi_avi_infoframe_check(frame);
1123         if (drm_WARN_ON(&dev_priv->drm, ret))
1124                 return false;
1125
1126         return true;
1127 }
1128
1129 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1130                                          const struct intel_crtc_state *crtc_state)
1131 {
1132         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1133         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1134         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1135         ssize_t len;
1136
1137         if ((crtc_state->infoframes.enable &
1138              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1139                 return true;
1140
1141         if (drm_WARN_ON(&dev_priv->drm,
1142                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1143                 return false;
1144
1145         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1146         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1147                 return false;
1148
1149         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1150                                           SDVO_HBUF_TX_VSYNC,
1151                                           sdvo_data, len);
1152 }
1153
1154 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1155                                          struct intel_crtc_state *crtc_state)
1156 {
1157         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1158         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1159         ssize_t len;
1160         int ret;
1161
1162         if (!crtc_state->has_hdmi_sink)
1163                 return;
1164
1165         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1166                                         sdvo_data, sizeof(sdvo_data));
1167         if (len < 0) {
1168                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1169                 return;
1170         } else if (len == 0) {
1171                 return;
1172         }
1173
1174         crtc_state->infoframes.enable |=
1175                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1176
1177         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1178         if (ret) {
1179                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1180                 return;
1181         }
1182
1183         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1184                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1185                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1186 }
1187
1188 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1189                                      const struct drm_connector_state *conn_state)
1190 {
1191         struct intel_sdvo_tv_format format;
1192         u32 format_map;
1193
1194         format_map = 1 << conn_state->tv.mode;
1195         memset(&format, 0, sizeof(format));
1196         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1197
1198         BUILD_BUG_ON(sizeof(format) != 6);
1199         return intel_sdvo_set_value(intel_sdvo,
1200                                     SDVO_CMD_SET_TV_FORMAT,
1201                                     &format, sizeof(format));
1202 }
1203
1204 static bool
1205 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1206                                         const struct drm_display_mode *mode)
1207 {
1208         struct intel_sdvo_dtd output_dtd;
1209
1210         if (!intel_sdvo_set_target_output(intel_sdvo,
1211                                           intel_sdvo->attached_output))
1212                 return false;
1213
1214         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1215         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1216                 return false;
1217
1218         return true;
1219 }
1220
1221 /*
1222  * Asks the sdvo controller for the preferred input mode given the output mode.
1223  * Unfortunately we have to set up the full output mode to do that.
1224  */
1225 static bool
1226 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1227                                     struct intel_sdvo_connector *intel_sdvo_connector,
1228                                     const struct drm_display_mode *mode,
1229                                     struct drm_display_mode *adjusted_mode)
1230 {
1231         struct intel_sdvo_dtd input_dtd;
1232
1233         /* Reset the input timing to the screen. Assume always input 0. */
1234         if (!intel_sdvo_set_target_input(intel_sdvo))
1235                 return false;
1236
1237         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1238                                                       intel_sdvo_connector,
1239                                                       mode))
1240                 return false;
1241
1242         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1243                                                    &input_dtd))
1244                 return false;
1245
1246         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1247         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1248
1249         return true;
1250 }
1251
1252 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1253 {
1254         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1255         unsigned dotclock = pipe_config->port_clock;
1256         struct dpll *clock = &pipe_config->dpll;
1257
1258         /*
1259          * SDVO TV has fixed PLL values depend on its clock range,
1260          * this mirrors vbios setting.
1261          */
1262         if (dotclock >= 100000 && dotclock < 140500) {
1263                 clock->p1 = 2;
1264                 clock->p2 = 10;
1265                 clock->n = 3;
1266                 clock->m1 = 16;
1267                 clock->m2 = 8;
1268         } else if (dotclock >= 140500 && dotclock <= 200000) {
1269                 clock->p1 = 1;
1270                 clock->p2 = 10;
1271                 clock->n = 6;
1272                 clock->m1 = 12;
1273                 clock->m2 = 8;
1274         } else {
1275                 drm_WARN(&dev_priv->drm, 1,
1276                          "SDVO TV clock out of range: %i\n", dotclock);
1277         }
1278
1279         pipe_config->clock_set = true;
1280 }
1281
1282 static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
1283                                 const struct drm_connector_state *conn_state)
1284 {
1285         return sdvo->has_hdmi_monitor &&
1286                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1287 }
1288
1289 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1290                                            const struct intel_crtc_state *crtc_state,
1291                                            const struct drm_connector_state *conn_state)
1292 {
1293         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1294
1295         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1296                 return false;
1297
1298         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1299 }
1300
1301 static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
1302                                  const struct intel_crtc_state *crtc_state,
1303                                  const struct drm_connector_state *conn_state)
1304 {
1305         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1306         const struct intel_digital_connector_state *intel_conn_state =
1307                 to_intel_digital_connector_state(conn_state);
1308
1309         if (!crtc_state->has_hdmi_sink)
1310                 return false;
1311
1312         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
1313                 return intel_sdvo->has_hdmi_audio;
1314         else
1315                 return intel_conn_state->force_audio == HDMI_AUDIO_ON;
1316 }
1317
1318 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1319                                      struct intel_crtc_state *pipe_config,
1320                                      struct drm_connector_state *conn_state)
1321 {
1322         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1323         struct intel_sdvo_connector *intel_sdvo_connector =
1324                 to_intel_sdvo_connector(conn_state->connector);
1325         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1326         struct drm_display_mode *mode = &pipe_config->hw.mode;
1327
1328         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1329         pipe_config->pipe_bpp = 8*3;
1330         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1331
1332         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1333                 pipe_config->has_pch_encoder = true;
1334
1335         /*
1336          * We need to construct preferred input timings based on our
1337          * output timings.  To do that, we have to set the output
1338          * timings, even though this isn't really the right place in
1339          * the sequence to do it. Oh well.
1340          */
1341         if (IS_TV(intel_sdvo_connector)) {
1342                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1343                         return -EINVAL;
1344
1345                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1346                                                            intel_sdvo_connector,
1347                                                            mode,
1348                                                            adjusted_mode);
1349                 pipe_config->sdvo_tv_clock = true;
1350         } else if (IS_LVDS(intel_sdvo_connector)) {
1351                 const struct drm_display_mode *fixed_mode =
1352                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1353                 int ret;
1354
1355                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1356                                                  adjusted_mode);
1357                 if (ret)
1358                         return ret;
1359
1360                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, fixed_mode))
1361                         return -EINVAL;
1362
1363                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1364                                                            intel_sdvo_connector,
1365                                                            mode,
1366                                                            adjusted_mode);
1367         }
1368
1369         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1370                 return -EINVAL;
1371
1372         /*
1373          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1374          * SDVO device will factor out the multiplier during mode_set.
1375          */
1376         pipe_config->pixel_multiplier =
1377                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1378
1379         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
1380
1381         pipe_config->has_audio = intel_sdvo_has_audio(encoder, pipe_config, conn_state);
1382
1383         pipe_config->limited_color_range =
1384                 intel_sdvo_limited_color_range(encoder, pipe_config,
1385                                                conn_state);
1386
1387         /* Clock computation needs to happen after pixel multiplier. */
1388         if (IS_TV(intel_sdvo_connector))
1389                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1390
1391         if (conn_state->picture_aspect_ratio)
1392                 adjusted_mode->picture_aspect_ratio =
1393                         conn_state->picture_aspect_ratio;
1394
1395         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1396                                               pipe_config, conn_state)) {
1397                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1398                 return -EINVAL;
1399         }
1400
1401         return 0;
1402 }
1403
1404 #define UPDATE_PROPERTY(input, NAME) \
1405         do { \
1406                 val = input; \
1407                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1408         } while (0)
1409
1410 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1411                                     const struct intel_sdvo_connector_state *sdvo_state)
1412 {
1413         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1414         struct intel_sdvo_connector *intel_sdvo_conn =
1415                 to_intel_sdvo_connector(conn_state->connector);
1416         u16 val;
1417
1418         if (intel_sdvo_conn->left)
1419                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1420
1421         if (intel_sdvo_conn->top)
1422                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1423
1424         if (intel_sdvo_conn->hpos)
1425                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1426
1427         if (intel_sdvo_conn->vpos)
1428                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1429
1430         if (intel_sdvo_conn->saturation)
1431                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1432
1433         if (intel_sdvo_conn->contrast)
1434                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1435
1436         if (intel_sdvo_conn->hue)
1437                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1438
1439         if (intel_sdvo_conn->brightness)
1440                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1441
1442         if (intel_sdvo_conn->sharpness)
1443                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1444
1445         if (intel_sdvo_conn->flicker_filter)
1446                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1447
1448         if (intel_sdvo_conn->flicker_filter_2d)
1449                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1450
1451         if (intel_sdvo_conn->flicker_filter_adaptive)
1452                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1453
1454         if (intel_sdvo_conn->tv_chroma_filter)
1455                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1456
1457         if (intel_sdvo_conn->tv_luma_filter)
1458                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1459
1460         if (intel_sdvo_conn->dot_crawl)
1461                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1462
1463 #undef UPDATE_PROPERTY
1464 }
1465
1466 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1467                                   struct intel_encoder *intel_encoder,
1468                                   const struct intel_crtc_state *crtc_state,
1469                                   const struct drm_connector_state *conn_state)
1470 {
1471         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1472         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1473         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1474         const struct intel_sdvo_connector_state *sdvo_state =
1475                 to_intel_sdvo_connector_state(conn_state);
1476         struct intel_sdvo_connector *intel_sdvo_connector =
1477                 to_intel_sdvo_connector(conn_state->connector);
1478         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1479         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1480         u32 sdvox;
1481         struct intel_sdvo_in_out_map in_out;
1482         struct intel_sdvo_dtd input_dtd, output_dtd;
1483         int rate;
1484
1485         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1486
1487         /*
1488          * First, set the input mapping for the first input to our controlled
1489          * output. This is only correct if we're a single-input device, in
1490          * which case the first input is the output from the appropriate SDVO
1491          * channel on the motherboard.  In a two-input device, the first input
1492          * will be SDVOB and the second SDVOC.
1493          */
1494         in_out.in0 = intel_sdvo->attached_output;
1495         in_out.in1 = 0;
1496
1497         intel_sdvo_set_value(intel_sdvo,
1498                              SDVO_CMD_SET_IN_OUT_MAP,
1499                              &in_out, sizeof(in_out));
1500
1501         /* Set the output timings to the screen */
1502         if (!intel_sdvo_set_target_output(intel_sdvo,
1503                                           intel_sdvo->attached_output))
1504                 return;
1505
1506         /* lvds has a special fixed output timing. */
1507         if (IS_LVDS(intel_sdvo_connector)) {
1508                 const struct drm_display_mode *fixed_mode =
1509                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1510
1511                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1512         } else {
1513                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1514         }
1515         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1516                 drm_info(&dev_priv->drm,
1517                          "Setting output timings on %s failed\n",
1518                          SDVO_NAME(intel_sdvo));
1519
1520         /* Set the input timing to the screen. Assume always input 0. */
1521         if (!intel_sdvo_set_target_input(intel_sdvo))
1522                 return;
1523
1524         if (crtc_state->has_hdmi_sink) {
1525                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1526                 intel_sdvo_set_colorimetry(intel_sdvo,
1527                                            crtc_state->limited_color_range ?
1528                                            SDVO_COLORIMETRY_RGB220 :
1529                                            SDVO_COLORIMETRY_RGB256);
1530                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1531                 intel_sdvo_set_pixel_replication(intel_sdvo,
1532                                                  !!(adjusted_mode->flags &
1533                                                     DRM_MODE_FLAG_DBLCLK));
1534         } else
1535                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1536
1537         if (IS_TV(intel_sdvo_connector) &&
1538             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1539                 return;
1540
1541         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1542
1543         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1544                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1545         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1546                 drm_info(&dev_priv->drm,
1547                          "Setting input timings on %s failed\n",
1548                          SDVO_NAME(intel_sdvo));
1549
1550         switch (crtc_state->pixel_multiplier) {
1551         default:
1552                 drm_WARN(&dev_priv->drm, 1,
1553                          "unknown pixel multiplier specified\n");
1554                 fallthrough;
1555         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1556         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1557         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1558         }
1559         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1560                 return;
1561
1562         /* Set the SDVO control regs. */
1563         if (DISPLAY_VER(dev_priv) >= 4) {
1564                 /* The real mode polarity is set by the SDVO commands, using
1565                  * struct intel_sdvo_dtd. */
1566                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1567                 if (DISPLAY_VER(dev_priv) < 5)
1568                         sdvox |= SDVO_BORDER_ENABLE;
1569         } else {
1570                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1571                 if (intel_sdvo->port == PORT_B)
1572                         sdvox &= SDVOB_PRESERVE_MASK;
1573                 else
1574                         sdvox &= SDVOC_PRESERVE_MASK;
1575                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1576         }
1577
1578         if (HAS_PCH_CPT(dev_priv))
1579                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1580         else
1581                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1582
1583         if (DISPLAY_VER(dev_priv) >= 4) {
1584                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1585         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1586                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1587                 /* done in crtc_mode_set as it lives inside the dpll register */
1588         } else {
1589                 sdvox |= (crtc_state->pixel_multiplier - 1)
1590                         << SDVO_PORT_MULTIPLY_SHIFT;
1591         }
1592
1593         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1594             DISPLAY_VER(dev_priv) < 5)
1595                 sdvox |= SDVO_STALL_SELECT;
1596         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1597 }
1598
1599 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1600 {
1601         struct intel_sdvo_connector *intel_sdvo_connector =
1602                 to_intel_sdvo_connector(&connector->base);
1603         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1604         u16 active_outputs = 0;
1605
1606         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1607
1608         return active_outputs & intel_sdvo_connector->output_flag;
1609 }
1610
1611 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1612                              i915_reg_t sdvo_reg, enum pipe *pipe)
1613 {
1614         u32 val;
1615
1616         val = intel_de_read(dev_priv, sdvo_reg);
1617
1618         /* asserts want to know the pipe even if the port is disabled */
1619         if (HAS_PCH_CPT(dev_priv))
1620                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1621         else if (IS_CHERRYVIEW(dev_priv))
1622                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1623         else
1624                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1625
1626         return val & SDVO_ENABLE;
1627 }
1628
1629 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1630                                     enum pipe *pipe)
1631 {
1632         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1633         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1634         u16 active_outputs = 0;
1635         bool ret;
1636
1637         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1638
1639         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1640
1641         return ret || active_outputs;
1642 }
1643
1644 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1645                                   struct intel_crtc_state *pipe_config)
1646 {
1647         struct drm_device *dev = encoder->base.dev;
1648         struct drm_i915_private *dev_priv = to_i915(dev);
1649         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1650         struct intel_sdvo_dtd dtd;
1651         int encoder_pixel_multiplier = 0;
1652         int dotclock;
1653         u32 flags = 0, sdvox;
1654         u8 val;
1655         bool ret;
1656
1657         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1658
1659         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1660
1661         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1662         if (!ret) {
1663                 /*
1664                  * Some sdvo encoders are not spec compliant and don't
1665                  * implement the mandatory get_timings function.
1666                  */
1667                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1668                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1669         } else {
1670                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1671                         flags |= DRM_MODE_FLAG_PHSYNC;
1672                 else
1673                         flags |= DRM_MODE_FLAG_NHSYNC;
1674
1675                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1676                         flags |= DRM_MODE_FLAG_PVSYNC;
1677                 else
1678                         flags |= DRM_MODE_FLAG_NVSYNC;
1679         }
1680
1681         pipe_config->hw.adjusted_mode.flags |= flags;
1682
1683         /*
1684          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1685          * the sdvo port register, on all other platforms it is part of the dpll
1686          * state. Since the general pipe state readout happens before the
1687          * encoder->get_config we so already have a valid pixel multplier on all
1688          * other platfroms.
1689          */
1690         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1691                 pipe_config->pixel_multiplier =
1692                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1693                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1694         }
1695
1696         dotclock = pipe_config->port_clock;
1697
1698         if (pipe_config->pixel_multiplier)
1699                 dotclock /= pipe_config->pixel_multiplier;
1700
1701         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1702
1703         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1704         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1705                                  &val, 1)) {
1706                 switch (val) {
1707                 case SDVO_CLOCK_RATE_MULT_1X:
1708                         encoder_pixel_multiplier = 1;
1709                         break;
1710                 case SDVO_CLOCK_RATE_MULT_2X:
1711                         encoder_pixel_multiplier = 2;
1712                         break;
1713                 case SDVO_CLOCK_RATE_MULT_4X:
1714                         encoder_pixel_multiplier = 4;
1715                         break;
1716                 }
1717         }
1718
1719         drm_WARN(dev,
1720                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1721                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1722                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1723
1724         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1725                                  &val, 1)) {
1726                 if (val == SDVO_COLORIMETRY_RGB220)
1727                         pipe_config->limited_color_range = true;
1728         }
1729
1730         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1731                                  &val, 1)) {
1732                 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1733
1734                 if ((val & mask) == mask)
1735                         pipe_config->has_audio = true;
1736         }
1737
1738         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1739                                  &val, 1)) {
1740                 if (val == SDVO_ENCODE_HDMI)
1741                         pipe_config->has_hdmi_sink = true;
1742         }
1743
1744         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1745 }
1746
1747 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1748 {
1749         intel_sdvo_set_audio_state(intel_sdvo, 0);
1750 }
1751
1752 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1753                                     const struct intel_crtc_state *crtc_state,
1754                                     const struct drm_connector_state *conn_state)
1755 {
1756         const struct drm_display_mode *adjusted_mode =
1757                 &crtc_state->hw.adjusted_mode;
1758         struct drm_connector *connector = conn_state->connector;
1759         u8 *eld = connector->eld;
1760
1761         eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1762
1763         intel_sdvo_set_audio_state(intel_sdvo, 0);
1764
1765         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1766                                    SDVO_HBUF_TX_DISABLED,
1767                                    eld, drm_eld_size(eld));
1768
1769         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1770                                    SDVO_AUDIO_PRESENCE_DETECT);
1771 }
1772
1773 static void intel_disable_sdvo(struct intel_atomic_state *state,
1774                                struct intel_encoder *encoder,
1775                                const struct intel_crtc_state *old_crtc_state,
1776                                const struct drm_connector_state *conn_state)
1777 {
1778         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1779         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1780         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1781         u32 temp;
1782
1783         if (old_crtc_state->has_audio)
1784                 intel_sdvo_disable_audio(intel_sdvo);
1785
1786         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1787         if (0)
1788                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1789                                                    DRM_MODE_DPMS_OFF);
1790
1791         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1792
1793         temp &= ~SDVO_ENABLE;
1794         intel_sdvo_write_sdvox(intel_sdvo, temp);
1795
1796         /*
1797          * HW workaround for IBX, we need to move the port
1798          * to transcoder A after disabling it to allow the
1799          * matching DP port to be enabled on transcoder A.
1800          */
1801         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1802                 /*
1803                  * We get CPU/PCH FIFO underruns on the other pipe when
1804                  * doing the workaround. Sweep them under the rug.
1805                  */
1806                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1807                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1808
1809                 temp &= ~SDVO_PIPE_SEL_MASK;
1810                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1811                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1812
1813                 temp &= ~SDVO_ENABLE;
1814                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1815
1816                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1817                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1818                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1819         }
1820 }
1821
1822 static void pch_disable_sdvo(struct intel_atomic_state *state,
1823                              struct intel_encoder *encoder,
1824                              const struct intel_crtc_state *old_crtc_state,
1825                              const struct drm_connector_state *old_conn_state)
1826 {
1827 }
1828
1829 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1830                                   struct intel_encoder *encoder,
1831                                   const struct intel_crtc_state *old_crtc_state,
1832                                   const struct drm_connector_state *old_conn_state)
1833 {
1834         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1835 }
1836
1837 static void intel_enable_sdvo(struct intel_atomic_state *state,
1838                               struct intel_encoder *encoder,
1839                               const struct intel_crtc_state *pipe_config,
1840                               const struct drm_connector_state *conn_state)
1841 {
1842         struct drm_device *dev = encoder->base.dev;
1843         struct drm_i915_private *dev_priv = to_i915(dev);
1844         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1845         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1846         u32 temp;
1847         bool input1, input2;
1848         int i;
1849         bool success;
1850
1851         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1852         temp |= SDVO_ENABLE;
1853         intel_sdvo_write_sdvox(intel_sdvo, temp);
1854
1855         for (i = 0; i < 2; i++)
1856                 intel_crtc_wait_for_next_vblank(crtc);
1857
1858         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1859         /*
1860          * Warn if the device reported failure to sync.
1861          *
1862          * A lot of SDVO devices fail to notify of sync, but it's
1863          * a given it the status is a success, we succeeded.
1864          */
1865         if (success && !input1) {
1866                 drm_dbg_kms(&dev_priv->drm,
1867                             "First %s output reported failure to "
1868                             "sync\n", SDVO_NAME(intel_sdvo));
1869         }
1870
1871         if (0)
1872                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1873                                                    DRM_MODE_DPMS_ON);
1874         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1875
1876         if (pipe_config->has_audio)
1877                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1878 }
1879
1880 static enum drm_mode_status
1881 intel_sdvo_mode_valid(struct drm_connector *connector,
1882                       struct drm_display_mode *mode)
1883 {
1884         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1885         struct intel_sdvo_connector *intel_sdvo_connector =
1886                 to_intel_sdvo_connector(connector);
1887         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1888         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
1889         int clock = mode->clock;
1890
1891         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1892                 return MODE_NO_DBLESCAN;
1893
1894         if (clock > max_dotclk)
1895                 return MODE_CLOCK_HIGH;
1896
1897         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1898                 if (!has_hdmi_sink)
1899                         return MODE_CLOCK_LOW;
1900                 clock *= 2;
1901         }
1902
1903         if (intel_sdvo->pixel_clock_min > clock)
1904                 return MODE_CLOCK_LOW;
1905
1906         if (intel_sdvo->pixel_clock_max < clock)
1907                 return MODE_CLOCK_HIGH;
1908
1909         if (IS_LVDS(intel_sdvo_connector)) {
1910                 enum drm_mode_status status;
1911
1912                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1913                 if (status != MODE_OK)
1914                         return status;
1915         }
1916
1917         return MODE_OK;
1918 }
1919
1920 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1921 {
1922         BUILD_BUG_ON(sizeof(*caps) != 8);
1923         if (!intel_sdvo_get_value(intel_sdvo,
1924                                   SDVO_CMD_GET_DEVICE_CAPS,
1925                                   caps, sizeof(*caps)))
1926                 return false;
1927
1928         DRM_DEBUG_KMS("SDVO capabilities:\n"
1929                       "  vendor_id: %d\n"
1930                       "  device_id: %d\n"
1931                       "  device_rev_id: %d\n"
1932                       "  sdvo_version_major: %d\n"
1933                       "  sdvo_version_minor: %d\n"
1934                       "  sdvo_inputs_mask: %d\n"
1935                       "  smooth_scaling: %d\n"
1936                       "  sharp_scaling: %d\n"
1937                       "  up_scaling: %d\n"
1938                       "  down_scaling: %d\n"
1939                       "  stall_support: %d\n"
1940                       "  output_flags: %d\n",
1941                       caps->vendor_id,
1942                       caps->device_id,
1943                       caps->device_rev_id,
1944                       caps->sdvo_version_major,
1945                       caps->sdvo_version_minor,
1946                       caps->sdvo_inputs_mask,
1947                       caps->smooth_scaling,
1948                       caps->sharp_scaling,
1949                       caps->up_scaling,
1950                       caps->down_scaling,
1951                       caps->stall_support,
1952                       caps->output_flags);
1953
1954         return true;
1955 }
1956
1957 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
1958 {
1959         u8 cap;
1960
1961         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
1962                                   &cap, sizeof(cap)))
1963                 return SDVO_COLORIMETRY_RGB256;
1964
1965         return cap;
1966 }
1967
1968 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1969 {
1970         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1971         u16 hotplug;
1972
1973         if (!I915_HAS_HOTPLUG(dev_priv))
1974                 return 0;
1975
1976         /*
1977          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1978          * on the line.
1979          */
1980         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1981                 return 0;
1982
1983         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1984                                         &hotplug, sizeof(hotplug)))
1985                 return 0;
1986
1987         return hotplug;
1988 }
1989
1990 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1991 {
1992         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1993
1994         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1995                              &intel_sdvo->hotplug_active, 2);
1996 }
1997
1998 static enum intel_hotplug_state
1999 intel_sdvo_hotplug(struct intel_encoder *encoder,
2000                    struct intel_connector *connector)
2001 {
2002         intel_sdvo_enable_hotplug(encoder);
2003
2004         return intel_encoder_hotplug(encoder, connector);
2005 }
2006
2007 static bool
2008 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
2009 {
2010         /* Is there more than one type of output? */
2011         return hweight16(intel_sdvo->caps.output_flags) > 1;
2012 }
2013
2014 static struct edid *
2015 intel_sdvo_get_edid(struct drm_connector *connector)
2016 {
2017         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2018         return drm_get_edid(connector, &sdvo->ddc);
2019 }
2020
2021 /* Mac mini hack -- use the same DDC as the analog connector */
2022 static struct edid *
2023 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2024 {
2025         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2026
2027         return drm_get_edid(connector,
2028                             intel_gmbus_get_adapter(dev_priv,
2029                                                     dev_priv->display.vbt.crt_ddc_pin));
2030 }
2031
2032 static enum drm_connector_status
2033 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2034 {
2035         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2036         struct intel_sdvo_connector *intel_sdvo_connector =
2037                 to_intel_sdvo_connector(connector);
2038         enum drm_connector_status status;
2039         struct edid *edid;
2040
2041         edid = intel_sdvo_get_edid(connector);
2042
2043         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
2044                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
2045
2046                 /*
2047                  * Don't use the 1 as the argument of DDC bus switch to get
2048                  * the EDID. It is used for SDVO SPD ROM.
2049                  */
2050                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
2051                         intel_sdvo->ddc_bus = ddc;
2052                         edid = intel_sdvo_get_edid(connector);
2053                         if (edid)
2054                                 break;
2055                 }
2056                 /*
2057                  * If we found the EDID on the other bus,
2058                  * assume that is the correct DDC bus.
2059                  */
2060                 if (edid == NULL)
2061                         intel_sdvo->ddc_bus = saved_ddc;
2062         }
2063
2064         /*
2065          * When there is no edid and no monitor is connected with VGA
2066          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2067          */
2068         if (edid == NULL)
2069                 edid = intel_sdvo_get_analog_edid(connector);
2070
2071         status = connector_status_unknown;
2072         if (edid != NULL) {
2073                 /* DDC bus is shared, match EDID to connector type */
2074                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
2075                         status = connector_status_connected;
2076                         if (intel_sdvo_connector->is_hdmi) {
2077                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
2078                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
2079                         }
2080                 } else
2081                         status = connector_status_disconnected;
2082                 kfree(edid);
2083         }
2084
2085         return status;
2086 }
2087
2088 static bool
2089 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2090                                   struct edid *edid)
2091 {
2092         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
2093         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2094
2095         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2096                       connector_is_digital, monitor_is_digital);
2097         return connector_is_digital == monitor_is_digital;
2098 }
2099
2100 static enum drm_connector_status
2101 intel_sdvo_detect(struct drm_connector *connector, bool force)
2102 {
2103         struct drm_i915_private *i915 = to_i915(connector->dev);
2104         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2105         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2106         enum drm_connector_status ret;
2107         u16 response;
2108
2109         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2110                       connector->base.id, connector->name);
2111
2112         if (!INTEL_DISPLAY_ENABLED(i915))
2113                 return connector_status_disconnected;
2114
2115         if (!intel_sdvo_get_value(intel_sdvo,
2116                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2117                                   &response, 2))
2118                 return connector_status_unknown;
2119
2120         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2121                       response & 0xff, response >> 8,
2122                       intel_sdvo_connector->output_flag);
2123
2124         if (response == 0)
2125                 return connector_status_disconnected;
2126
2127         intel_sdvo->attached_output = response;
2128
2129         intel_sdvo->has_hdmi_monitor = false;
2130         intel_sdvo->has_hdmi_audio = false;
2131
2132         if ((intel_sdvo_connector->output_flag & response) == 0)
2133                 ret = connector_status_disconnected;
2134         else if (IS_TMDS(intel_sdvo_connector))
2135                 ret = intel_sdvo_tmds_sink_detect(connector);
2136         else {
2137                 struct edid *edid;
2138
2139                 /* if we have an edid check it matches the connection */
2140                 edid = intel_sdvo_get_edid(connector);
2141                 if (edid == NULL)
2142                         edid = intel_sdvo_get_analog_edid(connector);
2143                 if (edid != NULL) {
2144                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2145                                                               edid))
2146                                 ret = connector_status_connected;
2147                         else
2148                                 ret = connector_status_disconnected;
2149
2150                         kfree(edid);
2151                 } else
2152                         ret = connector_status_connected;
2153         }
2154
2155         return ret;
2156 }
2157
2158 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2159 {
2160         int num_modes = 0;
2161         struct edid *edid;
2162
2163         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2164                       connector->base.id, connector->name);
2165
2166         /* set the bus switch and get the modes */
2167         edid = intel_sdvo_get_edid(connector);
2168
2169         /*
2170          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2171          * link between analog and digital outputs. So, if the regular SDVO
2172          * DDC fails, check to see if the analog output is disconnected, in
2173          * which case we'll look there for the digital DDC data.
2174          */
2175         if (!edid)
2176                 edid = intel_sdvo_get_analog_edid(connector);
2177
2178         if (!edid)
2179                 return 0;
2180
2181         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2182                                               edid))
2183                 num_modes += intel_connector_update_modes(connector, edid);
2184
2185         kfree(edid);
2186
2187         return num_modes;
2188 }
2189
2190 /*
2191  * Set of SDVO TV modes.
2192  * Note!  This is in reply order (see loop in get_tv_modes).
2193  * XXX: all 60Hz refresh?
2194  */
2195 static const struct drm_display_mode sdvo_tv_modes[] = {
2196         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2197                    416, 0, 200, 201, 232, 233, 0,
2198                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2199         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2200                    416, 0, 240, 241, 272, 273, 0,
2201                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2202         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2203                    496, 0, 300, 301, 332, 333, 0,
2204                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2205         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2206                    736, 0, 350, 351, 382, 383, 0,
2207                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2208         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2209                    736, 0, 400, 401, 432, 433, 0,
2210                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2211         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2212                    736, 0, 480, 481, 512, 513, 0,
2213                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2214         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2215                    800, 0, 480, 481, 512, 513, 0,
2216                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2217         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2218                    800, 0, 576, 577, 608, 609, 0,
2219                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2220         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2221                    816, 0, 350, 351, 382, 383, 0,
2222                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2223         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2224                    816, 0, 400, 401, 432, 433, 0,
2225                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2226         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2227                    816, 0, 480, 481, 512, 513, 0,
2228                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2229         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2230                    816, 0, 540, 541, 572, 573, 0,
2231                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2232         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2233                    816, 0, 576, 577, 608, 609, 0,
2234                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2235         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2236                    864, 0, 576, 577, 608, 609, 0,
2237                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2238         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2239                    896, 0, 600, 601, 632, 633, 0,
2240                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2241         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2242                    928, 0, 624, 625, 656, 657, 0,
2243                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2244         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2245                    1016, 0, 766, 767, 798, 799, 0,
2246                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2247         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2248                    1120, 0, 768, 769, 800, 801, 0,
2249                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2250         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2251                    1376, 0, 1024, 1025, 1056, 1057, 0,
2252                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2253 };
2254
2255 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2256 {
2257         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2258         const struct drm_connector_state *conn_state = connector->state;
2259         struct intel_sdvo_sdtv_resolution_request tv_res;
2260         u32 reply = 0, format_map = 0;
2261         int num_modes = 0;
2262         int i;
2263
2264         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2265                       connector->base.id, connector->name);
2266
2267         /*
2268          * Read the list of supported input resolutions for the selected TV
2269          * format.
2270          */
2271         format_map = 1 << conn_state->tv.mode;
2272         memcpy(&tv_res, &format_map,
2273                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2274
2275         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2276                 return 0;
2277
2278         BUILD_BUG_ON(sizeof(tv_res) != 3);
2279         if (!intel_sdvo_write_cmd(intel_sdvo,
2280                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2281                                   &tv_res, sizeof(tv_res)))
2282                 return 0;
2283         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2284                 return 0;
2285
2286         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2287                 if (reply & (1 << i)) {
2288                         struct drm_display_mode *nmode;
2289                         nmode = drm_mode_duplicate(connector->dev,
2290                                                    &sdvo_tv_modes[i]);
2291                         if (nmode) {
2292                                 drm_mode_probed_add(connector, nmode);
2293                                 num_modes++;
2294                         }
2295                 }
2296         }
2297
2298         return num_modes;
2299 }
2300
2301 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2302 {
2303         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2304
2305         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2306                     connector->base.id, connector->name);
2307
2308         return intel_panel_get_modes(to_intel_connector(connector));
2309 }
2310
2311 static int intel_sdvo_get_modes(struct drm_connector *connector)
2312 {
2313         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2314
2315         if (IS_TV(intel_sdvo_connector))
2316                 return intel_sdvo_get_tv_modes(connector);
2317         else if (IS_LVDS(intel_sdvo_connector))
2318                 return intel_sdvo_get_lvds_modes(connector);
2319         else
2320                 return intel_sdvo_get_ddc_modes(connector);
2321 }
2322
2323 static int
2324 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2325                                          const struct drm_connector_state *state,
2326                                          struct drm_property *property,
2327                                          u64 *val)
2328 {
2329         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2330         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2331
2332         if (property == intel_sdvo_connector->tv_format) {
2333                 int i;
2334
2335                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2336                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2337                                 *val = i;
2338
2339                                 return 0;
2340                         }
2341
2342                 drm_WARN_ON(connector->dev, 1);
2343                 *val = 0;
2344         } else if (property == intel_sdvo_connector->top ||
2345                    property == intel_sdvo_connector->bottom)
2346                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2347         else if (property == intel_sdvo_connector->left ||
2348                  property == intel_sdvo_connector->right)
2349                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2350         else if (property == intel_sdvo_connector->hpos)
2351                 *val = sdvo_state->tv.hpos;
2352         else if (property == intel_sdvo_connector->vpos)
2353                 *val = sdvo_state->tv.vpos;
2354         else if (property == intel_sdvo_connector->saturation)
2355                 *val = state->tv.saturation;
2356         else if (property == intel_sdvo_connector->contrast)
2357                 *val = state->tv.contrast;
2358         else if (property == intel_sdvo_connector->hue)
2359                 *val = state->tv.hue;
2360         else if (property == intel_sdvo_connector->brightness)
2361                 *val = state->tv.brightness;
2362         else if (property == intel_sdvo_connector->sharpness)
2363                 *val = sdvo_state->tv.sharpness;
2364         else if (property == intel_sdvo_connector->flicker_filter)
2365                 *val = sdvo_state->tv.flicker_filter;
2366         else if (property == intel_sdvo_connector->flicker_filter_2d)
2367                 *val = sdvo_state->tv.flicker_filter_2d;
2368         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2369                 *val = sdvo_state->tv.flicker_filter_adaptive;
2370         else if (property == intel_sdvo_connector->tv_chroma_filter)
2371                 *val = sdvo_state->tv.chroma_filter;
2372         else if (property == intel_sdvo_connector->tv_luma_filter)
2373                 *val = sdvo_state->tv.luma_filter;
2374         else if (property == intel_sdvo_connector->dot_crawl)
2375                 *val = sdvo_state->tv.dot_crawl;
2376         else
2377                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2378
2379         return 0;
2380 }
2381
2382 static int
2383 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2384                                          struct drm_connector_state *state,
2385                                          struct drm_property *property,
2386                                          u64 val)
2387 {
2388         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2389         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2390
2391         if (property == intel_sdvo_connector->tv_format) {
2392                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2393
2394                 if (state->crtc) {
2395                         struct drm_crtc_state *crtc_state =
2396                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2397
2398                         crtc_state->connectors_changed = true;
2399                 }
2400         } else if (property == intel_sdvo_connector->top ||
2401                    property == intel_sdvo_connector->bottom)
2402                 /* Cannot set these independent from each other */
2403                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2404         else if (property == intel_sdvo_connector->left ||
2405                  property == intel_sdvo_connector->right)
2406                 /* Cannot set these independent from each other */
2407                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2408         else if (property == intel_sdvo_connector->hpos)
2409                 sdvo_state->tv.hpos = val;
2410         else if (property == intel_sdvo_connector->vpos)
2411                 sdvo_state->tv.vpos = val;
2412         else if (property == intel_sdvo_connector->saturation)
2413                 state->tv.saturation = val;
2414         else if (property == intel_sdvo_connector->contrast)
2415                 state->tv.contrast = val;
2416         else if (property == intel_sdvo_connector->hue)
2417                 state->tv.hue = val;
2418         else if (property == intel_sdvo_connector->brightness)
2419                 state->tv.brightness = val;
2420         else if (property == intel_sdvo_connector->sharpness)
2421                 sdvo_state->tv.sharpness = val;
2422         else if (property == intel_sdvo_connector->flicker_filter)
2423                 sdvo_state->tv.flicker_filter = val;
2424         else if (property == intel_sdvo_connector->flicker_filter_2d)
2425                 sdvo_state->tv.flicker_filter_2d = val;
2426         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2427                 sdvo_state->tv.flicker_filter_adaptive = val;
2428         else if (property == intel_sdvo_connector->tv_chroma_filter)
2429                 sdvo_state->tv.chroma_filter = val;
2430         else if (property == intel_sdvo_connector->tv_luma_filter)
2431                 sdvo_state->tv.luma_filter = val;
2432         else if (property == intel_sdvo_connector->dot_crawl)
2433                 sdvo_state->tv.dot_crawl = val;
2434         else
2435                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2436
2437         return 0;
2438 }
2439
2440 static int
2441 intel_sdvo_connector_register(struct drm_connector *connector)
2442 {
2443         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2444         int ret;
2445
2446         ret = intel_connector_register(connector);
2447         if (ret)
2448                 return ret;
2449
2450         return sysfs_create_link(&connector->kdev->kobj,
2451                                  &sdvo->ddc.dev.kobj,
2452                                  sdvo->ddc.dev.kobj.name);
2453 }
2454
2455 static void
2456 intel_sdvo_connector_unregister(struct drm_connector *connector)
2457 {
2458         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2459
2460         sysfs_remove_link(&connector->kdev->kobj,
2461                           sdvo->ddc.dev.kobj.name);
2462         intel_connector_unregister(connector);
2463 }
2464
2465 static struct drm_connector_state *
2466 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2467 {
2468         struct intel_sdvo_connector_state *state;
2469
2470         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2471         if (!state)
2472                 return NULL;
2473
2474         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2475         return &state->base.base;
2476 }
2477
2478 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2479         .detect = intel_sdvo_detect,
2480         .fill_modes = drm_helper_probe_single_connector_modes,
2481         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2482         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2483         .late_register = intel_sdvo_connector_register,
2484         .early_unregister = intel_sdvo_connector_unregister,
2485         .destroy = intel_connector_destroy,
2486         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2487         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2488 };
2489
2490 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2491                                    struct drm_atomic_state *state)
2492 {
2493         struct drm_connector_state *new_conn_state =
2494                 drm_atomic_get_new_connector_state(state, conn);
2495         struct drm_connector_state *old_conn_state =
2496                 drm_atomic_get_old_connector_state(state, conn);
2497         struct intel_sdvo_connector_state *old_state =
2498                 to_intel_sdvo_connector_state(old_conn_state);
2499         struct intel_sdvo_connector_state *new_state =
2500                 to_intel_sdvo_connector_state(new_conn_state);
2501
2502         if (new_conn_state->crtc &&
2503             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2504              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2505                 struct drm_crtc_state *crtc_state =
2506                         drm_atomic_get_new_crtc_state(state,
2507                                                       new_conn_state->crtc);
2508
2509                 crtc_state->connectors_changed = true;
2510         }
2511
2512         return intel_digital_connector_atomic_check(conn, state);
2513 }
2514
2515 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2516         .get_modes = intel_sdvo_get_modes,
2517         .mode_valid = intel_sdvo_mode_valid,
2518         .atomic_check = intel_sdvo_atomic_check,
2519 };
2520
2521 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2522 {
2523         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2524
2525         i2c_del_adapter(&intel_sdvo->ddc);
2526         intel_encoder_destroy(encoder);
2527 }
2528
2529 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2530         .destroy = intel_sdvo_enc_destroy,
2531 };
2532
2533 static void
2534 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2535 {
2536         u16 mask = 0;
2537         unsigned int num_bits;
2538
2539         /*
2540          * Make a mask of outputs less than or equal to our own priority in the
2541          * list.
2542          */
2543         switch (sdvo->controlled_output) {
2544         case SDVO_OUTPUT_LVDS1:
2545                 mask |= SDVO_OUTPUT_LVDS1;
2546                 fallthrough;
2547         case SDVO_OUTPUT_LVDS0:
2548                 mask |= SDVO_OUTPUT_LVDS0;
2549                 fallthrough;
2550         case SDVO_OUTPUT_TMDS1:
2551                 mask |= SDVO_OUTPUT_TMDS1;
2552                 fallthrough;
2553         case SDVO_OUTPUT_TMDS0:
2554                 mask |= SDVO_OUTPUT_TMDS0;
2555                 fallthrough;
2556         case SDVO_OUTPUT_RGB1:
2557                 mask |= SDVO_OUTPUT_RGB1;
2558                 fallthrough;
2559         case SDVO_OUTPUT_RGB0:
2560                 mask |= SDVO_OUTPUT_RGB0;
2561                 break;
2562         }
2563
2564         /* Count bits to find what number we are in the priority list. */
2565         mask &= sdvo->caps.output_flags;
2566         num_bits = hweight16(mask);
2567         /* If more than 3 outputs, default to DDC bus 3 for now. */
2568         if (num_bits > 3)
2569                 num_bits = 3;
2570
2571         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2572         sdvo->ddc_bus = 1 << num_bits;
2573 }
2574
2575 /*
2576  * Choose the appropriate DDC bus for control bus switch command for this
2577  * SDVO output based on the controlled output.
2578  *
2579  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2580  * outputs, then LVDS outputs.
2581  */
2582 static void
2583 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2584                           struct intel_sdvo *sdvo)
2585 {
2586         struct sdvo_device_mapping *mapping;
2587
2588         if (sdvo->port == PORT_B)
2589                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2590         else
2591                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2592
2593         if (mapping->initialized)
2594                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2595         else
2596                 intel_sdvo_guess_ddc_bus(sdvo);
2597 }
2598
2599 static void
2600 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2601                           struct intel_sdvo *sdvo)
2602 {
2603         struct sdvo_device_mapping *mapping;
2604         u8 pin;
2605
2606         if (sdvo->port == PORT_B)
2607                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2608         else
2609                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2610
2611         if (mapping->initialized &&
2612             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2613                 pin = mapping->i2c_pin;
2614         else
2615                 pin = GMBUS_PIN_DPB;
2616
2617         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2618
2619         /*
2620          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2621          * our code totally fails once we start using gmbus. Hence fall back to
2622          * bit banging for now.
2623          */
2624         intel_gmbus_force_bit(sdvo->i2c, true);
2625 }
2626
2627 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2628 static void
2629 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2630 {
2631         intel_gmbus_force_bit(sdvo->i2c, false);
2632 }
2633
2634 static bool
2635 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
2636 {
2637         return intel_sdvo_check_supp_encode(intel_sdvo);
2638 }
2639
2640 static u8
2641 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2642                           struct intel_sdvo *sdvo)
2643 {
2644         struct sdvo_device_mapping *my_mapping, *other_mapping;
2645
2646         if (sdvo->port == PORT_B) {
2647                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2648                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2649         } else {
2650                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2651                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2652         }
2653
2654         /* If the BIOS described our SDVO device, take advantage of it. */
2655         if (my_mapping->slave_addr)
2656                 return my_mapping->slave_addr;
2657
2658         /*
2659          * If the BIOS only described a different SDVO device, use the
2660          * address that it isn't using.
2661          */
2662         if (other_mapping->slave_addr) {
2663                 if (other_mapping->slave_addr == 0x70)
2664                         return 0x72;
2665                 else
2666                         return 0x70;
2667         }
2668
2669         /*
2670          * No SDVO device info is found for another DVO port,
2671          * so use mapping assumption we had before BIOS parsing.
2672          */
2673         if (sdvo->port == PORT_B)
2674                 return 0x70;
2675         else
2676                 return 0x72;
2677 }
2678
2679 static int
2680 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2681                           struct intel_sdvo *encoder)
2682 {
2683         struct drm_connector *drm_connector;
2684         int ret;
2685
2686         drm_connector = &connector->base.base;
2687         ret = drm_connector_init(encoder->base.base.dev,
2688                            drm_connector,
2689                            &intel_sdvo_connector_funcs,
2690                            connector->base.base.connector_type);
2691         if (ret < 0)
2692                 return ret;
2693
2694         drm_connector_helper_add(drm_connector,
2695                                  &intel_sdvo_connector_helper_funcs);
2696
2697         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2698         connector->base.base.interlace_allowed = true;
2699         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2700
2701         intel_connector_attach_encoder(&connector->base, &encoder->base);
2702
2703         return 0;
2704 }
2705
2706 static void
2707 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2708                                struct intel_sdvo_connector *connector)
2709 {
2710         intel_attach_force_audio_property(&connector->base.base);
2711         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2712                 intel_attach_broadcast_rgb_property(&connector->base.base);
2713         intel_attach_aspect_ratio_property(&connector->base.base);
2714 }
2715
2716 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2717 {
2718         struct intel_sdvo_connector *sdvo_connector;
2719         struct intel_sdvo_connector_state *conn_state;
2720
2721         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2722         if (!sdvo_connector)
2723                 return NULL;
2724
2725         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2726         if (!conn_state) {
2727                 kfree(sdvo_connector);
2728                 return NULL;
2729         }
2730
2731         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2732                                             &conn_state->base.base);
2733
2734         INIT_LIST_HEAD(&sdvo_connector->base.panel.fixed_modes);
2735
2736         return sdvo_connector;
2737 }
2738
2739 static bool
2740 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
2741 {
2742         struct drm_encoder *encoder = &intel_sdvo->base.base;
2743         struct drm_connector *connector;
2744         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2745         struct intel_connector *intel_connector;
2746         struct intel_sdvo_connector *intel_sdvo_connector;
2747
2748         DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type);
2749
2750         intel_sdvo_connector = intel_sdvo_connector_alloc();
2751         if (!intel_sdvo_connector)
2752                 return false;
2753
2754         intel_sdvo_connector->output_flag = type;
2755
2756         intel_connector = &intel_sdvo_connector->base;
2757         connector = &intel_connector->base;
2758         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2759                 intel_sdvo_connector->output_flag) {
2760                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2761                 /*
2762                  * Some SDVO devices have one-shot hotplug interrupts.
2763                  * Ensure that they get re-enabled when an interrupt happens.
2764                  */
2765                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2766                 intel_encoder->hotplug = intel_sdvo_hotplug;
2767                 intel_sdvo_enable_hotplug(intel_encoder);
2768         } else {
2769                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2770         }
2771         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2772         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2773
2774         if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
2775                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2776                 intel_sdvo_connector->is_hdmi = true;
2777         }
2778
2779         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2780                 kfree(intel_sdvo_connector);
2781                 return false;
2782         }
2783
2784         if (intel_sdvo_connector->is_hdmi)
2785                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2786
2787         return true;
2788 }
2789
2790 static bool
2791 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
2792 {
2793         struct drm_encoder *encoder = &intel_sdvo->base.base;
2794         struct drm_connector *connector;
2795         struct intel_connector *intel_connector;
2796         struct intel_sdvo_connector *intel_sdvo_connector;
2797
2798         DRM_DEBUG_KMS("initialising TV type 0x%x\n", type);
2799
2800         intel_sdvo_connector = intel_sdvo_connector_alloc();
2801         if (!intel_sdvo_connector)
2802                 return false;
2803
2804         intel_connector = &intel_sdvo_connector->base;
2805         connector = &intel_connector->base;
2806         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2807         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2808
2809         intel_sdvo_connector->output_flag = type;
2810
2811         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2812                 kfree(intel_sdvo_connector);
2813                 return false;
2814         }
2815
2816         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2817                 goto err;
2818
2819         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2820                 goto err;
2821
2822         return true;
2823
2824 err:
2825         intel_connector_destroy(connector);
2826         return false;
2827 }
2828
2829 static bool
2830 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
2831 {
2832         struct drm_encoder *encoder = &intel_sdvo->base.base;
2833         struct drm_connector *connector;
2834         struct intel_connector *intel_connector;
2835         struct intel_sdvo_connector *intel_sdvo_connector;
2836
2837         DRM_DEBUG_KMS("initialising analog type 0x%x\n", type);
2838
2839         intel_sdvo_connector = intel_sdvo_connector_alloc();
2840         if (!intel_sdvo_connector)
2841                 return false;
2842
2843         intel_connector = &intel_sdvo_connector->base;
2844         connector = &intel_connector->base;
2845         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2846         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2847         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2848
2849         intel_sdvo_connector->output_flag = type;
2850
2851         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2852                 kfree(intel_sdvo_connector);
2853                 return false;
2854         }
2855
2856         return true;
2857 }
2858
2859 static bool
2860 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
2861 {
2862         struct drm_encoder *encoder = &intel_sdvo->base.base;
2863         struct drm_i915_private *i915 = to_i915(encoder->dev);
2864         struct drm_connector *connector;
2865         struct intel_connector *intel_connector;
2866         struct intel_sdvo_connector *intel_sdvo_connector;
2867
2868         DRM_DEBUG_KMS("initialising LVDS type 0x%x\n", type);
2869
2870         intel_sdvo_connector = intel_sdvo_connector_alloc();
2871         if (!intel_sdvo_connector)
2872                 return false;
2873
2874         intel_connector = &intel_sdvo_connector->base;
2875         connector = &intel_connector->base;
2876         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2877         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2878
2879         intel_sdvo_connector->output_flag = type;
2880
2881         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2882                 kfree(intel_sdvo_connector);
2883                 return false;
2884         }
2885
2886         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2887                 goto err;
2888
2889         intel_bios_init_panel(i915, &intel_connector->panel, NULL, NULL);
2890
2891         /*
2892          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2893          * SDVO->LVDS transcoders can't cope with the EDID mode.
2894          */
2895         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2896
2897         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2898                 mutex_lock(&i915->drm.mode_config.mutex);
2899
2900                 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2901                 intel_panel_add_edid_fixed_modes(intel_connector, false);
2902
2903                 mutex_unlock(&i915->drm.mode_config.mutex);
2904         }
2905
2906         intel_panel_init(intel_connector);
2907
2908         if (!intel_panel_preferred_fixed_mode(intel_connector))
2909                 goto err;
2910
2911         return true;
2912
2913 err:
2914         intel_connector_destroy(connector);
2915         return false;
2916 }
2917
2918 static u16 intel_sdvo_filter_output_flags(u16 flags)
2919 {
2920         flags &= SDVO_OUTPUT_MASK;
2921
2922         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2923         if (!(flags & SDVO_OUTPUT_TMDS0))
2924                 flags &= ~SDVO_OUTPUT_TMDS1;
2925
2926         if (!(flags & SDVO_OUTPUT_RGB0))
2927                 flags &= ~SDVO_OUTPUT_RGB1;
2928
2929         if (!(flags & SDVO_OUTPUT_LVDS0))
2930                 flags &= ~SDVO_OUTPUT_LVDS1;
2931
2932         return flags;
2933 }
2934
2935 static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
2936 {
2937         if (type & SDVO_TMDS_MASK)
2938                 return intel_sdvo_dvi_init(sdvo, type);
2939         else if (type & SDVO_TV_MASK)
2940                 return intel_sdvo_tv_init(sdvo, type);
2941         else if (type & SDVO_RGB_MASK)
2942                 return intel_sdvo_analog_init(sdvo, type);
2943         else if (type & SDVO_LVDS_MASK)
2944                 return intel_sdvo_lvds_init(sdvo, type);
2945         else
2946                 return false;
2947 }
2948
2949 static bool
2950 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
2951 {
2952         static const u16 probe_order[] = {
2953                 SDVO_OUTPUT_TMDS0,
2954                 SDVO_OUTPUT_TMDS1,
2955                 /* TV has no XXX1 function block */
2956                 SDVO_OUTPUT_SVID0,
2957                 SDVO_OUTPUT_CVBS0,
2958                 SDVO_OUTPUT_YPRPB0,
2959                 SDVO_OUTPUT_RGB0,
2960                 SDVO_OUTPUT_RGB1,
2961                 SDVO_OUTPUT_LVDS0,
2962                 SDVO_OUTPUT_LVDS1,
2963         };
2964         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
2965         u16 flags;
2966         int i;
2967
2968         flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
2969
2970         if (flags == 0) {
2971                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
2972                               SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
2973                 return false;
2974         }
2975
2976         intel_sdvo->controlled_output = flags;
2977
2978         intel_sdvo_select_ddc_bus(i915, intel_sdvo);
2979
2980         for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
2981                 u16 type = flags & probe_order[i];
2982
2983                 if (!type)
2984                         continue;
2985
2986                 if (!intel_sdvo_output_init(intel_sdvo, type))
2987                         return false;
2988         }
2989
2990         intel_sdvo->base.pipe_mask = ~0;
2991
2992         return true;
2993 }
2994
2995 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2996 {
2997         struct drm_device *dev = intel_sdvo->base.base.dev;
2998         struct drm_connector *connector, *tmp;
2999
3000         list_for_each_entry_safe(connector, tmp,
3001                                  &dev->mode_config.connector_list, head) {
3002                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3003                         drm_connector_unregister(connector);
3004                         intel_connector_destroy(connector);
3005                 }
3006         }
3007 }
3008
3009 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3010                                           struct intel_sdvo_connector *intel_sdvo_connector,
3011                                           int type)
3012 {
3013         struct drm_device *dev = intel_sdvo->base.base.dev;
3014         struct intel_sdvo_tv_format format;
3015         u32 format_map, i;
3016
3017         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3018                 return false;
3019
3020         BUILD_BUG_ON(sizeof(format) != 6);
3021         if (!intel_sdvo_get_value(intel_sdvo,
3022                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3023                                   &format, sizeof(format)))
3024                 return false;
3025
3026         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3027
3028         if (format_map == 0)
3029                 return false;
3030
3031         intel_sdvo_connector->format_supported_num = 0;
3032         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3033                 if (format_map & (1 << i))
3034                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3035
3036
3037         intel_sdvo_connector->tv_format =
3038                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
3039                                             "mode", intel_sdvo_connector->format_supported_num);
3040         if (!intel_sdvo_connector->tv_format)
3041                 return false;
3042
3043         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3044                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3045                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3046
3047         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3048         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3049                                    intel_sdvo_connector->tv_format, 0);
3050         return true;
3051
3052 }
3053
3054 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3055         if (enhancements.name) { \
3056                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3057                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3058                         return false; \
3059                 intel_sdvo_connector->name = \
3060                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3061                 if (!intel_sdvo_connector->name) return false; \
3062                 state_assignment = response; \
3063                 drm_object_attach_property(&connector->base, \
3064                                            intel_sdvo_connector->name, 0); \
3065                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3066                               data_value[0], data_value[1], response); \
3067         } \
3068 } while (0)
3069
3070 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3071
3072 static bool
3073 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3074                                       struct intel_sdvo_connector *intel_sdvo_connector,
3075                                       struct intel_sdvo_enhancements_reply enhancements)
3076 {
3077         struct drm_device *dev = intel_sdvo->base.base.dev;
3078         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3079         struct drm_connector_state *conn_state = connector->state;
3080         struct intel_sdvo_connector_state *sdvo_state =
3081                 to_intel_sdvo_connector_state(conn_state);
3082         u16 response, data_value[2];
3083
3084         /* when horizontal overscan is supported, Add the left/right property */
3085         if (enhancements.overscan_h) {
3086                 if (!intel_sdvo_get_value(intel_sdvo,
3087                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3088                                           &data_value, 4))
3089                         return false;
3090
3091                 if (!intel_sdvo_get_value(intel_sdvo,
3092                                           SDVO_CMD_GET_OVERSCAN_H,
3093                                           &response, 2))
3094                         return false;
3095
3096                 sdvo_state->tv.overscan_h = response;
3097
3098                 intel_sdvo_connector->max_hscan = data_value[0];
3099                 intel_sdvo_connector->left =
3100                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3101                 if (!intel_sdvo_connector->left)
3102                         return false;
3103
3104                 drm_object_attach_property(&connector->base,
3105                                            intel_sdvo_connector->left, 0);
3106
3107                 intel_sdvo_connector->right =
3108                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3109                 if (!intel_sdvo_connector->right)
3110                         return false;
3111
3112                 drm_object_attach_property(&connector->base,
3113                                               intel_sdvo_connector->right, 0);
3114                 DRM_DEBUG_KMS("h_overscan: max %d, "
3115                               "default %d, current %d\n",
3116                               data_value[0], data_value[1], response);
3117         }
3118
3119         if (enhancements.overscan_v) {
3120                 if (!intel_sdvo_get_value(intel_sdvo,
3121                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3122                                           &data_value, 4))
3123                         return false;
3124
3125                 if (!intel_sdvo_get_value(intel_sdvo,
3126                                           SDVO_CMD_GET_OVERSCAN_V,
3127                                           &response, 2))
3128                         return false;
3129
3130                 sdvo_state->tv.overscan_v = response;
3131
3132                 intel_sdvo_connector->max_vscan = data_value[0];
3133                 intel_sdvo_connector->top =
3134                         drm_property_create_range(dev, 0,
3135                                             "top_margin", 0, data_value[0]);
3136                 if (!intel_sdvo_connector->top)
3137                         return false;
3138
3139                 drm_object_attach_property(&connector->base,
3140                                            intel_sdvo_connector->top, 0);
3141
3142                 intel_sdvo_connector->bottom =
3143                         drm_property_create_range(dev, 0,
3144                                             "bottom_margin", 0, data_value[0]);
3145                 if (!intel_sdvo_connector->bottom)
3146                         return false;
3147
3148                 drm_object_attach_property(&connector->base,
3149                                               intel_sdvo_connector->bottom, 0);
3150                 DRM_DEBUG_KMS("v_overscan: max %d, "
3151                               "default %d, current %d\n",
3152                               data_value[0], data_value[1], response);
3153         }
3154
3155         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3156         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3157         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3158         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3159         ENHANCEMENT(&conn_state->tv, hue, HUE);
3160         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3161         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3162         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3163         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3164         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3165         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3166         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3167
3168         if (enhancements.dot_crawl) {
3169                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3170                         return false;
3171
3172                 sdvo_state->tv.dot_crawl = response & 0x1;
3173                 intel_sdvo_connector->dot_crawl =
3174                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3175                 if (!intel_sdvo_connector->dot_crawl)
3176                         return false;
3177
3178                 drm_object_attach_property(&connector->base,
3179                                            intel_sdvo_connector->dot_crawl, 0);
3180                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3181         }
3182
3183         return true;
3184 }
3185
3186 static bool
3187 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3188                                         struct intel_sdvo_connector *intel_sdvo_connector,
3189                                         struct intel_sdvo_enhancements_reply enhancements)
3190 {
3191         struct drm_device *dev = intel_sdvo->base.base.dev;
3192         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3193         u16 response, data_value[2];
3194
3195         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3196
3197         return true;
3198 }
3199 #undef ENHANCEMENT
3200 #undef _ENHANCEMENT
3201
3202 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3203                                                struct intel_sdvo_connector *intel_sdvo_connector)
3204 {
3205         union {
3206                 struct intel_sdvo_enhancements_reply reply;
3207                 u16 response;
3208         } enhancements;
3209
3210         BUILD_BUG_ON(sizeof(enhancements) != 2);
3211
3212         if (!intel_sdvo_get_value(intel_sdvo,
3213                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3214                                   &enhancements, sizeof(enhancements)) ||
3215             enhancements.response == 0) {
3216                 DRM_DEBUG_KMS("No enhancement is supported\n");
3217                 return true;
3218         }
3219
3220         if (IS_TV(intel_sdvo_connector))
3221                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3222         else if (IS_LVDS(intel_sdvo_connector))
3223                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3224         else
3225                 return true;
3226 }
3227
3228 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3229                                      struct i2c_msg *msgs,
3230                                      int num)
3231 {
3232         struct intel_sdvo *sdvo = adapter->algo_data;
3233
3234         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3235                 return -EIO;
3236
3237         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3238 }
3239
3240 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3241 {
3242         struct intel_sdvo *sdvo = adapter->algo_data;
3243         return sdvo->i2c->algo->functionality(sdvo->i2c);
3244 }
3245
3246 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3247         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3248         .functionality  = intel_sdvo_ddc_proxy_func
3249 };
3250
3251 static void proxy_lock_bus(struct i2c_adapter *adapter,
3252                            unsigned int flags)
3253 {
3254         struct intel_sdvo *sdvo = adapter->algo_data;
3255         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3256 }
3257
3258 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3259                              unsigned int flags)
3260 {
3261         struct intel_sdvo *sdvo = adapter->algo_data;
3262         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3263 }
3264
3265 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3266                              unsigned int flags)
3267 {
3268         struct intel_sdvo *sdvo = adapter->algo_data;
3269         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3270 }
3271
3272 static const struct i2c_lock_operations proxy_lock_ops = {
3273         .lock_bus =    proxy_lock_bus,
3274         .trylock_bus = proxy_trylock_bus,
3275         .unlock_bus =  proxy_unlock_bus,
3276 };
3277
3278 static bool
3279 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3280                           struct drm_i915_private *dev_priv)
3281 {
3282         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3283
3284         sdvo->ddc.owner = THIS_MODULE;
3285         sdvo->ddc.class = I2C_CLASS_DDC;
3286         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3287         sdvo->ddc.dev.parent = &pdev->dev;
3288         sdvo->ddc.algo_data = sdvo;
3289         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3290         sdvo->ddc.lock_ops = &proxy_lock_ops;
3291
3292         return i2c_add_adapter(&sdvo->ddc) == 0;
3293 }
3294
3295 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3296                                    enum port port)
3297 {
3298         if (HAS_PCH_SPLIT(dev_priv))
3299                 drm_WARN_ON(&dev_priv->drm, port != PORT_B);
3300         else
3301                 drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C);
3302 }
3303
3304 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3305                      i915_reg_t sdvo_reg, enum port port)
3306 {
3307         struct intel_encoder *intel_encoder;
3308         struct intel_sdvo *intel_sdvo;
3309         int i;
3310
3311         assert_sdvo_port_valid(dev_priv, port);
3312
3313         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3314         if (!intel_sdvo)
3315                 return false;
3316
3317         intel_sdvo->sdvo_reg = sdvo_reg;
3318         intel_sdvo->port = port;
3319         intel_sdvo->slave_addr =
3320                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3321         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3322         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3323                 goto err_i2c_bus;
3324
3325         /* encoder type will be decided later */
3326         intel_encoder = &intel_sdvo->base;
3327         intel_encoder->type = INTEL_OUTPUT_SDVO;
3328         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3329         intel_encoder->port = port;
3330         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3331                          &intel_sdvo_enc_funcs, 0,
3332                          "SDVO %c", port_name(port));
3333
3334         /* Read the regs to test if we can talk to the device */
3335         for (i = 0; i < 0x40; i++) {
3336                 u8 byte;
3337
3338                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3339                         drm_dbg_kms(&dev_priv->drm,
3340                                     "No SDVO device found on %s\n",
3341                                     SDVO_NAME(intel_sdvo));
3342                         goto err;
3343                 }
3344         }
3345
3346         intel_encoder->compute_config = intel_sdvo_compute_config;
3347         if (HAS_PCH_SPLIT(dev_priv)) {
3348                 intel_encoder->disable = pch_disable_sdvo;
3349                 intel_encoder->post_disable = pch_post_disable_sdvo;
3350         } else {
3351                 intel_encoder->disable = intel_disable_sdvo;
3352         }
3353         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3354         intel_encoder->enable = intel_enable_sdvo;
3355         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3356         intel_encoder->get_config = intel_sdvo_get_config;
3357
3358         /* In default case sdvo lvds is false */
3359         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3360                 goto err;
3361
3362         intel_sdvo->colorimetry_cap =
3363                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3364
3365         if (!intel_sdvo_output_setup(intel_sdvo)) {
3366                 drm_dbg_kms(&dev_priv->drm,
3367                             "SDVO output failed to setup on %s\n",
3368                             SDVO_NAME(intel_sdvo));
3369                 /* Output_setup can leave behind connectors! */
3370                 goto err_output;
3371         }
3372
3373         /*
3374          * Only enable the hotplug irq if we need it, to work around noisy
3375          * hotplug lines.
3376          */
3377         if (intel_sdvo->hotplug_active) {
3378                 if (intel_sdvo->port == PORT_B)
3379                         intel_encoder->hpd_pin = HPD_SDVO_B;
3380                 else
3381                         intel_encoder->hpd_pin = HPD_SDVO_C;
3382         }
3383
3384         /*
3385          * Cloning SDVO with anything is often impossible, since the SDVO
3386          * encoder can request a special input timing mode. And even if that's
3387          * not the case we have evidence that cloning a plain unscaled mode with
3388          * VGA doesn't really work. Furthermore the cloning flags are way too
3389          * simplistic anyway to express such constraints, so just give up on
3390          * cloning for SDVO encoders.
3391          */
3392         intel_sdvo->base.cloneable = 0;
3393
3394         /* Set the input timing to the screen. Assume always input 0. */
3395         if (!intel_sdvo_set_target_input(intel_sdvo))
3396                 goto err_output;
3397
3398         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3399                                                     &intel_sdvo->pixel_clock_min,
3400                                                     &intel_sdvo->pixel_clock_max))
3401                 goto err_output;
3402
3403         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3404                         "clock range %dMHz - %dMHz, "
3405                         "input 1: %c, input 2: %c, "
3406                         "output 1: %c, output 2: %c\n",
3407                         SDVO_NAME(intel_sdvo),
3408                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3409                         intel_sdvo->caps.device_rev_id,
3410                         intel_sdvo->pixel_clock_min / 1000,
3411                         intel_sdvo->pixel_clock_max / 1000,
3412                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3413                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3414                         /* check currently supported outputs */
3415                         intel_sdvo->caps.output_flags &
3416                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
3417                          SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
3418                          SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
3419                         intel_sdvo->caps.output_flags &
3420                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
3421                          SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
3422         return true;
3423
3424 err_output:
3425         intel_sdvo_output_cleanup(intel_sdvo);
3426
3427 err:
3428         drm_encoder_cleanup(&intel_encoder->base);
3429         i2c_del_adapter(&intel_sdvo->ddc);
3430 err_i2c_bus:
3431         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3432         kfree(intel_sdvo);
3433
3434         return false;
3435 }