drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38
  39 #include "i915_drv.h"
  40 #include "intel_atomic.h"
  41 #include "intel_connector.h"
  42 #include "intel_crtc.h"
  43 #include "intel_de.h"
  44 #include "intel_display_types.h"
  45 #include "intel_fifo_underrun.h"
  46 #include "intel_gmbus.h"
  47 #include "intel_hdmi.h"
  48 #include "intel_hotplug.h"
  49 #include "intel_panel.h"
  50 #include "intel_sdvo.h"
  51 #include "intel_sdvo_regs.h"
  52
  53 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  54 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  55 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  56 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  57
  58 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  59                         SDVO_TV_MASK)
  60
  61 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  62 #define IS_TMDS(c)      (c->output_flag & SDVO_TMDS_MASK)
  63 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  64 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  65 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  66
  67
  68 static const char * const tv_format_names[] = {
  69         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  70         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  71         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  72         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  73         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  74         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  75         "SECAM_60"
  76 };
  77
  78 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  79
  80 struct intel_sdvo {
  81         struct intel_encoder base;
  82
  83         struct i2c_adapter *i2c;
  84         u8 slave_addr;
  85
  86         struct i2c_adapter ddc;
  87
  88         /* Register for the SDVO device: SDVOB or SDVOC */
  89         i915_reg_t sdvo_reg;
  90
  91         /* Active outputs controlled by this SDVO output */
  92         u16 controlled_output;
  93
  94         /*
  95          * Capabilities of the SDVO device returned by
  96          * intel_sdvo_get_capabilities()
  97          */
  98         struct intel_sdvo_caps caps;
  99
 100         u8 colorimetry_cap;
 101
 102         /* Pixel clock limitations reported by the SDVO device, in kHz */
 103         int pixel_clock_min, pixel_clock_max;
 104
 105         /*
 106         * For multiple function SDVO device,
 107         * this is for current attached outputs.
 108         */
 109         u16 attached_output;
 110
 111         /*
 112          * Hotplug activation bits for this device
 113          */
 114         u16 hotplug_active;
 115
 116         enum port port;
 117
 118         bool has_hdmi_monitor;
 119         bool has_hdmi_audio;
 120
 121         /* DDC bus used by this SDVO encoder */
 122         u8 ddc_bus;
 123
 124         /*
 125          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 126          */
 127         u8 dtd_sdvo_flags;
 128 };
 129
 130 struct intel_sdvo_connector {
 131         struct intel_connector base;
 132
 133         /* Mark the type of connector */
 134         u16 output_flag;
 135
 136         /* This contains all current supported TV format */
 137         u8 tv_format_supported[TV_FORMAT_NUM];
 138         int   format_supported_num;
 139         struct drm_property *tv_format;
 140
 141         /* add the property for the SDVO-TV */
 142         struct drm_property *left;
 143         struct drm_property *right;
 144         struct drm_property *top;
 145         struct drm_property *bottom;
 146         struct drm_property *hpos;
 147         struct drm_property *vpos;
 148         struct drm_property *contrast;
 149         struct drm_property *saturation;
 150         struct drm_property *hue;
 151         struct drm_property *sharpness;
 152         struct drm_property *flicker_filter;
 153         struct drm_property *flicker_filter_adaptive;
 154         struct drm_property *flicker_filter_2d;
 155         struct drm_property *tv_chroma_filter;
 156         struct drm_property *tv_luma_filter;
 157         struct drm_property *dot_crawl;
 158
 159         /* add the property for the SDVO-TV/LVDS */
 160         struct drm_property *brightness;
 161
 162         /* this is to get the range of margin.*/
 163         u32 max_hscan, max_vscan;
 164
 165         /**
 166          * This is set if we treat the device as HDMI, instead of DVI.
 167          */
 168         bool is_hdmi;
 169 };
 170
 171 struct intel_sdvo_connector_state {
 172         /* base.base: tv.saturation/contrast/hue/brightness */
 173         struct intel_digital_connector_state base;
 174
 175         struct {
 176                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 177                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 178                 unsigned chroma_filter, luma_filter, dot_crawl;
 179         } tv;
 180 };
 181
 182 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 183 {
 184         return container_of(encoder, struct intel_sdvo, base);
 185 }
 186
 187 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 188 {
 189         return to_sdvo(intel_attached_encoder(connector));
 190 }
 191
 192 static struct intel_sdvo_connector *
 193 to_intel_sdvo_connector(struct drm_connector *connector)
 194 {
 195         return container_of(connector, struct intel_sdvo_connector, base.base);
 196 }
 197
 198 #define to_intel_sdvo_connector_state(conn_state) \
 199         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 200
 201 static bool
 202 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags);
 203 static bool
 204 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 205                               struct intel_sdvo_connector *intel_sdvo_connector,
 206                               int type);
 207 static bool
 208 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 209                                    struct intel_sdvo_connector *intel_sdvo_connector);
 210
 211 /*
 212  * Writes the SDVOB or SDVOC with the given value, but always writes both
 213  * SDVOB and SDVOC to work around apparent hardware issues (according to
 214  * comments in the BIOS).
 215  */
 216 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 217 {
 218         struct drm_device *dev = intel_sdvo->base.base.dev;
 219         struct drm_i915_private *dev_priv = to_i915(dev);
 220         u32 bval = val, cval = val;
 221         int i;
 222
 223         if (HAS_PCH_SPLIT(dev_priv)) {
 224                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 225                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 226                 /*
 227                  * HW workaround, need to write this twice for issue
 228                  * that may result in first write getting masked.
 229                  */
 230                 if (HAS_PCH_IBX(dev_priv)) {
 231                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 232                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 233                 }
 234                 return;
 235         }
 236
 237         if (intel_sdvo->port == PORT_B)
 238                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 239         else
 240                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 241
 242         /*
 243          * Write the registers twice for luck. Sometimes,
 244          * writing them only once doesn't appear to 'stick'.
 245          * The BIOS does this too. Yay, magic
 246          */
 247         for (i = 0; i < 2; i++) {
 248                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 249                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 250
 251                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 252                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 253         }
 254 }
 255
 256 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 257 {
 258         struct i2c_msg msgs[] = {
 259                 {
 260                         .addr = intel_sdvo->slave_addr,
 261                         .flags = 0,
 262                         .len = 1,
 263                         .buf = &addr,
 264                 },
 265                 {
 266                         .addr = intel_sdvo->slave_addr,
 267                         .flags = I2C_M_RD,
 268                         .len = 1,
 269                         .buf = ch,
 270                 }
 271         };
 272         int ret;
 273
 274         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 275                 return true;
 276
 277         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 278         return false;
 279 }
 280
 281 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 282
 283 /** Mapping of command numbers to names, for debug output */
 284 static const struct {
 285         u8 cmd;
 286         const char *name;
 287 } __packed sdvo_cmd_names[] = {
 288         SDVO_CMD_NAME_ENTRY(RESET),
 289         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 290         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 291         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 292         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 293         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 294         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 295         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 296         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 297         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 298         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 299         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 300         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 301         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 302         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 303         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 304         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 305         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 306         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 307         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 308         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 309         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 310         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 311         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 312         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 313         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 314         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 315         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 316         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 317         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 318         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 319         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 320         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 321         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 322         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 323         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 324         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 325         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 326         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 327         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 328         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 329         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 330
 331         /* Add the op code for SDVO enhancements */
 332         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 333         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 334         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 335         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 336         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 337         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 338         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 339         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 340         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 341         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 342         SDVO_CMD_NAME_ENTRY(GET_HUE),
 343         SDVO_CMD_NAME_ENTRY(SET_HUE),
 344         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 345         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 346         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 347         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 348         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 349         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 350         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 351         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 352         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 353         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 354         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 355         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 356         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 357         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 358         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 359         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 360         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 361         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 362         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 363         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 364         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 365         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 366         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 367         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 368         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 369         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 370         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 371         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 372         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 373         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 374         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 375         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 376
 377         /* HDMI op code */
 378         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 379         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 380         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 381         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 382         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 383         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 384         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 385         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 386         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 387         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 388         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 389         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 390         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 391         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 392         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 393         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 394         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 395         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 396         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 397         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 398 };
 399
 400 #undef SDVO_CMD_NAME_ENTRY
 401
 402 static const char *sdvo_cmd_name(u8 cmd)
 403 {
 404         int i;
 405
 406         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 407                 if (cmd == sdvo_cmd_names[i].cmd)
 408                         return sdvo_cmd_names[i].name;
 409         }
 410
 411         return NULL;
 412 }
 413
 414 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
 415
 416 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 417                                    const void *args, int args_len)
 418 {
 419         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 420         const char *cmd_name;
 421         int i, pos = 0;
 422         char buffer[64];
 423
 424 #define BUF_PRINT(args...) \
 425         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 426
 427         for (i = 0; i < args_len; i++) {
 428                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 429         }
 430         for (; i < 8; i++) {
 431                 BUF_PRINT("   ");
 432         }
 433
 434         cmd_name = sdvo_cmd_name(cmd);
 435         if (cmd_name)
 436                 BUF_PRINT("(%s)", cmd_name);
 437         else
 438                 BUF_PRINT("(%02X)", cmd);
 439
 440         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 441 #undef BUF_PRINT
 442
 443         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 444 }
 445
 446 static const char * const cmd_status_names[] = {
 447         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 448         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 449         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 450         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 451         [SDVO_CMD_STATUS_PENDING] = "Pending",
 452         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 453         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 454 };
 455
 456 static const char *sdvo_cmd_status(u8 status)
 457 {
 458         if (status < ARRAY_SIZE(cmd_status_names))
 459                 return cmd_status_names[status];
 460         else
 461                 return NULL;
 462 }
 463
 464 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 465                                    const void *args, int args_len,
 466                                    bool unlocked)
 467 {
 468         u8 *buf, status;
 469         struct i2c_msg *msgs;
 470         int i, ret = true;
 471
 472         /* Would be simpler to allocate both in one go ? */
 473         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 474         if (!buf)
 475                 return false;
 476
 477         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 478         if (!msgs) {
 479                 kfree(buf);
 480                 return false;
 481         }
 482
 483         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 484
 485         for (i = 0; i < args_len; i++) {
 486                 msgs[i].addr = intel_sdvo->slave_addr;
 487                 msgs[i].flags = 0;
 488                 msgs[i].len = 2;
 489                 msgs[i].buf = buf + 2 *i;
 490                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 491                 buf[2*i + 1] = ((u8*)args)[i];
 492         }
 493         msgs[i].addr = intel_sdvo->slave_addr;
 494         msgs[i].flags = 0;
 495         msgs[i].len = 2;
 496         msgs[i].buf = buf + 2*i;
 497         buf[2*i + 0] = SDVO_I2C_OPCODE;
 498         buf[2*i + 1] = cmd;
 499
 500         /* the following two are to read the response */
 501         status = SDVO_I2C_CMD_STATUS;
 502         msgs[i+1].addr = intel_sdvo->slave_addr;
 503         msgs[i+1].flags = 0;
 504         msgs[i+1].len = 1;
 505         msgs[i+1].buf = &status;
 506
 507         msgs[i+2].addr = intel_sdvo->slave_addr;
 508         msgs[i+2].flags = I2C_M_RD;
 509         msgs[i+2].len = 1;
 510         msgs[i+2].buf = &status;
 511
 512         if (unlocked)
 513                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 514         else
 515                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 516         if (ret < 0) {
 517                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 518                 ret = false;
 519                 goto out;
 520         }
 521         if (ret != i+3) {
 522                 /* failure in I2C transfer */
 523                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 524                 ret = false;
 525         }
 526
 527 out:
 528         kfree(msgs);
 529         kfree(buf);
 530         return ret;
 531 }
 532
 533 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 534                                  const void *args, int args_len)
 535 {
 536         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 537 }
 538
 539 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 540                                      void *response, int response_len)
 541 {
 542         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 543         const char *cmd_status;
 544         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 545         u8 status;
 546         int i, pos = 0;
 547         char buffer[64];
 548
 549         buffer[0] = '\0';
 550
 551         /*
 552          * The documentation states that all commands will be
 553          * processed within 15µs, and that we need only poll
 554          * the status byte a maximum of 3 times in order for the
 555          * command to be complete.
 556          *
 557          * Check 5 times in case the hardware failed to read the docs.
 558          *
 559          * Also beware that the first response by many devices is to
 560          * reply PENDING and stall for time. TVs are notorious for
 561          * requiring longer than specified to complete their replies.
 562          * Originally (in the DDX long ago), the delay was only ever 15ms
 563          * with an additional delay of 30ms applied for TVs added later after
 564          * many experiments. To accommodate both sets of delays, we do a
 565          * sequence of slow checks if the device is falling behind and fails
 566          * to reply within 5*15µs.
 567          */
 568         if (!intel_sdvo_read_byte(intel_sdvo,
 569                                   SDVO_I2C_CMD_STATUS,
 570                                   &status))
 571                 goto log_fail;
 572
 573         while ((status == SDVO_CMD_STATUS_PENDING ||
 574                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 575                 if (retry < 10)
 576                         msleep(15);
 577                 else
 578                         udelay(15);
 579
 580                 if (!intel_sdvo_read_byte(intel_sdvo,
 581                                           SDVO_I2C_CMD_STATUS,
 582                                           &status))
 583                         goto log_fail;
 584         }
 585
 586 #define BUF_PRINT(args...) \
 587         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 588
 589         cmd_status = sdvo_cmd_status(status);
 590         if (cmd_status)
 591                 BUF_PRINT("(%s)", cmd_status);
 592         else
 593                 BUF_PRINT("(??? %d)", status);
 594
 595         if (status != SDVO_CMD_STATUS_SUCCESS)
 596                 goto log_fail;
 597
 598         /* Read the command response */
 599         for (i = 0; i < response_len; i++) {
 600                 if (!intel_sdvo_read_byte(intel_sdvo,
 601                                           SDVO_I2C_RETURN_0 + i,
 602                                           &((u8 *)response)[i]))
 603                         goto log_fail;
 604                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 605         }
 606
 607         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 608 #undef BUF_PRINT
 609
 610         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 611         return true;
 612
 613 log_fail:
 614         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 615                       SDVO_NAME(intel_sdvo), buffer);
 616         return false;
 617 }
 618
 619 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 620 {
 621         if (adjusted_mode->crtc_clock >= 100000)
 622                 return 1;
 623         else if (adjusted_mode->crtc_clock >= 50000)
 624                 return 2;
 625         else
 626                 return 4;
 627 }
 628
 629 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 630                                                 u8 ddc_bus)
 631 {
 632         /* This must be the immediately preceding write before the i2c xfer */
 633         return __intel_sdvo_write_cmd(intel_sdvo,
 634                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 635                                       &ddc_bus, 1, false);
 636 }
 637
 638 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 639 {
 640         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 641                 return false;
 642
 643         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 644 }
 645
 646 static bool
 647 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 648 {
 649         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 650                 return false;
 651
 652         return intel_sdvo_read_response(intel_sdvo, value, len);
 653 }
 654
 655 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 656 {
 657         struct intel_sdvo_set_target_input_args targets = {0};
 658         return intel_sdvo_set_value(intel_sdvo,
 659                                     SDVO_CMD_SET_TARGET_INPUT,
 660                                     &targets, sizeof(targets));
 661 }
 662
 663 /*
 664  * Return whether each input is trained.
 665  *
 666  * This function is making an assumption about the layout of the response,
 667  * which should be checked against the docs.
 668  */
 669 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 670 {
 671         struct intel_sdvo_get_trained_inputs_response response;
 672
 673         BUILD_BUG_ON(sizeof(response) != 1);
 674         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 675                                   &response, sizeof(response)))
 676                 return false;
 677
 678         *input_1 = response.input0_trained;
 679         *input_2 = response.input1_trained;
 680         return true;
 681 }
 682
 683 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 684                                           u16 outputs)
 685 {
 686         return intel_sdvo_set_value(intel_sdvo,
 687                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 688                                     &outputs, sizeof(outputs));
 689 }
 690
 691 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 692                                           u16 *outputs)
 693 {
 694         return intel_sdvo_get_value(intel_sdvo,
 695                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 696                                     outputs, sizeof(*outputs));
 697 }
 698
 699 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 700                                                int mode)
 701 {
 702         u8 state = SDVO_ENCODER_STATE_ON;
 703
 704         switch (mode) {
 705         case DRM_MODE_DPMS_ON:
 706                 state = SDVO_ENCODER_STATE_ON;
 707                 break;
 708         case DRM_MODE_DPMS_STANDBY:
 709                 state = SDVO_ENCODER_STATE_STANDBY;
 710                 break;
 711         case DRM_MODE_DPMS_SUSPEND:
 712                 state = SDVO_ENCODER_STATE_SUSPEND;
 713                 break;
 714         case DRM_MODE_DPMS_OFF:
 715                 state = SDVO_ENCODER_STATE_OFF;
 716                 break;
 717         }
 718
 719         return intel_sdvo_set_value(intel_sdvo,
 720                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 721 }
 722
 723 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 724                                                    int *clock_min,
 725                                                    int *clock_max)
 726 {
 727         struct intel_sdvo_pixel_clock_range clocks;
 728
 729         BUILD_BUG_ON(sizeof(clocks) != 4);
 730         if (!intel_sdvo_get_value(intel_sdvo,
 731                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 732                                   &clocks, sizeof(clocks)))
 733                 return false;
 734
 735         /* Convert the values from units of 10 kHz to kHz. */
 736         *clock_min = clocks.min * 10;
 737         *clock_max = clocks.max * 10;
 738         return true;
 739 }
 740
 741 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 742                                          u16 outputs)
 743 {
 744         return intel_sdvo_set_value(intel_sdvo,
 745                                     SDVO_CMD_SET_TARGET_OUTPUT,
 746                                     &outputs, sizeof(outputs));
 747 }
 748
 749 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 750                                   struct intel_sdvo_dtd *dtd)
 751 {
 752         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 753                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 754 }
 755
 756 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 757                                   struct intel_sdvo_dtd *dtd)
 758 {
 759         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 760                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 761 }
 762
 763 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 764                                          struct intel_sdvo_dtd *dtd)
 765 {
 766         return intel_sdvo_set_timing(intel_sdvo,
 767                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 768 }
 769
 770 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 771                                          struct intel_sdvo_dtd *dtd)
 772 {
 773         return intel_sdvo_set_timing(intel_sdvo,
 774                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 775 }
 776
 777 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 778                                         struct intel_sdvo_dtd *dtd)
 779 {
 780         return intel_sdvo_get_timing(intel_sdvo,
 781                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 782 }
 783
 784 static bool
 785 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 786                                          struct intel_sdvo_connector *intel_sdvo_connector,
 787                                          const struct drm_display_mode *mode)
 788 {
 789         struct intel_sdvo_preferred_input_timing_args args;
 790
 791         memset(&args, 0, sizeof(args));
 792         args.clock = mode->clock / 10;
 793         args.width = mode->hdisplay;
 794         args.height = mode->vdisplay;
 795         args.interlace = 0;
 796
 797         if (IS_LVDS(intel_sdvo_connector)) {
 798                 const struct drm_display_mode *fixed_mode =
 799                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 800
 801                 if (fixed_mode->hdisplay != args.width ||
 802                     fixed_mode->vdisplay != args.height)
 803                         args.scaled = 1;
 804         }
 805
 806         return intel_sdvo_set_value(intel_sdvo,
 807                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 808                                     &args, sizeof(args));
 809 }
 810
 811 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 812                                                   struct intel_sdvo_dtd *dtd)
 813 {
 814         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 815         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 816         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 817                                     &dtd->part1, sizeof(dtd->part1)) &&
 818                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 819                                      &dtd->part2, sizeof(dtd->part2));
 820 }
 821
 822 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 823 {
 824         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 825 }
 826
 827 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 828                                          const struct drm_display_mode *mode)
 829 {
 830         u16 width, height;
 831         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 832         u16 h_sync_offset, v_sync_offset;
 833         int mode_clock;
 834
 835         memset(dtd, 0, sizeof(*dtd));
 836
 837         width = mode->hdisplay;
 838         height = mode->vdisplay;
 839
 840         /* do some mode translations */
 841         h_blank_len = mode->htotal - mode->hdisplay;
 842         h_sync_len = mode->hsync_end - mode->hsync_start;
 843
 844         v_blank_len = mode->vtotal - mode->vdisplay;
 845         v_sync_len = mode->vsync_end - mode->vsync_start;
 846
 847         h_sync_offset = mode->hsync_start - mode->hdisplay;
 848         v_sync_offset = mode->vsync_start - mode->vdisplay;
 849
 850         mode_clock = mode->clock;
 851         mode_clock /= 10;
 852         dtd->part1.clock = mode_clock;
 853
 854         dtd->part1.h_active = width & 0xff;
 855         dtd->part1.h_blank = h_blank_len & 0xff;
 856         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 857                 ((h_blank_len >> 8) & 0xf);
 858         dtd->part1.v_active = height & 0xff;
 859         dtd->part1.v_blank = v_blank_len & 0xff;
 860         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 861                 ((v_blank_len >> 8) & 0xf);
 862
 863         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 864         dtd->part2.h_sync_width = h_sync_len & 0xff;
 865         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 866                 (v_sync_len & 0xf);
 867         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 868                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 869                 ((v_sync_len & 0x30) >> 4);
 870
 871         dtd->part2.dtd_flags = 0x18;
 872         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 873                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 874         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 875                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 876         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 877                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 878
 879         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 880 }
 881
 882 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 883                                          const struct intel_sdvo_dtd *dtd)
 884 {
 885         struct drm_display_mode mode = {};
 886
 887         mode.hdisplay = dtd->part1.h_active;
 888         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 889         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 890         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 891         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 892         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 893         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 894         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 895
 896         mode.vdisplay = dtd->part1.v_active;
 897         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 898         mode.vsync_start = mode.vdisplay;
 899         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 900         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 901         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 902         mode.vsync_end = mode.vsync_start +
 903                 (dtd->part2.v_sync_off_width & 0xf);
 904         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 905         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 906         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 907
 908         mode.clock = dtd->part1.clock * 10;
 909
 910         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 911                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 912         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 913                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 914         else
 915                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 916         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 917                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 918         else
 919                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 920
 921         drm_mode_set_crtcinfo(&mode, 0);
 922
 923         drm_mode_copy(pmode, &mode);
 924 }
 925
 926 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 927 {
 928         struct intel_sdvo_encode encode;
 929
 930         BUILD_BUG_ON(sizeof(encode) != 2);
 931         return intel_sdvo_get_value(intel_sdvo,
 932                                   SDVO_CMD_GET_SUPP_ENCODE,
 933                                   &encode, sizeof(encode));
 934 }
 935
 936 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 937                                   u8 mode)
 938 {
 939         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 940 }
 941
 942 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 943                                        u8 mode)
 944 {
 945         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 946 }
 947
 948 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 949                                              u8 pixel_repeat)
 950 {
 951         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 952                                     &pixel_repeat, 1);
 953 }
 954
 955 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 956                                        u8 audio_state)
 957 {
 958         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 959                                     &audio_state, 1);
 960 }
 961
 962 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 963                                      u8 *hbuf_size)
 964 {
 965         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 966                                   hbuf_size, 1))
 967                 return false;
 968
 969         /* Buffer size is 0 based, hooray! However zero means zero. */
 970         if (*hbuf_size)
 971                 (*hbuf_size)++;
 972
 973         return true;
 974 }
 975
 976 #if 0
 977 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 978 {
 979         int i, j;
 980         u8 set_buf_index[2];
 981         u8 av_split;
 982         u8 buf_size;
 983         u8 buf[48];
 984         u8 *pos;
 985
 986         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 987
 988         for (i = 0; i <= av_split; i++) {
 989                 set_buf_index[0] = i; set_buf_index[1] = 0;
 990                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 991                                      set_buf_index, 2);
 992                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 993                 intel_sdvo_read_response(encoder, &buf_size, 1);
 994
 995                 pos = buf;
 996                 for (j = 0; j <= buf_size; j += 8) {
 997                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 998                                              NULL, 0);
 999                         intel_sdvo_read_response(encoder, pos, 8);
1000                         pos += 8;
1001                 }
1002         }
1003 }
1004 #endif
1005
1006 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1007                                        unsigned int if_index, u8 tx_rate,
1008                                        const u8 *data, unsigned int length)
1009 {
1010         u8 set_buf_index[2] = { if_index, 0 };
1011         u8 hbuf_size, tmp[8];
1012         int i;
1013
1014         if (!intel_sdvo_set_value(intel_sdvo,
1015                                   SDVO_CMD_SET_HBUF_INDEX,
1016                                   set_buf_index, 2))
1017                 return false;
1018
1019         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1020                 return false;
1021
1022         DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1023                       if_index, length, hbuf_size);
1024
1025         if (hbuf_size < length)
1026                 return false;
1027
1028         for (i = 0; i < hbuf_size; i += 8) {
1029                 memset(tmp, 0, 8);
1030                 if (i < length)
1031                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1032
1033                 if (!intel_sdvo_set_value(intel_sdvo,
1034                                           SDVO_CMD_SET_HBUF_DATA,
1035                                           tmp, 8))
1036                         return false;
1037         }
1038
1039         return intel_sdvo_set_value(intel_sdvo,
1040                                     SDVO_CMD_SET_HBUF_TXRATE,
1041                                     &tx_rate, 1);
1042 }
1043
1044 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1045                                          unsigned int if_index,
1046                                          u8 *data, unsigned int length)
1047 {
1048         u8 set_buf_index[2] = { if_index, 0 };
1049         u8 hbuf_size, tx_rate, av_split;
1050         int i;
1051
1052         if (!intel_sdvo_get_value(intel_sdvo,
1053                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1054                                   &av_split, 1))
1055                 return -ENXIO;
1056
1057         if (av_split < if_index)
1058                 return 0;
1059
1060         if (!intel_sdvo_set_value(intel_sdvo,
1061                                   SDVO_CMD_SET_HBUF_INDEX,
1062                                   set_buf_index, 2))
1063                 return -ENXIO;
1064
1065         if (!intel_sdvo_get_value(intel_sdvo,
1066                                   SDVO_CMD_GET_HBUF_TXRATE,
1067                                   &tx_rate, 1))
1068                 return -ENXIO;
1069
1070         if (tx_rate == SDVO_HBUF_TX_DISABLED)
1071                 return 0;
1072
1073         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1074                 return false;
1075
1076         DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1077                       if_index, length, hbuf_size);
1078
1079         hbuf_size = min_t(unsigned int, length, hbuf_size);
1080
1081         for (i = 0; i < hbuf_size; i += 8) {
1082                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1083                         return -ENXIO;
1084                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1085                                               min_t(unsigned int, 8, hbuf_size - i)))
1086                         return -ENXIO;
1087         }
1088
1089         return hbuf_size;
1090 }
1091
1092 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1093                                              struct intel_crtc_state *crtc_state,
1094                                              struct drm_connector_state *conn_state)
1095 {
1096         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1097         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1098         const struct drm_display_mode *adjusted_mode =
1099                 &crtc_state->hw.adjusted_mode;
1100         int ret;
1101
1102         if (!crtc_state->has_hdmi_sink)
1103                 return true;
1104
1105         crtc_state->infoframes.enable |=
1106                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1107
1108         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1109                                                        conn_state->connector,
1110                                                        adjusted_mode);
1111         if (ret)
1112                 return false;
1113
1114         drm_hdmi_avi_infoframe_quant_range(frame,
1115                                            conn_state->connector,
1116                                            adjusted_mode,
1117                                            crtc_state->limited_color_range ?
1118                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1119                                            HDMI_QUANTIZATION_RANGE_FULL);
1120
1121         ret = hdmi_avi_infoframe_check(frame);
1122         if (drm_WARN_ON(&dev_priv->drm, ret))
1123                 return false;
1124
1125         return true;
1126 }
1127
1128 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1129                                          const struct intel_crtc_state *crtc_state)
1130 {
1131         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1132         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1133         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1134         ssize_t len;
1135
1136         if ((crtc_state->infoframes.enable &
1137              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1138                 return true;
1139
1140         if (drm_WARN_ON(&dev_priv->drm,
1141                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1142                 return false;
1143
1144         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1145         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1146                 return false;
1147
1148         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1149                                           SDVO_HBUF_TX_VSYNC,
1150                                           sdvo_data, len);
1151 }
1152
1153 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1154                                          struct intel_crtc_state *crtc_state)
1155 {
1156         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1157         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1158         ssize_t len;
1159         int ret;
1160
1161         if (!crtc_state->has_hdmi_sink)
1162                 return;
1163
1164         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1165                                         sdvo_data, sizeof(sdvo_data));
1166         if (len < 0) {
1167                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1168                 return;
1169         } else if (len == 0) {
1170                 return;
1171         }
1172
1173         crtc_state->infoframes.enable |=
1174                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1175
1176         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1177         if (ret) {
1178                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1179                 return;
1180         }
1181
1182         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1183                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1184                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1185 }
1186
1187 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1188                                      const struct drm_connector_state *conn_state)
1189 {
1190         struct intel_sdvo_tv_format format;
1191         u32 format_map;
1192
1193         format_map = 1 << conn_state->tv.mode;
1194         memset(&format, 0, sizeof(format));
1195         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1196
1197         BUILD_BUG_ON(sizeof(format) != 6);
1198         return intel_sdvo_set_value(intel_sdvo,
1199                                     SDVO_CMD_SET_TV_FORMAT,
1200                                     &format, sizeof(format));
1201 }
1202
1203 static bool
1204 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1205                                         const struct drm_display_mode *mode)
1206 {
1207         struct intel_sdvo_dtd output_dtd;
1208
1209         if (!intel_sdvo_set_target_output(intel_sdvo,
1210                                           intel_sdvo->attached_output))
1211                 return false;
1212
1213         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1214         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1215                 return false;
1216
1217         return true;
1218 }
1219
1220 /*
1221  * Asks the sdvo controller for the preferred input mode given the output mode.
1222  * Unfortunately we have to set up the full output mode to do that.
1223  */
1224 static bool
1225 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1226                                     struct intel_sdvo_connector *intel_sdvo_connector,
1227                                     const struct drm_display_mode *mode,
1228                                     struct drm_display_mode *adjusted_mode)
1229 {
1230         struct intel_sdvo_dtd input_dtd;
1231
1232         /* Reset the input timing to the screen. Assume always input 0. */
1233         if (!intel_sdvo_set_target_input(intel_sdvo))
1234                 return false;
1235
1236         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1237                                                       intel_sdvo_connector,
1238                                                       mode))
1239                 return false;
1240
1241         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1242                                                    &input_dtd))
1243                 return false;
1244
1245         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1246         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1247
1248         return true;
1249 }
1250
1251 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1252 {
1253         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1254         unsigned dotclock = pipe_config->port_clock;
1255         struct dpll *clock = &pipe_config->dpll;
1256
1257         /*
1258          * SDVO TV has fixed PLL values depend on its clock range,
1259          * this mirrors vbios setting.
1260          */
1261         if (dotclock >= 100000 && dotclock < 140500) {
1262                 clock->p1 = 2;
1263                 clock->p2 = 10;
1264                 clock->n = 3;
1265                 clock->m1 = 16;
1266                 clock->m2 = 8;
1267         } else if (dotclock >= 140500 && dotclock <= 200000) {
1268                 clock->p1 = 1;
1269                 clock->p2 = 10;
1270                 clock->n = 6;
1271                 clock->m1 = 12;
1272                 clock->m2 = 8;
1273         } else {
1274                 drm_WARN(&dev_priv->drm, 1,
1275                          "SDVO TV clock out of range: %i\n", dotclock);
1276         }
1277
1278         pipe_config->clock_set = true;
1279 }
1280
1281 static bool intel_has_hdmi_sink(struct intel_sdvo *sdvo,
1282                                 const struct drm_connector_state *conn_state)
1283 {
1284         return sdvo->has_hdmi_monitor &&
1285                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1286 }
1287
1288 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1289                                            const struct intel_crtc_state *crtc_state,
1290                                            const struct drm_connector_state *conn_state)
1291 {
1292         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1293
1294         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1295                 return false;
1296
1297         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1298 }
1299
1300 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1301                                      struct intel_crtc_state *pipe_config,
1302                                      struct drm_connector_state *conn_state)
1303 {
1304         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1305         struct intel_sdvo_connector_state *intel_sdvo_state =
1306                 to_intel_sdvo_connector_state(conn_state);
1307         struct intel_sdvo_connector *intel_sdvo_connector =
1308                 to_intel_sdvo_connector(conn_state->connector);
1309         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1310         struct drm_display_mode *mode = &pipe_config->hw.mode;
1311
1312         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1313         pipe_config->pipe_bpp = 8*3;
1314         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1315
1316         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1317                 pipe_config->has_pch_encoder = true;
1318
1319         /*
1320          * We need to construct preferred input timings based on our
1321          * output timings.  To do that, we have to set the output
1322          * timings, even though this isn't really the right place in
1323          * the sequence to do it. Oh well.
1324          */
1325         if (IS_TV(intel_sdvo_connector)) {
1326                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1327                         return -EINVAL;
1328
1329                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1330                                                            intel_sdvo_connector,
1331                                                            mode,
1332                                                            adjusted_mode);
1333                 pipe_config->sdvo_tv_clock = true;
1334         } else if (IS_LVDS(intel_sdvo_connector)) {
1335                 const struct drm_display_mode *fixed_mode =
1336                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1337                 int ret;
1338
1339                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1340                                                  adjusted_mode);
1341                 if (ret)
1342                         return ret;
1343
1344                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, fixed_mode))
1345                         return -EINVAL;
1346
1347                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1348                                                            intel_sdvo_connector,
1349                                                            mode,
1350                                                            adjusted_mode);
1351         }
1352
1353         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1354                 return -EINVAL;
1355
1356         /*
1357          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1358          * SDVO device will factor out the multiplier during mode_set.
1359          */
1360         pipe_config->pixel_multiplier =
1361                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1362
1363         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, conn_state);
1364
1365         if (pipe_config->has_hdmi_sink) {
1366                 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO)
1367                         pipe_config->has_audio = intel_sdvo->has_hdmi_audio;
1368                 else
1369                         pipe_config->has_audio =
1370                                 intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON;
1371         }
1372
1373         pipe_config->limited_color_range =
1374                 intel_sdvo_limited_color_range(encoder, pipe_config,
1375                                                conn_state);
1376
1377         /* Clock computation needs to happen after pixel multiplier. */
1378         if (IS_TV(intel_sdvo_connector))
1379                 i9xx_adjust_sdvo_tv_clock(pipe_config);
1380
1381         if (conn_state->picture_aspect_ratio)
1382                 adjusted_mode->picture_aspect_ratio =
1383                         conn_state->picture_aspect_ratio;
1384
1385         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1386                                               pipe_config, conn_state)) {
1387                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1388                 return -EINVAL;
1389         }
1390
1391         return 0;
1392 }
1393
1394 #define UPDATE_PROPERTY(input, NAME) \
1395         do { \
1396                 val = input; \
1397                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1398         } while (0)
1399
1400 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1401                                     const struct intel_sdvo_connector_state *sdvo_state)
1402 {
1403         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1404         struct intel_sdvo_connector *intel_sdvo_conn =
1405                 to_intel_sdvo_connector(conn_state->connector);
1406         u16 val;
1407
1408         if (intel_sdvo_conn->left)
1409                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1410
1411         if (intel_sdvo_conn->top)
1412                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1413
1414         if (intel_sdvo_conn->hpos)
1415                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1416
1417         if (intel_sdvo_conn->vpos)
1418                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1419
1420         if (intel_sdvo_conn->saturation)
1421                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1422
1423         if (intel_sdvo_conn->contrast)
1424                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1425
1426         if (intel_sdvo_conn->hue)
1427                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1428
1429         if (intel_sdvo_conn->brightness)
1430                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1431
1432         if (intel_sdvo_conn->sharpness)
1433                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1434
1435         if (intel_sdvo_conn->flicker_filter)
1436                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1437
1438         if (intel_sdvo_conn->flicker_filter_2d)
1439                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1440
1441         if (intel_sdvo_conn->flicker_filter_adaptive)
1442                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1443
1444         if (intel_sdvo_conn->tv_chroma_filter)
1445                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1446
1447         if (intel_sdvo_conn->tv_luma_filter)
1448                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1449
1450         if (intel_sdvo_conn->dot_crawl)
1451                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1452
1453 #undef UPDATE_PROPERTY
1454 }
1455
1456 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1457                                   struct intel_encoder *intel_encoder,
1458                                   const struct intel_crtc_state *crtc_state,
1459                                   const struct drm_connector_state *conn_state)
1460 {
1461         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1462         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1463         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1464         const struct intel_sdvo_connector_state *sdvo_state =
1465                 to_intel_sdvo_connector_state(conn_state);
1466         struct intel_sdvo_connector *intel_sdvo_connector =
1467                 to_intel_sdvo_connector(conn_state->connector);
1468         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1469         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1470         u32 sdvox;
1471         struct intel_sdvo_in_out_map in_out;
1472         struct intel_sdvo_dtd input_dtd, output_dtd;
1473         int rate;
1474
1475         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1476
1477         /*
1478          * First, set the input mapping for the first input to our controlled
1479          * output. This is only correct if we're a single-input device, in
1480          * which case the first input is the output from the appropriate SDVO
1481          * channel on the motherboard.  In a two-input device, the first input
1482          * will be SDVOB and the second SDVOC.
1483          */
1484         in_out.in0 = intel_sdvo->attached_output;
1485         in_out.in1 = 0;
1486
1487         intel_sdvo_set_value(intel_sdvo,
1488                              SDVO_CMD_SET_IN_OUT_MAP,
1489                              &in_out, sizeof(in_out));
1490
1491         /* Set the output timings to the screen */
1492         if (!intel_sdvo_set_target_output(intel_sdvo,
1493                                           intel_sdvo->attached_output))
1494                 return;
1495
1496         /* lvds has a special fixed output timing. */
1497         if (IS_LVDS(intel_sdvo_connector)) {
1498                 const struct drm_display_mode *fixed_mode =
1499                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1500
1501                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1502         } else {
1503                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1504         }
1505         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1506                 drm_info(&dev_priv->drm,
1507                          "Setting output timings on %s failed\n",
1508                          SDVO_NAME(intel_sdvo));
1509
1510         /* Set the input timing to the screen. Assume always input 0. */
1511         if (!intel_sdvo_set_target_input(intel_sdvo))
1512                 return;
1513
1514         if (crtc_state->has_hdmi_sink) {
1515                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1516                 intel_sdvo_set_colorimetry(intel_sdvo,
1517                                            crtc_state->limited_color_range ?
1518                                            SDVO_COLORIMETRY_RGB220 :
1519                                            SDVO_COLORIMETRY_RGB256);
1520                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1521                 intel_sdvo_set_pixel_replication(intel_sdvo,
1522                                                  !!(adjusted_mode->flags &
1523                                                     DRM_MODE_FLAG_DBLCLK));
1524         } else
1525                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1526
1527         if (IS_TV(intel_sdvo_connector) &&
1528             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1529                 return;
1530
1531         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1532
1533         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1534                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1535         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1536                 drm_info(&dev_priv->drm,
1537                          "Setting input timings on %s failed\n",
1538                          SDVO_NAME(intel_sdvo));
1539
1540         switch (crtc_state->pixel_multiplier) {
1541         default:
1542                 drm_WARN(&dev_priv->drm, 1,
1543                          "unknown pixel multiplier specified\n");
1544                 fallthrough;
1545         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1546         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1547         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1548         }
1549         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1550                 return;
1551
1552         /* Set the SDVO control regs. */
1553         if (DISPLAY_VER(dev_priv) >= 4) {
1554                 /* The real mode polarity is set by the SDVO commands, using
1555                  * struct intel_sdvo_dtd. */
1556                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1557                 if (DISPLAY_VER(dev_priv) < 5)
1558                         sdvox |= SDVO_BORDER_ENABLE;
1559         } else {
1560                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1561                 if (intel_sdvo->port == PORT_B)
1562                         sdvox &= SDVOB_PRESERVE_MASK;
1563                 else
1564                         sdvox &= SDVOC_PRESERVE_MASK;
1565                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1566         }
1567
1568         if (HAS_PCH_CPT(dev_priv))
1569                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1570         else
1571                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1572
1573         if (DISPLAY_VER(dev_priv) >= 4) {
1574                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1575         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1576                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1577                 /* done in crtc_mode_set as it lives inside the dpll register */
1578         } else {
1579                 sdvox |= (crtc_state->pixel_multiplier - 1)
1580                         << SDVO_PORT_MULTIPLY_SHIFT;
1581         }
1582
1583         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1584             DISPLAY_VER(dev_priv) < 5)
1585                 sdvox |= SDVO_STALL_SELECT;
1586         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1587 }
1588
1589 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1590 {
1591         struct intel_sdvo_connector *intel_sdvo_connector =
1592                 to_intel_sdvo_connector(&connector->base);
1593         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1594         u16 active_outputs = 0;
1595
1596         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1597
1598         return active_outputs & intel_sdvo_connector->output_flag;
1599 }
1600
1601 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1602                              i915_reg_t sdvo_reg, enum pipe *pipe)
1603 {
1604         u32 val;
1605
1606         val = intel_de_read(dev_priv, sdvo_reg);
1607
1608         /* asserts want to know the pipe even if the port is disabled */
1609         if (HAS_PCH_CPT(dev_priv))
1610                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1611         else if (IS_CHERRYVIEW(dev_priv))
1612                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1613         else
1614                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1615
1616         return val & SDVO_ENABLE;
1617 }
1618
1619 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1620                                     enum pipe *pipe)
1621 {
1622         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1623         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1624         u16 active_outputs = 0;
1625         bool ret;
1626
1627         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1628
1629         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1630
1631         return ret || active_outputs;
1632 }
1633
1634 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1635                                   struct intel_crtc_state *pipe_config)
1636 {
1637         struct drm_device *dev = encoder->base.dev;
1638         struct drm_i915_private *dev_priv = to_i915(dev);
1639         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1640         struct intel_sdvo_dtd dtd;
1641         int encoder_pixel_multiplier = 0;
1642         int dotclock;
1643         u32 flags = 0, sdvox;
1644         u8 val;
1645         bool ret;
1646
1647         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1648
1649         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1650
1651         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1652         if (!ret) {
1653                 /*
1654                  * Some sdvo encoders are not spec compliant and don't
1655                  * implement the mandatory get_timings function.
1656                  */
1657                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1658                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1659         } else {
1660                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1661                         flags |= DRM_MODE_FLAG_PHSYNC;
1662                 else
1663                         flags |= DRM_MODE_FLAG_NHSYNC;
1664
1665                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1666                         flags |= DRM_MODE_FLAG_PVSYNC;
1667                 else
1668                         flags |= DRM_MODE_FLAG_NVSYNC;
1669         }
1670
1671         pipe_config->hw.adjusted_mode.flags |= flags;
1672
1673         /*
1674          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1675          * the sdvo port register, on all other platforms it is part of the dpll
1676          * state. Since the general pipe state readout happens before the
1677          * encoder->get_config we so already have a valid pixel multplier on all
1678          * other platfroms.
1679          */
1680         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1681                 pipe_config->pixel_multiplier =
1682                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1683                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1684         }
1685
1686         dotclock = pipe_config->port_clock;
1687
1688         if (pipe_config->pixel_multiplier)
1689                 dotclock /= pipe_config->pixel_multiplier;
1690
1691         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1692
1693         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1694         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1695                                  &val, 1)) {
1696                 switch (val) {
1697                 case SDVO_CLOCK_RATE_MULT_1X:
1698                         encoder_pixel_multiplier = 1;
1699                         break;
1700                 case SDVO_CLOCK_RATE_MULT_2X:
1701                         encoder_pixel_multiplier = 2;
1702                         break;
1703                 case SDVO_CLOCK_RATE_MULT_4X:
1704                         encoder_pixel_multiplier = 4;
1705                         break;
1706                 }
1707         }
1708
1709         drm_WARN(dev,
1710                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1711                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1712                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1713
1714         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1715                                  &val, 1)) {
1716                 if (val == SDVO_COLORIMETRY_RGB220)
1717                         pipe_config->limited_color_range = true;
1718         }
1719
1720         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1721                                  &val, 1)) {
1722                 u8 mask = SDVO_AUDIO_ELD_VALID | SDVO_AUDIO_PRESENCE_DETECT;
1723
1724                 if ((val & mask) == mask)
1725                         pipe_config->has_audio = true;
1726         }
1727
1728         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1729                                  &val, 1)) {
1730                 if (val == SDVO_ENCODE_HDMI)
1731                         pipe_config->has_hdmi_sink = true;
1732         }
1733
1734         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1735 }
1736
1737 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1738 {
1739         intel_sdvo_set_audio_state(intel_sdvo, 0);
1740 }
1741
1742 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1743                                     const struct intel_crtc_state *crtc_state,
1744                                     const struct drm_connector_state *conn_state)
1745 {
1746         const struct drm_display_mode *adjusted_mode =
1747                 &crtc_state->hw.adjusted_mode;
1748         struct drm_connector *connector = conn_state->connector;
1749         u8 *eld = connector->eld;
1750
1751         eld[6] = drm_av_sync_delay(connector, adjusted_mode) / 2;
1752
1753         intel_sdvo_set_audio_state(intel_sdvo, 0);
1754
1755         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1756                                    SDVO_HBUF_TX_DISABLED,
1757                                    eld, drm_eld_size(eld));
1758
1759         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1760                                    SDVO_AUDIO_PRESENCE_DETECT);
1761 }
1762
1763 static void intel_disable_sdvo(struct intel_atomic_state *state,
1764                                struct intel_encoder *encoder,
1765                                const struct intel_crtc_state *old_crtc_state,
1766                                const struct drm_connector_state *conn_state)
1767 {
1768         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1769         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1770         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1771         u32 temp;
1772
1773         if (old_crtc_state->has_audio)
1774                 intel_sdvo_disable_audio(intel_sdvo);
1775
1776         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1777         if (0)
1778                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1779                                                    DRM_MODE_DPMS_OFF);
1780
1781         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1782
1783         temp &= ~SDVO_ENABLE;
1784         intel_sdvo_write_sdvox(intel_sdvo, temp);
1785
1786         /*
1787          * HW workaround for IBX, we need to move the port
1788          * to transcoder A after disabling it to allow the
1789          * matching DP port to be enabled on transcoder A.
1790          */
1791         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1792                 /*
1793                  * We get CPU/PCH FIFO underruns on the other pipe when
1794                  * doing the workaround. Sweep them under the rug.
1795                  */
1796                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1797                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1798
1799                 temp &= ~SDVO_PIPE_SEL_MASK;
1800                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1801                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1802
1803                 temp &= ~SDVO_ENABLE;
1804                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1805
1806                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1807                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1808                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1809         }
1810 }
1811
1812 static void pch_disable_sdvo(struct intel_atomic_state *state,
1813                              struct intel_encoder *encoder,
1814                              const struct intel_crtc_state *old_crtc_state,
1815                              const struct drm_connector_state *old_conn_state)
1816 {
1817 }
1818
1819 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1820                                   struct intel_encoder *encoder,
1821                                   const struct intel_crtc_state *old_crtc_state,
1822                                   const struct drm_connector_state *old_conn_state)
1823 {
1824         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1825 }
1826
1827 static void intel_enable_sdvo(struct intel_atomic_state *state,
1828                               struct intel_encoder *encoder,
1829                               const struct intel_crtc_state *pipe_config,
1830                               const struct drm_connector_state *conn_state)
1831 {
1832         struct drm_device *dev = encoder->base.dev;
1833         struct drm_i915_private *dev_priv = to_i915(dev);
1834         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1835         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1836         u32 temp;
1837         bool input1, input2;
1838         int i;
1839         bool success;
1840
1841         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1842         temp |= SDVO_ENABLE;
1843         intel_sdvo_write_sdvox(intel_sdvo, temp);
1844
1845         for (i = 0; i < 2; i++)
1846                 intel_crtc_wait_for_next_vblank(crtc);
1847
1848         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1849         /*
1850          * Warn if the device reported failure to sync.
1851          *
1852          * A lot of SDVO devices fail to notify of sync, but it's
1853          * a given it the status is a success, we succeeded.
1854          */
1855         if (success && !input1) {
1856                 drm_dbg_kms(&dev_priv->drm,
1857                             "First %s output reported failure to "
1858                             "sync\n", SDVO_NAME(intel_sdvo));
1859         }
1860
1861         if (0)
1862                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1863                                                    DRM_MODE_DPMS_ON);
1864         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1865
1866         if (pipe_config->has_audio)
1867                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1868 }
1869
1870 static enum drm_mode_status
1871 intel_sdvo_mode_valid(struct drm_connector *connector,
1872                       struct drm_display_mode *mode)
1873 {
1874         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1875         struct intel_sdvo_connector *intel_sdvo_connector =
1876                 to_intel_sdvo_connector(connector);
1877         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1878         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo, connector->state);
1879         int clock = mode->clock;
1880
1881         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1882                 return MODE_NO_DBLESCAN;
1883
1884         if (clock > max_dotclk)
1885                 return MODE_CLOCK_HIGH;
1886
1887         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1888                 if (!has_hdmi_sink)
1889                         return MODE_CLOCK_LOW;
1890                 clock *= 2;
1891         }
1892
1893         if (intel_sdvo->pixel_clock_min > clock)
1894                 return MODE_CLOCK_LOW;
1895
1896         if (intel_sdvo->pixel_clock_max < clock)
1897                 return MODE_CLOCK_HIGH;
1898
1899         if (IS_LVDS(intel_sdvo_connector)) {
1900                 enum drm_mode_status status;
1901
1902                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1903                 if (status != MODE_OK)
1904                         return status;
1905         }
1906
1907         return MODE_OK;
1908 }
1909
1910 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1911 {
1912         BUILD_BUG_ON(sizeof(*caps) != 8);
1913         if (!intel_sdvo_get_value(intel_sdvo,
1914                                   SDVO_CMD_GET_DEVICE_CAPS,
1915                                   caps, sizeof(*caps)))
1916                 return false;
1917
1918         DRM_DEBUG_KMS("SDVO capabilities:\n"
1919                       "  vendor_id: %d\n"
1920                       "  device_id: %d\n"
1921                       "  device_rev_id: %d\n"
1922                       "  sdvo_version_major: %d\n"
1923                       "  sdvo_version_minor: %d\n"
1924                       "  sdvo_inputs_mask: %d\n"
1925                       "  smooth_scaling: %d\n"
1926                       "  sharp_scaling: %d\n"
1927                       "  up_scaling: %d\n"
1928                       "  down_scaling: %d\n"
1929                       "  stall_support: %d\n"
1930                       "  output_flags: %d\n",
1931                       caps->vendor_id,
1932                       caps->device_id,
1933                       caps->device_rev_id,
1934                       caps->sdvo_version_major,
1935                       caps->sdvo_version_minor,
1936                       caps->sdvo_inputs_mask,
1937                       caps->smooth_scaling,
1938                       caps->sharp_scaling,
1939                       caps->up_scaling,
1940                       caps->down_scaling,
1941                       caps->stall_support,
1942                       caps->output_flags);
1943
1944         return true;
1945 }
1946
1947 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
1948 {
1949         u8 cap;
1950
1951         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
1952                                   &cap, sizeof(cap)))
1953                 return SDVO_COLORIMETRY_RGB256;
1954
1955         return cap;
1956 }
1957
1958 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1959 {
1960         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1961         u16 hotplug;
1962
1963         if (!I915_HAS_HOTPLUG(dev_priv))
1964                 return 0;
1965
1966         /*
1967          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1968          * on the line.
1969          */
1970         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1971                 return 0;
1972
1973         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1974                                         &hotplug, sizeof(hotplug)))
1975                 return 0;
1976
1977         return hotplug;
1978 }
1979
1980 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1981 {
1982         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1983
1984         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1985                              &intel_sdvo->hotplug_active, 2);
1986 }
1987
1988 static enum intel_hotplug_state
1989 intel_sdvo_hotplug(struct intel_encoder *encoder,
1990                    struct intel_connector *connector)
1991 {
1992         intel_sdvo_enable_hotplug(encoder);
1993
1994         return intel_encoder_hotplug(encoder, connector);
1995 }
1996
1997 static bool
1998 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1999 {
2000         /* Is there more than one type of output? */
2001         return hweight16(intel_sdvo->caps.output_flags) > 1;
2002 }
2003
2004 static struct edid *
2005 intel_sdvo_get_edid(struct drm_connector *connector)
2006 {
2007         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2008         return drm_get_edid(connector, &sdvo->ddc);
2009 }
2010
2011 /* Mac mini hack -- use the same DDC as the analog connector */
2012 static struct edid *
2013 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2014 {
2015         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2016
2017         return drm_get_edid(connector,
2018                             intel_gmbus_get_adapter(dev_priv,
2019                                                     dev_priv->vbt.crt_ddc_pin));
2020 }
2021
2022 static enum drm_connector_status
2023 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2024 {
2025         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2026         struct intel_sdvo_connector *intel_sdvo_connector =
2027                 to_intel_sdvo_connector(connector);
2028         enum drm_connector_status status;
2029         struct edid *edid;
2030
2031         edid = intel_sdvo_get_edid(connector);
2032
2033         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
2034                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
2035
2036                 /*
2037                  * Don't use the 1 as the argument of DDC bus switch to get
2038                  * the EDID. It is used for SDVO SPD ROM.
2039                  */
2040                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
2041                         intel_sdvo->ddc_bus = ddc;
2042                         edid = intel_sdvo_get_edid(connector);
2043                         if (edid)
2044                                 break;
2045                 }
2046                 /*
2047                  * If we found the EDID on the other bus,
2048                  * assume that is the correct DDC bus.
2049                  */
2050                 if (edid == NULL)
2051                         intel_sdvo->ddc_bus = saved_ddc;
2052         }
2053
2054         /*
2055          * When there is no edid and no monitor is connected with VGA
2056          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2057          */
2058         if (edid == NULL)
2059                 edid = intel_sdvo_get_analog_edid(connector);
2060
2061         status = connector_status_unknown;
2062         if (edid != NULL) {
2063                 /* DDC bus is shared, match EDID to connector type */
2064                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
2065                         status = connector_status_connected;
2066                         if (intel_sdvo_connector->is_hdmi) {
2067                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
2068                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
2069                         }
2070                 } else
2071                         status = connector_status_disconnected;
2072                 kfree(edid);
2073         }
2074
2075         return status;
2076 }
2077
2078 static bool
2079 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2080                                   struct edid *edid)
2081 {
2082         bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
2083         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2084
2085         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2086                       connector_is_digital, monitor_is_digital);
2087         return connector_is_digital == monitor_is_digital;
2088 }
2089
2090 static enum drm_connector_status
2091 intel_sdvo_detect(struct drm_connector *connector, bool force)
2092 {
2093         struct drm_i915_private *i915 = to_i915(connector->dev);
2094         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2095         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2096         enum drm_connector_status ret;
2097         u16 response;
2098
2099         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2100                       connector->base.id, connector->name);
2101
2102         if (!INTEL_DISPLAY_ENABLED(i915))
2103                 return connector_status_disconnected;
2104
2105         if (!intel_sdvo_get_value(intel_sdvo,
2106                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2107                                   &response, 2))
2108                 return connector_status_unknown;
2109
2110         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2111                       response & 0xff, response >> 8,
2112                       intel_sdvo_connector->output_flag);
2113
2114         if (response == 0)
2115                 return connector_status_disconnected;
2116
2117         intel_sdvo->attached_output = response;
2118
2119         intel_sdvo->has_hdmi_monitor = false;
2120         intel_sdvo->has_hdmi_audio = false;
2121
2122         if ((intel_sdvo_connector->output_flag & response) == 0)
2123                 ret = connector_status_disconnected;
2124         else if (IS_TMDS(intel_sdvo_connector))
2125                 ret = intel_sdvo_tmds_sink_detect(connector);
2126         else {
2127                 struct edid *edid;
2128
2129                 /* if we have an edid check it matches the connection */
2130                 edid = intel_sdvo_get_edid(connector);
2131                 if (edid == NULL)
2132                         edid = intel_sdvo_get_analog_edid(connector);
2133                 if (edid != NULL) {
2134                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2135                                                               edid))
2136                                 ret = connector_status_connected;
2137                         else
2138                                 ret = connector_status_disconnected;
2139
2140                         kfree(edid);
2141                 } else
2142                         ret = connector_status_connected;
2143         }
2144
2145         return ret;
2146 }
2147
2148 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2149 {
2150         int num_modes = 0;
2151         struct edid *edid;
2152
2153         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2154                       connector->base.id, connector->name);
2155
2156         /* set the bus switch and get the modes */
2157         edid = intel_sdvo_get_edid(connector);
2158
2159         /*
2160          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2161          * link between analog and digital outputs. So, if the regular SDVO
2162          * DDC fails, check to see if the analog output is disconnected, in
2163          * which case we'll look there for the digital DDC data.
2164          */
2165         if (!edid)
2166                 edid = intel_sdvo_get_analog_edid(connector);
2167
2168         if (!edid)
2169                 return 0;
2170
2171         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2172                                               edid))
2173                 num_modes += intel_connector_update_modes(connector, edid);
2174
2175         kfree(edid);
2176
2177         return num_modes;
2178 }
2179
2180 /*
2181  * Set of SDVO TV modes.
2182  * Note!  This is in reply order (see loop in get_tv_modes).
2183  * XXX: all 60Hz refresh?
2184  */
2185 static const struct drm_display_mode sdvo_tv_modes[] = {
2186         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2187                    416, 0, 200, 201, 232, 233, 0,
2188                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2189         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2190                    416, 0, 240, 241, 272, 273, 0,
2191                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2192         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2193                    496, 0, 300, 301, 332, 333, 0,
2194                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2195         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2196                    736, 0, 350, 351, 382, 383, 0,
2197                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2198         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2199                    736, 0, 400, 401, 432, 433, 0,
2200                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2201         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2202                    736, 0, 480, 481, 512, 513, 0,
2203                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2204         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2205                    800, 0, 480, 481, 512, 513, 0,
2206                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2207         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2208                    800, 0, 576, 577, 608, 609, 0,
2209                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2210         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2211                    816, 0, 350, 351, 382, 383, 0,
2212                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2213         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2214                    816, 0, 400, 401, 432, 433, 0,
2215                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2216         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2217                    816, 0, 480, 481, 512, 513, 0,
2218                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2219         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2220                    816, 0, 540, 541, 572, 573, 0,
2221                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2222         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2223                    816, 0, 576, 577, 608, 609, 0,
2224                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2225         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2226                    864, 0, 576, 577, 608, 609, 0,
2227                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2228         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2229                    896, 0, 600, 601, 632, 633, 0,
2230                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2231         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2232                    928, 0, 624, 625, 656, 657, 0,
2233                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2234         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2235                    1016, 0, 766, 767, 798, 799, 0,
2236                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2237         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2238                    1120, 0, 768, 769, 800, 801, 0,
2239                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2240         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2241                    1376, 0, 1024, 1025, 1056, 1057, 0,
2242                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2243 };
2244
2245 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2246 {
2247         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2248         const struct drm_connector_state *conn_state = connector->state;
2249         struct intel_sdvo_sdtv_resolution_request tv_res;
2250         u32 reply = 0, format_map = 0;
2251         int num_modes = 0;
2252         int i;
2253
2254         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2255                       connector->base.id, connector->name);
2256
2257         /*
2258          * Read the list of supported input resolutions for the selected TV
2259          * format.
2260          */
2261         format_map = 1 << conn_state->tv.mode;
2262         memcpy(&tv_res, &format_map,
2263                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2264
2265         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
2266                 return 0;
2267
2268         BUILD_BUG_ON(sizeof(tv_res) != 3);
2269         if (!intel_sdvo_write_cmd(intel_sdvo,
2270                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2271                                   &tv_res, sizeof(tv_res)))
2272                 return 0;
2273         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2274                 return 0;
2275
2276         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2277                 if (reply & (1 << i)) {
2278                         struct drm_display_mode *nmode;
2279                         nmode = drm_mode_duplicate(connector->dev,
2280                                                    &sdvo_tv_modes[i]);
2281                         if (nmode) {
2282                                 drm_mode_probed_add(connector, nmode);
2283                                 num_modes++;
2284                         }
2285                 }
2286         }
2287
2288         return num_modes;
2289 }
2290
2291 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2292 {
2293         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2294         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2295         int num_modes = 0;
2296
2297         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2298                     connector->base.id, connector->name);
2299
2300         num_modes += intel_panel_get_modes(to_intel_connector(connector));
2301         num_modes += intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2302
2303         return num_modes;
2304 }
2305
2306 static int intel_sdvo_get_modes(struct drm_connector *connector)
2307 {
2308         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2309
2310         if (IS_TV(intel_sdvo_connector))
2311                 return intel_sdvo_get_tv_modes(connector);
2312         else if (IS_LVDS(intel_sdvo_connector))
2313                 return intel_sdvo_get_lvds_modes(connector);
2314         else
2315                 return intel_sdvo_get_ddc_modes(connector);
2316 }
2317
2318 static int
2319 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2320                                          const struct drm_connector_state *state,
2321                                          struct drm_property *property,
2322                                          u64 *val)
2323 {
2324         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2325         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2326
2327         if (property == intel_sdvo_connector->tv_format) {
2328                 int i;
2329
2330                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2331                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2332                                 *val = i;
2333
2334                                 return 0;
2335                         }
2336
2337                 drm_WARN_ON(connector->dev, 1);
2338                 *val = 0;
2339         } else if (property == intel_sdvo_connector->top ||
2340                    property == intel_sdvo_connector->bottom)
2341                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2342         else if (property == intel_sdvo_connector->left ||
2343                  property == intel_sdvo_connector->right)
2344                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2345         else if (property == intel_sdvo_connector->hpos)
2346                 *val = sdvo_state->tv.hpos;
2347         else if (property == intel_sdvo_connector->vpos)
2348                 *val = sdvo_state->tv.vpos;
2349         else if (property == intel_sdvo_connector->saturation)
2350                 *val = state->tv.saturation;
2351         else if (property == intel_sdvo_connector->contrast)
2352                 *val = state->tv.contrast;
2353         else if (property == intel_sdvo_connector->hue)
2354                 *val = state->tv.hue;
2355         else if (property == intel_sdvo_connector->brightness)
2356                 *val = state->tv.brightness;
2357         else if (property == intel_sdvo_connector->sharpness)
2358                 *val = sdvo_state->tv.sharpness;
2359         else if (property == intel_sdvo_connector->flicker_filter)
2360                 *val = sdvo_state->tv.flicker_filter;
2361         else if (property == intel_sdvo_connector->flicker_filter_2d)
2362                 *val = sdvo_state->tv.flicker_filter_2d;
2363         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2364                 *val = sdvo_state->tv.flicker_filter_adaptive;
2365         else if (property == intel_sdvo_connector->tv_chroma_filter)
2366                 *val = sdvo_state->tv.chroma_filter;
2367         else if (property == intel_sdvo_connector->tv_luma_filter)
2368                 *val = sdvo_state->tv.luma_filter;
2369         else if (property == intel_sdvo_connector->dot_crawl)
2370                 *val = sdvo_state->tv.dot_crawl;
2371         else
2372                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2373
2374         return 0;
2375 }
2376
2377 static int
2378 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2379                                          struct drm_connector_state *state,
2380                                          struct drm_property *property,
2381                                          u64 val)
2382 {
2383         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2384         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2385
2386         if (property == intel_sdvo_connector->tv_format) {
2387                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2388
2389                 if (state->crtc) {
2390                         struct drm_crtc_state *crtc_state =
2391                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2392
2393                         crtc_state->connectors_changed = true;
2394                 }
2395         } else if (property == intel_sdvo_connector->top ||
2396                    property == intel_sdvo_connector->bottom)
2397                 /* Cannot set these independent from each other */
2398                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2399         else if (property == intel_sdvo_connector->left ||
2400                  property == intel_sdvo_connector->right)
2401                 /* Cannot set these independent from each other */
2402                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2403         else if (property == intel_sdvo_connector->hpos)
2404                 sdvo_state->tv.hpos = val;
2405         else if (property == intel_sdvo_connector->vpos)
2406                 sdvo_state->tv.vpos = val;
2407         else if (property == intel_sdvo_connector->saturation)
2408                 state->tv.saturation = val;
2409         else if (property == intel_sdvo_connector->contrast)
2410                 state->tv.contrast = val;
2411         else if (property == intel_sdvo_connector->hue)
2412                 state->tv.hue = val;
2413         else if (property == intel_sdvo_connector->brightness)
2414                 state->tv.brightness = val;
2415         else if (property == intel_sdvo_connector->sharpness)
2416                 sdvo_state->tv.sharpness = val;
2417         else if (property == intel_sdvo_connector->flicker_filter)
2418                 sdvo_state->tv.flicker_filter = val;
2419         else if (property == intel_sdvo_connector->flicker_filter_2d)
2420                 sdvo_state->tv.flicker_filter_2d = val;
2421         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2422                 sdvo_state->tv.flicker_filter_adaptive = val;
2423         else if (property == intel_sdvo_connector->tv_chroma_filter)
2424                 sdvo_state->tv.chroma_filter = val;
2425         else if (property == intel_sdvo_connector->tv_luma_filter)
2426                 sdvo_state->tv.luma_filter = val;
2427         else if (property == intel_sdvo_connector->dot_crawl)
2428                 sdvo_state->tv.dot_crawl = val;
2429         else
2430                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2431
2432         return 0;
2433 }
2434
2435 static int
2436 intel_sdvo_connector_register(struct drm_connector *connector)
2437 {
2438         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2439         int ret;
2440
2441         ret = intel_connector_register(connector);
2442         if (ret)
2443                 return ret;
2444
2445         return sysfs_create_link(&connector->kdev->kobj,
2446                                  &sdvo->ddc.dev.kobj,
2447                                  sdvo->ddc.dev.kobj.name);
2448 }
2449
2450 static void
2451 intel_sdvo_connector_unregister(struct drm_connector *connector)
2452 {
2453         struct intel_sdvo *sdvo = intel_attached_sdvo(to_intel_connector(connector));
2454
2455         sysfs_remove_link(&connector->kdev->kobj,
2456                           sdvo->ddc.dev.kobj.name);
2457         intel_connector_unregister(connector);
2458 }
2459
2460 static struct drm_connector_state *
2461 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2462 {
2463         struct intel_sdvo_connector_state *state;
2464
2465         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2466         if (!state)
2467                 return NULL;
2468
2469         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2470         return &state->base.base;
2471 }
2472
2473 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2474         .detect = intel_sdvo_detect,
2475         .fill_modes = drm_helper_probe_single_connector_modes,
2476         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2477         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2478         .late_register = intel_sdvo_connector_register,
2479         .early_unregister = intel_sdvo_connector_unregister,
2480         .destroy = intel_connector_destroy,
2481         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2482         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2483 };
2484
2485 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2486                                    struct drm_atomic_state *state)
2487 {
2488         struct drm_connector_state *new_conn_state =
2489                 drm_atomic_get_new_connector_state(state, conn);
2490         struct drm_connector_state *old_conn_state =
2491                 drm_atomic_get_old_connector_state(state, conn);
2492         struct intel_sdvo_connector_state *old_state =
2493                 to_intel_sdvo_connector_state(old_conn_state);
2494         struct intel_sdvo_connector_state *new_state =
2495                 to_intel_sdvo_connector_state(new_conn_state);
2496
2497         if (new_conn_state->crtc &&
2498             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2499              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2500                 struct drm_crtc_state *crtc_state =
2501                         drm_atomic_get_new_crtc_state(state,
2502                                                       new_conn_state->crtc);
2503
2504                 crtc_state->connectors_changed = true;
2505         }
2506
2507         return intel_digital_connector_atomic_check(conn, state);
2508 }
2509
2510 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2511         .get_modes = intel_sdvo_get_modes,
2512         .mode_valid = intel_sdvo_mode_valid,
2513         .atomic_check = intel_sdvo_atomic_check,
2514 };
2515
2516 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2517 {
2518         struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2519
2520         i2c_del_adapter(&intel_sdvo->ddc);
2521         intel_encoder_destroy(encoder);
2522 }
2523
2524 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2525         .destroy = intel_sdvo_enc_destroy,
2526 };
2527
2528 static void
2529 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2530 {
2531         u16 mask = 0;
2532         unsigned int num_bits;
2533
2534         /*
2535          * Make a mask of outputs less than or equal to our own priority in the
2536          * list.
2537          */
2538         switch (sdvo->controlled_output) {
2539         case SDVO_OUTPUT_LVDS1:
2540                 mask |= SDVO_OUTPUT_LVDS1;
2541                 fallthrough;
2542         case SDVO_OUTPUT_LVDS0:
2543                 mask |= SDVO_OUTPUT_LVDS0;
2544                 fallthrough;
2545         case SDVO_OUTPUT_TMDS1:
2546                 mask |= SDVO_OUTPUT_TMDS1;
2547                 fallthrough;
2548         case SDVO_OUTPUT_TMDS0:
2549                 mask |= SDVO_OUTPUT_TMDS0;
2550                 fallthrough;
2551         case SDVO_OUTPUT_RGB1:
2552                 mask |= SDVO_OUTPUT_RGB1;
2553                 fallthrough;
2554         case SDVO_OUTPUT_RGB0:
2555                 mask |= SDVO_OUTPUT_RGB0;
2556                 break;
2557         }
2558
2559         /* Count bits to find what number we are in the priority list. */
2560         mask &= sdvo->caps.output_flags;
2561         num_bits = hweight16(mask);
2562         /* If more than 3 outputs, default to DDC bus 3 for now. */
2563         if (num_bits > 3)
2564                 num_bits = 3;
2565
2566         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2567         sdvo->ddc_bus = 1 << num_bits;
2568 }
2569
2570 /*
2571  * Choose the appropriate DDC bus for control bus switch command for this
2572  * SDVO output based on the controlled output.
2573  *
2574  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2575  * outputs, then LVDS outputs.
2576  */
2577 static void
2578 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2579                           struct intel_sdvo *sdvo)
2580 {
2581         struct sdvo_device_mapping *mapping;
2582
2583         if (sdvo->port == PORT_B)
2584                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2585         else
2586                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2587
2588         if (mapping->initialized)
2589                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2590         else
2591                 intel_sdvo_guess_ddc_bus(sdvo);
2592 }
2593
2594 static void
2595 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2596                           struct intel_sdvo *sdvo)
2597 {
2598         struct sdvo_device_mapping *mapping;
2599         u8 pin;
2600
2601         if (sdvo->port == PORT_B)
2602                 mapping = &dev_priv->vbt.sdvo_mappings[0];
2603         else
2604                 mapping = &dev_priv->vbt.sdvo_mappings[1];
2605
2606         if (mapping->initialized &&
2607             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2608                 pin = mapping->i2c_pin;
2609         else
2610                 pin = GMBUS_PIN_DPB;
2611
2612         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2613
2614         /*
2615          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2616          * our code totally fails once we start using gmbus. Hence fall back to
2617          * bit banging for now.
2618          */
2619         intel_gmbus_force_bit(sdvo->i2c, true);
2620 }
2621
2622 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2623 static void
2624 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2625 {
2626         intel_gmbus_force_bit(sdvo->i2c, false);
2627 }
2628
2629 static bool
2630 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2631 {
2632         return intel_sdvo_check_supp_encode(intel_sdvo);
2633 }
2634
2635 static u8
2636 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2637                           struct intel_sdvo *sdvo)
2638 {
2639         struct sdvo_device_mapping *my_mapping, *other_mapping;
2640
2641         if (sdvo->port == PORT_B) {
2642                 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2643                 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2644         } else {
2645                 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2646                 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2647         }
2648
2649         /* If the BIOS described our SDVO device, take advantage of it. */
2650         if (my_mapping->slave_addr)
2651                 return my_mapping->slave_addr;
2652
2653         /*
2654          * If the BIOS only described a different SDVO device, use the
2655          * address that it isn't using.
2656          */
2657         if (other_mapping->slave_addr) {
2658                 if (other_mapping->slave_addr == 0x70)
2659                         return 0x72;
2660                 else
2661                         return 0x70;
2662         }
2663
2664         /*
2665          * No SDVO device info is found for another DVO port,
2666          * so use mapping assumption we had before BIOS parsing.
2667          */
2668         if (sdvo->port == PORT_B)
2669                 return 0x70;
2670         else
2671                 return 0x72;
2672 }
2673
2674 static int
2675 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2676                           struct intel_sdvo *encoder)
2677 {
2678         struct drm_connector *drm_connector;
2679         int ret;
2680
2681         drm_connector = &connector->base.base;
2682         ret = drm_connector_init(encoder->base.base.dev,
2683                            drm_connector,
2684                            &intel_sdvo_connector_funcs,
2685                            connector->base.base.connector_type);
2686         if (ret < 0)
2687                 return ret;
2688
2689         drm_connector_helper_add(drm_connector,
2690                                  &intel_sdvo_connector_helper_funcs);
2691
2692         connector->base.base.interlace_allowed = 1;
2693         connector->base.base.doublescan_allowed = 0;
2694         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2695         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2696
2697         intel_connector_attach_encoder(&connector->base, &encoder->base);
2698
2699         return 0;
2700 }
2701
2702 static void
2703 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2704                                struct intel_sdvo_connector *connector)
2705 {
2706         intel_attach_force_audio_property(&connector->base.base);
2707         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2708                 intel_attach_broadcast_rgb_property(&connector->base.base);
2709         intel_attach_aspect_ratio_property(&connector->base.base);
2710 }
2711
2712 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2713 {
2714         struct intel_sdvo_connector *sdvo_connector;
2715         struct intel_sdvo_connector_state *conn_state;
2716
2717         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2718         if (!sdvo_connector)
2719                 return NULL;
2720
2721         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2722         if (!conn_state) {
2723                 kfree(sdvo_connector);
2724                 return NULL;
2725         }
2726
2727         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2728                                             &conn_state->base.base);
2729
2730         INIT_LIST_HEAD(&sdvo_connector->base.panel.fixed_modes);
2731
2732         return sdvo_connector;
2733 }
2734
2735 static bool
2736 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2737 {
2738         struct drm_encoder *encoder = &intel_sdvo->base.base;
2739         struct drm_connector *connector;
2740         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2741         struct intel_connector *intel_connector;
2742         struct intel_sdvo_connector *intel_sdvo_connector;
2743
2744         DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2745
2746         intel_sdvo_connector = intel_sdvo_connector_alloc();
2747         if (!intel_sdvo_connector)
2748                 return false;
2749
2750         if (device == 0) {
2751                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2752                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2753         } else if (device == 1) {
2754                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2755                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2756         }
2757
2758         intel_connector = &intel_sdvo_connector->base;
2759         connector = &intel_connector->base;
2760         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2761                 intel_sdvo_connector->output_flag) {
2762                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2763                 /*
2764                  * Some SDVO devices have one-shot hotplug interrupts.
2765                  * Ensure that they get re-enabled when an interrupt happens.
2766                  */
2767                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2768                 intel_encoder->hotplug = intel_sdvo_hotplug;
2769                 intel_sdvo_enable_hotplug(intel_encoder);
2770         } else {
2771                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2772         }
2773         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2774         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2775
2776         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2777                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2778                 intel_sdvo_connector->is_hdmi = true;
2779         }
2780
2781         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2782                 kfree(intel_sdvo_connector);
2783                 return false;
2784         }
2785
2786         if (intel_sdvo_connector->is_hdmi)
2787                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2788
2789         return true;
2790 }
2791
2792 static bool
2793 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2794 {
2795         struct drm_encoder *encoder = &intel_sdvo->base.base;
2796         struct drm_connector *connector;
2797         struct intel_connector *intel_connector;
2798         struct intel_sdvo_connector *intel_sdvo_connector;
2799
2800         DRM_DEBUG_KMS("initialising TV type %d\n", type);
2801
2802         intel_sdvo_connector = intel_sdvo_connector_alloc();
2803         if (!intel_sdvo_connector)
2804                 return false;
2805
2806         intel_connector = &intel_sdvo_connector->base;
2807         connector = &intel_connector->base;
2808         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2809         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2810
2811         intel_sdvo->controlled_output |= type;
2812         intel_sdvo_connector->output_flag = type;
2813
2814         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2815                 kfree(intel_sdvo_connector);
2816                 return false;
2817         }
2818
2819         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2820                 goto err;
2821
2822         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2823                 goto err;
2824
2825         return true;
2826
2827 err:
2828         intel_connector_destroy(connector);
2829         return false;
2830 }
2831
2832 static bool
2833 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2834 {
2835         struct drm_encoder *encoder = &intel_sdvo->base.base;
2836         struct drm_connector *connector;
2837         struct intel_connector *intel_connector;
2838         struct intel_sdvo_connector *intel_sdvo_connector;
2839
2840         DRM_DEBUG_KMS("initialising analog device %d\n", device);
2841
2842         intel_sdvo_connector = intel_sdvo_connector_alloc();
2843         if (!intel_sdvo_connector)
2844                 return false;
2845
2846         intel_connector = &intel_sdvo_connector->base;
2847         connector = &intel_connector->base;
2848         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2849         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2850         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2851
2852         if (device == 0) {
2853                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2854                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2855         } else if (device == 1) {
2856                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2857                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2858         }
2859
2860         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2861                 kfree(intel_sdvo_connector);
2862                 return false;
2863         }
2864
2865         return true;
2866 }
2867
2868 static bool
2869 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2870 {
2871         struct drm_encoder *encoder = &intel_sdvo->base.base;
2872         struct drm_i915_private *i915 = to_i915(encoder->dev);
2873         struct drm_connector *connector;
2874         struct intel_connector *intel_connector;
2875         struct intel_sdvo_connector *intel_sdvo_connector;
2876
2877         DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2878
2879         intel_sdvo_connector = intel_sdvo_connector_alloc();
2880         if (!intel_sdvo_connector)
2881                 return false;
2882
2883         intel_connector = &intel_sdvo_connector->base;
2884         connector = &intel_connector->base;
2885         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2886         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2887
2888         if (device == 0) {
2889                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2890                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2891         } else if (device == 1) {
2892                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2893                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2894         }
2895
2896         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2897                 kfree(intel_sdvo_connector);
2898                 return false;
2899         }
2900
2901         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2902                 goto err;
2903
2904         intel_bios_init_panel(i915, &intel_connector->panel, NULL, NULL);
2905
2906         /*
2907          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2908          * SDVO->LVDS transcoders can't cope with the EDID mode.
2909          */
2910         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2911
2912         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2913                 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2914                 intel_panel_add_edid_fixed_modes(intel_connector, false, false);
2915         }
2916
2917         intel_panel_init(intel_connector);
2918
2919         if (!intel_panel_preferred_fixed_mode(intel_connector))
2920                 goto err;
2921
2922         return true;
2923
2924 err:
2925         intel_connector_destroy(connector);
2926         return false;
2927 }
2928
2929 static bool
2930 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, u16 flags)
2931 {
2932         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2933
2934         if (flags & SDVO_OUTPUT_TMDS0)
2935                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2936                         return false;
2937
2938         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2939                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2940                         return false;
2941
2942         /* TV has no XXX1 function block */
2943         if (flags & SDVO_OUTPUT_SVID0)
2944                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2945                         return false;
2946
2947         if (flags & SDVO_OUTPUT_CVBS0)
2948                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2949                         return false;
2950
2951         if (flags & SDVO_OUTPUT_YPRPB0)
2952                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2953                         return false;
2954
2955         if (flags & SDVO_OUTPUT_RGB0)
2956                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2957                         return false;
2958
2959         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2960                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2961                         return false;
2962
2963         if (flags & SDVO_OUTPUT_LVDS0)
2964                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2965                         return false;
2966
2967         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2968                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2969                         return false;
2970
2971         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2972                 unsigned char bytes[2];
2973
2974                 intel_sdvo->controlled_output = 0;
2975                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2976                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2977                               SDVO_NAME(intel_sdvo),
2978                               bytes[0], bytes[1]);
2979                 return false;
2980         }
2981         intel_sdvo->base.pipe_mask = ~0;
2982
2983         return true;
2984 }
2985
2986 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2987 {
2988         struct drm_device *dev = intel_sdvo->base.base.dev;
2989         struct drm_connector *connector, *tmp;
2990
2991         list_for_each_entry_safe(connector, tmp,
2992                                  &dev->mode_config.connector_list, head) {
2993                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
2994                         drm_connector_unregister(connector);
2995                         intel_connector_destroy(connector);
2996                 }
2997         }
2998 }
2999
3000 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3001                                           struct intel_sdvo_connector *intel_sdvo_connector,
3002                                           int type)
3003 {
3004         struct drm_device *dev = intel_sdvo->base.base.dev;
3005         struct intel_sdvo_tv_format format;
3006         u32 format_map, i;
3007
3008         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3009                 return false;
3010
3011         BUILD_BUG_ON(sizeof(format) != 6);
3012         if (!intel_sdvo_get_value(intel_sdvo,
3013                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3014                                   &format, sizeof(format)))
3015                 return false;
3016
3017         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3018
3019         if (format_map == 0)
3020                 return false;
3021
3022         intel_sdvo_connector->format_supported_num = 0;
3023         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3024                 if (format_map & (1 << i))
3025                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3026
3027
3028         intel_sdvo_connector->tv_format =
3029                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
3030                                             "mode", intel_sdvo_connector->format_supported_num);
3031         if (!intel_sdvo_connector->tv_format)
3032                 return false;
3033
3034         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3035                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3036                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3037
3038         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3039         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3040                                    intel_sdvo_connector->tv_format, 0);
3041         return true;
3042
3043 }
3044
3045 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3046         if (enhancements.name) { \
3047                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3048                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3049                         return false; \
3050                 intel_sdvo_connector->name = \
3051                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3052                 if (!intel_sdvo_connector->name) return false; \
3053                 state_assignment = response; \
3054                 drm_object_attach_property(&connector->base, \
3055                                            intel_sdvo_connector->name, 0); \
3056                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3057                               data_value[0], data_value[1], response); \
3058         } \
3059 } while (0)
3060
3061 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3062
3063 static bool
3064 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3065                                       struct intel_sdvo_connector *intel_sdvo_connector,
3066                                       struct intel_sdvo_enhancements_reply enhancements)
3067 {
3068         struct drm_device *dev = intel_sdvo->base.base.dev;
3069         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3070         struct drm_connector_state *conn_state = connector->state;
3071         struct intel_sdvo_connector_state *sdvo_state =
3072                 to_intel_sdvo_connector_state(conn_state);
3073         u16 response, data_value[2];
3074
3075         /* when horizontal overscan is supported, Add the left/right property */
3076         if (enhancements.overscan_h) {
3077                 if (!intel_sdvo_get_value(intel_sdvo,
3078                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3079                                           &data_value, 4))
3080                         return false;
3081
3082                 if (!intel_sdvo_get_value(intel_sdvo,
3083                                           SDVO_CMD_GET_OVERSCAN_H,
3084                                           &response, 2))
3085                         return false;
3086
3087                 sdvo_state->tv.overscan_h = response;
3088
3089                 intel_sdvo_connector->max_hscan = data_value[0];
3090                 intel_sdvo_connector->left =
3091                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3092                 if (!intel_sdvo_connector->left)
3093                         return false;
3094
3095                 drm_object_attach_property(&connector->base,
3096                                            intel_sdvo_connector->left, 0);
3097
3098                 intel_sdvo_connector->right =
3099                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3100                 if (!intel_sdvo_connector->right)
3101                         return false;
3102
3103                 drm_object_attach_property(&connector->base,
3104                                               intel_sdvo_connector->right, 0);
3105                 DRM_DEBUG_KMS("h_overscan: max %d, "
3106                               "default %d, current %d\n",
3107                               data_value[0], data_value[1], response);
3108         }
3109
3110         if (enhancements.overscan_v) {
3111                 if (!intel_sdvo_get_value(intel_sdvo,
3112                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3113                                           &data_value, 4))
3114                         return false;
3115
3116                 if (!intel_sdvo_get_value(intel_sdvo,
3117                                           SDVO_CMD_GET_OVERSCAN_V,
3118                                           &response, 2))
3119                         return false;
3120
3121                 sdvo_state->tv.overscan_v = response;
3122
3123                 intel_sdvo_connector->max_vscan = data_value[0];
3124                 intel_sdvo_connector->top =
3125                         drm_property_create_range(dev, 0,
3126                                             "top_margin", 0, data_value[0]);
3127                 if (!intel_sdvo_connector->top)
3128                         return false;
3129
3130                 drm_object_attach_property(&connector->base,
3131                                            intel_sdvo_connector->top, 0);
3132
3133                 intel_sdvo_connector->bottom =
3134                         drm_property_create_range(dev, 0,
3135                                             "bottom_margin", 0, data_value[0]);
3136                 if (!intel_sdvo_connector->bottom)
3137                         return false;
3138
3139                 drm_object_attach_property(&connector->base,
3140                                               intel_sdvo_connector->bottom, 0);
3141                 DRM_DEBUG_KMS("v_overscan: max %d, "
3142                               "default %d, current %d\n",
3143                               data_value[0], data_value[1], response);
3144         }
3145
3146         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3147         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3148         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3149         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3150         ENHANCEMENT(&conn_state->tv, hue, HUE);
3151         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3152         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3153         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3154         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3155         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3156         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3157         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3158
3159         if (enhancements.dot_crawl) {
3160                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3161                         return false;
3162
3163                 sdvo_state->tv.dot_crawl = response & 0x1;
3164                 intel_sdvo_connector->dot_crawl =
3165                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3166                 if (!intel_sdvo_connector->dot_crawl)
3167                         return false;
3168
3169                 drm_object_attach_property(&connector->base,
3170                                            intel_sdvo_connector->dot_crawl, 0);
3171                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3172         }
3173
3174         return true;
3175 }
3176
3177 static bool
3178 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3179                                         struct intel_sdvo_connector *intel_sdvo_connector,
3180                                         struct intel_sdvo_enhancements_reply enhancements)
3181 {
3182         struct drm_device *dev = intel_sdvo->base.base.dev;
3183         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3184         u16 response, data_value[2];
3185
3186         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3187
3188         return true;
3189 }
3190 #undef ENHANCEMENT
3191 #undef _ENHANCEMENT
3192
3193 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3194                                                struct intel_sdvo_connector *intel_sdvo_connector)
3195 {
3196         union {
3197                 struct intel_sdvo_enhancements_reply reply;
3198                 u16 response;
3199         } enhancements;
3200
3201         BUILD_BUG_ON(sizeof(enhancements) != 2);
3202
3203         if (!intel_sdvo_get_value(intel_sdvo,
3204                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3205                                   &enhancements, sizeof(enhancements)) ||
3206             enhancements.response == 0) {
3207                 DRM_DEBUG_KMS("No enhancement is supported\n");
3208                 return true;
3209         }
3210
3211         if (IS_TV(intel_sdvo_connector))
3212                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3213         else if (IS_LVDS(intel_sdvo_connector))
3214                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3215         else
3216                 return true;
3217 }
3218
3219 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3220                                      struct i2c_msg *msgs,
3221                                      int num)
3222 {
3223         struct intel_sdvo *sdvo = adapter->algo_data;
3224
3225         if (!__intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
3226                 return -EIO;
3227
3228         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3229 }
3230
3231 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3232 {
3233         struct intel_sdvo *sdvo = adapter->algo_data;
3234         return sdvo->i2c->algo->functionality(sdvo->i2c);
3235 }
3236
3237 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3238         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3239         .functionality  = intel_sdvo_ddc_proxy_func
3240 };
3241
3242 static void proxy_lock_bus(struct i2c_adapter *adapter,
3243                            unsigned int flags)
3244 {
3245         struct intel_sdvo *sdvo = adapter->algo_data;
3246         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3247 }
3248
3249 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3250                              unsigned int flags)
3251 {
3252         struct intel_sdvo *sdvo = adapter->algo_data;
3253         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3254 }
3255
3256 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3257                              unsigned int flags)
3258 {
3259         struct intel_sdvo *sdvo = adapter->algo_data;
3260         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3261 }
3262
3263 static const struct i2c_lock_operations proxy_lock_ops = {
3264         .lock_bus =    proxy_lock_bus,
3265         .trylock_bus = proxy_trylock_bus,
3266         .unlock_bus =  proxy_unlock_bus,
3267 };
3268
3269 static bool
3270 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
3271                           struct drm_i915_private *dev_priv)
3272 {
3273         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3274
3275         sdvo->ddc.owner = THIS_MODULE;
3276         sdvo->ddc.class = I2C_CLASS_DDC;
3277         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
3278         sdvo->ddc.dev.parent = &pdev->dev;
3279         sdvo->ddc.algo_data = sdvo;
3280         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
3281         sdvo->ddc.lock_ops = &proxy_lock_ops;
3282
3283         return i2c_add_adapter(&sdvo->ddc) == 0;
3284 }
3285
3286 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
3287                                    enum port port)
3288 {
3289         if (HAS_PCH_SPLIT(dev_priv))
3290                 drm_WARN_ON(&dev_priv->drm, port != PORT_B);
3291         else
3292                 drm_WARN_ON(&dev_priv->drm, port != PORT_B && port != PORT_C);
3293 }
3294
3295 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3296                      i915_reg_t sdvo_reg, enum port port)
3297 {
3298         struct intel_encoder *intel_encoder;
3299         struct intel_sdvo *intel_sdvo;
3300         int i;
3301
3302         assert_sdvo_port_valid(dev_priv, port);
3303
3304         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3305         if (!intel_sdvo)
3306                 return false;
3307
3308         intel_sdvo->sdvo_reg = sdvo_reg;
3309         intel_sdvo->port = port;
3310         intel_sdvo->slave_addr =
3311                 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
3312         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
3313         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
3314                 goto err_i2c_bus;
3315
3316         /* encoder type will be decided later */
3317         intel_encoder = &intel_sdvo->base;
3318         intel_encoder->type = INTEL_OUTPUT_SDVO;
3319         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3320         intel_encoder->port = port;
3321         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3322                          &intel_sdvo_enc_funcs, 0,
3323                          "SDVO %c", port_name(port));
3324
3325         /* Read the regs to test if we can talk to the device */
3326         for (i = 0; i < 0x40; i++) {
3327                 u8 byte;
3328
3329                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3330                         drm_dbg_kms(&dev_priv->drm,
3331                                     "No SDVO device found on %s\n",
3332                                     SDVO_NAME(intel_sdvo));
3333                         goto err;
3334                 }
3335         }
3336
3337         intel_encoder->compute_config = intel_sdvo_compute_config;
3338         if (HAS_PCH_SPLIT(dev_priv)) {
3339                 intel_encoder->disable = pch_disable_sdvo;
3340                 intel_encoder->post_disable = pch_post_disable_sdvo;
3341         } else {
3342                 intel_encoder->disable = intel_disable_sdvo;
3343         }
3344         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3345         intel_encoder->enable = intel_enable_sdvo;
3346         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3347         intel_encoder->get_config = intel_sdvo_get_config;
3348
3349         /* In default case sdvo lvds is false */
3350         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3351                 goto err;
3352
3353         intel_sdvo->colorimetry_cap =
3354                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3355
3356         if (intel_sdvo_output_setup(intel_sdvo,
3357                                     intel_sdvo->caps.output_flags) != true) {
3358                 drm_dbg_kms(&dev_priv->drm,
3359                             "SDVO output failed to setup on %s\n",
3360                             SDVO_NAME(intel_sdvo));
3361                 /* Output_setup can leave behind connectors! */
3362                 goto err_output;
3363         }
3364
3365         /*
3366          * Only enable the hotplug irq if we need it, to work around noisy
3367          * hotplug lines.
3368          */
3369         if (intel_sdvo->hotplug_active) {
3370                 if (intel_sdvo->port == PORT_B)
3371                         intel_encoder->hpd_pin = HPD_SDVO_B;
3372                 else
3373                         intel_encoder->hpd_pin = HPD_SDVO_C;
3374         }
3375
3376         /*
3377          * Cloning SDVO with anything is often impossible, since the SDVO
3378          * encoder can request a special input timing mode. And even if that's
3379          * not the case we have evidence that cloning a plain unscaled mode with
3380          * VGA doesn't really work. Furthermore the cloning flags are way too
3381          * simplistic anyway to express such constraints, so just give up on
3382          * cloning for SDVO encoders.
3383          */
3384         intel_sdvo->base.cloneable = 0;
3385
3386         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3387
3388         /* Set the input timing to the screen. Assume always input 0. */
3389         if (!intel_sdvo_set_target_input(intel_sdvo))
3390                 goto err_output;
3391
3392         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3393                                                     &intel_sdvo->pixel_clock_min,
3394                                                     &intel_sdvo->pixel_clock_max))
3395                 goto err_output;
3396
3397         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3398                         "clock range %dMHz - %dMHz, "
3399                         "input 1: %c, input 2: %c, "
3400                         "output 1: %c, output 2: %c\n",
3401                         SDVO_NAME(intel_sdvo),
3402                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3403                         intel_sdvo->caps.device_rev_id,
3404                         intel_sdvo->pixel_clock_min / 1000,
3405                         intel_sdvo->pixel_clock_max / 1000,
3406                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3407                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3408                         /* check currently supported outputs */
3409                         intel_sdvo->caps.output_flags &
3410                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3411                         intel_sdvo->caps.output_flags &
3412                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3413         return true;
3414
3415 err_output:
3416         intel_sdvo_output_cleanup(intel_sdvo);
3417
3418 err:
3419         drm_encoder_cleanup(&intel_encoder->base);
3420         i2c_del_adapter(&intel_sdvo->ddc);
3421 err_i2c_bus:
3422         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3423         kfree(intel_sdvo);
3424
3425         return false;
3426 }