drivers/gpu/drm/i915/display/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28
  29 #include <linux/delay.h>
  30 #include <linux/export.h>
  31 #include <linux/i2c.h>
  32 #include <linux/slab.h>
  33
  34 #include <drm/display/drm_hdmi_helper.h>
  35 #include <drm/drm_atomic_helper.h>
  36 #include <drm/drm_crtc.h>
  37 #include <drm/drm_edid.h>
  38
  39 #include "i915_drv.h"
  40 #include "i915_reg.h"
  41 #include "intel_atomic.h"
  42 #include "intel_audio.h"
  43 #include "intel_connector.h"
  44 #include "intel_crtc.h"
  45 #include "intel_de.h"
  46 #include "intel_display_types.h"
  47 #include "intel_fifo_underrun.h"
  48 #include "intel_gmbus.h"
  49 #include "intel_hdmi.h"
  50 #include "intel_hotplug.h"
  51 #include "intel_panel.h"
  52 #include "intel_sdvo.h"
  53 #include "intel_sdvo_regs.h"
  54
  55 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  56 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  57 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  58 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  59
  60 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK | SDVO_TV_MASK)
  61
  62 #define IS_TV(c)                ((c)->output_flag & SDVO_TV_MASK)
  63 #define IS_TMDS(c)              ((c)->output_flag & SDVO_TMDS_MASK)
  64 #define IS_LVDS(c)              ((c)->output_flag & SDVO_LVDS_MASK)
  65 #define IS_TV_OR_LVDS(c)        ((c)->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  66 #define IS_DIGITAL(c)           ((c)->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  67
  68 #define HAS_DDC(c)              ((c)->output_flag & (SDVO_RGB_MASK | SDVO_TMDS_MASK | \
  69                                                      SDVO_LVDS_MASK))
  70
  71 static const char * const tv_format_names[] = {
  72         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  73         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  74         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  75         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  76         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  77         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  78         "SECAM_60"
  79 };
  80
  81 #define TV_FORMAT_NUM  ARRAY_SIZE(tv_format_names)
  82
  83 struct intel_sdvo;
  84
  85 struct intel_sdvo_ddc {
  86         struct i2c_adapter ddc;
  87         struct intel_sdvo *sdvo;
  88         u8 ddc_bus;
  89 };
  90
  91 struct intel_sdvo {
  92         struct intel_encoder base;
  93
  94         struct i2c_adapter *i2c;
  95         u8 slave_addr;
  96
  97         struct intel_sdvo_ddc ddc[3];
  98
  99         /* Register for the SDVO device: SDVOB or SDVOC */
 100         i915_reg_t sdvo_reg;
 101
 102         /*
 103          * Capabilities of the SDVO device returned by
 104          * intel_sdvo_get_capabilities()
 105          */
 106         struct intel_sdvo_caps caps;
 107
 108         u8 colorimetry_cap;
 109
 110         /* Pixel clock limitations reported by the SDVO device, in kHz */
 111         int pixel_clock_min, pixel_clock_max;
 112
 113         /*
 114          * Hotplug activation bits for this device
 115          */
 116         u16 hotplug_active;
 117
 118         /*
 119          * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
 120          */
 121         u8 dtd_sdvo_flags;
 122 };
 123
 124 struct intel_sdvo_connector {
 125         struct intel_connector base;
 126
 127         /* Mark the type of connector */
 128         u16 output_flag;
 129
 130         /* This contains all current supported TV format */
 131         u8 tv_format_supported[TV_FORMAT_NUM];
 132         int   format_supported_num;
 133         struct drm_property *tv_format;
 134
 135         /* add the property for the SDVO-TV */
 136         struct drm_property *left;
 137         struct drm_property *right;
 138         struct drm_property *top;
 139         struct drm_property *bottom;
 140         struct drm_property *hpos;
 141         struct drm_property *vpos;
 142         struct drm_property *contrast;
 143         struct drm_property *saturation;
 144         struct drm_property *hue;
 145         struct drm_property *sharpness;
 146         struct drm_property *flicker_filter;
 147         struct drm_property *flicker_filter_adaptive;
 148         struct drm_property *flicker_filter_2d;
 149         struct drm_property *tv_chroma_filter;
 150         struct drm_property *tv_luma_filter;
 151         struct drm_property *dot_crawl;
 152
 153         /* add the property for the SDVO-TV/LVDS */
 154         struct drm_property *brightness;
 155
 156         /* this is to get the range of margin.*/
 157         u32 max_hscan, max_vscan;
 158
 159         /**
 160          * This is set if we treat the device as HDMI, instead of DVI.
 161          */
 162         bool is_hdmi;
 163 };
 164
 165 struct intel_sdvo_connector_state {
 166         /* base.base: tv.saturation/contrast/hue/brightness */
 167         struct intel_digital_connector_state base;
 168
 169         struct {
 170                 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
 171                 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
 172                 unsigned chroma_filter, luma_filter, dot_crawl;
 173         } tv;
 174 };
 175
 176 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
 177 {
 178         return container_of(encoder, struct intel_sdvo, base);
 179 }
 180
 181 static struct intel_sdvo *intel_attached_sdvo(struct intel_connector *connector)
 182 {
 183         return to_sdvo(intel_attached_encoder(connector));
 184 }
 185
 186 static struct intel_sdvo_connector *
 187 to_intel_sdvo_connector(struct drm_connector *connector)
 188 {
 189         return container_of(connector, struct intel_sdvo_connector, base.base);
 190 }
 191
 192 #define to_intel_sdvo_connector_state(conn_state) \
 193         container_of((conn_state), struct intel_sdvo_connector_state, base.base)
 194
 195 static bool
 196 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo);
 197 static bool
 198 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 199                               struct intel_sdvo_connector *intel_sdvo_connector,
 200                               int type);
 201 static bool
 202 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 203                                    struct intel_sdvo_connector *intel_sdvo_connector);
 204
 205 /*
 206  * Writes the SDVOB or SDVOC with the given value, but always writes both
 207  * SDVOB and SDVOC to work around apparent hardware issues (according to
 208  * comments in the BIOS).
 209  */
 210 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 211 {
 212         struct drm_device *dev = intel_sdvo->base.base.dev;
 213         struct drm_i915_private *dev_priv = to_i915(dev);
 214         u32 bval = val, cval = val;
 215         int i;
 216
 217         if (HAS_PCH_SPLIT(dev_priv)) {
 218                 intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 219                 intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 220                 /*
 221                  * HW workaround, need to write this twice for issue
 222                  * that may result in first write getting masked.
 223                  */
 224                 if (HAS_PCH_IBX(dev_priv)) {
 225                         intel_de_write(dev_priv, intel_sdvo->sdvo_reg, val);
 226                         intel_de_posting_read(dev_priv, intel_sdvo->sdvo_reg);
 227                 }
 228                 return;
 229         }
 230
 231         if (intel_sdvo->base.port == PORT_B)
 232                 cval = intel_de_read(dev_priv, GEN3_SDVOC);
 233         else
 234                 bval = intel_de_read(dev_priv, GEN3_SDVOB);
 235
 236         /*
 237          * Write the registers twice for luck. Sometimes,
 238          * writing them only once doesn't appear to 'stick'.
 239          * The BIOS does this too. Yay, magic
 240          */
 241         for (i = 0; i < 2; i++) {
 242                 intel_de_write(dev_priv, GEN3_SDVOB, bval);
 243                 intel_de_posting_read(dev_priv, GEN3_SDVOB);
 244
 245                 intel_de_write(dev_priv, GEN3_SDVOC, cval);
 246                 intel_de_posting_read(dev_priv, GEN3_SDVOC);
 247         }
 248 }
 249
 250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 251 {
 252         struct i2c_msg msgs[] = {
 253                 {
 254                         .addr = intel_sdvo->slave_addr,
 255                         .flags = 0,
 256                         .len = 1,
 257                         .buf = &addr,
 258                 },
 259                 {
 260                         .addr = intel_sdvo->slave_addr,
 261                         .flags = I2C_M_RD,
 262                         .len = 1,
 263                         .buf = ch,
 264                 }
 265         };
 266         int ret;
 267
 268         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 269                 return true;
 270
 271         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 272         return false;
 273 }
 274
 275 #define SDVO_CMD_NAME_ENTRY(cmd_) { .cmd = SDVO_CMD_ ## cmd_, .name = #cmd_ }
 276
 277 /** Mapping of command numbers to names, for debug output */
 278 static const struct {
 279         u8 cmd;
 280         const char *name;
 281 } __packed sdvo_cmd_names[] = {
 282         SDVO_CMD_NAME_ENTRY(RESET),
 283         SDVO_CMD_NAME_ENTRY(GET_DEVICE_CAPS),
 284         SDVO_CMD_NAME_ENTRY(GET_FIRMWARE_REV),
 285         SDVO_CMD_NAME_ENTRY(GET_TRAINED_INPUTS),
 286         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_OUTPUTS),
 287         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_OUTPUTS),
 288         SDVO_CMD_NAME_ENTRY(GET_IN_OUT_MAP),
 289         SDVO_CMD_NAME_ENTRY(SET_IN_OUT_MAP),
 290         SDVO_CMD_NAME_ENTRY(GET_ATTACHED_DISPLAYS),
 291         SDVO_CMD_NAME_ENTRY(GET_HOT_PLUG_SUPPORT),
 292         SDVO_CMD_NAME_ENTRY(SET_ACTIVE_HOT_PLUG),
 293         SDVO_CMD_NAME_ENTRY(GET_ACTIVE_HOT_PLUG),
 294         SDVO_CMD_NAME_ENTRY(GET_INTERRUPT_EVENT_SOURCE),
 295         SDVO_CMD_NAME_ENTRY(SET_TARGET_INPUT),
 296         SDVO_CMD_NAME_ENTRY(SET_TARGET_OUTPUT),
 297         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART1),
 298         SDVO_CMD_NAME_ENTRY(GET_INPUT_TIMINGS_PART2),
 299         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART1),
 300         SDVO_CMD_NAME_ENTRY(SET_INPUT_TIMINGS_PART2),
 301         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART1),
 302         SDVO_CMD_NAME_ENTRY(SET_OUTPUT_TIMINGS_PART2),
 303         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART1),
 304         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_TIMINGS_PART2),
 305         SDVO_CMD_NAME_ENTRY(CREATE_PREFERRED_INPUT_TIMING),
 306         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART1),
 307         SDVO_CMD_NAME_ENTRY(GET_PREFERRED_INPUT_TIMING_PART2),
 308         SDVO_CMD_NAME_ENTRY(GET_INPUT_PIXEL_CLOCK_RANGE),
 309         SDVO_CMD_NAME_ENTRY(GET_OUTPUT_PIXEL_CLOCK_RANGE),
 310         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_CLOCK_RATE_MULTS),
 311         SDVO_CMD_NAME_ENTRY(GET_CLOCK_RATE_MULT),
 312         SDVO_CMD_NAME_ENTRY(SET_CLOCK_RATE_MULT),
 313         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_TV_FORMATS),
 314         SDVO_CMD_NAME_ENTRY(GET_TV_FORMAT),
 315         SDVO_CMD_NAME_ENTRY(SET_TV_FORMAT),
 316         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_POWER_STATES),
 317         SDVO_CMD_NAME_ENTRY(GET_POWER_STATE),
 318         SDVO_CMD_NAME_ENTRY(SET_ENCODER_POWER_STATE),
 319         SDVO_CMD_NAME_ENTRY(SET_DISPLAY_POWER_STATE),
 320         SDVO_CMD_NAME_ENTRY(SET_CONTROL_BUS_SWITCH),
 321         SDVO_CMD_NAME_ENTRY(GET_SDTV_RESOLUTION_SUPPORT),
 322         SDVO_CMD_NAME_ENTRY(GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 323         SDVO_CMD_NAME_ENTRY(GET_SUPPORTED_ENHANCEMENTS),
 324
 325         /* Add the op code for SDVO enhancements */
 326         SDVO_CMD_NAME_ENTRY(GET_MAX_HPOS),
 327         SDVO_CMD_NAME_ENTRY(GET_HPOS),
 328         SDVO_CMD_NAME_ENTRY(SET_HPOS),
 329         SDVO_CMD_NAME_ENTRY(GET_MAX_VPOS),
 330         SDVO_CMD_NAME_ENTRY(GET_VPOS),
 331         SDVO_CMD_NAME_ENTRY(SET_VPOS),
 332         SDVO_CMD_NAME_ENTRY(GET_MAX_SATURATION),
 333         SDVO_CMD_NAME_ENTRY(GET_SATURATION),
 334         SDVO_CMD_NAME_ENTRY(SET_SATURATION),
 335         SDVO_CMD_NAME_ENTRY(GET_MAX_HUE),
 336         SDVO_CMD_NAME_ENTRY(GET_HUE),
 337         SDVO_CMD_NAME_ENTRY(SET_HUE),
 338         SDVO_CMD_NAME_ENTRY(GET_MAX_CONTRAST),
 339         SDVO_CMD_NAME_ENTRY(GET_CONTRAST),
 340         SDVO_CMD_NAME_ENTRY(SET_CONTRAST),
 341         SDVO_CMD_NAME_ENTRY(GET_MAX_BRIGHTNESS),
 342         SDVO_CMD_NAME_ENTRY(GET_BRIGHTNESS),
 343         SDVO_CMD_NAME_ENTRY(SET_BRIGHTNESS),
 344         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_H),
 345         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_H),
 346         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_H),
 347         SDVO_CMD_NAME_ENTRY(GET_MAX_OVERSCAN_V),
 348         SDVO_CMD_NAME_ENTRY(GET_OVERSCAN_V),
 349         SDVO_CMD_NAME_ENTRY(SET_OVERSCAN_V),
 350         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER),
 351         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER),
 352         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER),
 353         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_ADAPTIVE),
 354         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_ADAPTIVE),
 355         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_ADAPTIVE),
 356         SDVO_CMD_NAME_ENTRY(GET_MAX_FLICKER_FILTER_2D),
 357         SDVO_CMD_NAME_ENTRY(GET_FLICKER_FILTER_2D),
 358         SDVO_CMD_NAME_ENTRY(SET_FLICKER_FILTER_2D),
 359         SDVO_CMD_NAME_ENTRY(GET_MAX_SHARPNESS),
 360         SDVO_CMD_NAME_ENTRY(GET_SHARPNESS),
 361         SDVO_CMD_NAME_ENTRY(SET_SHARPNESS),
 362         SDVO_CMD_NAME_ENTRY(GET_DOT_CRAWL),
 363         SDVO_CMD_NAME_ENTRY(SET_DOT_CRAWL),
 364         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_CHROMA_FILTER),
 365         SDVO_CMD_NAME_ENTRY(GET_TV_CHROMA_FILTER),
 366         SDVO_CMD_NAME_ENTRY(SET_TV_CHROMA_FILTER),
 367         SDVO_CMD_NAME_ENTRY(GET_MAX_TV_LUMA_FILTER),
 368         SDVO_CMD_NAME_ENTRY(GET_TV_LUMA_FILTER),
 369         SDVO_CMD_NAME_ENTRY(SET_TV_LUMA_FILTER),
 370
 371         /* HDMI op code */
 372         SDVO_CMD_NAME_ENTRY(GET_SUPP_ENCODE),
 373         SDVO_CMD_NAME_ENTRY(GET_ENCODE),
 374         SDVO_CMD_NAME_ENTRY(SET_ENCODE),
 375         SDVO_CMD_NAME_ENTRY(SET_PIXEL_REPLI),
 376         SDVO_CMD_NAME_ENTRY(GET_PIXEL_REPLI),
 377         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY_CAP),
 378         SDVO_CMD_NAME_ENTRY(SET_COLORIMETRY),
 379         SDVO_CMD_NAME_ENTRY(GET_COLORIMETRY),
 380         SDVO_CMD_NAME_ENTRY(GET_AUDIO_ENCRYPT_PREFER),
 381         SDVO_CMD_NAME_ENTRY(SET_AUDIO_STAT),
 382         SDVO_CMD_NAME_ENTRY(GET_AUDIO_STAT),
 383         SDVO_CMD_NAME_ENTRY(GET_HBUF_INDEX),
 384         SDVO_CMD_NAME_ENTRY(SET_HBUF_INDEX),
 385         SDVO_CMD_NAME_ENTRY(GET_HBUF_INFO),
 386         SDVO_CMD_NAME_ENTRY(GET_HBUF_AV_SPLIT),
 387         SDVO_CMD_NAME_ENTRY(SET_HBUF_AV_SPLIT),
 388         SDVO_CMD_NAME_ENTRY(GET_HBUF_TXRATE),
 389         SDVO_CMD_NAME_ENTRY(SET_HBUF_TXRATE),
 390         SDVO_CMD_NAME_ENTRY(SET_HBUF_DATA),
 391         SDVO_CMD_NAME_ENTRY(GET_HBUF_DATA),
 392 };
 393
 394 #undef SDVO_CMD_NAME_ENTRY
 395
 396 static const char *sdvo_cmd_name(u8 cmd)
 397 {
 398         int i;
 399
 400         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 401                 if (cmd == sdvo_cmd_names[i].cmd)
 402                         return sdvo_cmd_names[i].name;
 403         }
 404
 405         return NULL;
 406 }
 407
 408 #define SDVO_NAME(svdo) ((svdo)->base.port == PORT_B ? "SDVOB" : "SDVOC")
 409
 410 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 411                                    const void *args, int args_len)
 412 {
 413         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 414         const char *cmd_name;
 415         int i, pos = 0;
 416         char buffer[64];
 417
 418 #define BUF_PRINT(args...) \
 419         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 420
 421         for (i = 0; i < args_len; i++) {
 422                 BUF_PRINT("%02X ", ((u8 *)args)[i]);
 423         }
 424         for (; i < 8; i++) {
 425                 BUF_PRINT("   ");
 426         }
 427
 428         cmd_name = sdvo_cmd_name(cmd);
 429         if (cmd_name)
 430                 BUF_PRINT("(%s)", cmd_name);
 431         else
 432                 BUF_PRINT("(%02X)", cmd);
 433
 434         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 435 #undef BUF_PRINT
 436
 437         DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
 438 }
 439
 440 static const char * const cmd_status_names[] = {
 441         [SDVO_CMD_STATUS_POWER_ON] = "Power on",
 442         [SDVO_CMD_STATUS_SUCCESS] = "Success",
 443         [SDVO_CMD_STATUS_NOTSUPP] = "Not supported",
 444         [SDVO_CMD_STATUS_INVALID_ARG] = "Invalid arg",
 445         [SDVO_CMD_STATUS_PENDING] = "Pending",
 446         [SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED] = "Target not specified",
 447         [SDVO_CMD_STATUS_SCALING_NOT_SUPP] = "Scaling not supported",
 448 };
 449
 450 static const char *sdvo_cmd_status(u8 status)
 451 {
 452         if (status < ARRAY_SIZE(cmd_status_names))
 453                 return cmd_status_names[status];
 454         else
 455                 return NULL;
 456 }
 457
 458 static bool __intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 459                                    const void *args, int args_len,
 460                                    bool unlocked)
 461 {
 462         u8 *buf, status;
 463         struct i2c_msg *msgs;
 464         int i, ret = true;
 465
 466         /* Would be simpler to allocate both in one go ? */
 467         buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
 468         if (!buf)
 469                 return false;
 470
 471         msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
 472         if (!msgs) {
 473                 kfree(buf);
 474                 return false;
 475         }
 476
 477         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 478
 479         for (i = 0; i < args_len; i++) {
 480                 msgs[i].addr = intel_sdvo->slave_addr;
 481                 msgs[i].flags = 0;
 482                 msgs[i].len = 2;
 483                 msgs[i].buf = buf + 2 *i;
 484                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 485                 buf[2*i + 1] = ((u8*)args)[i];
 486         }
 487         msgs[i].addr = intel_sdvo->slave_addr;
 488         msgs[i].flags = 0;
 489         msgs[i].len = 2;
 490         msgs[i].buf = buf + 2*i;
 491         buf[2*i + 0] = SDVO_I2C_OPCODE;
 492         buf[2*i + 1] = cmd;
 493
 494         /* the following two are to read the response */
 495         status = SDVO_I2C_CMD_STATUS;
 496         msgs[i+1].addr = intel_sdvo->slave_addr;
 497         msgs[i+1].flags = 0;
 498         msgs[i+1].len = 1;
 499         msgs[i+1].buf = &status;
 500
 501         msgs[i+2].addr = intel_sdvo->slave_addr;
 502         msgs[i+2].flags = I2C_M_RD;
 503         msgs[i+2].len = 1;
 504         msgs[i+2].buf = &status;
 505
 506         if (unlocked)
 507                 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 508         else
 509                 ret = __i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 510         if (ret < 0) {
 511                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 512                 ret = false;
 513                 goto out;
 514         }
 515         if (ret != i+3) {
 516                 /* failure in I2C transfer */
 517                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 518                 ret = false;
 519         }
 520
 521 out:
 522         kfree(msgs);
 523         kfree(buf);
 524         return ret;
 525 }
 526
 527 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 528                                  const void *args, int args_len)
 529 {
 530         return __intel_sdvo_write_cmd(intel_sdvo, cmd, args, args_len, true);
 531 }
 532
 533 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 534                                      void *response, int response_len)
 535 {
 536         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
 537         const char *cmd_status;
 538         u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
 539         u8 status;
 540         int i, pos = 0;
 541         char buffer[64];
 542
 543         buffer[0] = '\0';
 544
 545         /*
 546          * The documentation states that all commands will be
 547          * processed within 15µs, and that we need only poll
 548          * the status byte a maximum of 3 times in order for the
 549          * command to be complete.
 550          *
 551          * Check 5 times in case the hardware failed to read the docs.
 552          *
 553          * Also beware that the first response by many devices is to
 554          * reply PENDING and stall for time. TVs are notorious for
 555          * requiring longer than specified to complete their replies.
 556          * Originally (in the DDX long ago), the delay was only ever 15ms
 557          * with an additional delay of 30ms applied for TVs added later after
 558          * many experiments. To accommodate both sets of delays, we do a
 559          * sequence of slow checks if the device is falling behind and fails
 560          * to reply within 5*15µs.
 561          */
 562         if (!intel_sdvo_read_byte(intel_sdvo,
 563                                   SDVO_I2C_CMD_STATUS,
 564                                   &status))
 565                 goto log_fail;
 566
 567         while ((status == SDVO_CMD_STATUS_PENDING ||
 568                 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
 569                 if (retry < 10)
 570                         msleep(15);
 571                 else
 572                         udelay(15);
 573
 574                 if (!intel_sdvo_read_byte(intel_sdvo,
 575                                           SDVO_I2C_CMD_STATUS,
 576                                           &status))
 577                         goto log_fail;
 578         }
 579
 580 #define BUF_PRINT(args...) \
 581         pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
 582
 583         cmd_status = sdvo_cmd_status(status);
 584         if (cmd_status)
 585                 BUF_PRINT("(%s)", cmd_status);
 586         else
 587                 BUF_PRINT("(??? %d)", status);
 588
 589         if (status != SDVO_CMD_STATUS_SUCCESS)
 590                 goto log_fail;
 591
 592         /* Read the command response */
 593         for (i = 0; i < response_len; i++) {
 594                 if (!intel_sdvo_read_byte(intel_sdvo,
 595                                           SDVO_I2C_RETURN_0 + i,
 596                                           &((u8 *)response)[i]))
 597                         goto log_fail;
 598                 BUF_PRINT(" %02X", ((u8 *)response)[i]);
 599         }
 600
 601         drm_WARN_ON(&dev_priv->drm, pos >= sizeof(buffer) - 1);
 602 #undef BUF_PRINT
 603
 604         DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
 605         return true;
 606
 607 log_fail:
 608         DRM_DEBUG_KMS("%s: R: ... failed %s\n",
 609                       SDVO_NAME(intel_sdvo), buffer);
 610         return false;
 611 }
 612
 613 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
 614 {
 615         if (adjusted_mode->crtc_clock >= 100000)
 616                 return 1;
 617         else if (adjusted_mode->crtc_clock >= 50000)
 618                 return 2;
 619         else
 620                 return 4;
 621 }
 622
 623 static bool __intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 624                                                 u8 ddc_bus)
 625 {
 626         /* This must be the immediately preceding write before the i2c xfer */
 627         return __intel_sdvo_write_cmd(intel_sdvo,
 628                                       SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 629                                       &ddc_bus, 1, false);
 630 }
 631
 632 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 633 {
 634         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
 635                 return false;
 636
 637         return intel_sdvo_read_response(intel_sdvo, NULL, 0);
 638 }
 639
 640 static bool
 641 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 642 {
 643         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 644                 return false;
 645
 646         return intel_sdvo_read_response(intel_sdvo, value, len);
 647 }
 648
 649 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 650 {
 651         struct intel_sdvo_set_target_input_args targets = {0};
 652         return intel_sdvo_set_value(intel_sdvo,
 653                                     SDVO_CMD_SET_TARGET_INPUT,
 654                                     &targets, sizeof(targets));
 655 }
 656
 657 /*
 658  * Return whether each input is trained.
 659  *
 660  * This function is making an assumption about the layout of the response,
 661  * which should be checked against the docs.
 662  */
 663 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 664 {
 665         struct intel_sdvo_get_trained_inputs_response response;
 666
 667         BUILD_BUG_ON(sizeof(response) != 1);
 668         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 669                                   &response, sizeof(response)))
 670                 return false;
 671
 672         *input_1 = response.input0_trained;
 673         *input_2 = response.input1_trained;
 674         return true;
 675 }
 676
 677 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 678                                           u16 outputs)
 679 {
 680         return intel_sdvo_set_value(intel_sdvo,
 681                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 682                                     &outputs, sizeof(outputs));
 683 }
 684
 685 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
 686                                           u16 *outputs)
 687 {
 688         return intel_sdvo_get_value(intel_sdvo,
 689                                     SDVO_CMD_GET_ACTIVE_OUTPUTS,
 690                                     outputs, sizeof(*outputs));
 691 }
 692
 693 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 694                                                int mode)
 695 {
 696         u8 state = SDVO_ENCODER_STATE_ON;
 697
 698         switch (mode) {
 699         case DRM_MODE_DPMS_ON:
 700                 state = SDVO_ENCODER_STATE_ON;
 701                 break;
 702         case DRM_MODE_DPMS_STANDBY:
 703                 state = SDVO_ENCODER_STATE_STANDBY;
 704                 break;
 705         case DRM_MODE_DPMS_SUSPEND:
 706                 state = SDVO_ENCODER_STATE_SUSPEND;
 707                 break;
 708         case DRM_MODE_DPMS_OFF:
 709                 state = SDVO_ENCODER_STATE_OFF;
 710                 break;
 711         }
 712
 713         return intel_sdvo_set_value(intel_sdvo,
 714                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 715 }
 716
 717 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 718                                                    int *clock_min,
 719                                                    int *clock_max)
 720 {
 721         struct intel_sdvo_pixel_clock_range clocks;
 722
 723         BUILD_BUG_ON(sizeof(clocks) != 4);
 724         if (!intel_sdvo_get_value(intel_sdvo,
 725                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 726                                   &clocks, sizeof(clocks)))
 727                 return false;
 728
 729         /* Convert the values from units of 10 kHz to kHz. */
 730         *clock_min = clocks.min * 10;
 731         *clock_max = clocks.max * 10;
 732         return true;
 733 }
 734
 735 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 736                                          u16 outputs)
 737 {
 738         return intel_sdvo_set_value(intel_sdvo,
 739                                     SDVO_CMD_SET_TARGET_OUTPUT,
 740                                     &outputs, sizeof(outputs));
 741 }
 742
 743 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 744                                   struct intel_sdvo_dtd *dtd)
 745 {
 746         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 747                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 748 }
 749
 750 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 751                                   struct intel_sdvo_dtd *dtd)
 752 {
 753         return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 754                 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 755 }
 756
 757 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 758                                          struct intel_sdvo_dtd *dtd)
 759 {
 760         return intel_sdvo_set_timing(intel_sdvo,
 761                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 762 }
 763
 764 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 765                                          struct intel_sdvo_dtd *dtd)
 766 {
 767         return intel_sdvo_set_timing(intel_sdvo,
 768                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 769 }
 770
 771 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
 772                                         struct intel_sdvo_dtd *dtd)
 773 {
 774         return intel_sdvo_get_timing(intel_sdvo,
 775                                      SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
 776 }
 777
 778 static bool
 779 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 780                                          struct intel_sdvo_connector *intel_sdvo_connector,
 781                                          const struct drm_display_mode *mode)
 782 {
 783         struct intel_sdvo_preferred_input_timing_args args;
 784
 785         memset(&args, 0, sizeof(args));
 786         args.clock = mode->clock / 10;
 787         args.width = mode->hdisplay;
 788         args.height = mode->vdisplay;
 789         args.interlace = 0;
 790
 791         if (IS_LVDS(intel_sdvo_connector)) {
 792                 const struct drm_display_mode *fixed_mode =
 793                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
 794
 795                 if (fixed_mode->hdisplay != args.width ||
 796                     fixed_mode->vdisplay != args.height)
 797                         args.scaled = 1;
 798         }
 799
 800         return intel_sdvo_set_value(intel_sdvo,
 801                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 802                                     &args, sizeof(args));
 803 }
 804
 805 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 806                                                   struct intel_sdvo_dtd *dtd)
 807 {
 808         BUILD_BUG_ON(sizeof(dtd->part1) != 8);
 809         BUILD_BUG_ON(sizeof(dtd->part2) != 8);
 810         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 811                                     &dtd->part1, sizeof(dtd->part1)) &&
 812                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 813                                      &dtd->part2, sizeof(dtd->part2));
 814 }
 815
 816 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 817 {
 818         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 819 }
 820
 821 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 822                                          const struct drm_display_mode *mode)
 823 {
 824         u16 width, height;
 825         u16 h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 826         u16 h_sync_offset, v_sync_offset;
 827         int mode_clock;
 828
 829         memset(dtd, 0, sizeof(*dtd));
 830
 831         width = mode->hdisplay;
 832         height = mode->vdisplay;
 833
 834         /* do some mode translations */
 835         h_blank_len = mode->htotal - mode->hdisplay;
 836         h_sync_len = mode->hsync_end - mode->hsync_start;
 837
 838         v_blank_len = mode->vtotal - mode->vdisplay;
 839         v_sync_len = mode->vsync_end - mode->vsync_start;
 840
 841         h_sync_offset = mode->hsync_start - mode->hdisplay;
 842         v_sync_offset = mode->vsync_start - mode->vdisplay;
 843
 844         mode_clock = mode->clock;
 845         mode_clock /= 10;
 846         dtd->part1.clock = mode_clock;
 847
 848         dtd->part1.h_active = width & 0xff;
 849         dtd->part1.h_blank = h_blank_len & 0xff;
 850         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 851                 ((h_blank_len >> 8) & 0xf);
 852         dtd->part1.v_active = height & 0xff;
 853         dtd->part1.v_blank = v_blank_len & 0xff;
 854         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 855                 ((v_blank_len >> 8) & 0xf);
 856
 857         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 858         dtd->part2.h_sync_width = h_sync_len & 0xff;
 859         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 860                 (v_sync_len & 0xf);
 861         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 862                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 863                 ((v_sync_len & 0x30) >> 4);
 864
 865         dtd->part2.dtd_flags = 0x18;
 866         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 867                 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
 868         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 869                 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
 870         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 871                 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
 872
 873         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 874 }
 875
 876 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
 877                                          const struct intel_sdvo_dtd *dtd)
 878 {
 879         struct drm_display_mode mode = {};
 880
 881         mode.hdisplay = dtd->part1.h_active;
 882         mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 883         mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
 884         mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 885         mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
 886         mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 887         mode.htotal = mode.hdisplay + dtd->part1.h_blank;
 888         mode.htotal += (dtd->part1.h_high & 0xf) << 8;
 889
 890         mode.vdisplay = dtd->part1.v_active;
 891         mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 892         mode.vsync_start = mode.vdisplay;
 893         mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 894         mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 895         mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 896         mode.vsync_end = mode.vsync_start +
 897                 (dtd->part2.v_sync_off_width & 0xf);
 898         mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 899         mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
 900         mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
 901
 902         mode.clock = dtd->part1.clock * 10;
 903
 904         if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
 905                 mode.flags |= DRM_MODE_FLAG_INTERLACE;
 906         if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
 907                 mode.flags |= DRM_MODE_FLAG_PHSYNC;
 908         else
 909                 mode.flags |= DRM_MODE_FLAG_NHSYNC;
 910         if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
 911                 mode.flags |= DRM_MODE_FLAG_PVSYNC;
 912         else
 913                 mode.flags |= DRM_MODE_FLAG_NVSYNC;
 914
 915         drm_mode_set_crtcinfo(&mode, 0);
 916
 917         drm_mode_copy(pmode, &mode);
 918 }
 919
 920 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 921 {
 922         struct intel_sdvo_encode encode;
 923
 924         BUILD_BUG_ON(sizeof(encode) != 2);
 925         return intel_sdvo_get_value(intel_sdvo,
 926                                   SDVO_CMD_GET_SUPP_ENCODE,
 927                                   &encode, sizeof(encode));
 928 }
 929
 930 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 931                                   u8 mode)
 932 {
 933         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 934 }
 935
 936 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 937                                        u8 mode)
 938 {
 939         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 940 }
 941
 942 static bool intel_sdvo_set_pixel_replication(struct intel_sdvo *intel_sdvo,
 943                                              u8 pixel_repeat)
 944 {
 945         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_PIXEL_REPLI,
 946                                     &pixel_repeat, 1);
 947 }
 948
 949 static bool intel_sdvo_set_audio_state(struct intel_sdvo *intel_sdvo,
 950                                        u8 audio_state)
 951 {
 952         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_AUDIO_STAT,
 953                                     &audio_state, 1);
 954 }
 955
 956 static bool intel_sdvo_get_hbuf_size(struct intel_sdvo *intel_sdvo,
 957                                      u8 *hbuf_size)
 958 {
 959         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
 960                                   hbuf_size, 1))
 961                 return false;
 962
 963         /* Buffer size is 0 based, hooray! However zero means zero. */
 964         if (*hbuf_size)
 965                 (*hbuf_size)++;
 966
 967         return true;
 968 }
 969
 970 #if 0
 971 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 972 {
 973         int i, j;
 974         u8 set_buf_index[2];
 975         u8 av_split;
 976         u8 buf_size;
 977         u8 buf[48];
 978         u8 *pos;
 979
 980         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 981
 982         for (i = 0; i <= av_split; i++) {
 983                 set_buf_index[0] = i; set_buf_index[1] = 0;
 984                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 985                                      set_buf_index, 2);
 986                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 987                 intel_sdvo_read_response(encoder, &buf_size, 1);
 988
 989                 pos = buf;
 990                 for (j = 0; j <= buf_size; j += 8) {
 991                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 992                                              NULL, 0);
 993                         intel_sdvo_read_response(encoder, pos, 8);
 994                         pos += 8;
 995                 }
 996         }
 997 }
 998 #endif
 999
1000 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
1001                                        unsigned int if_index, u8 tx_rate,
1002                                        const u8 *data, unsigned int length)
1003 {
1004         u8 set_buf_index[2] = { if_index, 0 };
1005         u8 hbuf_size, tmp[8];
1006         int i;
1007
1008         if (!intel_sdvo_set_value(intel_sdvo,
1009                                   SDVO_CMD_SET_HBUF_INDEX,
1010                                   set_buf_index, 2))
1011                 return false;
1012
1013         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1014                 return false;
1015
1016         DRM_DEBUG_KMS("writing sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1017                       if_index, length, hbuf_size);
1018
1019         if (hbuf_size < length)
1020                 return false;
1021
1022         for (i = 0; i < hbuf_size; i += 8) {
1023                 memset(tmp, 0, 8);
1024                 if (i < length)
1025                         memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
1026
1027                 if (!intel_sdvo_set_value(intel_sdvo,
1028                                           SDVO_CMD_SET_HBUF_DATA,
1029                                           tmp, 8))
1030                         return false;
1031         }
1032
1033         return intel_sdvo_set_value(intel_sdvo,
1034                                     SDVO_CMD_SET_HBUF_TXRATE,
1035                                     &tx_rate, 1);
1036 }
1037
1038 static ssize_t intel_sdvo_read_infoframe(struct intel_sdvo *intel_sdvo,
1039                                          unsigned int if_index,
1040                                          u8 *data, unsigned int length)
1041 {
1042         u8 set_buf_index[2] = { if_index, 0 };
1043         u8 hbuf_size, tx_rate, av_split;
1044         int i;
1045
1046         if (!intel_sdvo_get_value(intel_sdvo,
1047                                   SDVO_CMD_GET_HBUF_AV_SPLIT,
1048                                   &av_split, 1))
1049                 return -ENXIO;
1050
1051         if (av_split < if_index)
1052                 return 0;
1053
1054         if (!intel_sdvo_set_value(intel_sdvo,
1055                                   SDVO_CMD_SET_HBUF_INDEX,
1056                                   set_buf_index, 2))
1057                 return -ENXIO;
1058
1059         if (!intel_sdvo_get_value(intel_sdvo,
1060                                   SDVO_CMD_GET_HBUF_TXRATE,
1061                                   &tx_rate, 1))
1062                 return -ENXIO;
1063
1064         /* TX_DISABLED doesn't mean disabled for ELD */
1065         if (if_index != SDVO_HBUF_INDEX_ELD && tx_rate == SDVO_HBUF_TX_DISABLED)
1066                 return 0;
1067
1068         if (!intel_sdvo_get_hbuf_size(intel_sdvo, &hbuf_size))
1069                 return false;
1070
1071         DRM_DEBUG_KMS("reading sdvo hbuf: %i, length %u, hbuf_size: %i\n",
1072                       if_index, length, hbuf_size);
1073
1074         hbuf_size = min_t(unsigned int, length, hbuf_size);
1075
1076         for (i = 0; i < hbuf_size; i += 8) {
1077                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HBUF_DATA, NULL, 0))
1078                         return -ENXIO;
1079                 if (!intel_sdvo_read_response(intel_sdvo, &data[i],
1080                                               min_t(unsigned int, 8, hbuf_size - i)))
1081                         return -ENXIO;
1082         }
1083
1084         return hbuf_size;
1085 }
1086
1087 static bool intel_sdvo_compute_avi_infoframe(struct intel_sdvo *intel_sdvo,
1088                                              struct intel_crtc_state *crtc_state,
1089                                              struct drm_connector_state *conn_state)
1090 {
1091         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1092         struct hdmi_avi_infoframe *frame = &crtc_state->infoframes.avi.avi;
1093         const struct drm_display_mode *adjusted_mode =
1094                 &crtc_state->hw.adjusted_mode;
1095         int ret;
1096
1097         if (!crtc_state->has_hdmi_sink)
1098                 return true;
1099
1100         crtc_state->infoframes.enable |=
1101                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1102
1103         ret = drm_hdmi_avi_infoframe_from_display_mode(frame,
1104                                                        conn_state->connector,
1105                                                        adjusted_mode);
1106         if (ret)
1107                 return false;
1108
1109         drm_hdmi_avi_infoframe_quant_range(frame,
1110                                            conn_state->connector,
1111                                            adjusted_mode,
1112                                            crtc_state->limited_color_range ?
1113                                            HDMI_QUANTIZATION_RANGE_LIMITED :
1114                                            HDMI_QUANTIZATION_RANGE_FULL);
1115
1116         ret = hdmi_avi_infoframe_check(frame);
1117         if (drm_WARN_ON(&dev_priv->drm, ret))
1118                 return false;
1119
1120         return true;
1121 }
1122
1123 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
1124                                          const struct intel_crtc_state *crtc_state)
1125 {
1126         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1127         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1128         const union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1129         ssize_t len;
1130
1131         if ((crtc_state->infoframes.enable &
1132              intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI)) == 0)
1133                 return true;
1134
1135         if (drm_WARN_ON(&dev_priv->drm,
1136                         frame->any.type != HDMI_INFOFRAME_TYPE_AVI))
1137                 return false;
1138
1139         len = hdmi_infoframe_pack_only(frame, sdvo_data, sizeof(sdvo_data));
1140         if (drm_WARN_ON(&dev_priv->drm, len < 0))
1141                 return false;
1142
1143         return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1144                                           SDVO_HBUF_TX_VSYNC,
1145                                           sdvo_data, len);
1146 }
1147
1148 static void intel_sdvo_get_avi_infoframe(struct intel_sdvo *intel_sdvo,
1149                                          struct intel_crtc_state *crtc_state)
1150 {
1151         u8 sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
1152         union hdmi_infoframe *frame = &crtc_state->infoframes.avi;
1153         ssize_t len;
1154         int ret;
1155
1156         if (!crtc_state->has_hdmi_sink)
1157                 return;
1158
1159         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1160                                         sdvo_data, sizeof(sdvo_data));
1161         if (len < 0) {
1162                 DRM_DEBUG_KMS("failed to read AVI infoframe\n");
1163                 return;
1164         } else if (len == 0) {
1165                 return;
1166         }
1167
1168         crtc_state->infoframes.enable |=
1169                 intel_hdmi_infoframe_enable(HDMI_INFOFRAME_TYPE_AVI);
1170
1171         ret = hdmi_infoframe_unpack(frame, sdvo_data, len);
1172         if (ret) {
1173                 DRM_DEBUG_KMS("Failed to unpack AVI infoframe\n");
1174                 return;
1175         }
1176
1177         if (frame->any.type != HDMI_INFOFRAME_TYPE_AVI)
1178                 DRM_DEBUG_KMS("Found the wrong infoframe type 0x%x (expected 0x%02x)\n",
1179                               frame->any.type, HDMI_INFOFRAME_TYPE_AVI);
1180 }
1181
1182 static void intel_sdvo_get_eld(struct intel_sdvo *intel_sdvo,
1183                                struct intel_crtc_state *crtc_state)
1184 {
1185         struct drm_i915_private *i915 = to_i915(intel_sdvo->base.base.dev);
1186         ssize_t len;
1187         u8 val;
1188
1189         if (!crtc_state->has_audio)
1190                 return;
1191
1192         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT, &val, 1))
1193                 return;
1194
1195         if ((val & SDVO_AUDIO_ELD_VALID) == 0)
1196                 return;
1197
1198         len = intel_sdvo_read_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1199                                         crtc_state->eld, sizeof(crtc_state->eld));
1200         if (len < 0)
1201                 drm_dbg_kms(&i915->drm, "failed to read ELD\n");
1202 }
1203
1204 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1205                                      const struct drm_connector_state *conn_state)
1206 {
1207         struct intel_sdvo_tv_format format;
1208         u32 format_map;
1209
1210         format_map = 1 << conn_state->tv.mode;
1211         memset(&format, 0, sizeof(format));
1212         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1213
1214         BUILD_BUG_ON(sizeof(format) != 6);
1215         return intel_sdvo_set_value(intel_sdvo,
1216                                     SDVO_CMD_SET_TV_FORMAT,
1217                                     &format, sizeof(format));
1218 }
1219
1220 static bool
1221 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1222                                         struct intel_sdvo_connector *intel_sdvo_connector,
1223                                         const struct drm_display_mode *mode)
1224 {
1225         struct intel_sdvo_dtd output_dtd;
1226
1227         if (!intel_sdvo_set_target_output(intel_sdvo,
1228                                           intel_sdvo_connector->output_flag))
1229                 return false;
1230
1231         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1232         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1233                 return false;
1234
1235         return true;
1236 }
1237
1238 /*
1239  * Asks the sdvo controller for the preferred input mode given the output mode.
1240  * Unfortunately we have to set up the full output mode to do that.
1241  */
1242 static bool
1243 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1244                                     struct intel_sdvo_connector *intel_sdvo_connector,
1245                                     const struct drm_display_mode *mode,
1246                                     struct drm_display_mode *adjusted_mode)
1247 {
1248         struct intel_sdvo_dtd input_dtd;
1249
1250         /* Reset the input timing to the screen. Assume always input 0. */
1251         if (!intel_sdvo_set_target_input(intel_sdvo))
1252                 return false;
1253
1254         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1255                                                       intel_sdvo_connector,
1256                                                       mode))
1257                 return false;
1258
1259         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1260                                                    &input_dtd))
1261                 return false;
1262
1263         intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1264         intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1265
1266         return true;
1267 }
1268
1269 static int i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1270 {
1271         struct drm_i915_private *dev_priv = to_i915(pipe_config->uapi.crtc->dev);
1272         unsigned int dotclock = pipe_config->hw.adjusted_mode.crtc_clock;
1273         struct dpll *clock = &pipe_config->dpll;
1274
1275         /*
1276          * SDVO TV has fixed PLL values depend on its clock range,
1277          * this mirrors vbios setting.
1278          */
1279         if (dotclock >= 100000 && dotclock < 140500) {
1280                 clock->p1 = 2;
1281                 clock->p2 = 10;
1282                 clock->n = 3;
1283                 clock->m1 = 16;
1284                 clock->m2 = 8;
1285         } else if (dotclock >= 140500 && dotclock <= 200000) {
1286                 clock->p1 = 1;
1287                 clock->p2 = 10;
1288                 clock->n = 6;
1289                 clock->m1 = 12;
1290                 clock->m2 = 8;
1291         } else {
1292                 drm_dbg_kms(&dev_priv->drm,
1293                             "SDVO TV clock out of range: %i\n", dotclock);
1294                 return -EINVAL;
1295         }
1296
1297         pipe_config->clock_set = true;
1298
1299         return 0;
1300 }
1301
1302 static bool intel_has_hdmi_sink(struct intel_sdvo_connector *intel_sdvo_connector,
1303                                 const struct drm_connector_state *conn_state)
1304 {
1305         struct drm_connector *connector = conn_state->connector;
1306
1307         return intel_sdvo_connector->is_hdmi &&
1308                 connector->display_info.is_hdmi &&
1309                 READ_ONCE(to_intel_digital_connector_state(conn_state)->force_audio) != HDMI_AUDIO_OFF_DVI;
1310 }
1311
1312 static bool intel_sdvo_limited_color_range(struct intel_encoder *encoder,
1313                                            const struct intel_crtc_state *crtc_state,
1314                                            const struct drm_connector_state *conn_state)
1315 {
1316         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1317
1318         if ((intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220) == 0)
1319                 return false;
1320
1321         return intel_hdmi_limited_color_range(crtc_state, conn_state);
1322 }
1323
1324 static bool intel_sdvo_has_audio(struct intel_encoder *encoder,
1325                                  const struct intel_crtc_state *crtc_state,
1326                                  const struct drm_connector_state *conn_state)
1327 {
1328         struct drm_connector *connector = conn_state->connector;
1329         struct intel_sdvo_connector *intel_sdvo_connector =
1330                 to_intel_sdvo_connector(connector);
1331         const struct intel_digital_connector_state *intel_conn_state =
1332                 to_intel_digital_connector_state(conn_state);
1333
1334         if (!crtc_state->has_hdmi_sink)
1335                 return false;
1336
1337         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
1338                 return intel_sdvo_connector->is_hdmi &&
1339                         connector->display_info.has_audio;
1340         else
1341                 return intel_conn_state->force_audio == HDMI_AUDIO_ON;
1342 }
1343
1344 static int intel_sdvo_compute_config(struct intel_encoder *encoder,
1345                                      struct intel_crtc_state *pipe_config,
1346                                      struct drm_connector_state *conn_state)
1347 {
1348         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1349         struct intel_sdvo_connector *intel_sdvo_connector =
1350                 to_intel_sdvo_connector(conn_state->connector);
1351         struct drm_display_mode *adjusted_mode = &pipe_config->hw.adjusted_mode;
1352         struct drm_display_mode *mode = &pipe_config->hw.mode;
1353
1354         DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1355         pipe_config->pipe_bpp = 8*3;
1356         pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
1357         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
1358
1359         if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1360                 pipe_config->has_pch_encoder = true;
1361
1362         /*
1363          * We need to construct preferred input timings based on our
1364          * output timings.  To do that, we have to set the output
1365          * timings, even though this isn't really the right place in
1366          * the sequence to do it. Oh well.
1367          */
1368         if (IS_TV(intel_sdvo_connector)) {
1369                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1370                                                              intel_sdvo_connector,
1371                                                              mode))
1372                         return -EINVAL;
1373
1374                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1375                                                            intel_sdvo_connector,
1376                                                            mode,
1377                                                            adjusted_mode);
1378                 pipe_config->sdvo_tv_clock = true;
1379         } else if (IS_LVDS(intel_sdvo_connector)) {
1380                 const struct drm_display_mode *fixed_mode =
1381                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1382                 int ret;
1383
1384                 ret = intel_panel_compute_config(&intel_sdvo_connector->base,
1385                                                  adjusted_mode);
1386                 if (ret)
1387                         return ret;
1388
1389                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1390                                                              intel_sdvo_connector,
1391                                                              fixed_mode))
1392                         return -EINVAL;
1393
1394                 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1395                                                            intel_sdvo_connector,
1396                                                            mode,
1397                                                            adjusted_mode);
1398         }
1399
1400         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
1401                 return -EINVAL;
1402
1403         /*
1404          * Make the CRTC code factor in the SDVO pixel multiplier.  The
1405          * SDVO device will factor out the multiplier during mode_set.
1406          */
1407         pipe_config->pixel_multiplier =
1408                 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1409
1410         pipe_config->has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, conn_state);
1411
1412         pipe_config->has_audio =
1413                 intel_sdvo_has_audio(encoder, pipe_config, conn_state) &&
1414                 intel_audio_compute_config(encoder, pipe_config, conn_state);
1415
1416         pipe_config->limited_color_range =
1417                 intel_sdvo_limited_color_range(encoder, pipe_config,
1418                                                conn_state);
1419
1420         /* Clock computation needs to happen after pixel multiplier. */
1421         if (IS_TV(intel_sdvo_connector)) {
1422                 int ret;
1423
1424                 ret = i9xx_adjust_sdvo_tv_clock(pipe_config);
1425                 if (ret)
1426                         return ret;
1427         }
1428
1429         if (conn_state->picture_aspect_ratio)
1430                 adjusted_mode->picture_aspect_ratio =
1431                         conn_state->picture_aspect_ratio;
1432
1433         if (!intel_sdvo_compute_avi_infoframe(intel_sdvo,
1434                                               pipe_config, conn_state)) {
1435                 DRM_DEBUG_KMS("bad AVI infoframe\n");
1436                 return -EINVAL;
1437         }
1438
1439         return 0;
1440 }
1441
1442 #define UPDATE_PROPERTY(input, NAME) \
1443         do { \
1444                 val = input; \
1445                 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1446         } while (0)
1447
1448 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1449                                     const struct intel_sdvo_connector_state *sdvo_state)
1450 {
1451         const struct drm_connector_state *conn_state = &sdvo_state->base.base;
1452         struct intel_sdvo_connector *intel_sdvo_conn =
1453                 to_intel_sdvo_connector(conn_state->connector);
1454         u16 val;
1455
1456         if (intel_sdvo_conn->left)
1457                 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1458
1459         if (intel_sdvo_conn->top)
1460                 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1461
1462         if (intel_sdvo_conn->hpos)
1463                 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1464
1465         if (intel_sdvo_conn->vpos)
1466                 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1467
1468         if (intel_sdvo_conn->saturation)
1469                 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1470
1471         if (intel_sdvo_conn->contrast)
1472                 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1473
1474         if (intel_sdvo_conn->hue)
1475                 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1476
1477         if (intel_sdvo_conn->brightness)
1478                 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1479
1480         if (intel_sdvo_conn->sharpness)
1481                 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1482
1483         if (intel_sdvo_conn->flicker_filter)
1484                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1485
1486         if (intel_sdvo_conn->flicker_filter_2d)
1487                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1488
1489         if (intel_sdvo_conn->flicker_filter_adaptive)
1490                 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1491
1492         if (intel_sdvo_conn->tv_chroma_filter)
1493                 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1494
1495         if (intel_sdvo_conn->tv_luma_filter)
1496                 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1497
1498         if (intel_sdvo_conn->dot_crawl)
1499                 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1500
1501 #undef UPDATE_PROPERTY
1502 }
1503
1504 static void intel_sdvo_pre_enable(struct intel_atomic_state *state,
1505                                   struct intel_encoder *intel_encoder,
1506                                   const struct intel_crtc_state *crtc_state,
1507                                   const struct drm_connector_state *conn_state)
1508 {
1509         struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1510         struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
1511         const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
1512         const struct intel_sdvo_connector_state *sdvo_state =
1513                 to_intel_sdvo_connector_state(conn_state);
1514         struct intel_sdvo_connector *intel_sdvo_connector =
1515                 to_intel_sdvo_connector(conn_state->connector);
1516         const struct drm_display_mode *mode = &crtc_state->hw.mode;
1517         struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1518         u32 sdvox;
1519         struct intel_sdvo_in_out_map in_out;
1520         struct intel_sdvo_dtd input_dtd, output_dtd;
1521         int rate;
1522
1523         intel_sdvo_update_props(intel_sdvo, sdvo_state);
1524
1525         /*
1526          * First, set the input mapping for the first input to our controlled
1527          * output. This is only correct if we're a single-input device, in
1528          * which case the first input is the output from the appropriate SDVO
1529          * channel on the motherboard.  In a two-input device, the first input
1530          * will be SDVOB and the second SDVOC.
1531          */
1532         in_out.in0 = intel_sdvo_connector->output_flag;
1533         in_out.in1 = 0;
1534
1535         intel_sdvo_set_value(intel_sdvo,
1536                              SDVO_CMD_SET_IN_OUT_MAP,
1537                              &in_out, sizeof(in_out));
1538
1539         /* Set the output timings to the screen */
1540         if (!intel_sdvo_set_target_output(intel_sdvo,
1541                                           intel_sdvo_connector->output_flag))
1542                 return;
1543
1544         /* lvds has a special fixed output timing. */
1545         if (IS_LVDS(intel_sdvo_connector)) {
1546                 const struct drm_display_mode *fixed_mode =
1547                         intel_panel_fixed_mode(&intel_sdvo_connector->base, mode);
1548
1549                 intel_sdvo_get_dtd_from_mode(&output_dtd, fixed_mode);
1550         } else {
1551                 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1552         }
1553         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1554                 drm_info(&dev_priv->drm,
1555                          "Setting output timings on %s failed\n",
1556                          SDVO_NAME(intel_sdvo));
1557
1558         /* Set the input timing to the screen. Assume always input 0. */
1559         if (!intel_sdvo_set_target_input(intel_sdvo))
1560                 return;
1561
1562         if (crtc_state->has_hdmi_sink) {
1563                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1564                 intel_sdvo_set_colorimetry(intel_sdvo,
1565                                            crtc_state->limited_color_range ?
1566                                            SDVO_COLORIMETRY_RGB220 :
1567                                            SDVO_COLORIMETRY_RGB256);
1568                 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1569                 intel_sdvo_set_pixel_replication(intel_sdvo,
1570                                                  !!(adjusted_mode->flags &
1571                                                     DRM_MODE_FLAG_DBLCLK));
1572         } else
1573                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1574
1575         if (IS_TV(intel_sdvo_connector) &&
1576             !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1577                 return;
1578
1579         intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1580
1581         if (IS_TV(intel_sdvo_connector) || IS_LVDS(intel_sdvo_connector))
1582                 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1583         if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1584                 drm_info(&dev_priv->drm,
1585                          "Setting input timings on %s failed\n",
1586                          SDVO_NAME(intel_sdvo));
1587
1588         switch (crtc_state->pixel_multiplier) {
1589         default:
1590                 drm_WARN(&dev_priv->drm, 1,
1591                          "unknown pixel multiplier specified\n");
1592                 fallthrough;
1593         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1594         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1595         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1596         }
1597         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1598                 return;
1599
1600         /* Set the SDVO control regs. */
1601         if (DISPLAY_VER(dev_priv) >= 4) {
1602                 /* The real mode polarity is set by the SDVO commands, using
1603                  * struct intel_sdvo_dtd. */
1604                 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1605                 if (DISPLAY_VER(dev_priv) < 5)
1606                         sdvox |= SDVO_BORDER_ENABLE;
1607         } else {
1608                 sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1609                 if (intel_sdvo->base.port == PORT_B)
1610                         sdvox &= SDVOB_PRESERVE_MASK;
1611                 else
1612                         sdvox &= SDVOC_PRESERVE_MASK;
1613                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1614         }
1615
1616         if (HAS_PCH_CPT(dev_priv))
1617                 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1618         else
1619                 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1620
1621         if (DISPLAY_VER(dev_priv) >= 4) {
1622                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1623         } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1624                    IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1625                 /* done in crtc_mode_set as it lives inside the dpll register */
1626         } else {
1627                 sdvox |= (crtc_state->pixel_multiplier - 1)
1628                         << SDVO_PORT_MULTIPLY_SHIFT;
1629         }
1630
1631         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1632             DISPLAY_VER(dev_priv) < 5)
1633                 sdvox |= SDVO_STALL_SELECT;
1634         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1635 }
1636
1637 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1638 {
1639         struct intel_sdvo_connector *intel_sdvo_connector =
1640                 to_intel_sdvo_connector(&connector->base);
1641         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1642         u16 active_outputs = 0;
1643
1644         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1645
1646         return active_outputs & intel_sdvo_connector->output_flag;
1647 }
1648
1649 bool intel_sdvo_port_enabled(struct drm_i915_private *dev_priv,
1650                              i915_reg_t sdvo_reg, enum pipe *pipe)
1651 {
1652         u32 val;
1653
1654         val = intel_de_read(dev_priv, sdvo_reg);
1655
1656         /* asserts want to know the pipe even if the port is disabled */
1657         if (HAS_PCH_CPT(dev_priv))
1658                 *pipe = (val & SDVO_PIPE_SEL_MASK_CPT) >> SDVO_PIPE_SEL_SHIFT_CPT;
1659         else if (IS_CHERRYVIEW(dev_priv))
1660                 *pipe = (val & SDVO_PIPE_SEL_MASK_CHV) >> SDVO_PIPE_SEL_SHIFT_CHV;
1661         else
1662                 *pipe = (val & SDVO_PIPE_SEL_MASK) >> SDVO_PIPE_SEL_SHIFT;
1663
1664         return val & SDVO_ENABLE;
1665 }
1666
1667 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1668                                     enum pipe *pipe)
1669 {
1670         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1671         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1672         u16 active_outputs = 0;
1673         bool ret;
1674
1675         intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1676
1677         ret = intel_sdvo_port_enabled(dev_priv, intel_sdvo->sdvo_reg, pipe);
1678
1679         return ret || active_outputs;
1680 }
1681
1682 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1683                                   struct intel_crtc_state *pipe_config)
1684 {
1685         struct drm_device *dev = encoder->base.dev;
1686         struct drm_i915_private *dev_priv = to_i915(dev);
1687         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1688         struct intel_sdvo_dtd dtd;
1689         int encoder_pixel_multiplier = 0;
1690         int dotclock;
1691         u32 flags = 0, sdvox;
1692         u8 val;
1693         bool ret;
1694
1695         pipe_config->output_types |= BIT(INTEL_OUTPUT_SDVO);
1696
1697         sdvox = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1698
1699         ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1700         if (!ret) {
1701                 /*
1702                  * Some sdvo encoders are not spec compliant and don't
1703                  * implement the mandatory get_timings function.
1704                  */
1705                 drm_dbg(&dev_priv->drm, "failed to retrieve SDVO DTD\n");
1706                 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1707         } else {
1708                 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1709                         flags |= DRM_MODE_FLAG_PHSYNC;
1710                 else
1711                         flags |= DRM_MODE_FLAG_NHSYNC;
1712
1713                 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1714                         flags |= DRM_MODE_FLAG_PVSYNC;
1715                 else
1716                         flags |= DRM_MODE_FLAG_NVSYNC;
1717         }
1718
1719         pipe_config->hw.adjusted_mode.flags |= flags;
1720
1721         /*
1722          * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1723          * the sdvo port register, on all other platforms it is part of the dpll
1724          * state. Since the general pipe state readout happens before the
1725          * encoder->get_config we so already have a valid pixel multplier on all
1726          * other platfroms.
1727          */
1728         if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1729                 pipe_config->pixel_multiplier =
1730                         ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1731                          >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1732         }
1733
1734         dotclock = pipe_config->port_clock;
1735
1736         if (pipe_config->pixel_multiplier)
1737                 dotclock /= pipe_config->pixel_multiplier;
1738
1739         pipe_config->hw.adjusted_mode.crtc_clock = dotclock;
1740
1741         /* Cross check the port pixel multiplier with the sdvo encoder state. */
1742         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1743                                  &val, 1)) {
1744                 switch (val) {
1745                 case SDVO_CLOCK_RATE_MULT_1X:
1746                         encoder_pixel_multiplier = 1;
1747                         break;
1748                 case SDVO_CLOCK_RATE_MULT_2X:
1749                         encoder_pixel_multiplier = 2;
1750                         break;
1751                 case SDVO_CLOCK_RATE_MULT_4X:
1752                         encoder_pixel_multiplier = 4;
1753                         break;
1754                 }
1755         }
1756
1757         drm_WARN(dev,
1758                  encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1759                  "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1760                  pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1761
1762         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY,
1763                                  &val, 1)) {
1764                 if (val == SDVO_COLORIMETRY_RGB220)
1765                         pipe_config->limited_color_range = true;
1766         }
1767
1768         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_AUDIO_STAT,
1769                                  &val, 1)) {
1770                 if (val & SDVO_AUDIO_PRESENCE_DETECT)
1771                         pipe_config->has_audio = true;
1772         }
1773
1774         if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1775                                  &val, 1)) {
1776                 if (val == SDVO_ENCODE_HDMI)
1777                         pipe_config->has_hdmi_sink = true;
1778         }
1779
1780         intel_sdvo_get_avi_infoframe(intel_sdvo, pipe_config);
1781
1782         intel_sdvo_get_eld(intel_sdvo, pipe_config);
1783 }
1784
1785 static void intel_sdvo_disable_audio(struct intel_sdvo *intel_sdvo)
1786 {
1787         intel_sdvo_set_audio_state(intel_sdvo, 0);
1788 }
1789
1790 static void intel_sdvo_enable_audio(struct intel_sdvo *intel_sdvo,
1791                                     const struct intel_crtc_state *crtc_state,
1792                                     const struct drm_connector_state *conn_state)
1793 {
1794         const u8 *eld = crtc_state->eld;
1795
1796         intel_sdvo_set_audio_state(intel_sdvo, 0);
1797
1798         intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_ELD,
1799                                    SDVO_HBUF_TX_DISABLED,
1800                                    eld, drm_eld_size(eld));
1801
1802         intel_sdvo_set_audio_state(intel_sdvo, SDVO_AUDIO_ELD_VALID |
1803                                    SDVO_AUDIO_PRESENCE_DETECT);
1804 }
1805
1806 static void intel_disable_sdvo(struct intel_atomic_state *state,
1807                                struct intel_encoder *encoder,
1808                                const struct intel_crtc_state *old_crtc_state,
1809                                const struct drm_connector_state *conn_state)
1810 {
1811         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1812         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1813         struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
1814         u32 temp;
1815
1816         if (old_crtc_state->has_audio)
1817                 intel_sdvo_disable_audio(intel_sdvo);
1818
1819         intel_sdvo_set_active_outputs(intel_sdvo, 0);
1820         if (0)
1821                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1822                                                    DRM_MODE_DPMS_OFF);
1823
1824         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1825
1826         temp &= ~SDVO_ENABLE;
1827         intel_sdvo_write_sdvox(intel_sdvo, temp);
1828
1829         /*
1830          * HW workaround for IBX, we need to move the port
1831          * to transcoder A after disabling it to allow the
1832          * matching DP port to be enabled on transcoder A.
1833          */
1834         if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1835                 /*
1836                  * We get CPU/PCH FIFO underruns on the other pipe when
1837                  * doing the workaround. Sweep them under the rug.
1838                  */
1839                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1840                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1841
1842                 temp &= ~SDVO_PIPE_SEL_MASK;
1843                 temp |= SDVO_ENABLE | SDVO_PIPE_SEL(PIPE_A);
1844                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1845
1846                 temp &= ~SDVO_ENABLE;
1847                 intel_sdvo_write_sdvox(intel_sdvo, temp);
1848
1849                 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1850                 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1851                 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1852         }
1853 }
1854
1855 static void pch_disable_sdvo(struct intel_atomic_state *state,
1856                              struct intel_encoder *encoder,
1857                              const struct intel_crtc_state *old_crtc_state,
1858                              const struct drm_connector_state *old_conn_state)
1859 {
1860 }
1861
1862 static void pch_post_disable_sdvo(struct intel_atomic_state *state,
1863                                   struct intel_encoder *encoder,
1864                                   const struct intel_crtc_state *old_crtc_state,
1865                                   const struct drm_connector_state *old_conn_state)
1866 {
1867         intel_disable_sdvo(state, encoder, old_crtc_state, old_conn_state);
1868 }
1869
1870 static void intel_enable_sdvo(struct intel_atomic_state *state,
1871                               struct intel_encoder *encoder,
1872                               const struct intel_crtc_state *pipe_config,
1873                               const struct drm_connector_state *conn_state)
1874 {
1875         struct drm_device *dev = encoder->base.dev;
1876         struct drm_i915_private *dev_priv = to_i915(dev);
1877         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1878         struct intel_sdvo_connector *intel_sdvo_connector =
1879                 to_intel_sdvo_connector(conn_state->connector);
1880         struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
1881         u32 temp;
1882         bool input1, input2;
1883         int i;
1884         bool success;
1885
1886         temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg);
1887         temp |= SDVO_ENABLE;
1888         intel_sdvo_write_sdvox(intel_sdvo, temp);
1889
1890         for (i = 0; i < 2; i++)
1891                 intel_crtc_wait_for_next_vblank(crtc);
1892
1893         success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1894         /*
1895          * Warn if the device reported failure to sync.
1896          *
1897          * A lot of SDVO devices fail to notify of sync, but it's
1898          * a given it the status is a success, we succeeded.
1899          */
1900         if (success && !input1) {
1901                 drm_dbg_kms(&dev_priv->drm,
1902                             "First %s output reported failure to "
1903                             "sync\n", SDVO_NAME(intel_sdvo));
1904         }
1905
1906         if (0)
1907                 intel_sdvo_set_encoder_power_state(intel_sdvo,
1908                                                    DRM_MODE_DPMS_ON);
1909         intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo_connector->output_flag);
1910
1911         if (pipe_config->has_audio)
1912                 intel_sdvo_enable_audio(intel_sdvo, pipe_config, conn_state);
1913 }
1914
1915 static enum drm_mode_status
1916 intel_sdvo_mode_valid(struct drm_connector *connector,
1917                       struct drm_display_mode *mode)
1918 {
1919         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
1920         struct intel_sdvo_connector *intel_sdvo_connector =
1921                 to_intel_sdvo_connector(connector);
1922         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1923         bool has_hdmi_sink = intel_has_hdmi_sink(intel_sdvo_connector, connector->state);
1924         int clock = mode->clock;
1925
1926         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1927                 return MODE_NO_DBLESCAN;
1928
1929         if (clock > max_dotclk)
1930                 return MODE_CLOCK_HIGH;
1931
1932         if (mode->flags & DRM_MODE_FLAG_DBLCLK) {
1933                 if (!has_hdmi_sink)
1934                         return MODE_CLOCK_LOW;
1935                 clock *= 2;
1936         }
1937
1938         if (intel_sdvo->pixel_clock_min > clock)
1939                 return MODE_CLOCK_LOW;
1940
1941         if (intel_sdvo->pixel_clock_max < clock)
1942                 return MODE_CLOCK_HIGH;
1943
1944         if (IS_LVDS(intel_sdvo_connector)) {
1945                 enum drm_mode_status status;
1946
1947                 status = intel_panel_mode_valid(&intel_sdvo_connector->base, mode);
1948                 if (status != MODE_OK)
1949                         return status;
1950         }
1951
1952         return MODE_OK;
1953 }
1954
1955 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1956 {
1957         BUILD_BUG_ON(sizeof(*caps) != 8);
1958         if (!intel_sdvo_get_value(intel_sdvo,
1959                                   SDVO_CMD_GET_DEVICE_CAPS,
1960                                   caps, sizeof(*caps)))
1961                 return false;
1962
1963         DRM_DEBUG_KMS("SDVO capabilities:\n"
1964                       "  vendor_id: %d\n"
1965                       "  device_id: %d\n"
1966                       "  device_rev_id: %d\n"
1967                       "  sdvo_version_major: %d\n"
1968                       "  sdvo_version_minor: %d\n"
1969                       "  sdvo_num_inputs: %d\n"
1970                       "  smooth_scaling: %d\n"
1971                       "  sharp_scaling: %d\n"
1972                       "  up_scaling: %d\n"
1973                       "  down_scaling: %d\n"
1974                       "  stall_support: %d\n"
1975                       "  output_flags: %d\n",
1976                       caps->vendor_id,
1977                       caps->device_id,
1978                       caps->device_rev_id,
1979                       caps->sdvo_version_major,
1980                       caps->sdvo_version_minor,
1981                       caps->sdvo_num_inputs,
1982                       caps->smooth_scaling,
1983                       caps->sharp_scaling,
1984                       caps->up_scaling,
1985                       caps->down_scaling,
1986                       caps->stall_support,
1987                       caps->output_flags);
1988
1989         return true;
1990 }
1991
1992 static u8 intel_sdvo_get_colorimetry_cap(struct intel_sdvo *intel_sdvo)
1993 {
1994         u8 cap;
1995
1996         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_COLORIMETRY_CAP,
1997                                   &cap, sizeof(cap)))
1998                 return SDVO_COLORIMETRY_RGB256;
1999
2000         return cap;
2001 }
2002
2003 static u16 intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
2004 {
2005         struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
2006         u16 hotplug;
2007
2008         if (!I915_HAS_HOTPLUG(dev_priv))
2009                 return 0;
2010
2011         /*
2012          * HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
2013          * on the line.
2014          */
2015         if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
2016                 return 0;
2017
2018         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
2019                                         &hotplug, sizeof(hotplug)))
2020                 return 0;
2021
2022         return hotplug;
2023 }
2024
2025 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
2026 {
2027         struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
2028
2029         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
2030                              &intel_sdvo->hotplug_active, 2);
2031 }
2032
2033 static enum intel_hotplug_state
2034 intel_sdvo_hotplug(struct intel_encoder *encoder,
2035                    struct intel_connector *connector)
2036 {
2037         intel_sdvo_enable_hotplug(encoder);
2038
2039         return intel_encoder_hotplug(encoder, connector);
2040 }
2041
2042 static const struct drm_edid *
2043 intel_sdvo_get_edid(struct drm_connector *connector)
2044 {
2045         struct i2c_adapter *ddc = connector->ddc;
2046
2047         if (!ddc)
2048                 return NULL;
2049
2050         return drm_edid_read_ddc(connector, ddc);
2051 }
2052
2053 /* Mac mini hack -- use the same DDC as the analog connector */
2054 static const struct drm_edid *
2055 intel_sdvo_get_analog_edid(struct drm_connector *connector)
2056 {
2057         struct drm_i915_private *i915 = to_i915(connector->dev);
2058         struct i2c_adapter *ddc;
2059
2060         ddc = intel_gmbus_get_adapter(i915, i915->display.vbt.crt_ddc_pin);
2061         if (!ddc)
2062                 return NULL;
2063
2064         return drm_edid_read_ddc(connector, ddc);
2065 }
2066
2067 static enum drm_connector_status
2068 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
2069 {
2070         enum drm_connector_status status;
2071         const struct drm_edid *drm_edid;
2072
2073         drm_edid = intel_sdvo_get_edid(connector);
2074
2075         /*
2076          * When there is no edid and no monitor is connected with VGA
2077          * port, try to use the CRT ddc to read the EDID for DVI-connector.
2078          */
2079         if (!drm_edid)
2080                 drm_edid = intel_sdvo_get_analog_edid(connector);
2081
2082         status = connector_status_unknown;
2083         if (drm_edid) {
2084                 /* DDC bus is shared, match EDID to connector type */
2085                 if (drm_edid_is_digital(drm_edid))
2086                         status = connector_status_connected;
2087                 else
2088                         status = connector_status_disconnected;
2089                 drm_edid_free(drm_edid);
2090         }
2091
2092         return status;
2093 }
2094
2095 static bool
2096 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
2097                                   const struct drm_edid *drm_edid)
2098 {
2099         bool monitor_is_digital = drm_edid_is_digital(drm_edid);
2100         bool connector_is_digital = !!IS_DIGITAL(sdvo);
2101
2102         DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
2103                       connector_is_digital, monitor_is_digital);
2104         return connector_is_digital == monitor_is_digital;
2105 }
2106
2107 static enum drm_connector_status
2108 intel_sdvo_detect(struct drm_connector *connector, bool force)
2109 {
2110         struct drm_i915_private *i915 = to_i915(connector->dev);
2111         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2112         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2113         enum drm_connector_status ret;
2114         u16 response;
2115
2116         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2117                       connector->base.id, connector->name);
2118
2119         if (!INTEL_DISPLAY_ENABLED(i915))
2120                 return connector_status_disconnected;
2121
2122         if (!intel_sdvo_set_target_output(intel_sdvo,
2123                                           intel_sdvo_connector->output_flag))
2124                 return connector_status_unknown;
2125
2126         if (!intel_sdvo_get_value(intel_sdvo,
2127                                   SDVO_CMD_GET_ATTACHED_DISPLAYS,
2128                                   &response, 2))
2129                 return connector_status_unknown;
2130
2131         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
2132                       response & 0xff, response >> 8,
2133                       intel_sdvo_connector->output_flag);
2134
2135         if (response == 0)
2136                 return connector_status_disconnected;
2137
2138         if ((intel_sdvo_connector->output_flag & response) == 0)
2139                 ret = connector_status_disconnected;
2140         else if (IS_TMDS(intel_sdvo_connector))
2141                 ret = intel_sdvo_tmds_sink_detect(connector);
2142         else {
2143                 const struct drm_edid *drm_edid;
2144
2145                 /* if we have an edid check it matches the connection */
2146                 drm_edid = intel_sdvo_get_edid(connector);
2147                 if (!drm_edid)
2148                         drm_edid = intel_sdvo_get_analog_edid(connector);
2149                 if (drm_edid) {
2150                         if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
2151                                                               drm_edid))
2152                                 ret = connector_status_connected;
2153                         else
2154                                 ret = connector_status_disconnected;
2155
2156                         drm_edid_free(drm_edid);
2157                 } else {
2158                         ret = connector_status_connected;
2159                 }
2160         }
2161
2162         return ret;
2163 }
2164
2165 static int intel_sdvo_get_ddc_modes(struct drm_connector *connector)
2166 {
2167         int num_modes = 0;
2168         const struct drm_edid *drm_edid;
2169
2170         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2171                       connector->base.id, connector->name);
2172
2173         /* set the bus switch and get the modes */
2174         drm_edid = intel_sdvo_get_edid(connector);
2175
2176         /*
2177          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
2178          * link between analog and digital outputs. So, if the regular SDVO
2179          * DDC fails, check to see if the analog output is disconnected, in
2180          * which case we'll look there for the digital DDC data.
2181          */
2182         if (!drm_edid)
2183                 drm_edid = intel_sdvo_get_analog_edid(connector);
2184
2185         if (!drm_edid)
2186                 return 0;
2187
2188         if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
2189                                               drm_edid))
2190                 num_modes += intel_connector_update_modes(connector, drm_edid);
2191
2192         drm_edid_free(drm_edid);
2193
2194         return num_modes;
2195 }
2196
2197 /*
2198  * Set of SDVO TV modes.
2199  * Note!  This is in reply order (see loop in get_tv_modes).
2200  * XXX: all 60Hz refresh?
2201  */
2202 static const struct drm_display_mode sdvo_tv_modes[] = {
2203         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
2204                    416, 0, 200, 201, 232, 233, 0,
2205                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2206         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
2207                    416, 0, 240, 241, 272, 273, 0,
2208                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2209         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
2210                    496, 0, 300, 301, 332, 333, 0,
2211                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2212         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
2213                    736, 0, 350, 351, 382, 383, 0,
2214                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2215         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
2216                    736, 0, 400, 401, 432, 433, 0,
2217                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2218         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
2219                    736, 0, 480, 481, 512, 513, 0,
2220                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2221         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
2222                    800, 0, 480, 481, 512, 513, 0,
2223                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2224         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
2225                    800, 0, 576, 577, 608, 609, 0,
2226                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2227         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
2228                    816, 0, 350, 351, 382, 383, 0,
2229                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2230         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
2231                    816, 0, 400, 401, 432, 433, 0,
2232                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2233         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
2234                    816, 0, 480, 481, 512, 513, 0,
2235                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2236         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
2237                    816, 0, 540, 541, 572, 573, 0,
2238                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2239         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
2240                    816, 0, 576, 577, 608, 609, 0,
2241                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2242         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
2243                    864, 0, 576, 577, 608, 609, 0,
2244                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2245         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
2246                    896, 0, 600, 601, 632, 633, 0,
2247                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2248         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
2249                    928, 0, 624, 625, 656, 657, 0,
2250                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2251         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
2252                    1016, 0, 766, 767, 798, 799, 0,
2253                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2254         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
2255                    1120, 0, 768, 769, 800, 801, 0,
2256                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2257         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
2258                    1376, 0, 1024, 1025, 1056, 1057, 0,
2259                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
2260 };
2261
2262 static int intel_sdvo_get_tv_modes(struct drm_connector *connector)
2263 {
2264         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(to_intel_connector(connector));
2265         struct intel_sdvo_connector *intel_sdvo_connector =
2266                 to_intel_sdvo_connector(connector);
2267         const struct drm_connector_state *conn_state = connector->state;
2268         struct intel_sdvo_sdtv_resolution_request tv_res;
2269         u32 reply = 0, format_map = 0;
2270         int num_modes = 0;
2271         int i;
2272
2273         DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
2274                       connector->base.id, connector->name);
2275
2276         /*
2277          * Read the list of supported input resolutions for the selected TV
2278          * format.
2279          */
2280         format_map = 1 << conn_state->tv.mode;
2281         memcpy(&tv_res, &format_map,
2282                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
2283
2284         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo_connector->output_flag))
2285                 return 0;
2286
2287         BUILD_BUG_ON(sizeof(tv_res) != 3);
2288         if (!intel_sdvo_write_cmd(intel_sdvo,
2289                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
2290                                   &tv_res, sizeof(tv_res)))
2291                 return 0;
2292         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
2293                 return 0;
2294
2295         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++) {
2296                 if (reply & (1 << i)) {
2297                         struct drm_display_mode *nmode;
2298                         nmode = drm_mode_duplicate(connector->dev,
2299                                                    &sdvo_tv_modes[i]);
2300                         if (nmode) {
2301                                 drm_mode_probed_add(connector, nmode);
2302                                 num_modes++;
2303                         }
2304                 }
2305         }
2306
2307         return num_modes;
2308 }
2309
2310 static int intel_sdvo_get_lvds_modes(struct drm_connector *connector)
2311 {
2312         struct drm_i915_private *dev_priv = to_i915(connector->dev);
2313
2314         drm_dbg_kms(&dev_priv->drm, "[CONNECTOR:%d:%s]\n",
2315                     connector->base.id, connector->name);
2316
2317         return intel_panel_get_modes(to_intel_connector(connector));
2318 }
2319
2320 static int intel_sdvo_get_modes(struct drm_connector *connector)
2321 {
2322         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2323
2324         if (IS_TV(intel_sdvo_connector))
2325                 return intel_sdvo_get_tv_modes(connector);
2326         else if (IS_LVDS(intel_sdvo_connector))
2327                 return intel_sdvo_get_lvds_modes(connector);
2328         else
2329                 return intel_sdvo_get_ddc_modes(connector);
2330 }
2331
2332 static int
2333 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2334                                          const struct drm_connector_state *state,
2335                                          struct drm_property *property,
2336                                          u64 *val)
2337 {
2338         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2339         const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2340
2341         if (property == intel_sdvo_connector->tv_format) {
2342                 int i;
2343
2344                 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2345                         if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2346                                 *val = i;
2347
2348                                 return 0;
2349                         }
2350
2351                 drm_WARN_ON(connector->dev, 1);
2352                 *val = 0;
2353         } else if (property == intel_sdvo_connector->top ||
2354                    property == intel_sdvo_connector->bottom)
2355                 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2356         else if (property == intel_sdvo_connector->left ||
2357                  property == intel_sdvo_connector->right)
2358                 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2359         else if (property == intel_sdvo_connector->hpos)
2360                 *val = sdvo_state->tv.hpos;
2361         else if (property == intel_sdvo_connector->vpos)
2362                 *val = sdvo_state->tv.vpos;
2363         else if (property == intel_sdvo_connector->saturation)
2364                 *val = state->tv.saturation;
2365         else if (property == intel_sdvo_connector->contrast)
2366                 *val = state->tv.contrast;
2367         else if (property == intel_sdvo_connector->hue)
2368                 *val = state->tv.hue;
2369         else if (property == intel_sdvo_connector->brightness)
2370                 *val = state->tv.brightness;
2371         else if (property == intel_sdvo_connector->sharpness)
2372                 *val = sdvo_state->tv.sharpness;
2373         else if (property == intel_sdvo_connector->flicker_filter)
2374                 *val = sdvo_state->tv.flicker_filter;
2375         else if (property == intel_sdvo_connector->flicker_filter_2d)
2376                 *val = sdvo_state->tv.flicker_filter_2d;
2377         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2378                 *val = sdvo_state->tv.flicker_filter_adaptive;
2379         else if (property == intel_sdvo_connector->tv_chroma_filter)
2380                 *val = sdvo_state->tv.chroma_filter;
2381         else if (property == intel_sdvo_connector->tv_luma_filter)
2382                 *val = sdvo_state->tv.luma_filter;
2383         else if (property == intel_sdvo_connector->dot_crawl)
2384                 *val = sdvo_state->tv.dot_crawl;
2385         else
2386                 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2387
2388         return 0;
2389 }
2390
2391 static int
2392 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2393                                          struct drm_connector_state *state,
2394                                          struct drm_property *property,
2395                                          u64 val)
2396 {
2397         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2398         struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2399
2400         if (property == intel_sdvo_connector->tv_format) {
2401                 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2402
2403                 if (state->crtc) {
2404                         struct drm_crtc_state *crtc_state =
2405                                 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2406
2407                         crtc_state->connectors_changed = true;
2408                 }
2409         } else if (property == intel_sdvo_connector->top ||
2410                    property == intel_sdvo_connector->bottom)
2411                 /* Cannot set these independent from each other */
2412                 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2413         else if (property == intel_sdvo_connector->left ||
2414                  property == intel_sdvo_connector->right)
2415                 /* Cannot set these independent from each other */
2416                 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2417         else if (property == intel_sdvo_connector->hpos)
2418                 sdvo_state->tv.hpos = val;
2419         else if (property == intel_sdvo_connector->vpos)
2420                 sdvo_state->tv.vpos = val;
2421         else if (property == intel_sdvo_connector->saturation)
2422                 state->tv.saturation = val;
2423         else if (property == intel_sdvo_connector->contrast)
2424                 state->tv.contrast = val;
2425         else if (property == intel_sdvo_connector->hue)
2426                 state->tv.hue = val;
2427         else if (property == intel_sdvo_connector->brightness)
2428                 state->tv.brightness = val;
2429         else if (property == intel_sdvo_connector->sharpness)
2430                 sdvo_state->tv.sharpness = val;
2431         else if (property == intel_sdvo_connector->flicker_filter)
2432                 sdvo_state->tv.flicker_filter = val;
2433         else if (property == intel_sdvo_connector->flicker_filter_2d)
2434                 sdvo_state->tv.flicker_filter_2d = val;
2435         else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2436                 sdvo_state->tv.flicker_filter_adaptive = val;
2437         else if (property == intel_sdvo_connector->tv_chroma_filter)
2438                 sdvo_state->tv.chroma_filter = val;
2439         else if (property == intel_sdvo_connector->tv_luma_filter)
2440                 sdvo_state->tv.luma_filter = val;
2441         else if (property == intel_sdvo_connector->dot_crawl)
2442                 sdvo_state->tv.dot_crawl = val;
2443         else
2444                 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2445
2446         return 0;
2447 }
2448
2449 static struct drm_connector_state *
2450 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2451 {
2452         struct intel_sdvo_connector_state *state;
2453
2454         state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2455         if (!state)
2456                 return NULL;
2457
2458         __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2459         return &state->base.base;
2460 }
2461
2462 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2463         .detect = intel_sdvo_detect,
2464         .fill_modes = drm_helper_probe_single_connector_modes,
2465         .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2466         .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2467         .late_register = intel_connector_register,
2468         .early_unregister = intel_connector_unregister,
2469         .destroy = intel_connector_destroy,
2470         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2471         .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2472 };
2473
2474 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2475                                    struct drm_atomic_state *state)
2476 {
2477         struct drm_connector_state *new_conn_state =
2478                 drm_atomic_get_new_connector_state(state, conn);
2479         struct drm_connector_state *old_conn_state =
2480                 drm_atomic_get_old_connector_state(state, conn);
2481         struct intel_sdvo_connector_state *old_state =
2482                 to_intel_sdvo_connector_state(old_conn_state);
2483         struct intel_sdvo_connector_state *new_state =
2484                 to_intel_sdvo_connector_state(new_conn_state);
2485
2486         if (new_conn_state->crtc &&
2487             (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2488              memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2489                 struct drm_crtc_state *crtc_state =
2490                         drm_atomic_get_new_crtc_state(state,
2491                                                       new_conn_state->crtc);
2492
2493                 crtc_state->connectors_changed = true;
2494         }
2495
2496         return intel_digital_connector_atomic_check(conn, state);
2497 }
2498
2499 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2500         .get_modes = intel_sdvo_get_modes,
2501         .mode_valid = intel_sdvo_mode_valid,
2502         .atomic_check = intel_sdvo_atomic_check,
2503 };
2504
2505 static void intel_sdvo_encoder_destroy(struct drm_encoder *_encoder)
2506 {
2507         struct intel_encoder *encoder = to_intel_encoder(_encoder);
2508         struct intel_sdvo *sdvo = to_sdvo(encoder);
2509         int i;
2510
2511         for (i = 0; i < ARRAY_SIZE(sdvo->ddc); i++) {
2512                 if (sdvo->ddc[i].ddc_bus)
2513                         i2c_del_adapter(&sdvo->ddc[i].ddc);
2514         }
2515
2516         drm_encoder_cleanup(&encoder->base);
2517         kfree(sdvo);
2518 };
2519
2520 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2521         .destroy = intel_sdvo_encoder_destroy,
2522 };
2523
2524 static int
2525 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo,
2526                          struct intel_sdvo_connector *connector)
2527 {
2528         u16 mask = 0;
2529         int num_bits;
2530
2531         /*
2532          * Make a mask of outputs less than or equal to our own priority in the
2533          * list.
2534          */
2535         switch (connector->output_flag) {
2536         case SDVO_OUTPUT_LVDS1:
2537                 mask |= SDVO_OUTPUT_LVDS1;
2538                 fallthrough;
2539         case SDVO_OUTPUT_LVDS0:
2540                 mask |= SDVO_OUTPUT_LVDS0;
2541                 fallthrough;
2542         case SDVO_OUTPUT_TMDS1:
2543                 mask |= SDVO_OUTPUT_TMDS1;
2544                 fallthrough;
2545         case SDVO_OUTPUT_TMDS0:
2546                 mask |= SDVO_OUTPUT_TMDS0;
2547                 fallthrough;
2548         case SDVO_OUTPUT_RGB1:
2549                 mask |= SDVO_OUTPUT_RGB1;
2550                 fallthrough;
2551         case SDVO_OUTPUT_RGB0:
2552                 mask |= SDVO_OUTPUT_RGB0;
2553                 break;
2554         }
2555
2556         /* Count bits to find what number we are in the priority list. */
2557         mask &= sdvo->caps.output_flags;
2558         num_bits = hweight16(mask);
2559         /* If more than 3 outputs, default to DDC bus 3 for now. */
2560         if (num_bits > 3)
2561                 num_bits = 3;
2562
2563         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2564         return num_bits;
2565 }
2566
2567 /*
2568  * Choose the appropriate DDC bus for control bus switch command for this
2569  * SDVO output based on the controlled output.
2570  *
2571  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2572  * outputs, then LVDS outputs.
2573  */
2574 static struct intel_sdvo_ddc *
2575 intel_sdvo_select_ddc_bus(struct intel_sdvo *sdvo,
2576                           struct intel_sdvo_connector *connector)
2577 {
2578         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2579         struct sdvo_device_mapping *mapping;
2580         int ddc_bus;
2581
2582         if (sdvo->base.port == PORT_B)
2583                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2584         else
2585                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2586
2587         if (mapping->initialized)
2588                 ddc_bus = (mapping->ddc_pin & 0xf0) >> 4;
2589         else
2590                 ddc_bus = intel_sdvo_guess_ddc_bus(sdvo, connector);
2591
2592         if (ddc_bus < 1 || ddc_bus > 3)
2593                 return NULL;
2594
2595         return &sdvo->ddc[ddc_bus - 1];
2596 }
2597
2598 static void
2599 intel_sdvo_select_i2c_bus(struct intel_sdvo *sdvo)
2600 {
2601         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2602         struct sdvo_device_mapping *mapping;
2603         u8 pin;
2604
2605         if (sdvo->base.port == PORT_B)
2606                 mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2607         else
2608                 mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2609
2610         if (mapping->initialized &&
2611             intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2612                 pin = mapping->i2c_pin;
2613         else
2614                 pin = GMBUS_PIN_DPB;
2615
2616         drm_dbg_kms(&dev_priv->drm, "[ENCODER:%d:%s] I2C pin %d, slave addr 0x%x\n",
2617                     sdvo->base.base.base.id, sdvo->base.base.name,
2618                     pin, sdvo->slave_addr);
2619
2620         sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2621
2622         /*
2623          * With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2624          * our code totally fails once we start using gmbus. Hence fall back to
2625          * bit banging for now.
2626          */
2627         intel_gmbus_force_bit(sdvo->i2c, true);
2628 }
2629
2630 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2631 static void
2632 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2633 {
2634         intel_gmbus_force_bit(sdvo->i2c, false);
2635 }
2636
2637 static bool
2638 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo)
2639 {
2640         return intel_sdvo_check_supp_encode(intel_sdvo);
2641 }
2642
2643 static u8
2644 intel_sdvo_get_slave_addr(struct intel_sdvo *sdvo)
2645 {
2646         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
2647         struct sdvo_device_mapping *my_mapping, *other_mapping;
2648
2649         if (sdvo->base.port == PORT_B) {
2650                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2651                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2652         } else {
2653                 my_mapping = &dev_priv->display.vbt.sdvo_mappings[1];
2654                 other_mapping = &dev_priv->display.vbt.sdvo_mappings[0];
2655         }
2656
2657         /* If the BIOS described our SDVO device, take advantage of it. */
2658         if (my_mapping->slave_addr)
2659                 return my_mapping->slave_addr;
2660
2661         /*
2662          * If the BIOS only described a different SDVO device, use the
2663          * address that it isn't using.
2664          */
2665         if (other_mapping->slave_addr) {
2666                 if (other_mapping->slave_addr == 0x70)
2667                         return 0x72;
2668                 else
2669                         return 0x70;
2670         }
2671
2672         /*
2673          * No SDVO device info is found for another DVO port,
2674          * so use mapping assumption we had before BIOS parsing.
2675          */
2676         if (sdvo->base.port == PORT_B)
2677                 return 0x70;
2678         else
2679                 return 0x72;
2680 }
2681
2682 static int
2683 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
2684                           struct intel_sdvo *sdvo, int bit);
2685
2686 static int
2687 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2688                           struct intel_sdvo *encoder)
2689 {
2690         struct drm_i915_private *i915 = to_i915(encoder->base.base.dev);
2691         struct intel_sdvo_ddc *ddc = NULL;
2692         int ret;
2693
2694         if (HAS_DDC(connector))
2695                 ddc = intel_sdvo_select_ddc_bus(encoder, connector);
2696
2697         ret = drm_connector_init_with_ddc(encoder->base.base.dev,
2698                                           &connector->base.base,
2699                                           &intel_sdvo_connector_funcs,
2700                                           connector->base.base.connector_type,
2701                                           ddc ? &ddc->ddc : NULL);
2702         if (ret < 0)
2703                 return ret;
2704
2705         drm_connector_helper_add(&connector->base.base,
2706                                  &intel_sdvo_connector_helper_funcs);
2707
2708         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2709         connector->base.base.interlace_allowed = true;
2710         connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2711
2712         intel_connector_attach_encoder(&connector->base, &encoder->base);
2713
2714         if (ddc)
2715                 drm_dbg_kms(&i915->drm, "[CONNECTOR:%d:%s] using %s\n",
2716                             connector->base.base.base.id, connector->base.base.name,
2717                             ddc->ddc.name);
2718
2719         return 0;
2720 }
2721
2722 static void
2723 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2724                                struct intel_sdvo_connector *connector)
2725 {
2726         intel_attach_force_audio_property(&connector->base.base);
2727         if (intel_sdvo->colorimetry_cap & SDVO_COLORIMETRY_RGB220)
2728                 intel_attach_broadcast_rgb_property(&connector->base.base);
2729         intel_attach_aspect_ratio_property(&connector->base.base);
2730 }
2731
2732 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2733 {
2734         struct intel_sdvo_connector *sdvo_connector;
2735         struct intel_sdvo_connector_state *conn_state;
2736
2737         sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2738         if (!sdvo_connector)
2739                 return NULL;
2740
2741         conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2742         if (!conn_state) {
2743                 kfree(sdvo_connector);
2744                 return NULL;
2745         }
2746
2747         __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2748                                             &conn_state->base.base);
2749
2750         intel_panel_init_alloc(&sdvo_connector->base);
2751
2752         return sdvo_connector;
2753 }
2754
2755 static bool
2756 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, u16 type)
2757 {
2758         struct drm_encoder *encoder = &intel_sdvo->base.base;
2759         struct drm_connector *connector;
2760         struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2761         struct intel_connector *intel_connector;
2762         struct intel_sdvo_connector *intel_sdvo_connector;
2763
2764         DRM_DEBUG_KMS("initialising DVI type 0x%x\n", type);
2765
2766         intel_sdvo_connector = intel_sdvo_connector_alloc();
2767         if (!intel_sdvo_connector)
2768                 return false;
2769
2770         intel_sdvo_connector->output_flag = type;
2771
2772         intel_connector = &intel_sdvo_connector->base;
2773         connector = &intel_connector->base;
2774         if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2775                 intel_sdvo_connector->output_flag) {
2776                 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2777                 /*
2778                  * Some SDVO devices have one-shot hotplug interrupts.
2779                  * Ensure that they get re-enabled when an interrupt happens.
2780                  */
2781                 intel_connector->polled = DRM_CONNECTOR_POLL_HPD;
2782                 intel_encoder->hotplug = intel_sdvo_hotplug;
2783                 intel_sdvo_enable_hotplug(intel_encoder);
2784         } else {
2785                 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2786         }
2787         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2788         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2789
2790         if (intel_sdvo_is_hdmi_connector(intel_sdvo)) {
2791                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2792                 intel_sdvo_connector->is_hdmi = true;
2793         }
2794
2795         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2796                 kfree(intel_sdvo_connector);
2797                 return false;
2798         }
2799
2800         if (intel_sdvo_connector->is_hdmi)
2801                 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2802
2803         return true;
2804 }
2805
2806 static bool
2807 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, u16 type)
2808 {
2809         struct drm_encoder *encoder = &intel_sdvo->base.base;
2810         struct drm_connector *connector;
2811         struct intel_connector *intel_connector;
2812         struct intel_sdvo_connector *intel_sdvo_connector;
2813
2814         DRM_DEBUG_KMS("initialising TV type 0x%x\n", type);
2815
2816         intel_sdvo_connector = intel_sdvo_connector_alloc();
2817         if (!intel_sdvo_connector)
2818                 return false;
2819
2820         intel_connector = &intel_sdvo_connector->base;
2821         connector = &intel_connector->base;
2822         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2823         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2824
2825         intel_sdvo_connector->output_flag = type;
2826
2827         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2828                 kfree(intel_sdvo_connector);
2829                 return false;
2830         }
2831
2832         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2833                 goto err;
2834
2835         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2836                 goto err;
2837
2838         return true;
2839
2840 err:
2841         intel_connector_destroy(connector);
2842         return false;
2843 }
2844
2845 static bool
2846 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, u16 type)
2847 {
2848         struct drm_encoder *encoder = &intel_sdvo->base.base;
2849         struct drm_connector *connector;
2850         struct intel_connector *intel_connector;
2851         struct intel_sdvo_connector *intel_sdvo_connector;
2852
2853         DRM_DEBUG_KMS("initialising analog type 0x%x\n", type);
2854
2855         intel_sdvo_connector = intel_sdvo_connector_alloc();
2856         if (!intel_sdvo_connector)
2857                 return false;
2858
2859         intel_connector = &intel_sdvo_connector->base;
2860         connector = &intel_connector->base;
2861         intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2862         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2863         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2864
2865         intel_sdvo_connector->output_flag = type;
2866
2867         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2868                 kfree(intel_sdvo_connector);
2869                 return false;
2870         }
2871
2872         return true;
2873 }
2874
2875 static bool
2876 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, u16 type)
2877 {
2878         struct drm_encoder *encoder = &intel_sdvo->base.base;
2879         struct drm_i915_private *i915 = to_i915(encoder->dev);
2880         struct drm_connector *connector;
2881         struct intel_connector *intel_connector;
2882         struct intel_sdvo_connector *intel_sdvo_connector;
2883
2884         DRM_DEBUG_KMS("initialising LVDS type 0x%x\n", type);
2885
2886         intel_sdvo_connector = intel_sdvo_connector_alloc();
2887         if (!intel_sdvo_connector)
2888                 return false;
2889
2890         intel_connector = &intel_sdvo_connector->base;
2891         connector = &intel_connector->base;
2892         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2893         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2894
2895         intel_sdvo_connector->output_flag = type;
2896
2897         if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2898                 kfree(intel_sdvo_connector);
2899                 return false;
2900         }
2901
2902         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2903                 goto err;
2904
2905         intel_bios_init_panel_late(i915, &intel_connector->panel, NULL, NULL);
2906
2907         /*
2908          * Fetch modes from VBT. For SDVO prefer the VBT mode since some
2909          * SDVO->LVDS transcoders can't cope with the EDID mode.
2910          */
2911         intel_panel_add_vbt_sdvo_fixed_mode(intel_connector);
2912
2913         if (!intel_panel_preferred_fixed_mode(intel_connector)) {
2914                 mutex_lock(&i915->drm.mode_config.mutex);
2915
2916                 intel_ddc_get_modes(connector, connector->ddc);
2917                 intel_panel_add_edid_fixed_modes(intel_connector, false);
2918
2919                 mutex_unlock(&i915->drm.mode_config.mutex);
2920         }
2921
2922         intel_panel_init(intel_connector, NULL);
2923
2924         if (!intel_panel_preferred_fixed_mode(intel_connector))
2925                 goto err;
2926
2927         return true;
2928
2929 err:
2930         intel_connector_destroy(connector);
2931         return false;
2932 }
2933
2934 static u16 intel_sdvo_filter_output_flags(u16 flags)
2935 {
2936         flags &= SDVO_OUTPUT_MASK;
2937
2938         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2939         if (!(flags & SDVO_OUTPUT_TMDS0))
2940                 flags &= ~SDVO_OUTPUT_TMDS1;
2941
2942         if (!(flags & SDVO_OUTPUT_RGB0))
2943                 flags &= ~SDVO_OUTPUT_RGB1;
2944
2945         if (!(flags & SDVO_OUTPUT_LVDS0))
2946                 flags &= ~SDVO_OUTPUT_LVDS1;
2947
2948         return flags;
2949 }
2950
2951 static bool intel_sdvo_output_init(struct intel_sdvo *sdvo, u16 type)
2952 {
2953         if (type & SDVO_TMDS_MASK)
2954                 return intel_sdvo_dvi_init(sdvo, type);
2955         else if (type & SDVO_TV_MASK)
2956                 return intel_sdvo_tv_init(sdvo, type);
2957         else if (type & SDVO_RGB_MASK)
2958                 return intel_sdvo_analog_init(sdvo, type);
2959         else if (type & SDVO_LVDS_MASK)
2960                 return intel_sdvo_lvds_init(sdvo, type);
2961         else
2962                 return false;
2963 }
2964
2965 static bool
2966 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo)
2967 {
2968         static const u16 probe_order[] = {
2969                 SDVO_OUTPUT_TMDS0,
2970                 SDVO_OUTPUT_TMDS1,
2971                 /* TV has no XXX1 function block */
2972                 SDVO_OUTPUT_SVID0,
2973                 SDVO_OUTPUT_CVBS0,
2974                 SDVO_OUTPUT_YPRPB0,
2975                 SDVO_OUTPUT_RGB0,
2976                 SDVO_OUTPUT_RGB1,
2977                 SDVO_OUTPUT_LVDS0,
2978                 SDVO_OUTPUT_LVDS1,
2979         };
2980         u16 flags;
2981         int i;
2982
2983         flags = intel_sdvo_filter_output_flags(intel_sdvo->caps.output_flags);
2984
2985         if (flags == 0) {
2986                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%04x)\n",
2987                               SDVO_NAME(intel_sdvo), intel_sdvo->caps.output_flags);
2988                 return false;
2989         }
2990
2991         for (i = 0; i < ARRAY_SIZE(probe_order); i++) {
2992                 u16 type = flags & probe_order[i];
2993
2994                 if (!type)
2995                         continue;
2996
2997                 if (!intel_sdvo_output_init(intel_sdvo, type))
2998                         return false;
2999         }
3000
3001         intel_sdvo->base.pipe_mask = ~0;
3002
3003         return true;
3004 }
3005
3006 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
3007 {
3008         struct drm_device *dev = intel_sdvo->base.base.dev;
3009         struct drm_connector *connector, *tmp;
3010
3011         list_for_each_entry_safe(connector, tmp,
3012                                  &dev->mode_config.connector_list, head) {
3013                 if (intel_attached_encoder(to_intel_connector(connector)) == &intel_sdvo->base) {
3014                         drm_connector_unregister(connector);
3015                         intel_connector_destroy(connector);
3016                 }
3017         }
3018 }
3019
3020 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
3021                                           struct intel_sdvo_connector *intel_sdvo_connector,
3022                                           int type)
3023 {
3024         struct drm_device *dev = intel_sdvo->base.base.dev;
3025         struct intel_sdvo_tv_format format;
3026         u32 format_map, i;
3027
3028         if (!intel_sdvo_set_target_output(intel_sdvo, type))
3029                 return false;
3030
3031         BUILD_BUG_ON(sizeof(format) != 6);
3032         if (!intel_sdvo_get_value(intel_sdvo,
3033                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
3034                                   &format, sizeof(format)))
3035                 return false;
3036
3037         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
3038
3039         if (format_map == 0)
3040                 return false;
3041
3042         intel_sdvo_connector->format_supported_num = 0;
3043         for (i = 0 ; i < TV_FORMAT_NUM; i++)
3044                 if (format_map & (1 << i))
3045                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
3046
3047
3048         intel_sdvo_connector->tv_format =
3049                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
3050                                             "mode", intel_sdvo_connector->format_supported_num);
3051         if (!intel_sdvo_connector->tv_format)
3052                 return false;
3053
3054         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
3055                 drm_property_add_enum(intel_sdvo_connector->tv_format, i,
3056                                       tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
3057
3058         intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
3059         drm_object_attach_property(&intel_sdvo_connector->base.base.base,
3060                                    intel_sdvo_connector->tv_format, 0);
3061         return true;
3062
3063 }
3064
3065 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
3066         if (enhancements.name) { \
3067                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
3068                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
3069                         return false; \
3070                 intel_sdvo_connector->name = \
3071                         drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
3072                 if (!intel_sdvo_connector->name) return false; \
3073                 state_assignment = response; \
3074                 drm_object_attach_property(&connector->base, \
3075                                            intel_sdvo_connector->name, 0); \
3076                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
3077                               data_value[0], data_value[1], response); \
3078         } \
3079 } while (0)
3080
3081 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
3082
3083 static bool
3084 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
3085                                       struct intel_sdvo_connector *intel_sdvo_connector,
3086                                       struct intel_sdvo_enhancements_reply enhancements)
3087 {
3088         struct drm_device *dev = intel_sdvo->base.base.dev;
3089         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3090         struct drm_connector_state *conn_state = connector->state;
3091         struct intel_sdvo_connector_state *sdvo_state =
3092                 to_intel_sdvo_connector_state(conn_state);
3093         u16 response, data_value[2];
3094
3095         /* when horizontal overscan is supported, Add the left/right property */
3096         if (enhancements.overscan_h) {
3097                 if (!intel_sdvo_get_value(intel_sdvo,
3098                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
3099                                           &data_value, 4))
3100                         return false;
3101
3102                 if (!intel_sdvo_get_value(intel_sdvo,
3103                                           SDVO_CMD_GET_OVERSCAN_H,
3104                                           &response, 2))
3105                         return false;
3106
3107                 sdvo_state->tv.overscan_h = response;
3108
3109                 intel_sdvo_connector->max_hscan = data_value[0];
3110                 intel_sdvo_connector->left =
3111                         drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
3112                 if (!intel_sdvo_connector->left)
3113                         return false;
3114
3115                 drm_object_attach_property(&connector->base,
3116                                            intel_sdvo_connector->left, 0);
3117
3118                 intel_sdvo_connector->right =
3119                         drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
3120                 if (!intel_sdvo_connector->right)
3121                         return false;
3122
3123                 drm_object_attach_property(&connector->base,
3124                                               intel_sdvo_connector->right, 0);
3125                 DRM_DEBUG_KMS("h_overscan: max %d, "
3126                               "default %d, current %d\n",
3127                               data_value[0], data_value[1], response);
3128         }
3129
3130         if (enhancements.overscan_v) {
3131                 if (!intel_sdvo_get_value(intel_sdvo,
3132                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
3133                                           &data_value, 4))
3134                         return false;
3135
3136                 if (!intel_sdvo_get_value(intel_sdvo,
3137                                           SDVO_CMD_GET_OVERSCAN_V,
3138                                           &response, 2))
3139                         return false;
3140
3141                 sdvo_state->tv.overscan_v = response;
3142
3143                 intel_sdvo_connector->max_vscan = data_value[0];
3144                 intel_sdvo_connector->top =
3145                         drm_property_create_range(dev, 0,
3146                                             "top_margin", 0, data_value[0]);
3147                 if (!intel_sdvo_connector->top)
3148                         return false;
3149
3150                 drm_object_attach_property(&connector->base,
3151                                            intel_sdvo_connector->top, 0);
3152
3153                 intel_sdvo_connector->bottom =
3154                         drm_property_create_range(dev, 0,
3155                                             "bottom_margin", 0, data_value[0]);
3156                 if (!intel_sdvo_connector->bottom)
3157                         return false;
3158
3159                 drm_object_attach_property(&connector->base,
3160                                               intel_sdvo_connector->bottom, 0);
3161                 DRM_DEBUG_KMS("v_overscan: max %d, "
3162                               "default %d, current %d\n",
3163                               data_value[0], data_value[1], response);
3164         }
3165
3166         ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
3167         ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
3168         ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
3169         ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
3170         ENHANCEMENT(&conn_state->tv, hue, HUE);
3171         ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
3172         ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
3173         ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
3174         ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
3175         ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
3176         _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
3177         _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
3178
3179         if (enhancements.dot_crawl) {
3180                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
3181                         return false;
3182
3183                 sdvo_state->tv.dot_crawl = response & 0x1;
3184                 intel_sdvo_connector->dot_crawl =
3185                         drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
3186                 if (!intel_sdvo_connector->dot_crawl)
3187                         return false;
3188
3189                 drm_object_attach_property(&connector->base,
3190                                            intel_sdvo_connector->dot_crawl, 0);
3191                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
3192         }
3193
3194         return true;
3195 }
3196
3197 static bool
3198 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
3199                                         struct intel_sdvo_connector *intel_sdvo_connector,
3200                                         struct intel_sdvo_enhancements_reply enhancements)
3201 {
3202         struct drm_device *dev = intel_sdvo->base.base.dev;
3203         struct drm_connector *connector = &intel_sdvo_connector->base.base;
3204         u16 response, data_value[2];
3205
3206         ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
3207
3208         return true;
3209 }
3210 #undef ENHANCEMENT
3211 #undef _ENHANCEMENT
3212
3213 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
3214                                                struct intel_sdvo_connector *intel_sdvo_connector)
3215 {
3216         union {
3217                 struct intel_sdvo_enhancements_reply reply;
3218                 u16 response;
3219         } enhancements;
3220
3221         BUILD_BUG_ON(sizeof(enhancements) != 2);
3222
3223         if (!intel_sdvo_get_value(intel_sdvo,
3224                                   SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
3225                                   &enhancements, sizeof(enhancements)) ||
3226             enhancements.response == 0) {
3227                 DRM_DEBUG_KMS("No enhancement is supported\n");
3228                 return true;
3229         }
3230
3231         if (IS_TV(intel_sdvo_connector))
3232                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3233         else if (IS_LVDS(intel_sdvo_connector))
3234                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
3235         else
3236                 return true;
3237 }
3238
3239 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
3240                                      struct i2c_msg *msgs,
3241                                      int num)
3242 {
3243         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3244         struct intel_sdvo *sdvo = ddc->sdvo;
3245
3246         if (!__intel_sdvo_set_control_bus_switch(sdvo, 1 << ddc->ddc_bus))
3247                 return -EIO;
3248
3249         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
3250 }
3251
3252 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
3253 {
3254         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3255         struct intel_sdvo *sdvo = ddc->sdvo;
3256
3257         return sdvo->i2c->algo->functionality(sdvo->i2c);
3258 }
3259
3260 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
3261         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
3262         .functionality  = intel_sdvo_ddc_proxy_func
3263 };
3264
3265 static void proxy_lock_bus(struct i2c_adapter *adapter,
3266                            unsigned int flags)
3267 {
3268         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3269         struct intel_sdvo *sdvo = ddc->sdvo;
3270
3271         sdvo->i2c->lock_ops->lock_bus(sdvo->i2c, flags);
3272 }
3273
3274 static int proxy_trylock_bus(struct i2c_adapter *adapter,
3275                              unsigned int flags)
3276 {
3277         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3278         struct intel_sdvo *sdvo = ddc->sdvo;
3279
3280         return sdvo->i2c->lock_ops->trylock_bus(sdvo->i2c, flags);
3281 }
3282
3283 static void proxy_unlock_bus(struct i2c_adapter *adapter,
3284                              unsigned int flags)
3285 {
3286         struct intel_sdvo_ddc *ddc = adapter->algo_data;
3287         struct intel_sdvo *sdvo = ddc->sdvo;
3288
3289         sdvo->i2c->lock_ops->unlock_bus(sdvo->i2c, flags);
3290 }
3291
3292 static const struct i2c_lock_operations proxy_lock_ops = {
3293         .lock_bus =    proxy_lock_bus,
3294         .trylock_bus = proxy_trylock_bus,
3295         .unlock_bus =  proxy_unlock_bus,
3296 };
3297
3298 static int
3299 intel_sdvo_init_ddc_proxy(struct intel_sdvo_ddc *ddc,
3300                           struct intel_sdvo *sdvo, int ddc_bus)
3301 {
3302         struct drm_i915_private *dev_priv = to_i915(sdvo->base.base.dev);
3303         struct pci_dev *pdev = to_pci_dev(dev_priv->drm.dev);
3304
3305         ddc->sdvo = sdvo;
3306         ddc->ddc_bus = ddc_bus;
3307
3308         ddc->ddc.owner = THIS_MODULE;
3309         ddc->ddc.class = I2C_CLASS_DDC;
3310         snprintf(ddc->ddc.name, I2C_NAME_SIZE, "SDVO %c DDC%d",
3311                  port_name(sdvo->base.port), ddc_bus);
3312         ddc->ddc.dev.parent = &pdev->dev;
3313         ddc->ddc.algo_data = ddc;
3314         ddc->ddc.algo = &intel_sdvo_ddc_proxy;
3315         ddc->ddc.lock_ops = &proxy_lock_ops;
3316
3317         return i2c_add_adapter(&ddc->ddc);
3318 }
3319
3320 static bool is_sdvo_port_valid(struct drm_i915_private *dev_priv, enum port port)
3321 {
3322         if (HAS_PCH_SPLIT(dev_priv))
3323                 return port == PORT_B;
3324         else
3325                 return port == PORT_B || port == PORT_C;
3326 }
3327
3328 static bool assert_sdvo_port_valid(struct drm_i915_private *dev_priv,
3329                                    enum port port)
3330 {
3331         return !drm_WARN(&dev_priv->drm, !is_sdvo_port_valid(dev_priv, port),
3332                          "Platform does not support SDVO %c\n", port_name(port));
3333 }
3334
3335 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
3336                      i915_reg_t sdvo_reg, enum port port)
3337 {
3338         struct intel_encoder *intel_encoder;
3339         struct intel_sdvo *intel_sdvo;
3340         int i;
3341
3342         if (!assert_port_valid(dev_priv, port))
3343                 return false;
3344
3345         if (!assert_sdvo_port_valid(dev_priv, port))
3346                 return false;
3347
3348         intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
3349         if (!intel_sdvo)
3350                 return false;
3351
3352         /* encoder type will be decided later */
3353         intel_encoder = &intel_sdvo->base;
3354         intel_encoder->type = INTEL_OUTPUT_SDVO;
3355         intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
3356         intel_encoder->port = port;
3357
3358         drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
3359                          &intel_sdvo_enc_funcs, 0,
3360                          "SDVO %c", port_name(port));
3361
3362         intel_sdvo->sdvo_reg = sdvo_reg;
3363         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(intel_sdvo) >> 1;
3364
3365         intel_sdvo_select_i2c_bus(intel_sdvo);
3366
3367         /* Read the regs to test if we can talk to the device */
3368         for (i = 0; i < 0x40; i++) {
3369                 u8 byte;
3370
3371                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3372                         drm_dbg_kms(&dev_priv->drm,
3373                                     "No SDVO device found on %s\n",
3374                                     SDVO_NAME(intel_sdvo));
3375                         goto err;
3376                 }
3377         }
3378
3379         intel_encoder->compute_config = intel_sdvo_compute_config;
3380         if (HAS_PCH_SPLIT(dev_priv)) {
3381                 intel_encoder->disable = pch_disable_sdvo;
3382                 intel_encoder->post_disable = pch_post_disable_sdvo;
3383         } else {
3384                 intel_encoder->disable = intel_disable_sdvo;
3385         }
3386         intel_encoder->pre_enable = intel_sdvo_pre_enable;
3387         intel_encoder->enable = intel_enable_sdvo;
3388         intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3389         intel_encoder->get_config = intel_sdvo_get_config;
3390
3391         /* In default case sdvo lvds is false */
3392         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3393                 goto err;
3394
3395         intel_sdvo->colorimetry_cap =
3396                 intel_sdvo_get_colorimetry_cap(intel_sdvo);
3397
3398         for (i = 0; i < ARRAY_SIZE(intel_sdvo->ddc); i++) {
3399                 int ret;
3400
3401                 ret = intel_sdvo_init_ddc_proxy(&intel_sdvo->ddc[i],
3402                                                 intel_sdvo, i + 1);
3403                 if (ret)
3404                         goto err;
3405         }
3406
3407         if (!intel_sdvo_output_setup(intel_sdvo)) {
3408                 drm_dbg_kms(&dev_priv->drm,
3409                             "SDVO output failed to setup on %s\n",
3410                             SDVO_NAME(intel_sdvo));
3411                 /* Output_setup can leave behind connectors! */
3412                 goto err_output;
3413         }
3414
3415         /*
3416          * Only enable the hotplug irq if we need it, to work around noisy
3417          * hotplug lines.
3418          */
3419         if (intel_sdvo->hotplug_active) {
3420                 if (intel_sdvo->base.port == PORT_B)
3421                         intel_encoder->hpd_pin = HPD_SDVO_B;
3422                 else
3423                         intel_encoder->hpd_pin = HPD_SDVO_C;
3424         }
3425
3426         /*
3427          * Cloning SDVO with anything is often impossible, since the SDVO
3428          * encoder can request a special input timing mode. And even if that's
3429          * not the case we have evidence that cloning a plain unscaled mode with
3430          * VGA doesn't really work. Furthermore the cloning flags are way too
3431          * simplistic anyway to express such constraints, so just give up on
3432          * cloning for SDVO encoders.
3433          */
3434         intel_sdvo->base.cloneable = 0;
3435
3436         /* Set the input timing to the screen. Assume always input 0. */
3437         if (!intel_sdvo_set_target_input(intel_sdvo))
3438                 goto err_output;
3439
3440         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3441                                                     &intel_sdvo->pixel_clock_min,
3442                                                     &intel_sdvo->pixel_clock_max))
3443                 goto err_output;
3444
3445         drm_dbg_kms(&dev_priv->drm, "%s device VID/DID: %02X:%02X.%02X, "
3446                         "clock range %dMHz - %dMHz, "
3447                         "num inputs: %d, "
3448                         "output 1: %c, output 2: %c\n",
3449                         SDVO_NAME(intel_sdvo),
3450                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3451                         intel_sdvo->caps.device_rev_id,
3452                         intel_sdvo->pixel_clock_min / 1000,
3453                         intel_sdvo->pixel_clock_max / 1000,
3454                         intel_sdvo->caps.sdvo_num_inputs,
3455                         /* check currently supported outputs */
3456                         intel_sdvo->caps.output_flags &
3457                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0 |
3458                          SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_SVID0 |
3459                          SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_YPRPB0) ? 'Y' : 'N',
3460                         intel_sdvo->caps.output_flags &
3461                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1 |
3462                          SDVO_OUTPUT_LVDS1) ? 'Y' : 'N');
3463         return true;
3464
3465 err_output:
3466         intel_sdvo_output_cleanup(intel_sdvo);
3467 err:
3468         intel_sdvo_unselect_i2c_bus(intel_sdvo);
3469         intel_sdvo_encoder_destroy(&intel_encoder->base);
3470
3471         return false;
3472 }