1 // SPDX-License-Identifier: MIT
3 * Copyright © 2021 Intel Corporation
8 #include "intel_atomic.h"
10 #include "intel_display_types.h"
11 #include "intel_drrs.h"
12 #include "intel_frontbuffer.h"
13 #include "intel_panel.h"
16 * DOC: Display Refresh Rate Switching (DRRS)
18 * Display Refresh Rate Switching (DRRS) is a power conservation feature
19 * which enables swtching between low and high refresh rates,
20 * dynamically, based on the usage scenario. This feature is applicable
21 * for internal panels.
23 * Indication that the panel supports DRRS is given by the panel EDID, which
24 * would list multiple refresh rates for one resolution.
26 * DRRS is of 2 types - static and seamless.
27 * Static DRRS involves changing refresh rate (RR) by doing a full modeset
28 * (may appear as a blink on screen) and is used in dock-undock scenario.
29 * Seamless DRRS involves changing RR without any visual effect to the user
30 * and can be used during normal system usage. This is done by programming
33 * Support for static/seamless DRRS may be indicated in the VBT based on
34 * inputs from the panel spec.
36 * DRRS saves power by switching to low RR based on usage scenarios.
38 * The implementation is based on frontbuffer tracking implementation. When
39 * there is a disturbance on the screen triggered by user activity or a periodic
40 * system activity, DRRS is disabled (RR is changed to high RR). When there is
41 * no movement on screen, after a timeout of 1 second, a switch to low RR is
44 * For integration with frontbuffer tracking code, intel_drrs_invalidate()
45 * and intel_drrs_flush() are called.
47 * DRRS can be further extended to support other internal panels and also
48 * the scenario of video playback wherein RR is set based on the rate
49 * requested by userspace.
52 const char *intel_drrs_type_str(enum drrs_type drrs_type)
54 static const char * const str[] = {
55 [DRRS_TYPE_NONE] = "none",
56 [DRRS_TYPE_STATIC] = "static",
57 [DRRS_TYPE_SEAMLESS] = "seamless",
60 if (drrs_type >= ARRAY_SIZE(str))
63 return str[drrs_type];
66 bool intel_cpu_transcoder_has_drrs(struct drm_i915_private *i915,
67 enum transcoder cpu_transcoder)
69 if (HAS_DOUBLE_BUFFERED_M_N(i915))
72 return intel_cpu_transcoder_has_m2_n2(i915, cpu_transcoder);
76 intel_drrs_set_refresh_rate_pipeconf(struct intel_crtc *crtc,
77 enum drrs_refresh_rate refresh_rate)
79 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
80 enum transcoder cpu_transcoder = crtc->drrs.cpu_transcoder;
83 if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
84 bit = TRANSCONF_REFRESH_RATE_ALT_VLV;
86 bit = TRANSCONF_REFRESH_RATE_ALT_ILK;
88 intel_de_rmw(dev_priv, TRANSCONF(cpu_transcoder),
89 bit, refresh_rate == DRRS_REFRESH_RATE_LOW ? bit : 0);
93 intel_drrs_set_refresh_rate_m_n(struct intel_crtc *crtc,
94 enum drrs_refresh_rate refresh_rate)
96 intel_cpu_transcoder_set_m1_n1(crtc, crtc->drrs.cpu_transcoder,
97 refresh_rate == DRRS_REFRESH_RATE_LOW ?
98 &crtc->drrs.m2_n2 : &crtc->drrs.m_n);
101 bool intel_drrs_is_active(struct intel_crtc *crtc)
103 return crtc->drrs.cpu_transcoder != INVALID_TRANSCODER;
106 static void intel_drrs_set_state(struct intel_crtc *crtc,
107 enum drrs_refresh_rate refresh_rate)
109 struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
111 if (refresh_rate == crtc->drrs.refresh_rate)
114 if (intel_cpu_transcoder_has_m2_n2(dev_priv, crtc->drrs.cpu_transcoder))
115 intel_drrs_set_refresh_rate_pipeconf(crtc, refresh_rate);
117 intel_drrs_set_refresh_rate_m_n(crtc, refresh_rate);
119 crtc->drrs.refresh_rate = refresh_rate;
122 static void intel_drrs_schedule_work(struct intel_crtc *crtc)
124 struct drm_i915_private *i915 = to_i915(crtc->base.dev);
126 mod_delayed_work(i915->unordered_wq, &crtc->drrs.work, msecs_to_jiffies(1000));
129 static unsigned int intel_drrs_frontbuffer_bits(const struct intel_crtc_state *crtc_state)
131 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
132 struct drm_i915_private *i915 = to_i915(crtc->base.dev);
133 unsigned int frontbuffer_bits;
135 frontbuffer_bits = INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
137 for_each_intel_crtc_in_pipe_mask(&i915->drm, crtc,
138 crtc_state->bigjoiner_pipes)
139 frontbuffer_bits |= INTEL_FRONTBUFFER_ALL_MASK(crtc->pipe);
141 return frontbuffer_bits;
145 * intel_drrs_activate - activate DRRS
146 * @crtc_state: the crtc state
148 * Activates DRRS on the crtc.
150 void intel_drrs_activate(const struct intel_crtc_state *crtc_state)
152 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
154 if (!crtc_state->has_drrs)
157 if (!crtc_state->hw.active)
160 if (intel_crtc_is_bigjoiner_slave(crtc_state))
163 mutex_lock(&crtc->drrs.mutex);
165 crtc->drrs.cpu_transcoder = crtc_state->cpu_transcoder;
166 crtc->drrs.m_n = crtc_state->dp_m_n;
167 crtc->drrs.m2_n2 = crtc_state->dp_m2_n2;
168 crtc->drrs.frontbuffer_bits = intel_drrs_frontbuffer_bits(crtc_state);
169 crtc->drrs.busy_frontbuffer_bits = 0;
171 intel_drrs_schedule_work(crtc);
173 mutex_unlock(&crtc->drrs.mutex);
177 * intel_drrs_deactivate - deactivate DRRS
178 * @old_crtc_state: the old crtc state
180 * Deactivates DRRS on the crtc.
182 void intel_drrs_deactivate(const struct intel_crtc_state *old_crtc_state)
184 struct intel_crtc *crtc = to_intel_crtc(old_crtc_state->uapi.crtc);
186 if (!old_crtc_state->has_drrs)
189 if (!old_crtc_state->hw.active)
192 if (intel_crtc_is_bigjoiner_slave(old_crtc_state))
195 mutex_lock(&crtc->drrs.mutex);
197 if (intel_drrs_is_active(crtc))
198 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
200 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
201 crtc->drrs.frontbuffer_bits = 0;
202 crtc->drrs.busy_frontbuffer_bits = 0;
204 mutex_unlock(&crtc->drrs.mutex);
206 cancel_delayed_work_sync(&crtc->drrs.work);
209 static void intel_drrs_downclock_work(struct work_struct *work)
211 struct intel_crtc *crtc = container_of(work, typeof(*crtc), drrs.work.work);
213 mutex_lock(&crtc->drrs.mutex);
215 if (intel_drrs_is_active(crtc) && !crtc->drrs.busy_frontbuffer_bits)
216 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_LOW);
218 mutex_unlock(&crtc->drrs.mutex);
221 static void intel_drrs_frontbuffer_update(struct drm_i915_private *dev_priv,
222 unsigned int all_frontbuffer_bits,
225 struct intel_crtc *crtc;
227 for_each_intel_crtc(&dev_priv->drm, crtc) {
228 unsigned int frontbuffer_bits;
230 mutex_lock(&crtc->drrs.mutex);
232 frontbuffer_bits = all_frontbuffer_bits & crtc->drrs.frontbuffer_bits;
233 if (!frontbuffer_bits) {
234 mutex_unlock(&crtc->drrs.mutex);
239 crtc->drrs.busy_frontbuffer_bits |= frontbuffer_bits;
241 crtc->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
243 /* flush/invalidate means busy screen hence upclock */
244 intel_drrs_set_state(crtc, DRRS_REFRESH_RATE_HIGH);
247 * flush also means no more activity hence schedule downclock, if all
248 * other fbs are quiescent too
250 if (!crtc->drrs.busy_frontbuffer_bits)
251 intel_drrs_schedule_work(crtc);
253 cancel_delayed_work(&crtc->drrs.work);
255 mutex_unlock(&crtc->drrs.mutex);
260 * intel_drrs_invalidate - Disable Idleness DRRS
261 * @dev_priv: i915 device
262 * @frontbuffer_bits: frontbuffer plane tracking bits
264 * This function gets called everytime rendering on the given planes start.
265 * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).
267 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
269 void intel_drrs_invalidate(struct drm_i915_private *dev_priv,
270 unsigned int frontbuffer_bits)
272 intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, true);
276 * intel_drrs_flush - Restart Idleness DRRS
277 * @dev_priv: i915 device
278 * @frontbuffer_bits: frontbuffer plane tracking bits
280 * This function gets called every time rendering on the given planes has
281 * completed or flip on a crtc is completed. So DRRS should be upclocked
282 * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again,
283 * if no other planes are dirty.
285 * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
287 void intel_drrs_flush(struct drm_i915_private *dev_priv,
288 unsigned int frontbuffer_bits)
290 intel_drrs_frontbuffer_update(dev_priv, frontbuffer_bits, false);
294 * intel_drrs_crtc_init - Init DRRS for CRTC
297 * This function is called only once at driver load to initialize basic
301 void intel_drrs_crtc_init(struct intel_crtc *crtc)
303 INIT_DELAYED_WORK(&crtc->drrs.work, intel_drrs_downclock_work);
304 mutex_init(&crtc->drrs.mutex);
305 crtc->drrs.cpu_transcoder = INVALID_TRANSCODER;
308 static int intel_drrs_debugfs_status_show(struct seq_file *m, void *unused)
310 struct intel_crtc *crtc = m->private;
311 struct drm_i915_private *i915 = to_i915(crtc->base.dev);
312 const struct intel_crtc_state *crtc_state;
315 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
319 crtc_state = to_intel_crtc_state(crtc->base.state);
321 mutex_lock(&crtc->drrs.mutex);
323 seq_printf(m, "DRRS capable: %s\n",
324 str_yes_no(intel_cpu_transcoder_has_drrs(i915,
325 crtc_state->cpu_transcoder)));
327 seq_printf(m, "DRRS enabled: %s\n",
328 str_yes_no(crtc_state->has_drrs));
330 seq_printf(m, "DRRS active: %s\n",
331 str_yes_no(intel_drrs_is_active(crtc)));
333 seq_printf(m, "DRRS refresh rate: %s\n",
334 crtc->drrs.refresh_rate == DRRS_REFRESH_RATE_LOW ?
337 seq_printf(m, "DRRS busy frontbuffer bits: 0x%x\n",
338 crtc->drrs.busy_frontbuffer_bits);
340 mutex_unlock(&crtc->drrs.mutex);
342 drm_modeset_unlock(&crtc->base.mutex);
347 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_status);
349 static int intel_drrs_debugfs_ctl_set(void *data, u64 val)
351 struct intel_crtc *crtc = data;
352 struct drm_i915_private *i915 = to_i915(crtc->base.dev);
353 struct intel_crtc_state *crtc_state;
354 struct drm_crtc_commit *commit;
357 ret = drm_modeset_lock_single_interruptible(&crtc->base.mutex);
361 crtc_state = to_intel_crtc_state(crtc->base.state);
363 if (!crtc_state->hw.active ||
364 !crtc_state->has_drrs)
367 commit = crtc_state->uapi.commit;
369 ret = wait_for_completion_interruptible(&commit->hw_done);
375 "Manually %sactivating DRRS\n", val ? "" : "de");
378 intel_drrs_activate(crtc_state);
380 intel_drrs_deactivate(crtc_state);
383 drm_modeset_unlock(&crtc->base.mutex);
388 DEFINE_DEBUGFS_ATTRIBUTE(intel_drrs_debugfs_ctl_fops,
389 NULL, intel_drrs_debugfs_ctl_set, "%llu\n");
391 void intel_drrs_crtc_debugfs_add(struct intel_crtc *crtc)
393 debugfs_create_file("i915_drrs_status", 0444, crtc->base.debugfs_entry,
394 crtc, &intel_drrs_debugfs_status_fops);
396 debugfs_create_file_unsafe("i915_drrs_ctl", 0644, crtc->base.debugfs_entry,
397 crtc, &intel_drrs_debugfs_ctl_fops);
400 static int intel_drrs_debugfs_type_show(struct seq_file *m, void *unused)
402 struct intel_connector *connector = m->private;
404 seq_printf(m, "DRRS type: %s\n",
405 intel_drrs_type_str(intel_panel_drrs_type(connector)));
410 DEFINE_SHOW_ATTRIBUTE(intel_drrs_debugfs_type);
412 void intel_drrs_connector_debugfs_add(struct intel_connector *connector)
414 if (intel_panel_drrs_type(connector) == DRRS_TYPE_NONE)
417 debugfs_create_file("i915_drrs_type", 0444, connector->base.debugfs_entry,
418 connector, &intel_drrs_debugfs_type_fops);