drivers/gpu/drm/i915/display/intel_dp_mst.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *             2014 Red Hat Inc.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   9  * and/or sell copies of the Software, and to permit persons to whom the
  10  * Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  22  * IN THE SOFTWARE.
  23  *
  24  */
  25
  26 #include <drm/drm_atomic_helper.h>
  27 #include <drm/drm_edid.h>
  28 #include <drm/drm_probe_helper.h>
  29
  30 #include "i915_drv.h"
  31 #include "intel_atomic.h"
  32 #include "intel_audio.h"
  33 #include "intel_connector.h"
  34 #include "intel_ddi.h"
  35 #include "intel_display_types.h"
  36 #include "intel_dp.h"
  37 #include "intel_dp_mst.h"
  38 #include "intel_dpio_phy.h"
  39
  40 static int intel_dp_mst_compute_link_config(struct intel_encoder *encoder,
  41                                             struct intel_crtc_state *crtc_state,
  42                                             struct drm_connector_state *conn_state,
  43                                             struct link_config_limits *limits)
  44 {
  45         struct drm_atomic_state *state = crtc_state->uapi.state;
  46         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  47         struct intel_dp *intel_dp = &intel_mst->primary->dp;
  48         struct intel_connector *connector =
  49                 to_intel_connector(conn_state->connector);
  50         struct drm_i915_private *i915 = to_i915(connector->base.dev);
  51         const struct drm_display_mode *adjusted_mode =
  52                 &crtc_state->hw.adjusted_mode;
  53         bool constant_n = drm_dp_has_quirk(&intel_dp->desc, 0,
  54                                            DP_DPCD_QUIRK_CONSTANT_N);
  55         int bpp, slots = -EINVAL;
  56
  57         crtc_state->lane_count = limits->max_lane_count;
  58         crtc_state->port_clock = limits->max_clock;
  59
  60         for (bpp = limits->max_bpp; bpp >= limits->min_bpp; bpp -= 2 * 3) {
  61                 crtc_state->pipe_bpp = bpp;
  62
  63                 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock,
  64                                                        crtc_state->pipe_bpp,
  65                                                        false);
  66
  67                 slots = drm_dp_atomic_find_vcpi_slots(state, &intel_dp->mst_mgr,
  68                                                       connector->port,
  69                                                       crtc_state->pbn, 0);
  70                 if (slots == -EDEADLK)
  71                         return slots;
  72                 if (slots >= 0)
  73                         break;
  74         }
  75
  76         if (slots < 0) {
  77                 drm_dbg_kms(&i915->drm, "failed finding vcpi slots:%d\n",
  78                             slots);
  79                 return slots;
  80         }
  81
  82         intel_link_compute_m_n(crtc_state->pipe_bpp,
  83                                crtc_state->lane_count,
  84                                adjusted_mode->crtc_clock,
  85                                crtc_state->port_clock,
  86                                &crtc_state->dp_m_n,
  87                                constant_n, crtc_state->fec_enable);
  88         crtc_state->dp_m_n.tu = slots;
  89
  90         return 0;
  91 }
  92
  93 static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
  94                                        struct intel_crtc_state *pipe_config,
  95                                        struct drm_connector_state *conn_state)
  96 {
  97         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
  98         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
  99         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 100         struct intel_connector *connector =
 101                 to_intel_connector(conn_state->connector);
 102         struct intel_digital_connector_state *intel_conn_state =
 103                 to_intel_digital_connector_state(conn_state);
 104         const struct drm_display_mode *adjusted_mode =
 105                 &pipe_config->hw.adjusted_mode;
 106         struct link_config_limits limits;
 107         int ret;
 108
 109         if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
 110                 return -EINVAL;
 111
 112         pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
 113         pipe_config->has_pch_encoder = false;
 114
 115         if (intel_conn_state->force_audio == HDMI_AUDIO_AUTO)
 116                 pipe_config->has_audio =
 117                         drm_dp_mst_port_has_audio(&intel_dp->mst_mgr,
 118                                                   connector->port);
 119         else
 120                 pipe_config->has_audio =
 121                         intel_conn_state->force_audio == HDMI_AUDIO_ON;
 122
 123         /*
 124          * for MST we always configure max link bw - the spec doesn't
 125          * seem to suggest we should do otherwise.
 126          */
 127         limits.min_clock =
 128         limits.max_clock = intel_dp_max_link_rate(intel_dp);
 129
 130         limits.min_lane_count =
 131         limits.max_lane_count = intel_dp_max_lane_count(intel_dp);
 132
 133         limits.min_bpp = intel_dp_min_bpp(pipe_config);
 134         /*
 135          * FIXME: If all the streams can't fit into the link with
 136          * their current pipe_bpp we should reduce pipe_bpp across
 137          * the board until things start to fit. Until then we
 138          * limit to <= 8bpc since that's what was hardcoded for all
 139          * MST streams previously. This hack should be removed once
 140          * we have the proper retry logic in place.
 141          */
 142         limits.max_bpp = min(pipe_config->pipe_bpp, 24);
 143
 144         intel_dp_adjust_compliance_config(intel_dp, pipe_config, &limits);
 145
 146         ret = intel_dp_mst_compute_link_config(encoder, pipe_config,
 147                                                conn_state, &limits);
 148         if (ret)
 149                 return ret;
 150
 151         pipe_config->limited_color_range =
 152                 intel_dp_limited_color_range(pipe_config, conn_state);
 153
 154         if (IS_GEN9_LP(dev_priv))
 155                 pipe_config->lane_lat_optim_mask =
 156                         bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
 157
 158         intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 159
 160         return 0;
 161 }
 162
 163 /*
 164  * Iterate over all connectors and return a mask of
 165  * all CPU transcoders streaming over the same DP link.
 166  */
 167 static unsigned int
 168 intel_dp_mst_transcoder_mask(struct intel_atomic_state *state,
 169                              struct intel_dp *mst_port)
 170 {
 171         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 172         const struct intel_digital_connector_state *conn_state;
 173         struct intel_connector *connector;
 174         u8 transcoders = 0;
 175         int i;
 176
 177         if (INTEL_GEN(dev_priv) < 12)
 178                 return 0;
 179
 180         for_each_new_intel_connector_in_state(state, connector, conn_state, i) {
 181                 const struct intel_crtc_state *crtc_state;
 182                 struct intel_crtc *crtc;
 183
 184                 if (connector->mst_port != mst_port || !conn_state->base.crtc)
 185                         continue;
 186
 187                 crtc = to_intel_crtc(conn_state->base.crtc);
 188                 crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
 189
 190                 if (!crtc_state->hw.active)
 191                         continue;
 192
 193                 transcoders |= BIT(crtc_state->cpu_transcoder);
 194         }
 195
 196         return transcoders;
 197 }
 198
 199 static int intel_dp_mst_compute_config_late(struct intel_encoder *encoder,
 200                                             struct intel_crtc_state *crtc_state,
 201                                             struct drm_connector_state *conn_state)
 202 {
 203         struct intel_atomic_state *state = to_intel_atomic_state(conn_state->state);
 204         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 205         struct intel_dp *intel_dp = &intel_mst->primary->dp;
 206
 207         /* lowest numbered transcoder will be designated master */
 208         crtc_state->mst_master_transcoder =
 209                 ffs(intel_dp_mst_transcoder_mask(state, intel_dp)) - 1;
 210
 211         return 0;
 212 }
 213
 214 /*
 215  * If one of the connectors in a MST stream needs a modeset, mark all CRTCs
 216  * that shares the same MST stream as mode changed,
 217  * intel_modeset_pipe_config()+intel_crtc_check_fastset() will take care to do
 218  * a fastset when possible.
 219  */
 220 static int
 221 intel_dp_mst_atomic_master_trans_check(struct intel_connector *connector,
 222                                        struct intel_atomic_state *state)
 223 {
 224         struct drm_i915_private *dev_priv = to_i915(state->base.dev);
 225         struct drm_connector_list_iter connector_list_iter;
 226         struct intel_connector *connector_iter;
 227
 228         if (INTEL_GEN(dev_priv) < 12)
 229                 return  0;
 230
 231         if (!intel_connector_needs_modeset(state, &connector->base))
 232                 return 0;
 233
 234         drm_connector_list_iter_begin(&dev_priv->drm, &connector_list_iter);
 235         for_each_intel_connector_iter(connector_iter, &connector_list_iter) {
 236                 struct intel_digital_connector_state *conn_iter_state;
 237                 struct intel_crtc_state *crtc_state;
 238                 struct intel_crtc *crtc;
 239                 int ret;
 240
 241                 if (connector_iter->mst_port != connector->mst_port ||
 242                     connector_iter == connector)
 243                         continue;
 244
 245                 conn_iter_state = intel_atomic_get_digital_connector_state(state,
 246                                                                            connector_iter);
 247                 if (IS_ERR(conn_iter_state)) {
 248                         drm_connector_list_iter_end(&connector_list_iter);
 249                         return PTR_ERR(conn_iter_state);
 250                 }
 251
 252                 if (!conn_iter_state->base.crtc)
 253                         continue;
 254
 255                 crtc = to_intel_crtc(conn_iter_state->base.crtc);
 256                 crtc_state = intel_atomic_get_crtc_state(&state->base, crtc);
 257                 if (IS_ERR(crtc_state)) {
 258                         drm_connector_list_iter_end(&connector_list_iter);
 259                         return PTR_ERR(crtc_state);
 260                 }
 261
 262                 ret = drm_atomic_add_affected_planes(&state->base, &crtc->base);
 263                 if (ret) {
 264                         drm_connector_list_iter_end(&connector_list_iter);
 265                         return ret;
 266                 }
 267                 crtc_state->uapi.mode_changed = true;
 268         }
 269         drm_connector_list_iter_end(&connector_list_iter);
 270
 271         return 0;
 272 }
 273
 274 static int
 275 intel_dp_mst_atomic_check(struct drm_connector *connector,
 276                           struct drm_atomic_state *_state)
 277 {
 278         struct intel_atomic_state *state = to_intel_atomic_state(_state);
 279         struct drm_connector_state *new_conn_state =
 280                 drm_atomic_get_new_connector_state(&state->base, connector);
 281         struct drm_connector_state *old_conn_state =
 282                 drm_atomic_get_old_connector_state(&state->base, connector);
 283         struct intel_connector *intel_connector =
 284                 to_intel_connector(connector);
 285         struct drm_crtc *new_crtc = new_conn_state->crtc;
 286         struct drm_dp_mst_topology_mgr *mgr;
 287         int ret;
 288
 289         ret = intel_digital_connector_atomic_check(connector, &state->base);
 290         if (ret)
 291                 return ret;
 292
 293         ret = intel_dp_mst_atomic_master_trans_check(intel_connector, state);
 294         if (ret)
 295                 return ret;
 296
 297         if (!old_conn_state->crtc)
 298                 return 0;
 299
 300         /* We only want to free VCPI if this state disables the CRTC on this
 301          * connector
 302          */
 303         if (new_crtc) {
 304                 struct intel_crtc *intel_crtc = to_intel_crtc(new_crtc);
 305                 struct intel_crtc_state *crtc_state =
 306                         intel_atomic_get_new_crtc_state(state, intel_crtc);
 307
 308                 if (!crtc_state ||
 309                     !drm_atomic_crtc_needs_modeset(&crtc_state->uapi) ||
 310                     crtc_state->uapi.enable)
 311                         return 0;
 312         }
 313
 314         mgr = &enc_to_mst(to_intel_encoder(old_conn_state->best_encoder))->primary->dp.mst_mgr;
 315         ret = drm_dp_atomic_release_vcpi_slots(&state->base, mgr,
 316                                                intel_connector->port);
 317
 318         return ret;
 319 }
 320
 321 static void intel_mst_disable_dp(struct intel_atomic_state *state,
 322                                  struct intel_encoder *encoder,
 323                                  const struct intel_crtc_state *old_crtc_state,
 324                                  const struct drm_connector_state *old_conn_state)
 325 {
 326         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 327         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 328         struct intel_dp *intel_dp = &intel_dig_port->dp;
 329         struct intel_connector *connector =
 330                 to_intel_connector(old_conn_state->connector);
 331         struct drm_i915_private *i915 = to_i915(connector->base.dev);
 332         int ret;
 333
 334         drm_dbg_kms(&i915->drm, "active links %d\n",
 335                     intel_dp->active_mst_links);
 336
 337         drm_dp_mst_reset_vcpi_slots(&intel_dp->mst_mgr, connector->port);
 338
 339         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 340         if (ret) {
 341                 drm_dbg_kms(&i915->drm, "failed to update payload %d\n", ret);
 342         }
 343         if (old_crtc_state->has_audio)
 344                 intel_audio_codec_disable(encoder,
 345                                           old_crtc_state, old_conn_state);
 346 }
 347
 348 static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
 349                                       struct intel_encoder *encoder,
 350                                       const struct intel_crtc_state *old_crtc_state,
 351                                       const struct drm_connector_state *old_conn_state)
 352 {
 353         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 354         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 355         struct intel_dp *intel_dp = &intel_dig_port->dp;
 356         struct intel_connector *connector =
 357                 to_intel_connector(old_conn_state->connector);
 358         struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
 359         bool last_mst_stream;
 360         u32 val;
 361
 362         intel_dp->active_mst_links--;
 363         last_mst_stream = intel_dp->active_mst_links == 0;
 364         drm_WARN_ON(&dev_priv->drm,
 365                     INTEL_GEN(dev_priv) >= 12 && last_mst_stream &&
 366                     !intel_dp_mst_is_master_trans(old_crtc_state));
 367
 368         intel_crtc_vblank_off(old_crtc_state);
 369
 370         intel_disable_pipe(old_crtc_state);
 371
 372         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 373
 374         val = intel_de_read(dev_priv,
 375                             TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
 376         val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;
 377         intel_de_write(dev_priv,
 378                        TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder),
 379                        val);
 380
 381         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 382                                   DP_TP_STATUS_ACT_SENT, 1))
 383                 drm_err(&dev_priv->drm,
 384                         "Timed out waiting for ACT sent when disabling\n");
 385         drm_dp_check_act_status(&intel_dp->mst_mgr);
 386
 387         drm_dp_mst_deallocate_vcpi(&intel_dp->mst_mgr, connector->port);
 388
 389         intel_ddi_disable_transcoder_func(old_crtc_state);
 390
 391         if (INTEL_GEN(dev_priv) >= 9)
 392                 skl_scaler_disable(old_crtc_state);
 393         else
 394                 ilk_pfit_disable(old_crtc_state);
 395
 396         /*
 397          * Power down mst path before disabling the port, otherwise we end
 398          * up getting interrupts from the sink upon detecting link loss.
 399          */
 400         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port,
 401                                      false);
 402
 403         /*
 404          * BSpec 4287: disable DIP after the transcoder is disabled and before
 405          * the transcoder clock select is set to none.
 406          */
 407         if (last_mst_stream)
 408                 intel_dp_set_infoframes(&intel_dig_port->base, false,
 409                                         old_crtc_state, NULL);
 410         /*
 411          * From TGL spec: "If multi-stream slave transcoder: Configure
 412          * Transcoder Clock Select to direct no clock to the transcoder"
 413          *
 414          * From older GENs spec: "Configure Transcoder Clock Select to direct
 415          * no clock to the transcoder"
 416          */
 417         if (INTEL_GEN(dev_priv) < 12 || !last_mst_stream)
 418                 intel_ddi_disable_pipe_clock(old_crtc_state);
 419
 420
 421         intel_mst->connector = NULL;
 422         if (last_mst_stream)
 423                 intel_dig_port->base.post_disable(state, &intel_dig_port->base,
 424                                                   old_crtc_state, NULL);
 425
 426         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 427                     intel_dp->active_mst_links);
 428 }
 429
 430 static void intel_mst_pre_pll_enable_dp(struct intel_atomic_state *state,
 431                                         struct intel_encoder *encoder,
 432                                         const struct intel_crtc_state *pipe_config,
 433                                         const struct drm_connector_state *conn_state)
 434 {
 435         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 436         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 437         struct intel_dp *intel_dp = &intel_dig_port->dp;
 438
 439         if (intel_dp->active_mst_links == 0)
 440                 intel_dig_port->base.pre_pll_enable(state, &intel_dig_port->base,
 441                                                     pipe_config, NULL);
 442 }
 443
 444 static void intel_mst_pre_enable_dp(struct intel_atomic_state *state,
 445                                     struct intel_encoder *encoder,
 446                                     const struct intel_crtc_state *pipe_config,
 447                                     const struct drm_connector_state *conn_state)
 448 {
 449         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 450         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 451         struct intel_dp *intel_dp = &intel_dig_port->dp;
 452         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 453         struct intel_connector *connector =
 454                 to_intel_connector(conn_state->connector);
 455         int ret;
 456         u32 temp;
 457         bool first_mst_stream;
 458
 459         /* MST encoders are bound to a crtc, not to a connector,
 460          * force the mapping here for get_hw_state.
 461          */
 462         connector->encoder = encoder;
 463         intel_mst->connector = connector;
 464         first_mst_stream = intel_dp->active_mst_links == 0;
 465         drm_WARN_ON(&dev_priv->drm,
 466                     INTEL_GEN(dev_priv) >= 12 && first_mst_stream &&
 467                     !intel_dp_mst_is_master_trans(pipe_config));
 468
 469         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 470                     intel_dp->active_mst_links);
 471
 472         if (first_mst_stream)
 473                 intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);
 474
 475         drm_dp_send_power_updown_phy(&intel_dp->mst_mgr, connector->port, true);
 476
 477         if (first_mst_stream)
 478                 intel_dig_port->base.pre_enable(state, &intel_dig_port->base,
 479                                                 pipe_config, NULL);
 480
 481         ret = drm_dp_mst_allocate_vcpi(&intel_dp->mst_mgr,
 482                                        connector->port,
 483                                        pipe_config->pbn,
 484                                        pipe_config->dp_m_n.tu);
 485         if (!ret)
 486                 drm_err(&dev_priv->drm, "failed to allocate vcpi\n");
 487
 488         intel_dp->active_mst_links++;
 489         temp = intel_de_read(dev_priv, intel_dp->regs.dp_tp_status);
 490         intel_de_write(dev_priv, intel_dp->regs.dp_tp_status, temp);
 491
 492         ret = drm_dp_update_payload_part1(&intel_dp->mst_mgr);
 493
 494         /*
 495          * Before Gen 12 this is not done as part of
 496          * intel_dig_port->base.pre_enable() and should be done here. For
 497          * Gen 12+ the step in which this should be done is different for the
 498          * first MST stream, so it's done on the DDI for the first stream and
 499          * here for the following ones.
 500          */
 501         if (INTEL_GEN(dev_priv) < 12 || !first_mst_stream)
 502                 intel_ddi_enable_pipe_clock(encoder, pipe_config);
 503
 504         intel_ddi_set_dp_msa(pipe_config, conn_state);
 505
 506         intel_dp_set_m_n(pipe_config, M1_N1);
 507 }
 508
 509 static void intel_mst_enable_dp(struct intel_atomic_state *state,
 510                                 struct intel_encoder *encoder,
 511                                 const struct intel_crtc_state *pipe_config,
 512                                 const struct drm_connector_state *conn_state)
 513 {
 514         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 515         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 516         struct intel_dp *intel_dp = &intel_dig_port->dp;
 517         struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 518
 519         drm_WARN_ON(&dev_priv->drm, pipe_config->has_pch_encoder);
 520
 521         intel_ddi_enable_transcoder_func(encoder, pipe_config);
 522
 523         drm_dbg_kms(&dev_priv->drm, "active links %d\n",
 524                     intel_dp->active_mst_links);
 525
 526         if (intel_de_wait_for_set(dev_priv, intel_dp->regs.dp_tp_status,
 527                                   DP_TP_STATUS_ACT_SENT, 1))
 528                 drm_err(&dev_priv->drm, "Timed out waiting for ACT sent\n");
 529
 530         drm_dp_check_act_status(&intel_dp->mst_mgr);
 531
 532         drm_dp_update_payload_part2(&intel_dp->mst_mgr);
 533
 534         intel_enable_pipe(pipe_config);
 535
 536         intel_crtc_vblank_on(pipe_config);
 537
 538         if (pipe_config->has_audio)
 539                 intel_audio_codec_enable(encoder, pipe_config, conn_state);
 540 }
 541
 542 static bool intel_dp_mst_enc_get_hw_state(struct intel_encoder *encoder,
 543                                       enum pipe *pipe)
 544 {
 545         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 546         *pipe = intel_mst->pipe;
 547         if (intel_mst->connector)
 548                 return true;
 549         return false;
 550 }
 551
 552 static void intel_dp_mst_enc_get_config(struct intel_encoder *encoder,
 553                                         struct intel_crtc_state *pipe_config)
 554 {
 555         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
 556         struct intel_digital_port *intel_dig_port = intel_mst->primary;
 557
 558         intel_ddi_get_config(&intel_dig_port->base, pipe_config);
 559 }
 560
 561 static int intel_dp_mst_get_ddc_modes(struct drm_connector *connector)
 562 {
 563         struct intel_connector *intel_connector = to_intel_connector(connector);
 564         struct intel_dp *intel_dp = intel_connector->mst_port;
 565         struct edid *edid;
 566         int ret;
 567
 568         if (drm_connector_is_unregistered(connector))
 569                 return intel_connector_update_modes(connector, NULL);
 570
 571         edid = drm_dp_mst_get_edid(connector, &intel_dp->mst_mgr, intel_connector->port);
 572         ret = intel_connector_update_modes(connector, edid);
 573         kfree(edid);
 574
 575         return ret;
 576 }
 577
 578 static int
 579 intel_dp_mst_connector_late_register(struct drm_connector *connector)
 580 {
 581         struct intel_connector *intel_connector = to_intel_connector(connector);
 582         int ret;
 583
 584         ret = drm_dp_mst_connector_late_register(connector,
 585                                                  intel_connector->port);
 586         if (ret < 0)
 587                 return ret;
 588
 589         ret = intel_connector_register(connector);
 590         if (ret < 0)
 591                 drm_dp_mst_connector_early_unregister(connector,
 592                                                       intel_connector->port);
 593
 594         return ret;
 595 }
 596
 597 static void
 598 intel_dp_mst_connector_early_unregister(struct drm_connector *connector)
 599 {
 600         struct intel_connector *intel_connector = to_intel_connector(connector);
 601
 602         intel_connector_unregister(connector);
 603         drm_dp_mst_connector_early_unregister(connector,
 604                                               intel_connector->port);
 605 }
 606
 607 static const struct drm_connector_funcs intel_dp_mst_connector_funcs = {
 608         .fill_modes = drm_helper_probe_single_connector_modes,
 609         .atomic_get_property = intel_digital_connector_atomic_get_property,
 610         .atomic_set_property = intel_digital_connector_atomic_set_property,
 611         .late_register = intel_dp_mst_connector_late_register,
 612         .early_unregister = intel_dp_mst_connector_early_unregister,
 613         .destroy = intel_connector_destroy,
 614         .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
 615         .atomic_duplicate_state = intel_digital_connector_duplicate_state,
 616 };
 617
 618 static int intel_dp_mst_get_modes(struct drm_connector *connector)
 619 {
 620         return intel_dp_mst_get_ddc_modes(connector);
 621 }
 622
 623 static enum drm_mode_status
 624 intel_dp_mst_mode_valid(struct drm_connector *connector,
 625                         struct drm_display_mode *mode)
 626 {
 627         struct drm_i915_private *dev_priv = to_i915(connector->dev);
 628         struct intel_connector *intel_connector = to_intel_connector(connector);
 629         struct intel_dp *intel_dp = intel_connector->mst_port;
 630         int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
 631         int max_rate, mode_rate, max_lanes, max_link_clock;
 632
 633         if (drm_connector_is_unregistered(connector))
 634                 return MODE_ERROR;
 635
 636         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
 637                 return MODE_NO_DBLESCAN;
 638
 639         max_link_clock = intel_dp_max_link_rate(intel_dp);
 640         max_lanes = intel_dp_max_lane_count(intel_dp);
 641
 642         max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
 643         mode_rate = intel_dp_link_required(mode->clock, 18);
 644
 645         /* TODO - validate mode against available PBN for link */
 646         if (mode->clock < 10000)
 647                 return MODE_CLOCK_LOW;
 648
 649         if (mode->flags & DRM_MODE_FLAG_DBLCLK)
 650                 return MODE_H_ILLEGAL;
 651
 652         if (mode_rate > max_rate || mode->clock > max_dotclk)
 653                 return MODE_CLOCK_HIGH;
 654
 655         return intel_mode_valid_max_plane_size(dev_priv, mode);
 656 }
 657
 658 static struct drm_encoder *intel_mst_atomic_best_encoder(struct drm_connector *connector,
 659                                                          struct drm_connector_state *state)
 660 {
 661         struct intel_connector *intel_connector = to_intel_connector(connector);
 662         struct intel_dp *intel_dp = intel_connector->mst_port;
 663         struct intel_crtc *crtc = to_intel_crtc(state->crtc);
 664
 665         return &intel_dp->mst_encoders[crtc->pipe]->base.base;
 666 }
 667
 668 static int
 669 intel_dp_mst_detect(struct drm_connector *connector,
 670                     struct drm_modeset_acquire_ctx *ctx, bool force)
 671 {
 672         struct intel_connector *intel_connector = to_intel_connector(connector);
 673         struct intel_dp *intel_dp = intel_connector->mst_port;
 674
 675         if (drm_connector_is_unregistered(connector))
 676                 return connector_status_disconnected;
 677
 678         return drm_dp_mst_detect_port(connector, ctx, &intel_dp->mst_mgr,
 679                                       intel_connector->port);
 680 }
 681
 682 static const struct drm_connector_helper_funcs intel_dp_mst_connector_helper_funcs = {
 683         .get_modes = intel_dp_mst_get_modes,
 684         .mode_valid = intel_dp_mst_mode_valid,
 685         .atomic_best_encoder = intel_mst_atomic_best_encoder,
 686         .atomic_check = intel_dp_mst_atomic_check,
 687         .detect_ctx = intel_dp_mst_detect,
 688 };
 689
 690 static void intel_dp_mst_encoder_destroy(struct drm_encoder *encoder)
 691 {
 692         struct intel_dp_mst_encoder *intel_mst = enc_to_mst(to_intel_encoder(encoder));
 693
 694         drm_encoder_cleanup(encoder);
 695         kfree(intel_mst);
 696 }
 697
 698 static const struct drm_encoder_funcs intel_dp_mst_enc_funcs = {
 699         .destroy = intel_dp_mst_encoder_destroy,
 700 };
 701
 702 static bool intel_dp_mst_get_hw_state(struct intel_connector *connector)
 703 {
 704         if (intel_attached_encoder(connector) && connector->base.state->crtc) {
 705                 enum pipe pipe;
 706                 if (!intel_attached_encoder(connector)->get_hw_state(intel_attached_encoder(connector), &pipe))
 707                         return false;
 708                 return true;
 709         }
 710         return false;
 711 }
 712
 713 static struct drm_connector *intel_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop)
 714 {
 715         struct intel_dp *intel_dp = container_of(mgr, struct intel_dp, mst_mgr);
 716         struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
 717         struct drm_device *dev = intel_dig_port->base.base.dev;
 718         struct drm_i915_private *dev_priv = to_i915(dev);
 719         struct intel_connector *intel_connector;
 720         struct drm_connector *connector;
 721         enum pipe pipe;
 722         int ret;
 723
 724         intel_connector = intel_connector_alloc();
 725         if (!intel_connector)
 726                 return NULL;
 727
 728         intel_connector->get_hw_state = intel_dp_mst_get_hw_state;
 729         intel_connector->mst_port = intel_dp;
 730         intel_connector->port = port;
 731         drm_dp_mst_get_port_malloc(port);
 732
 733         connector = &intel_connector->base;
 734         ret = drm_connector_init(dev, connector, &intel_dp_mst_connector_funcs,
 735                                  DRM_MODE_CONNECTOR_DisplayPort);
 736         if (ret) {
 737                 intel_connector_free(intel_connector);
 738                 return NULL;
 739         }
 740
 741         drm_connector_helper_add(connector, &intel_dp_mst_connector_helper_funcs);
 742
 743         for_each_pipe(dev_priv, pipe) {
 744                 struct drm_encoder *enc =
 745                         &intel_dp->mst_encoders[pipe]->base.base;
 746
 747                 ret = drm_connector_attach_encoder(&intel_connector->base, enc);
 748                 if (ret)
 749                         goto err;
 750         }
 751
 752         drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
 753         drm_object_attach_property(&connector->base, dev->mode_config.tile_property, 0);
 754
 755         ret = drm_connector_set_path_property(connector, pathprop);
 756         if (ret)
 757                 goto err;
 758
 759         intel_attach_force_audio_property(connector);
 760         intel_attach_broadcast_rgb_property(connector);
 761
 762         /*
 763          * Reuse the prop from the SST connector because we're
 764          * not allowed to create new props after device registration.
 765          */
 766         connector->max_bpc_property =
 767                 intel_dp->attached_connector->base.max_bpc_property;
 768         if (connector->max_bpc_property)
 769                 drm_connector_attach_max_bpc_property(connector, 6, 12);
 770
 771         return connector;
 772
 773 err:
 774         drm_connector_cleanup(connector);
 775         return NULL;
 776 }
 777
 778 static const struct drm_dp_mst_topology_cbs mst_cbs = {
 779         .add_connector = intel_dp_add_mst_connector,
 780 };
 781
 782 static struct intel_dp_mst_encoder *
 783 intel_dp_create_fake_mst_encoder(struct intel_digital_port *intel_dig_port, enum pipe pipe)
 784 {
 785         struct intel_dp_mst_encoder *intel_mst;
 786         struct intel_encoder *intel_encoder;
 787         struct drm_device *dev = intel_dig_port->base.base.dev;
 788
 789         intel_mst = kzalloc(sizeof(*intel_mst), GFP_KERNEL);
 790
 791         if (!intel_mst)
 792                 return NULL;
 793
 794         intel_mst->pipe = pipe;
 795         intel_encoder = &intel_mst->base;
 796         intel_mst->primary = intel_dig_port;
 797
 798         drm_encoder_init(dev, &intel_encoder->base, &intel_dp_mst_enc_funcs,
 799                          DRM_MODE_ENCODER_DPMST, "DP-MST %c", pipe_name(pipe));
 800
 801         intel_encoder->type = INTEL_OUTPUT_DP_MST;
 802         intel_encoder->power_domain = intel_dig_port->base.power_domain;
 803         intel_encoder->port = intel_dig_port->base.port;
 804         intel_encoder->cloneable = 0;
 805         /*
 806          * This is wrong, but broken userspace uses the intersection
 807          * of possible_crtcs of all the encoders of a given connector
 808          * to figure out which crtcs can drive said connector. What
 809          * should be used instead is the union of possible_crtcs.
 810          * To keep such userspace functioning we must misconfigure
 811          * this to make sure the intersection is not empty :(
 812          */
 813         intel_encoder->pipe_mask = ~0;
 814
 815         intel_encoder->compute_config = intel_dp_mst_compute_config;
 816         intel_encoder->compute_config_late = intel_dp_mst_compute_config_late;
 817         intel_encoder->disable = intel_mst_disable_dp;
 818         intel_encoder->post_disable = intel_mst_post_disable_dp;
 819         intel_encoder->pre_pll_enable = intel_mst_pre_pll_enable_dp;
 820         intel_encoder->pre_enable = intel_mst_pre_enable_dp;
 821         intel_encoder->enable = intel_mst_enable_dp;
 822         intel_encoder->get_hw_state = intel_dp_mst_enc_get_hw_state;
 823         intel_encoder->get_config = intel_dp_mst_enc_get_config;
 824
 825         return intel_mst;
 826
 827 }
 828
 829 static bool
 830 intel_dp_create_fake_mst_encoders(struct intel_digital_port *intel_dig_port)
 831 {
 832         struct intel_dp *intel_dp = &intel_dig_port->dp;
 833         struct drm_i915_private *dev_priv = to_i915(intel_dig_port->base.base.dev);
 834         enum pipe pipe;
 835
 836         for_each_pipe(dev_priv, pipe)
 837                 intel_dp->mst_encoders[pipe] = intel_dp_create_fake_mst_encoder(intel_dig_port, pipe);
 838         return true;
 839 }
 840
 841 int
 842 intel_dp_mst_encoder_active_links(struct intel_digital_port *intel_dig_port)
 843 {
 844         return intel_dig_port->dp.active_mst_links;
 845 }
 846
 847 int
 848 intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_base_id)
 849 {
 850         struct drm_i915_private *i915 = to_i915(intel_dig_port->base.base.dev);
 851         struct intel_dp *intel_dp = &intel_dig_port->dp;
 852         enum port port = intel_dig_port->base.port;
 853         int ret;
 854
 855         if (!HAS_DP_MST(i915) || intel_dp_is_edp(intel_dp))
 856                 return 0;
 857
 858         if (INTEL_GEN(i915) < 12 && port == PORT_A)
 859                 return 0;
 860
 861         if (INTEL_GEN(i915) < 11 && port == PORT_E)
 862                 return 0;
 863
 864         intel_dp->mst_mgr.cbs = &mst_cbs;
 865
 866         /* create encoders */
 867         intel_dp_create_fake_mst_encoders(intel_dig_port);
 868         ret = drm_dp_mst_topology_mgr_init(&intel_dp->mst_mgr, &i915->drm,
 869                                            &intel_dp->aux, 16, 3, conn_base_id);
 870         if (ret)
 871                 return ret;
 872
 873         intel_dp->can_mst = true;
 874
 875         return 0;
 876 }
 877
 878 void
 879 intel_dp_mst_encoder_cleanup(struct intel_digital_port *intel_dig_port)
 880 {
 881         struct intel_dp *intel_dp = &intel_dig_port->dp;
 882
 883         if (!intel_dp->can_mst)
 884                 return;
 885
 886         drm_dp_mst_topology_mgr_destroy(&intel_dp->mst_mgr);
 887         /* encoders will get killed by normal cleanup */
 888 }
 889
 890 bool intel_dp_mst_is_master_trans(const struct intel_crtc_state *crtc_state)
 891 {
 892         return crtc_state->mst_master_transcoder == crtc_state->cpu_transcoder;
 893 }
 894
 895 bool intel_dp_mst_is_slave_trans(const struct intel_crtc_state *crtc_state)
 896 {
 897         return crtc_state->mst_master_transcoder != INVALID_TRANSCODER &&
 898                crtc_state->mst_master_transcoder != crtc_state->cpu_transcoder;
 899 }