2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/dp/drm_dp_helper.h>
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
37 #define _INTEL_BIOS_PRIVATE
38 #include "intel_vbt_defs.h"
41 * DOC: Video BIOS Table (VBT)
43 * The Video BIOS Table, or VBT, provides platform and board specific
44 * configuration information to the driver that is not discoverable or available
45 * through other means. The configuration is mostly related to display
46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
51 * contain the actual configuration information. The VBT Header, and thus the
52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
53 * BDB Header. The data blocks are concatenated after the BDB Header. The data
54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
55 * data. (Block 53, the MIPI Sequence Block is an exception.)
57 * The driver parses the VBT during load. The relevant information is stored in
58 * driver private data for ease of use, and the actual VBT is not read after
62 /* Wrapper for VBT child device config */
63 struct intel_bios_encoder_data {
64 struct drm_i915_private *i915;
66 struct child_device_config child;
67 struct dsc_compression_parameters_entry *dsc;
68 struct list_head node;
71 #define SLAVE_ADDR1 0x70
72 #define SLAVE_ADDR2 0x72
74 /* Get BDB block size given a pointer to Block ID. */
75 static u32 _get_blocksize(const u8 *block_base)
77 /* The MIPI Sequence Block v3+ has a separate size field. */
78 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
79 return *((const u32 *)(block_base + 4));
81 return *((const u16 *)(block_base + 1));
84 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
85 static u32 get_blocksize(const void *block_data)
87 return _get_blocksize(block_data - 3);
91 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
93 const struct bdb_header *bdb = _bdb;
94 const u8 *base = _bdb;
96 u32 total, current_size;
97 enum bdb_block_id current_id;
99 /* skip to first section */
100 index += bdb->header_size;
101 total = bdb->bdb_size;
103 /* walk the sections looking for section_id */
104 while (index + 3 < total) {
105 current_id = *(base + index);
106 current_size = _get_blocksize(base + index);
109 if (index + current_size > total)
112 if (current_id == section_id)
115 index += current_size;
122 * Offset from the start of BDB to the start of the
123 * block data (just past the block header).
125 static u32 block_offset(const void *bdb, enum bdb_block_id section_id)
129 block = find_raw_section(bdb, section_id);
136 /* size of the block excluding the header */
137 static u32 block_size(const void *bdb, enum bdb_block_id section_id)
141 block = find_raw_section(bdb, section_id);
145 return get_blocksize(block);
148 struct bdb_block_entry {
149 struct list_head node;
150 enum bdb_block_id section_id;
155 find_section(struct drm_i915_private *i915,
156 enum bdb_block_id section_id)
158 struct bdb_block_entry *entry;
160 list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) {
161 if (entry->section_id == section_id)
162 return entry->data + 3;
168 static const struct {
169 enum bdb_block_id section_id;
172 { .section_id = BDB_GENERAL_FEATURES,
173 .min_size = sizeof(struct bdb_general_features), },
174 { .section_id = BDB_GENERAL_DEFINITIONS,
175 .min_size = sizeof(struct bdb_general_definitions), },
176 { .section_id = BDB_PSR,
177 .min_size = sizeof(struct bdb_psr), },
178 { .section_id = BDB_DRIVER_FEATURES,
179 .min_size = sizeof(struct bdb_driver_features), },
180 { .section_id = BDB_SDVO_LVDS_OPTIONS,
181 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
182 { .section_id = BDB_SDVO_PANEL_DTDS,
183 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
184 { .section_id = BDB_EDP,
185 .min_size = sizeof(struct bdb_edp), },
186 { .section_id = BDB_LVDS_OPTIONS,
187 .min_size = sizeof(struct bdb_lvds_options), },
189 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
190 * so keep the two ordered.
192 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
193 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
194 { .section_id = BDB_LVDS_LFP_DATA,
195 .min_size = 0, /* special case */ },
196 { .section_id = BDB_LVDS_BACKLIGHT,
197 .min_size = sizeof(struct bdb_lfp_backlight_data), },
198 { .section_id = BDB_LFP_POWER,
199 .min_size = sizeof(struct bdb_lfp_power), },
200 { .section_id = BDB_MIPI_CONFIG,
201 .min_size = sizeof(struct bdb_mipi_config), },
202 { .section_id = BDB_MIPI_SEQUENCE,
203 .min_size = sizeof(struct bdb_mipi_sequence) },
204 { .section_id = BDB_COMPRESSION_PARAMETERS,
205 .min_size = sizeof(struct bdb_compression_parameters), },
206 { .section_id = BDB_GENERIC_DTD,
207 .min_size = sizeof(struct bdb_generic_dtd), },
210 static size_t lfp_data_min_size(struct drm_i915_private *i915)
212 const struct bdb_lvds_lfp_data_ptrs *ptrs;
215 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
219 size = sizeof(struct bdb_lvds_lfp_data);
220 if (ptrs->panel_name.table_size)
221 size = max(size, ptrs->panel_name.offset +
222 sizeof(struct bdb_lvds_lfp_data_tail));
227 static bool validate_lfp_data_ptrs(const void *bdb,
228 const struct bdb_lvds_lfp_data_ptrs *ptrs)
230 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
231 int data_block_size, lfp_data_size;
234 data_block_size = block_size(bdb, BDB_LVDS_LFP_DATA);
235 if (data_block_size == 0)
238 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
239 if (ptrs->lvds_entries != 3)
242 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
243 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
244 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
245 panel_name_size = ptrs->panel_name.table_size;
247 /* fp_timing has variable size */
248 if (fp_timing_size < 32 ||
249 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
250 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
253 /* panel_name is not present in old VBTs */
254 if (panel_name_size != 0 &&
255 panel_name_size != sizeof(struct lvds_lfp_panel_name))
258 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
259 if (16 * lfp_data_size > data_block_size)
263 * Except for vlv/chv machines all real VBTs seem to have 6
264 * unaccounted bytes in the fp_timing table. And it doesn't
265 * appear to be a really intentional hole as the fp_timing
266 * 0xffff terminator is always within those 6 missing bytes.
268 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size &&
269 fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
272 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > ptrs->ptr[0].dvo_timing.offset ||
273 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
274 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
277 /* make sure the table entries have uniform size */
278 for (i = 1; i < 16; i++) {
279 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
280 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
281 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
284 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
285 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
286 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
290 /* make sure the tables fit inside the data block */
291 for (i = 0; i < 16; i++) {
292 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
293 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
294 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
298 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
304 /* make the data table offsets relative to the data block */
305 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
307 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
311 offset = block_offset(bdb, BDB_LVDS_LFP_DATA);
313 for (i = 0; i < 16; i++) {
314 if (ptrs->ptr[i].fp_timing.offset < offset ||
315 ptrs->ptr[i].dvo_timing.offset < offset ||
316 ptrs->ptr[i].panel_pnp_id.offset < offset)
319 ptrs->ptr[i].fp_timing.offset -= offset;
320 ptrs->ptr[i].dvo_timing.offset -= offset;
321 ptrs->ptr[i].panel_pnp_id.offset -= offset;
324 if (ptrs->panel_name.table_size) {
325 if (ptrs->panel_name.offset < offset)
328 ptrs->panel_name.offset -= offset;
331 return validate_lfp_data_ptrs(bdb, ptrs);
334 static const void *find_fp_timing_terminator(const u8 *data, int size)
338 for (i = 0; i < size - 1; i++) {
339 if (data[i] == 0xff && data[i+1] == 0xff)
346 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
347 int table_size, int total_size)
349 if (total_size < table_size)
352 table->table_size = table_size;
353 table->offset = total_size - table_size;
355 return total_size - table_size;
358 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
359 const struct lvds_lfp_data_ptr_table *prev,
362 next->table_size = prev->table_size;
363 next->offset = prev->offset + size;
366 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
369 int i, size, table_size, block_size, offset;
370 const void *t0, *t1, *block;
371 struct bdb_lvds_lfp_data_ptrs *ptrs;
374 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
378 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
380 block_size = get_blocksize(block);
383 t0 = find_fp_timing_terminator(block, size);
387 size -= t0 - block - 2;
388 t1 = find_fp_timing_terminator(t0 + 2, size);
393 if (size * 16 > block_size)
396 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
400 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
401 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
402 ptrs = ptrs_block + 3;
404 table_size = sizeof(struct lvds_pnp_id);
405 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
407 table_size = sizeof(struct lvds_dvo_timing);
408 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
410 table_size = t0 - block + 2;
411 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
413 if (ptrs->ptr[0].fp_timing.table_size)
414 ptrs->lvds_entries++;
415 if (ptrs->ptr[0].dvo_timing.table_size)
416 ptrs->lvds_entries++;
417 if (ptrs->ptr[0].panel_pnp_id.table_size)
418 ptrs->lvds_entries++;
420 if (size != 0 || ptrs->lvds_entries != 3) {
426 for (i = 1; i < 16; i++) {
427 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
428 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
429 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
433 table_size = sizeof(struct lvds_lfp_panel_name);
435 if (16 * (size + table_size) <= block_size) {
436 ptrs->panel_name.table_size = table_size;
437 ptrs->panel_name.offset = size * 16;
440 offset = block - bdb;
442 for (i = 0; i < 16; i++) {
443 ptrs->ptr[i].fp_timing.offset += offset;
444 ptrs->ptr[i].dvo_timing.offset += offset;
445 ptrs->ptr[i].panel_pnp_id.offset += offset;
448 if (ptrs->panel_name.table_size)
449 ptrs->panel_name.offset += offset;
455 init_bdb_block(struct drm_i915_private *i915,
456 const void *bdb, enum bdb_block_id section_id,
459 struct bdb_block_entry *entry;
460 void *temp_block = NULL;
464 block = find_raw_section(bdb, section_id);
466 /* Modern VBTs lack the LFP data table pointers block, make one up */
467 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
468 temp_block = generate_lfp_data_ptrs(i915, bdb);
470 block = temp_block + 3;
475 drm_WARN(&i915->drm, min_size == 0,
476 "Block %d min_size is zero\n", section_id);
478 block_size = get_blocksize(block);
480 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
487 entry->section_id = section_id;
488 memcpy(entry->data, block - 3, block_size + 3);
492 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
493 section_id, block_size, min_size);
495 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
496 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
497 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
502 list_add_tail(&entry->node, &i915->vbt.bdb_blocks);
505 static void init_bdb_blocks(struct drm_i915_private *i915,
510 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
511 enum bdb_block_id section_id = bdb_blocks[i].section_id;
512 size_t min_size = bdb_blocks[i].min_size;
514 if (section_id == BDB_LVDS_LFP_DATA)
515 min_size = lfp_data_min_size(i915);
517 init_bdb_block(i915, bdb, section_id, min_size);
522 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
523 const struct lvds_dvo_timing *dvo_timing)
525 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
526 dvo_timing->hactive_lo;
527 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
528 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
529 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
530 ((dvo_timing->hsync_pulse_width_hi << 8) |
531 dvo_timing->hsync_pulse_width_lo);
532 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
533 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
535 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
536 dvo_timing->vactive_lo;
537 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
538 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
539 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
540 ((dvo_timing->vsync_pulse_width_hi << 4) |
541 dvo_timing->vsync_pulse_width_lo);
542 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
543 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
544 panel_fixed_mode->clock = dvo_timing->clock * 10;
545 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
547 if (dvo_timing->hsync_positive)
548 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
550 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
552 if (dvo_timing->vsync_positive)
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
555 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
557 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
558 dvo_timing->himage_lo;
559 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
560 dvo_timing->vimage_lo;
562 /* Some VBTs have bogus h/vtotal values */
563 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
564 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
565 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
566 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
568 drm_mode_set_name(panel_fixed_mode);
571 static const struct lvds_dvo_timing *
572 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
573 const struct bdb_lvds_lfp_data_ptrs *ptrs,
576 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
579 static const struct lvds_fp_timing *
580 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
581 const struct bdb_lvds_lfp_data_ptrs *ptrs,
584 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
587 static const struct bdb_lvds_lfp_data_tail *
588 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
589 const struct bdb_lvds_lfp_data_ptrs *ptrs)
591 if (ptrs->panel_name.table_size)
592 return (const void *)data + ptrs->panel_name.offset;
597 static int opregion_get_panel_type(struct drm_i915_private *i915)
599 return intel_opregion_get_panel_type(i915);
602 static int vbt_get_panel_type(struct drm_i915_private *i915)
604 const struct bdb_lvds_options *lvds_options;
606 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
610 if (lvds_options->panel_type > 0xf) {
611 drm_dbg_kms(&i915->drm, "Invalid VBT panel type 0x%x\n",
612 lvds_options->panel_type);
616 return lvds_options->panel_type;
619 static int fallback_get_panel_type(struct drm_i915_private *i915)
630 static int get_panel_type(struct drm_i915_private *i915)
634 int (*get_panel_type)(struct drm_i915_private *i915);
637 [PANEL_TYPE_OPREGION] = {
639 .get_panel_type = opregion_get_panel_type,
643 .get_panel_type = vbt_get_panel_type,
645 [PANEL_TYPE_FALLBACK] = {
647 .get_panel_type = fallback_get_panel_type,
652 for (i = 0; i < ARRAY_SIZE(panel_types); i++) {
653 panel_types[i].panel_type = panel_types[i].get_panel_type(i915);
655 drm_WARN_ON(&i915->drm, panel_types[i].panel_type > 0xf);
657 if (panel_types[i].panel_type >= 0)
658 drm_dbg_kms(&i915->drm, "Panel type (%s): %d\n",
659 panel_types[i].name, panel_types[i].panel_type);
662 if (panel_types[PANEL_TYPE_OPREGION].panel_type >= 0)
663 i = PANEL_TYPE_OPREGION;
664 else if (panel_types[PANEL_TYPE_VBT].panel_type >= 0)
667 i = PANEL_TYPE_FALLBACK;
669 drm_dbg_kms(&i915->drm, "Selected panel type (%s): %d\n",
670 panel_types[i].name, panel_types[i].panel_type);
672 return panel_types[i].panel_type;
675 /* Parse general panel options */
677 parse_panel_options(struct drm_i915_private *i915)
679 const struct bdb_lvds_options *lvds_options;
683 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
687 i915->vbt.lvds_dither = lvds_options->pixel_dither;
689 panel_type = get_panel_type(i915);
691 i915->vbt.panel_type = panel_type;
693 drrs_mode = (lvds_options->dps_panel_type_bits
694 >> (panel_type * 2)) & MODE_MASK;
696 * VBT has static DRRS = 0 and seamless DRRS = 2.
697 * The below piece of code is required to adjust vbt.drrs_type
698 * to match the enum drrs_support_type.
702 i915->vbt.drrs_type = DRRS_TYPE_STATIC;
703 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
706 i915->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
707 drm_dbg_kms(&i915->drm,
708 "DRRS supported mode is seamless\n");
711 i915->vbt.drrs_type = DRRS_TYPE_NONE;
712 drm_dbg_kms(&i915->drm,
713 "DRRS not supported (VBT input)\n");
719 parse_lfp_panel_dtd(struct drm_i915_private *i915,
720 const struct bdb_lvds_lfp_data *lvds_lfp_data,
721 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
723 const struct lvds_dvo_timing *panel_dvo_timing;
724 const struct lvds_fp_timing *fp_timing;
725 struct drm_display_mode *panel_fixed_mode;
726 int panel_type = i915->vbt.panel_type;
728 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
732 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
733 if (!panel_fixed_mode)
736 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
738 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
740 drm_dbg_kms(&i915->drm,
741 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
742 DRM_MODE_ARG(panel_fixed_mode));
744 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
748 /* check the resolution, just to be sure */
749 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
750 fp_timing->y_res == panel_fixed_mode->vdisplay) {
751 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
752 drm_dbg_kms(&i915->drm,
753 "VBT initial LVDS value %x\n",
754 i915->vbt.bios_lvds_val);
759 parse_lfp_data(struct drm_i915_private *i915)
761 const struct bdb_lvds_lfp_data *data;
762 const struct bdb_lvds_lfp_data_tail *tail;
763 const struct bdb_lvds_lfp_data_ptrs *ptrs;
764 int panel_type = i915->vbt.panel_type;
766 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
770 data = find_section(i915, BDB_LVDS_LFP_DATA);
774 if (!i915->vbt.lfp_lvds_vbt_mode)
775 parse_lfp_panel_dtd(i915, data, ptrs);
777 tail = get_lfp_data_tail(data, ptrs);
781 if (i915->vbt.version >= 188) {
782 i915->vbt.seamless_drrs_min_refresh_rate =
783 tail->seamless_drrs_min_refresh_rate[panel_type];
784 drm_dbg_kms(&i915->drm,
785 "Seamless DRRS min refresh rate: %d Hz\n",
786 i915->vbt.seamless_drrs_min_refresh_rate);
791 parse_generic_dtd(struct drm_i915_private *i915)
793 const struct bdb_generic_dtd *generic_dtd;
794 const struct generic_dtd_entry *dtd;
795 struct drm_display_mode *panel_fixed_mode;
799 * Older VBTs provided DTD information for internal displays through
800 * the "LFP panel tables" block (42). As of VBT revision 229 the
801 * DTD information should be provided via a newer "generic DTD"
802 * block (58). Just to be safe, we'll try the new generic DTD block
803 * first on VBT >= 229, but still fall back to trying the old LFP
804 * block if that fails.
806 if (i915->vbt.version < 229)
809 generic_dtd = find_section(i915, BDB_GENERIC_DTD);
813 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
814 drm_err(&i915->drm, "GDTD size %u is too small.\n",
815 generic_dtd->gdtd_size);
817 } else if (generic_dtd->gdtd_size !=
818 sizeof(struct generic_dtd_entry)) {
819 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
820 generic_dtd->gdtd_size);
821 /* DTD has unknown fields, but keep going */
824 num_dtd = (get_blocksize(generic_dtd) -
825 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
826 if (i915->vbt.panel_type >= num_dtd) {
828 "Panel type %d not found in table of %d DTD's\n",
829 i915->vbt.panel_type, num_dtd);
833 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
835 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
836 if (!panel_fixed_mode)
839 panel_fixed_mode->hdisplay = dtd->hactive;
840 panel_fixed_mode->hsync_start =
841 panel_fixed_mode->hdisplay + dtd->hfront_porch;
842 panel_fixed_mode->hsync_end =
843 panel_fixed_mode->hsync_start + dtd->hsync;
844 panel_fixed_mode->htotal =
845 panel_fixed_mode->hdisplay + dtd->hblank;
847 panel_fixed_mode->vdisplay = dtd->vactive;
848 panel_fixed_mode->vsync_start =
849 panel_fixed_mode->vdisplay + dtd->vfront_porch;
850 panel_fixed_mode->vsync_end =
851 panel_fixed_mode->vsync_start + dtd->vsync;
852 panel_fixed_mode->vtotal =
853 panel_fixed_mode->vdisplay + dtd->vblank;
855 panel_fixed_mode->clock = dtd->pixel_clock;
856 panel_fixed_mode->width_mm = dtd->width_mm;
857 panel_fixed_mode->height_mm = dtd->height_mm;
859 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
860 drm_mode_set_name(panel_fixed_mode);
862 if (dtd->hsync_positive_polarity)
863 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
865 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
867 if (dtd->vsync_positive_polarity)
868 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
870 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
872 drm_dbg_kms(&i915->drm,
873 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
874 DRM_MODE_ARG(panel_fixed_mode));
876 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
880 parse_lfp_backlight(struct drm_i915_private *i915)
882 const struct bdb_lfp_backlight_data *backlight_data;
883 const struct lfp_backlight_data_entry *entry;
884 int panel_type = i915->vbt.panel_type;
887 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
891 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
892 drm_dbg_kms(&i915->drm,
893 "Unsupported backlight data entry size %u\n",
894 backlight_data->entry_size);
898 entry = &backlight_data->data[panel_type];
900 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
901 if (!i915->vbt.backlight.present) {
902 drm_dbg_kms(&i915->drm,
903 "PWM backlight not present in VBT (type %u)\n",
908 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
909 if (i915->vbt.version >= 191) {
912 if (i915->vbt.version >= 236)
913 exp_size = sizeof(struct bdb_lfp_backlight_data);
914 else if (i915->vbt.version >= 234)
915 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
917 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
919 if (get_blocksize(backlight_data) >= exp_size) {
920 const struct lfp_backlight_control_method *method;
922 method = &backlight_data->backlight_control[panel_type];
923 i915->vbt.backlight.type = method->type;
924 i915->vbt.backlight.controller = method->controller;
928 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
929 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
931 if (i915->vbt.version >= 234) {
935 level = backlight_data->brightness_level[panel_type].level;
936 min_level = backlight_data->brightness_min_level[panel_type].level;
938 if (i915->vbt.version >= 236)
939 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
944 min_level = min_level / 255;
946 if (min_level > 255) {
947 drm_warn(&i915->drm, "Brightness min level > 255\n");
950 i915->vbt.backlight.min_brightness = min_level;
952 i915->vbt.backlight.brightness_precision_bits =
953 backlight_data->brightness_precision_bits[panel_type];
955 level = backlight_data->level[panel_type];
956 i915->vbt.backlight.min_brightness = entry->min_brightness;
959 drm_dbg_kms(&i915->drm,
960 "VBT backlight PWM modulation frequency %u Hz, "
961 "active %s, min brightness %u, level %u, controller %u\n",
962 i915->vbt.backlight.pwm_freq_hz,
963 i915->vbt.backlight.active_low_pwm ? "low" : "high",
964 i915->vbt.backlight.min_brightness,
966 i915->vbt.backlight.controller);
969 /* Try to find sdvo panel data */
971 parse_sdvo_panel_data(struct drm_i915_private *i915)
973 const struct bdb_sdvo_panel_dtds *dtds;
974 struct drm_display_mode *panel_fixed_mode;
977 index = i915->params.vbt_sdvo_panel_type;
979 drm_dbg_kms(&i915->drm,
980 "Ignore SDVO panel mode from BIOS VBT tables.\n");
985 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
987 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
988 if (!sdvo_lvds_options)
991 index = sdvo_lvds_options->panel_type;
994 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
998 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
999 if (!panel_fixed_mode)
1002 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
1004 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
1006 drm_dbg_kms(&i915->drm,
1007 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
1008 DRM_MODE_ARG(panel_fixed_mode));
1011 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
1014 switch (DISPLAY_VER(i915)) {
1016 return alternate ? 66667 : 48000;
1019 return alternate ? 100000 : 96000;
1021 return alternate ? 100000 : 120000;
1026 parse_general_features(struct drm_i915_private *i915)
1028 const struct bdb_general_features *general;
1030 general = find_section(i915, BDB_GENERAL_FEATURES);
1034 i915->vbt.int_tv_support = general->int_tv_support;
1035 /* int_crt_support can't be trusted on earlier platforms */
1036 if (i915->vbt.version >= 155 &&
1037 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
1038 i915->vbt.int_crt_support = general->int_crt_support;
1039 i915->vbt.lvds_use_ssc = general->enable_ssc;
1040 i915->vbt.lvds_ssc_freq =
1041 intel_bios_ssc_frequency(i915, general->ssc_freq);
1042 i915->vbt.display_clock_mode = general->display_clock_mode;
1043 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
1044 if (i915->vbt.version >= 181) {
1045 i915->vbt.orientation = general->rotate_180 ?
1046 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
1047 DRM_MODE_PANEL_ORIENTATION_NORMAL;
1049 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1052 if (i915->vbt.version >= 249 && general->afc_startup_config) {
1053 i915->vbt.override_afc_startup = true;
1054 i915->vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
1057 drm_dbg_kms(&i915->drm,
1058 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
1059 i915->vbt.int_tv_support,
1060 i915->vbt.int_crt_support,
1061 i915->vbt.lvds_use_ssc,
1062 i915->vbt.lvds_ssc_freq,
1063 i915->vbt.display_clock_mode,
1064 i915->vbt.fdi_rx_polarity_inverted);
1067 static const struct child_device_config *
1068 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1070 return (const void *) &defs->devices[i * defs->child_dev_size];
1074 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1076 struct sdvo_device_mapping *mapping;
1077 const struct intel_bios_encoder_data *devdata;
1078 const struct child_device_config *child;
1082 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1083 * accurate and doesn't have to be, as long as it's not too strict.
1085 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1086 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1090 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1091 child = &devdata->child;
1093 if (child->slave_addr != SLAVE_ADDR1 &&
1094 child->slave_addr != SLAVE_ADDR2) {
1096 * If the slave address is neither 0x70 nor 0x72,
1097 * it is not a SDVO device. Skip it.
1101 if (child->dvo_port != DEVICE_PORT_DVOB &&
1102 child->dvo_port != DEVICE_PORT_DVOC) {
1103 /* skip the incorrect SDVO port */
1104 drm_dbg_kms(&i915->drm,
1105 "Incorrect SDVO port. Skip it\n");
1108 drm_dbg_kms(&i915->drm,
1109 "the SDVO device with slave addr %2x is found on"
1112 (child->dvo_port == DEVICE_PORT_DVOB) ?
1114 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
1115 if (!mapping->initialized) {
1116 mapping->dvo_port = child->dvo_port;
1117 mapping->slave_addr = child->slave_addr;
1118 mapping->dvo_wiring = child->dvo_wiring;
1119 mapping->ddc_pin = child->ddc_pin;
1120 mapping->i2c_pin = child->i2c_pin;
1121 mapping->initialized = 1;
1122 drm_dbg_kms(&i915->drm,
1123 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1124 mapping->dvo_port, mapping->slave_addr,
1125 mapping->dvo_wiring, mapping->ddc_pin,
1128 drm_dbg_kms(&i915->drm,
1129 "Maybe one SDVO port is shared by "
1130 "two SDVO device.\n");
1132 if (child->slave2_addr) {
1133 /* Maybe this is a SDVO device with multiple inputs */
1134 /* And the mapping info is not added */
1135 drm_dbg_kms(&i915->drm,
1136 "there exists the slave2_addr. Maybe this"
1137 " is a SDVO device with multiple inputs.\n");
1143 /* No SDVO device info is found */
1144 drm_dbg_kms(&i915->drm,
1145 "No SDVO device info is found in VBT\n");
1150 parse_driver_features(struct drm_i915_private *i915)
1152 const struct bdb_driver_features *driver;
1154 driver = find_section(i915, BDB_DRIVER_FEATURES);
1158 if (DISPLAY_VER(i915) >= 5) {
1160 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1161 * to mean "eDP". The VBT spec doesn't agree with that
1162 * interpretation, but real world VBTs seem to.
1164 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1165 i915->vbt.int_lvds_support = 0;
1168 * FIXME it's not clear which BDB version has the LVDS config
1169 * bits defined. Revision history in the VBT spec says:
1170 * "0.92 | Add two definitions for VBT value of LVDS Active
1171 * Config (00b and 11b values defined) | 06/13/2005"
1172 * but does not the specify the BDB version.
1174 * So far version 134 (on i945gm) is the oldest VBT observed
1175 * in the wild with the bits correctly populated. Version
1176 * 108 (on i85x) does not have the bits correctly populated.
1178 if (i915->vbt.version >= 134 &&
1179 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1180 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1181 i915->vbt.int_lvds_support = 0;
1184 if (i915->vbt.version < 228) {
1185 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1186 driver->drrs_enabled);
1188 * If DRRS is not supported, drrs_type has to be set to 0.
1189 * This is because, VBT is configured in such a way that
1190 * static DRRS is 0 and DRRS not supported is represented by
1191 * driver->drrs_enabled=false
1193 if (!driver->drrs_enabled)
1194 i915->vbt.drrs_type = DRRS_TYPE_NONE;
1196 i915->vbt.psr.enable = driver->psr_enabled;
1201 parse_power_conservation_features(struct drm_i915_private *i915)
1203 const struct bdb_lfp_power *power;
1204 u8 panel_type = i915->vbt.panel_type;
1206 if (i915->vbt.version < 228)
1209 power = find_section(i915, BDB_LFP_POWER);
1213 i915->vbt.psr.enable = power->psr & BIT(panel_type);
1216 * If DRRS is not supported, drrs_type has to be set to 0.
1217 * This is because, VBT is configured in such a way that
1218 * static DRRS is 0 and DRRS not supported is represented by
1219 * power->drrs & BIT(panel_type)=false
1221 if (!(power->drrs & BIT(panel_type)))
1222 i915->vbt.drrs_type = DRRS_TYPE_NONE;
1224 if (i915->vbt.version >= 232)
1225 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
1229 parse_edp(struct drm_i915_private *i915)
1231 const struct bdb_edp *edp;
1232 const struct edp_power_seq *edp_pps;
1233 const struct edp_fast_link_params *edp_link_params;
1234 int panel_type = i915->vbt.panel_type;
1236 edp = find_section(i915, BDB_EDP);
1240 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
1242 i915->vbt.edp.bpp = 18;
1245 i915->vbt.edp.bpp = 24;
1248 i915->vbt.edp.bpp = 30;
1252 /* Get the eDP sequencing and link info */
1253 edp_pps = &edp->power_seqs[panel_type];
1254 edp_link_params = &edp->fast_link_params[panel_type];
1256 i915->vbt.edp.pps = *edp_pps;
1258 switch (edp_link_params->rate) {
1260 i915->vbt.edp.rate = DP_LINK_BW_1_62;
1263 i915->vbt.edp.rate = DP_LINK_BW_2_7;
1266 drm_dbg_kms(&i915->drm,
1267 "VBT has unknown eDP link rate value %u\n",
1268 edp_link_params->rate);
1272 switch (edp_link_params->lanes) {
1274 i915->vbt.edp.lanes = 1;
1277 i915->vbt.edp.lanes = 2;
1280 i915->vbt.edp.lanes = 4;
1283 drm_dbg_kms(&i915->drm,
1284 "VBT has unknown eDP lane count value %u\n",
1285 edp_link_params->lanes);
1289 switch (edp_link_params->preemphasis) {
1290 case EDP_PREEMPHASIS_NONE:
1291 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1293 case EDP_PREEMPHASIS_3_5dB:
1294 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1296 case EDP_PREEMPHASIS_6dB:
1297 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1299 case EDP_PREEMPHASIS_9_5dB:
1300 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1303 drm_dbg_kms(&i915->drm,
1304 "VBT has unknown eDP pre-emphasis value %u\n",
1305 edp_link_params->preemphasis);
1309 switch (edp_link_params->vswing) {
1310 case EDP_VSWING_0_4V:
1311 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1313 case EDP_VSWING_0_6V:
1314 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1316 case EDP_VSWING_0_8V:
1317 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1319 case EDP_VSWING_1_2V:
1320 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1323 drm_dbg_kms(&i915->drm,
1324 "VBT has unknown eDP voltage swing value %u\n",
1325 edp_link_params->vswing);
1329 if (i915->vbt.version >= 173) {
1332 /* Don't read from VBT if module parameter has valid value*/
1333 if (i915->params.edp_vswing) {
1334 i915->vbt.edp.low_vswing =
1335 i915->params.edp_vswing == 1;
1337 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1338 i915->vbt.edp.low_vswing = vswing == 0;
1342 i915->vbt.edp.drrs_msa_timing_delay =
1343 (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3;
1347 parse_psr(struct drm_i915_private *i915)
1349 const struct bdb_psr *psr;
1350 const struct psr_table *psr_table;
1351 int panel_type = i915->vbt.panel_type;
1353 psr = find_section(i915, BDB_PSR);
1355 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1359 psr_table = &psr->psr_table[panel_type];
1361 i915->vbt.psr.full_link = psr_table->full_link;
1362 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1364 /* Allowed VBT values goes from 0 to 15 */
1365 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1366 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1369 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1370 * Old decimal value is wake up time in multiples of 100 us.
1372 if (i915->vbt.version >= 205 &&
1373 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1374 switch (psr_table->tp1_wakeup_time) {
1376 i915->vbt.psr.tp1_wakeup_time_us = 500;
1379 i915->vbt.psr.tp1_wakeup_time_us = 100;
1382 i915->vbt.psr.tp1_wakeup_time_us = 0;
1385 drm_dbg_kms(&i915->drm,
1386 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1387 psr_table->tp1_wakeup_time);
1390 i915->vbt.psr.tp1_wakeup_time_us = 2500;
1394 switch (psr_table->tp2_tp3_wakeup_time) {
1396 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1399 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1402 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1405 drm_dbg_kms(&i915->drm,
1406 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1407 psr_table->tp2_tp3_wakeup_time);
1410 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1414 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1415 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1418 if (i915->vbt.version >= 226) {
1419 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1421 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
1422 switch (wakeup_time) {
1437 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1439 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1440 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
1444 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1445 u16 version, enum port port)
1447 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1448 i915->vbt.dsi.bl_ports = BIT(port);
1449 if (i915->vbt.dsi.config->cabc_supported)
1450 i915->vbt.dsi.cabc_ports = BIT(port);
1455 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1457 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1460 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1463 case DL_DCS_PORT_A_AND_C:
1464 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1468 if (!i915->vbt.dsi.config->cabc_supported)
1471 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1473 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1476 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1479 case DL_DCS_PORT_A_AND_C:
1480 i915->vbt.dsi.cabc_ports =
1481 BIT(PORT_A) | BIT(PORT_C);
1487 parse_mipi_config(struct drm_i915_private *i915)
1489 const struct bdb_mipi_config *start;
1490 const struct mipi_config *config;
1491 const struct mipi_pps_data *pps;
1492 int panel_type = i915->vbt.panel_type;
1495 /* parse MIPI blocks only if LFP type is MIPI */
1496 if (!intel_bios_is_dsi_present(i915, &port))
1499 /* Initialize this to undefined indicating no generic MIPI support */
1500 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1502 /* Block #40 is already parsed and panel_fixed_mode is
1503 * stored in i915->lfp_lvds_vbt_mode
1504 * resuse this when needed
1507 /* Parse #52 for panel index used from panel_type already
1510 start = find_section(i915, BDB_MIPI_CONFIG);
1512 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1516 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1520 * get hold of the correct configuration block and pps data as per
1521 * the panel_type as index
1523 config = &start->config[panel_type];
1524 pps = &start->pps[panel_type];
1526 /* store as of now full data. Trim when we realise all is not needed */
1527 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1528 if (!i915->vbt.dsi.config)
1531 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1532 if (!i915->vbt.dsi.pps) {
1533 kfree(i915->vbt.dsi.config);
1537 parse_dsi_backlight_ports(i915, i915->vbt.version, port);
1539 /* FIXME is the 90 vs. 270 correct? */
1540 switch (config->rotation) {
1541 case ENABLE_ROTATION_0:
1543 * Most (all?) VBTs claim 0 degrees despite having
1544 * an upside down panel, thus we do not trust this.
1546 i915->vbt.dsi.orientation =
1547 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1549 case ENABLE_ROTATION_90:
1550 i915->vbt.dsi.orientation =
1551 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1553 case ENABLE_ROTATION_180:
1554 i915->vbt.dsi.orientation =
1555 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1557 case ENABLE_ROTATION_270:
1558 i915->vbt.dsi.orientation =
1559 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1563 /* We have mandatory mipi config blocks. Initialize as generic panel */
1564 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1567 /* Find the sequence block and size for the given panel. */
1569 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1570 u16 panel_id, u32 *seq_size)
1572 u32 total = get_blocksize(sequence);
1573 const u8 *data = &sequence->data[0];
1576 int header_size = sequence->version >= 3 ? 5 : 3;
1580 /* skip new block size */
1581 if (sequence->version >= 3)
1584 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1585 if (index + header_size > total) {
1586 DRM_ERROR("Invalid sequence block (header)\n");
1590 current_id = *(data + index);
1591 if (sequence->version >= 3)
1592 current_size = *((const u32 *)(data + index + 1));
1594 current_size = *((const u16 *)(data + index + 1));
1596 index += header_size;
1598 if (index + current_size > total) {
1599 DRM_ERROR("Invalid sequence block\n");
1603 if (current_id == panel_id) {
1604 *seq_size = current_size;
1605 return data + index;
1608 index += current_size;
1611 DRM_ERROR("Sequence block detected but no valid configuration\n");
1616 static int goto_next_sequence(const u8 *data, int index, int total)
1620 /* Skip Sequence Byte. */
1621 for (index = index + 1; index < total; index += len) {
1622 u8 operation_byte = *(data + index);
1625 switch (operation_byte) {
1626 case MIPI_SEQ_ELEM_END:
1628 case MIPI_SEQ_ELEM_SEND_PKT:
1629 if (index + 4 > total)
1632 len = *((const u16 *)(data + index + 2)) + 4;
1634 case MIPI_SEQ_ELEM_DELAY:
1637 case MIPI_SEQ_ELEM_GPIO:
1640 case MIPI_SEQ_ELEM_I2C:
1641 if (index + 7 > total)
1643 len = *(data + index + 6) + 7;
1646 DRM_ERROR("Unknown operation byte\n");
1654 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1658 u32 size_of_sequence;
1661 * Could skip sequence based on Size of Sequence alone, but also do some
1662 * checking on the structure.
1665 DRM_ERROR("Too small sequence size\n");
1669 /* Skip Sequence Byte. */
1673 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1674 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1677 size_of_sequence = *((const u32 *)(data + index));
1680 seq_end = index + size_of_sequence;
1681 if (seq_end > total) {
1682 DRM_ERROR("Invalid sequence size\n");
1686 for (; index < total; index += len) {
1687 u8 operation_byte = *(data + index);
1690 if (operation_byte == MIPI_SEQ_ELEM_END) {
1691 if (index != seq_end) {
1692 DRM_ERROR("Invalid element structure\n");
1698 len = *(data + index);
1702 * FIXME: Would be nice to check elements like for v1/v2 in
1703 * goto_next_sequence() above.
1705 switch (operation_byte) {
1706 case MIPI_SEQ_ELEM_SEND_PKT:
1707 case MIPI_SEQ_ELEM_DELAY:
1708 case MIPI_SEQ_ELEM_GPIO:
1709 case MIPI_SEQ_ELEM_I2C:
1710 case MIPI_SEQ_ELEM_SPI:
1711 case MIPI_SEQ_ELEM_PMIC:
1714 DRM_ERROR("Unknown operation byte %u\n",
1724 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1725 * skip all delay + gpio operands and stop at the first DSI packet op.
1727 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1729 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1732 if (drm_WARN_ON(&i915->drm,
1733 !data || i915->vbt.dsi.seq_version != 1))
1736 /* index = 1 to skip sequence byte */
1737 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1738 switch (data[index]) {
1739 case MIPI_SEQ_ELEM_SEND_PKT:
1740 return index == 1 ? 0 : index;
1741 case MIPI_SEQ_ELEM_DELAY:
1742 len = 5; /* 1 byte for operand + uint32 */
1744 case MIPI_SEQ_ELEM_GPIO:
1745 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1756 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1757 * The deassert must be done before calling intel_dsi_device_ready, so for
1758 * these devices we split the init OTP sequence into a deassert sequence and
1759 * the actual init OTP part.
1761 static void fixup_mipi_sequences(struct drm_i915_private *i915)
1766 /* Limit this to VLV for now. */
1767 if (!IS_VALLEYVIEW(i915))
1770 /* Limit this to v1 vid-mode sequences */
1771 if (i915->vbt.dsi.config->is_cmd_mode ||
1772 i915->vbt.dsi.seq_version != 1)
1775 /* Only do this if there are otp and assert seqs and no deassert seq */
1776 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1777 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1778 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1781 /* The deassert-sequence ends at the first DSI packet */
1782 len = get_init_otp_deassert_fragment_len(i915);
1786 drm_dbg_kms(&i915->drm,
1787 "Using init OTP fragment to deassert reset\n");
1789 /* Copy the fragment, update seq byte and terminate it */
1790 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1791 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1792 if (!i915->vbt.dsi.deassert_seq)
1794 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1795 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1796 /* Use the copy for deassert */
1797 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1798 i915->vbt.dsi.deassert_seq;
1799 /* Replace the last byte of the fragment with init OTP seq byte */
1800 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1801 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1802 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1806 parse_mipi_sequence(struct drm_i915_private *i915)
1808 int panel_type = i915->vbt.panel_type;
1809 const struct bdb_mipi_sequence *sequence;
1815 /* Only our generic panel driver uses the sequence block. */
1816 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1819 sequence = find_section(i915, BDB_MIPI_SEQUENCE);
1821 drm_dbg_kms(&i915->drm,
1822 "No MIPI Sequence found, parsing complete\n");
1826 /* Fail gracefully for forward incompatible sequence block. */
1827 if (sequence->version >= 4) {
1829 "Unable to parse MIPI Sequence Block v%u\n",
1834 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1837 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1841 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1845 /* Parse the sequences, store pointers to each sequence. */
1847 u8 seq_id = *(data + index);
1848 if (seq_id == MIPI_SEQ_END)
1851 if (seq_id >= MIPI_SEQ_MAX) {
1852 drm_err(&i915->drm, "Unknown sequence %u\n",
1857 /* Log about presence of sequences we won't run. */
1858 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1859 drm_dbg_kms(&i915->drm,
1860 "Unsupported sequence %u\n", seq_id);
1862 i915->vbt.dsi.sequence[seq_id] = data + index;
1864 if (sequence->version >= 3)
1865 index = goto_next_sequence_v3(data, index, seq_size);
1867 index = goto_next_sequence(data, index, seq_size);
1869 drm_err(&i915->drm, "Invalid sequence %u\n",
1875 i915->vbt.dsi.data = data;
1876 i915->vbt.dsi.size = seq_size;
1877 i915->vbt.dsi.seq_version = sequence->version;
1879 fixup_mipi_sequences(i915);
1881 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1886 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1890 parse_compression_parameters(struct drm_i915_private *i915)
1892 const struct bdb_compression_parameters *params;
1893 struct intel_bios_encoder_data *devdata;
1894 const struct child_device_config *child;
1898 if (i915->vbt.version < 198)
1901 params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
1904 if (params->entry_size != sizeof(params->data[0])) {
1905 drm_dbg_kms(&i915->drm,
1906 "VBT: unsupported compression param entry size\n");
1910 block_size = get_blocksize(params);
1911 if (block_size < sizeof(*params)) {
1912 drm_dbg_kms(&i915->drm,
1913 "VBT: expected 16 compression param entries\n");
1918 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1919 child = &devdata->child;
1921 if (!child->compression_enable)
1925 drm_dbg_kms(&i915->drm,
1926 "VBT: compression params not available\n");
1930 if (child->compression_method_cps) {
1931 drm_dbg_kms(&i915->drm,
1932 "VBT: CPS compression not supported\n");
1936 index = child->compression_structure_index;
1938 devdata->dsc = kmemdup(¶ms->data[index],
1939 sizeof(*devdata->dsc), GFP_KERNEL);
1943 static u8 translate_iboost(u8 val)
1945 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1947 if (val >= ARRAY_SIZE(mapping)) {
1948 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1951 return mapping[val];
1954 static const u8 cnp_ddc_pin_map[] = {
1956 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1957 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1958 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1959 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1962 static const u8 icp_ddc_pin_map[] = {
1963 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1964 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1965 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1966 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1967 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1968 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1969 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1970 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1971 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1974 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1975 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1976 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1977 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1978 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1981 static const u8 adls_ddc_pin_map[] = {
1982 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1983 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1984 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1985 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1986 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1989 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1990 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1991 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1992 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1995 static const u8 adlp_ddc_pin_map[] = {
1996 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1997 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1998 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1999 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
2000 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
2001 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
2004 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
2006 const u8 *ddc_pin_map;
2009 if (IS_ALDERLAKE_P(i915)) {
2010 ddc_pin_map = adlp_ddc_pin_map;
2011 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
2012 } else if (IS_ALDERLAKE_S(i915)) {
2013 ddc_pin_map = adls_ddc_pin_map;
2014 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
2015 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
2017 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
2018 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
2019 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
2020 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
2021 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
2022 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
2023 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
2024 ddc_pin_map = icp_ddc_pin_map;
2025 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
2026 } else if (HAS_PCH_CNP(i915)) {
2027 ddc_pin_map = cnp_ddc_pin_map;
2028 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
2030 /* Assuming direct map */
2034 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
2035 return ddc_pin_map[vbt_pin];
2037 drm_dbg_kms(&i915->drm,
2038 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
2043 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
2045 const struct intel_bios_encoder_data *devdata;
2051 for_each_port(port) {
2052 devdata = i915->vbt.ports[port];
2054 if (devdata && ddc_pin == devdata->child.ddc_pin)
2061 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
2064 struct drm_i915_private *i915 = devdata->i915;
2065 struct child_device_config *child;
2069 if (!devdata->child.ddc_pin)
2072 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2073 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2074 drm_dbg_kms(&i915->drm,
2075 "Port %c has invalid DDC pin %d, "
2076 "sticking to defaults\n",
2077 port_name(port), mapped_ddc_pin);
2078 devdata->child.ddc_pin = 0;
2082 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2086 drm_dbg_kms(&i915->drm,
2087 "port %c trying to use the same DDC pin (0x%x) as port %c, "
2088 "disabling port %c DVI/HDMI support\n",
2089 port_name(port), mapped_ddc_pin,
2090 port_name(p), port_name(p));
2093 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2094 * couldn't exist on the shared port. Otherwise they share the same ddc
2095 * pin and system couldn't communicate with them separately.
2097 * Give inverse child device order the priority, last one wins. Yes,
2098 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2099 * port A and port E with the same AUX ch and we must pick port E :(
2101 child = &i915->vbt.ports[p]->child;
2103 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2104 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2109 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2111 const struct intel_bios_encoder_data *devdata;
2117 for_each_port(port) {
2118 devdata = i915->vbt.ports[port];
2120 if (devdata && aux_ch == devdata->child.aux_channel)
2127 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2130 struct drm_i915_private *i915 = devdata->i915;
2131 struct child_device_config *child;
2134 p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2138 drm_dbg_kms(&i915->drm,
2139 "port %c trying to use the same AUX CH (0x%x) as port %c, "
2140 "disabling port %c DP support\n",
2141 port_name(port), devdata->child.aux_channel,
2142 port_name(p), port_name(p));
2145 * If we have multiple ports supposedly sharing the aux channel, then DP
2146 * couldn't exist on the shared port. Otherwise they share the same aux
2147 * channel and system couldn't communicate with them separately.
2149 * Give inverse child device order the priority, last one wins. Yes,
2150 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2151 * port A and port E with the same AUX ch and we must pick port E :(
2153 child = &i915->vbt.ports[p]->child;
2155 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2156 child->aux_channel = 0;
2159 static u8 dvo_port_type(u8 dvo_port)
2162 case DVO_PORT_HDMIA:
2163 case DVO_PORT_HDMIB:
2164 case DVO_PORT_HDMIC:
2165 case DVO_PORT_HDMID:
2166 case DVO_PORT_HDMIE:
2167 case DVO_PORT_HDMIF:
2168 case DVO_PORT_HDMIG:
2169 case DVO_PORT_HDMIH:
2170 case DVO_PORT_HDMII:
2171 return DVO_PORT_HDMIA;
2181 return DVO_PORT_DPA;
2182 case DVO_PORT_MIPIA:
2183 case DVO_PORT_MIPIB:
2184 case DVO_PORT_MIPIC:
2185 case DVO_PORT_MIPID:
2186 return DVO_PORT_MIPIA;
2192 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2193 const int port_mapping[][3], u8 dvo_port)
2198 for (port = PORT_A; port < n_ports; port++) {
2199 for (i = 0; i < n_dvo; i++) {
2200 if (port_mapping[port][i] == -1)
2203 if (dvo_port == port_mapping[port][i])
2211 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2215 * Each DDI port can have more than one value on the "DVO Port" field,
2216 * so look for all the possible values for each port.
2218 static const int port_mapping[][3] = {
2219 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2220 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2221 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2222 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2223 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2224 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2225 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2226 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2227 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2230 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2231 * map to DDI A,B,TC1,TC2 respectively.
2233 static const int rkl_port_mapping[][3] = {
2234 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2235 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2237 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2238 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2241 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2242 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2244 static const int adls_port_mapping[][3] = {
2245 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2248 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2249 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2250 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2251 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2253 static const int xelpd_port_mapping[][3] = {
2254 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2255 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2256 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2257 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2258 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2259 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2260 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2261 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2262 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2265 if (DISPLAY_VER(i915) == 13)
2266 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2267 ARRAY_SIZE(xelpd_port_mapping[0]),
2270 else if (IS_ALDERLAKE_S(i915))
2271 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2272 ARRAY_SIZE(adls_port_mapping[0]),
2275 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2276 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2277 ARRAY_SIZE(rkl_port_mapping[0]),
2281 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2282 ARRAY_SIZE(port_mapping[0]),
2287 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2289 switch (vbt_max_link_rate) {
2291 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2293 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2295 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2297 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2299 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2301 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2303 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2305 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2310 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2312 switch (vbt_max_link_rate) {
2314 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2316 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2318 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2320 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2325 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2327 if (!devdata || devdata->i915->vbt.version < 216)
2330 if (devdata->i915->vbt.version >= 230)
2331 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2333 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2336 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2339 struct drm_i915_private *i915 = devdata->i915;
2342 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2345 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
2348 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
2350 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2351 is_hdmi ? "/HDMI" : "");
2353 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2354 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2358 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2360 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2364 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2366 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2370 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2372 return intel_bios_encoder_supports_dvi(devdata) &&
2373 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2377 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2379 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2383 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2385 return intel_bios_encoder_supports_dp(devdata) &&
2386 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2389 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2391 if (!devdata || devdata->i915->vbt.version < 158)
2394 return devdata->child.hdmi_level_shifter_value;
2397 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2399 if (!devdata || devdata->i915->vbt.version < 204)
2402 switch (devdata->child.hdmi_max_data_rate) {
2404 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2406 case HDMI_MAX_DATA_RATE_PLATFORM:
2408 case HDMI_MAX_DATA_RATE_594:
2410 case HDMI_MAX_DATA_RATE_340:
2412 case HDMI_MAX_DATA_RATE_300:
2414 case HDMI_MAX_DATA_RATE_297:
2416 case HDMI_MAX_DATA_RATE_165:
2421 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2424 * On some ICL SKUs port F is not present, but broken VBTs mark
2425 * the port as present. Only try to initialize port F for the
2426 * SKUs that may actually have it.
2428 if (port == PORT_F && IS_ICELAKE(i915))
2429 return IS_ICL_WITH_PORT_F(i915);
2434 static void parse_ddi_port(struct drm_i915_private *i915,
2435 struct intel_bios_encoder_data *devdata)
2437 const struct child_device_config *child = &devdata->child;
2438 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
2439 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2442 port = dvo_port_to_port(i915, child->dvo_port);
2443 if (port == PORT_NONE)
2446 if (!is_port_valid(i915, port)) {
2447 drm_dbg_kms(&i915->drm,
2448 "VBT reports port %c as supported, but that can't be true: skipping\n",
2453 if (i915->vbt.ports[port]) {
2454 drm_dbg_kms(&i915->drm,
2455 "More than one child device for port %c in VBT, using the first.\n",
2460 sanitize_device_type(devdata, port);
2462 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2463 is_dp = intel_bios_encoder_supports_dp(devdata);
2464 is_crt = intel_bios_encoder_supports_crt(devdata);
2465 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2466 is_edp = intel_bios_encoder_supports_edp(devdata);
2468 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2469 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2471 drm_dbg_kms(&i915->drm,
2472 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2473 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
2474 HAS_LSPCON(i915) && child->lspcon,
2475 supports_typec_usb, supports_tbt,
2476 devdata->dsc != NULL);
2479 sanitize_ddc_pin(devdata, port);
2482 sanitize_aux_ch(devdata, port);
2484 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2485 if (hdmi_level_shift >= 0) {
2486 drm_dbg_kms(&i915->drm,
2487 "Port %c VBT HDMI level shift: %d\n",
2488 port_name(port), hdmi_level_shift);
2491 max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2493 drm_dbg_kms(&i915->drm,
2494 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2495 port_name(port), max_tmds_clock);
2497 /* I_boost config for SKL and above */
2498 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2500 drm_dbg_kms(&i915->drm,
2501 "Port %c VBT (e)DP boost level: %d\n",
2502 port_name(port), dp_boost_level);
2504 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2505 if (hdmi_boost_level)
2506 drm_dbg_kms(&i915->drm,
2507 "Port %c VBT HDMI boost level: %d\n",
2508 port_name(port), hdmi_boost_level);
2510 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2511 if (dp_max_link_rate)
2512 drm_dbg_kms(&i915->drm,
2513 "Port %c VBT DP max link rate: %d\n",
2514 port_name(port), dp_max_link_rate);
2516 i915->vbt.ports[port] = devdata;
2519 static bool has_ddi_port_info(struct drm_i915_private *i915)
2521 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2524 static void parse_ddi_ports(struct drm_i915_private *i915)
2526 struct intel_bios_encoder_data *devdata;
2528 if (!has_ddi_port_info(i915))
2531 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2532 parse_ddi_port(i915, devdata);
2536 parse_general_definitions(struct drm_i915_private *i915)
2538 const struct bdb_general_definitions *defs;
2539 struct intel_bios_encoder_data *devdata;
2540 const struct child_device_config *child;
2541 int i, child_device_num;
2546 defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2548 drm_dbg_kms(&i915->drm,
2549 "No general definition block is found, no devices defined.\n");
2553 block_size = get_blocksize(defs);
2554 if (block_size < sizeof(*defs)) {
2555 drm_dbg_kms(&i915->drm,
2556 "General definitions block too small (%u)\n",
2561 bus_pin = defs->crt_ddc_gmbus_pin;
2562 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2563 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2564 i915->vbt.crt_ddc_pin = bus_pin;
2566 if (i915->vbt.version < 106) {
2568 } else if (i915->vbt.version < 111) {
2570 } else if (i915->vbt.version < 195) {
2571 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2572 } else if (i915->vbt.version == 195) {
2574 } else if (i915->vbt.version <= 215) {
2576 } else if (i915->vbt.version <= 237) {
2579 expected_size = sizeof(*child);
2580 BUILD_BUG_ON(sizeof(*child) < 39);
2582 "Expected child device config size for VBT version %u not known; assuming %u\n",
2583 i915->vbt.version, expected_size);
2586 /* Flag an error for unexpected size, but continue anyway. */
2587 if (defs->child_dev_size != expected_size)
2589 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2590 defs->child_dev_size, expected_size, i915->vbt.version);
2592 /* The legacy sized child device config is the minimum we need. */
2593 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2594 drm_dbg_kms(&i915->drm,
2595 "Child device config size %u is too small.\n",
2596 defs->child_dev_size);
2600 /* get the number of child device */
2601 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2603 for (i = 0; i < child_device_num; i++) {
2604 child = child_device_ptr(defs, i);
2605 if (!child->device_type)
2608 drm_dbg_kms(&i915->drm,
2609 "Found VBT child device with type 0x%x\n",
2610 child->device_type);
2612 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2616 devdata->i915 = i915;
2619 * Copy as much as we know (sizeof) and is available
2620 * (child_dev_size) of the child device config. Accessing the
2621 * data must depend on VBT version.
2623 memcpy(&devdata->child, child,
2624 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2626 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2629 if (list_empty(&i915->vbt.display_devices))
2630 drm_dbg_kms(&i915->drm,
2631 "no child dev is parsed from VBT\n");
2634 /* Common defaults which may be overridden by VBT. */
2636 init_vbt_defaults(struct drm_i915_private *i915)
2638 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2640 /* Default to having backlight */
2641 i915->vbt.backlight.present = true;
2643 /* LFP panel data */
2644 i915->vbt.lvds_dither = 1;
2646 /* SDVO panel data */
2647 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2649 /* general features */
2650 i915->vbt.int_tv_support = 1;
2651 i915->vbt.int_crt_support = 1;
2653 /* driver features */
2654 i915->vbt.int_lvds_support = 1;
2656 /* Default to using SSC */
2657 i915->vbt.lvds_use_ssc = 1;
2659 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2662 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2663 !HAS_PCH_SPLIT(i915));
2664 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2665 i915->vbt.lvds_ssc_freq);
2668 /* Defaults to initialize only if there is no VBT. */
2670 init_vbt_missing_defaults(struct drm_i915_private *i915)
2673 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2674 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2676 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2679 for_each_port_masked(port, ports) {
2680 struct intel_bios_encoder_data *devdata;
2681 struct child_device_config *child;
2682 enum phy phy = intel_port_to_phy(i915, port);
2685 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2688 if (intel_phy_is_tc(i915, phy))
2691 /* Create fake child device config */
2692 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2696 devdata->i915 = i915;
2697 child = &devdata->child;
2700 child->dvo_port = DVO_PORT_HDMIF;
2701 else if (port == PORT_E)
2702 child->dvo_port = DVO_PORT_HDMIE;
2704 child->dvo_port = DVO_PORT_HDMIA + port;
2706 if (port != PORT_A && port != PORT_E)
2707 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2710 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2713 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2715 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2717 drm_dbg_kms(&i915->drm,
2718 "Generating default VBT child device with type 0x04%x on port %c\n",
2719 child->device_type, port_name(port));
2722 /* Bypass some minimum baseline VBT version checks */
2723 i915->vbt.version = 155;
2726 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2728 const void *_vbt = vbt;
2730 return _vbt + vbt->bdb_offset;
2734 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2735 * @buf: pointer to a buffer to validate
2736 * @size: size of the buffer
2738 * Returns true on valid VBT.
2740 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2742 const struct vbt_header *vbt = buf;
2743 const struct bdb_header *bdb;
2748 if (sizeof(struct vbt_header) > size) {
2749 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2753 if (memcmp(vbt->signature, "$VBT", 4)) {
2754 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2758 if (vbt->vbt_size > size) {
2759 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2763 size = vbt->vbt_size;
2765 if (range_overflows_t(size_t,
2767 sizeof(struct bdb_header),
2769 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2773 bdb = get_bdb_header(vbt);
2774 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2775 DRM_DEBUG_DRIVER("BDB incomplete\n");
2782 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2784 u32 count, data, found, store = 0;
2785 u32 static_region, oprom_offset;
2786 u32 oprom_size = 0x200000;
2790 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2791 static_region &= OPTIONROM_SPI_REGIONID_MASK;
2792 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2794 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2795 oprom_offset &= OROM_OFFSET_MASK;
2797 for (count = 0; count < oprom_size; count += 4) {
2798 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
2799 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2801 if (data == *((const u32 *)"$VBT")) {
2802 found = oprom_offset + count;
2807 if (count >= oprom_size)
2810 /* Get VBT size and allocate space for the VBT */
2811 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
2812 offsetof(struct vbt_header, vbt_size));
2813 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2816 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
2820 for (count = 0; count < vbt_size; count += 4) {
2821 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
2822 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2823 *(vbt + store++) = data;
2826 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2829 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
2831 return (struct vbt_header *)vbt;
2839 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2841 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2842 void __iomem *p = NULL, *oprom;
2843 struct vbt_header *vbt;
2847 oprom = pci_map_rom(pdev, &size);
2851 /* Scour memory looking for the VBT signature. */
2852 for (i = 0; i + 4 < size; i += 4) {
2853 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2862 goto err_unmap_oprom;
2864 if (sizeof(struct vbt_header) > size) {
2865 drm_dbg(&i915->drm, "VBT header incomplete\n");
2866 goto err_unmap_oprom;
2869 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2870 if (vbt_size > size) {
2872 "VBT incomplete (vbt_size overflows)\n");
2873 goto err_unmap_oprom;
2876 /* The rest will be validated by intel_bios_is_valid_vbt() */
2877 vbt = kmalloc(vbt_size, GFP_KERNEL);
2879 goto err_unmap_oprom;
2881 memcpy_fromio(vbt, p, vbt_size);
2883 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2886 pci_unmap_rom(pdev, oprom);
2888 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2895 pci_unmap_rom(pdev, oprom);
2901 * intel_bios_init - find VBT and initialize settings from the BIOS
2902 * @i915: i915 device instance
2904 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2905 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2906 * initialize some defaults if the VBT is not present at all.
2908 void intel_bios_init(struct drm_i915_private *i915)
2910 const struct vbt_header *vbt = i915->opregion.vbt;
2911 struct vbt_header *oprom_vbt = NULL;
2912 const struct bdb_header *bdb;
2914 INIT_LIST_HEAD(&i915->vbt.display_devices);
2915 INIT_LIST_HEAD(&i915->vbt.bdb_blocks);
2917 if (!HAS_DISPLAY(i915)) {
2918 drm_dbg_kms(&i915->drm,
2919 "Skipping VBT init due to disabled display.\n");
2923 init_vbt_defaults(i915);
2926 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
2929 if (!vbt && IS_DGFX(i915)) {
2930 oprom_vbt = spi_oprom_get_vbt(i915);
2935 oprom_vbt = oprom_get_vbt(i915);
2942 bdb = get_bdb_header(vbt);
2943 i915->vbt.version = bdb->version;
2945 drm_dbg_kms(&i915->drm,
2946 "VBT signature \"%.*s\", BDB version %d\n",
2947 (int)sizeof(vbt->signature), vbt->signature, i915->vbt.version);
2949 init_bdb_blocks(i915, bdb);
2951 /* Grab useful general definitions */
2952 parse_general_features(i915);
2953 parse_general_definitions(i915);
2954 parse_panel_options(i915);
2955 parse_generic_dtd(i915);
2956 parse_lfp_data(i915);
2957 parse_lfp_backlight(i915);
2958 parse_sdvo_panel_data(i915);
2959 parse_driver_features(i915);
2960 parse_power_conservation_features(i915);
2963 parse_mipi_config(i915);
2964 parse_mipi_sequence(i915);
2966 /* Depends on child device list */
2967 parse_compression_parameters(i915);
2971 drm_info(&i915->drm,
2972 "Failed to find VBIOS tables (VBT)\n");
2973 init_vbt_missing_defaults(i915);
2976 /* Further processing on pre-parsed or generated child device data */
2977 parse_sdvo_device_mapping(i915);
2978 parse_ddi_ports(i915);
2984 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2985 * @i915: i915 device instance
2987 void intel_bios_driver_remove(struct drm_i915_private *i915)
2989 struct intel_bios_encoder_data *devdata, *nd;
2990 struct bdb_block_entry *entry, *ne;
2992 list_for_each_entry_safe(devdata, nd, &i915->vbt.display_devices, node) {
2993 list_del(&devdata->node);
2994 kfree(devdata->dsc);
2998 list_for_each_entry_safe(entry, ne, &i915->vbt.bdb_blocks, node) {
2999 list_del(&entry->node);
3003 kfree(i915->vbt.sdvo_lvds_vbt_mode);
3004 i915->vbt.sdvo_lvds_vbt_mode = NULL;
3005 kfree(i915->vbt.lfp_lvds_vbt_mode);
3006 i915->vbt.lfp_lvds_vbt_mode = NULL;
3007 kfree(i915->vbt.dsi.data);
3008 i915->vbt.dsi.data = NULL;
3009 kfree(i915->vbt.dsi.pps);
3010 i915->vbt.dsi.pps = NULL;
3011 kfree(i915->vbt.dsi.config);
3012 i915->vbt.dsi.config = NULL;
3013 kfree(i915->vbt.dsi.deassert_seq);
3014 i915->vbt.dsi.deassert_seq = NULL;
3018 * intel_bios_is_tv_present - is integrated TV present in VBT
3019 * @i915: i915 device instance
3021 * Return true if TV is present. If no child devices were parsed from VBT,
3022 * assume TV is present.
3024 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
3026 const struct intel_bios_encoder_data *devdata;
3027 const struct child_device_config *child;
3029 if (!i915->vbt.int_tv_support)
3032 if (list_empty(&i915->vbt.display_devices))
3035 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3036 child = &devdata->child;
3039 * If the device type is not TV, continue.
3041 switch (child->device_type) {
3042 case DEVICE_TYPE_INT_TV:
3043 case DEVICE_TYPE_TV:
3044 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
3049 /* Only when the addin_offset is non-zero, it is regarded
3052 if (child->addin_offset)
3060 * intel_bios_is_lvds_present - is LVDS present in VBT
3061 * @i915: i915 device instance
3062 * @i2c_pin: i2c pin for LVDS if present
3064 * Return true if LVDS is present. If no child devices were parsed from VBT,
3065 * assume LVDS is present.
3067 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3069 const struct intel_bios_encoder_data *devdata;
3070 const struct child_device_config *child;
3072 if (list_empty(&i915->vbt.display_devices))
3075 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3076 child = &devdata->child;
3078 /* If the device type is not LFP, continue.
3079 * We have to check both the new identifiers as well as the
3080 * old for compatibility with some BIOSes.
3082 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3083 child->device_type != DEVICE_TYPE_LFP)
3086 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3087 *i2c_pin = child->i2c_pin;
3089 /* However, we cannot trust the BIOS writers to populate
3090 * the VBT correctly. Since LVDS requires additional
3091 * information from AIM blocks, a non-zero addin offset is
3092 * a good indicator that the LVDS is actually present.
3094 if (child->addin_offset)
3097 /* But even then some BIOS writers perform some black magic
3098 * and instantiate the device without reference to any
3099 * additional data. Trust that if the VBT was written into
3100 * the OpRegion then they have validated the LVDS's existence.
3102 if (i915->opregion.vbt)
3110 * intel_bios_is_port_present - is the specified digital port present
3111 * @i915: i915 device instance
3112 * @port: port to check
3114 * Return true if the device in %port is present.
3116 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3118 if (WARN_ON(!has_ddi_port_info(i915)))
3121 return i915->vbt.ports[port];
3125 * intel_bios_is_port_edp - is the device in given port eDP
3126 * @i915: i915 device instance
3127 * @port: port to check
3129 * Return true if the device in %port is eDP.
3131 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3133 const struct intel_bios_encoder_data *devdata =
3134 intel_bios_encoder_data_lookup(i915, port);
3136 return devdata && intel_bios_encoder_supports_edp(devdata);
3139 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3141 const struct child_device_config *child = &devdata->child;
3143 if (!intel_bios_encoder_supports_dp(devdata) ||
3144 !intel_bios_encoder_supports_hdmi(devdata))
3147 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3150 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3151 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3152 child->aux_channel != 0)
3158 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3161 const struct intel_bios_encoder_data *devdata =
3162 intel_bios_encoder_data_lookup(i915, port);
3164 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3168 * intel_bios_is_dsi_present - is DSI present in VBT
3169 * @i915: i915 device instance
3170 * @port: port for DSI if present
3172 * Return true if DSI is present, and return the port in %port.
3174 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3177 const struct intel_bios_encoder_data *devdata;
3178 const struct child_device_config *child;
3181 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3182 child = &devdata->child;
3184 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3187 dvo_port = child->dvo_port;
3189 if (dvo_port == DVO_PORT_MIPIA ||
3190 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
3191 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
3193 *port = dvo_port - DVO_PORT_MIPIA;
3195 } else if (dvo_port == DVO_PORT_MIPIB ||
3196 dvo_port == DVO_PORT_MIPIC ||
3197 dvo_port == DVO_PORT_MIPID) {
3198 drm_dbg_kms(&i915->drm,
3199 "VBT has unsupported DSI port %c\n",
3200 port_name(dvo_port - DVO_PORT_MIPIA));
3207 static void fill_dsc(struct intel_crtc_state *crtc_state,
3208 struct dsc_compression_parameters_entry *dsc,
3211 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3214 vdsc_cfg->dsc_version_major = dsc->version_major;
3215 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3217 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3219 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3221 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3224 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3227 crtc_state->pipe_bpp = bpc * 3;
3229 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3230 VBT_DSC_MAX_BPP(dsc->max_bpp));
3233 * FIXME: This is ugly, and slice count should take DSC engine
3234 * throughput etc. into account.
3236 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3238 if (dsc->slices_per_line & BIT(2)) {
3239 crtc_state->dsc.slice_count = 4;
3240 } else if (dsc->slices_per_line & BIT(1)) {
3241 crtc_state->dsc.slice_count = 2;
3244 if (!(dsc->slices_per_line & BIT(0)))
3245 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3247 crtc_state->dsc.slice_count = 1;
3250 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3251 crtc_state->dsc.slice_count != 0)
3252 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3253 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3254 crtc_state->dsc.slice_count);
3257 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3258 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3260 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3261 dsc->rc_buffer_size);
3263 /* FIXME: DSI spec says bpc + 1 for this one */
3264 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3266 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3268 vdsc_cfg->slice_height = dsc->slice_height;
3271 /* FIXME: initially DSI specific */
3272 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3273 struct intel_crtc_state *crtc_state,
3276 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3277 const struct intel_bios_encoder_data *devdata;
3278 const struct child_device_config *child;
3280 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3281 child = &devdata->child;
3283 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3286 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
3291 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3301 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3302 * @i915: i915 device instance
3303 * @port: port to check
3305 * Return true if HPD should be inverted for %port.
3308 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3311 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3313 if (drm_WARN_ON_ONCE(&i915->drm,
3314 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3317 return devdata && devdata->child.hpd_invert;
3321 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
3322 * @i915: i915 device instance
3323 * @port: port to check
3325 * Return true if LSPCON is present on this port
3328 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
3331 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3333 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
3337 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3338 * @i915: i915 device instance
3339 * @port: port to check
3341 * Return true if port requires lane reversal
3344 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3347 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3349 return devdata && devdata->child.lane_reversal;
3352 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3355 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3358 if (!devdata || !devdata->child.aux_channel) {
3359 aux_ch = (enum aux_ch)port;
3361 drm_dbg_kms(&i915->drm,
3362 "using AUX %c for port %c (platform default)\n",
3363 aux_ch_name(aux_ch), port_name(port));
3368 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3369 * map to DDI A,B,TC1,TC2 respectively.
3371 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3372 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3374 switch (devdata->child.aux_channel) {
3379 if (IS_ALDERLAKE_S(i915))
3380 aux_ch = AUX_CH_USBC1;
3385 if (IS_ALDERLAKE_S(i915))
3386 aux_ch = AUX_CH_USBC2;
3387 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3388 aux_ch = AUX_CH_USBC1;
3393 if (DISPLAY_VER(i915) == 13)
3394 aux_ch = AUX_CH_D_XELPD;
3395 else if (IS_ALDERLAKE_S(i915))
3396 aux_ch = AUX_CH_USBC3;
3397 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3398 aux_ch = AUX_CH_USBC2;
3403 if (DISPLAY_VER(i915) == 13)
3404 aux_ch = AUX_CH_E_XELPD;
3405 else if (IS_ALDERLAKE_S(i915))
3406 aux_ch = AUX_CH_USBC4;
3411 if (DISPLAY_VER(i915) == 13)
3412 aux_ch = AUX_CH_USBC1;
3417 if (DISPLAY_VER(i915) == 13)
3418 aux_ch = AUX_CH_USBC2;
3423 if (DISPLAY_VER(i915) == 13)
3424 aux_ch = AUX_CH_USBC3;
3429 if (DISPLAY_VER(i915) == 13)
3430 aux_ch = AUX_CH_USBC4;
3435 MISSING_CASE(devdata->child.aux_channel);
3440 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3441 aux_ch_name(aux_ch), port_name(port));
3446 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3448 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3449 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3451 return _intel_bios_max_tmds_clock(devdata);
3454 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3455 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3457 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3458 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3460 return _intel_bios_hdmi_level_shift(devdata);
3463 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3465 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3468 return translate_iboost(devdata->child.dp_iboost_level);
3471 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3473 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3476 return translate_iboost(devdata->child.hdmi_iboost_level);
3479 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3481 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3482 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3484 return _intel_bios_dp_max_link_rate(devdata);
3487 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3489 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3490 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3492 if (!devdata || !devdata->child.ddc_pin)
3495 return map_ddc_pin(i915, devdata->child.ddc_pin);
3498 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3500 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3503 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3505 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3508 const struct intel_bios_encoder_data *
3509 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3511 return i915->vbt.ports[port];