2 * Copyright © 2006 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
24 * Eric Anholt <eric@anholt.net>
28 #include <drm/dp/drm_dp_helper.h>
30 #include "display/intel_display.h"
31 #include "display/intel_display_types.h"
32 #include "display/intel_gmbus.h"
37 #define _INTEL_BIOS_PRIVATE
38 #include "intel_vbt_defs.h"
41 * DOC: Video BIOS Table (VBT)
43 * The Video BIOS Table, or VBT, provides platform and board specific
44 * configuration information to the driver that is not discoverable or available
45 * through other means. The configuration is mostly related to display
46 * hardware. The VBT is available via the ACPI OpRegion or, on older systems, in
49 * The VBT consists of a VBT Header (defined as &struct vbt_header), a BDB
50 * Header (&struct bdb_header), and a number of BIOS Data Blocks (BDB) that
51 * contain the actual configuration information. The VBT Header, and thus the
52 * VBT, begins with "$VBT" signature. The VBT Header contains the offset of the
53 * BDB Header. The data blocks are concatenated after the BDB Header. The data
54 * blocks have a 1-byte Block ID, 2-byte Block Size, and Block Size bytes of
55 * data. (Block 53, the MIPI Sequence Block is an exception.)
57 * The driver parses the VBT during load. The relevant information is stored in
58 * driver private data for ease of use, and the actual VBT is not read after
62 /* Wrapper for VBT child device config */
63 struct intel_bios_encoder_data {
64 struct drm_i915_private *i915;
66 struct child_device_config child;
67 struct dsc_compression_parameters_entry *dsc;
68 struct list_head node;
71 #define SLAVE_ADDR1 0x70
72 #define SLAVE_ADDR2 0x72
74 /* Get BDB block size given a pointer to Block ID. */
75 static u32 _get_blocksize(const u8 *block_base)
77 /* The MIPI Sequence Block v3+ has a separate size field. */
78 if (*block_base == BDB_MIPI_SEQUENCE && *(block_base + 3) >= 3)
79 return *((const u32 *)(block_base + 4));
81 return *((const u16 *)(block_base + 1));
84 /* Get BDB block size give a pointer to data after Block ID and Block Size. */
85 static u32 get_blocksize(const void *block_data)
87 return _get_blocksize(block_data - 3);
91 find_raw_section(const void *_bdb, enum bdb_block_id section_id)
93 const struct bdb_header *bdb = _bdb;
94 const u8 *base = _bdb;
96 u32 total, current_size;
97 enum bdb_block_id current_id;
99 /* skip to first section */
100 index += bdb->header_size;
101 total = bdb->bdb_size;
103 /* walk the sections looking for section_id */
104 while (index + 3 < total) {
105 current_id = *(base + index);
106 current_size = _get_blocksize(base + index);
109 if (index + current_size > total)
112 if (current_id == section_id)
115 index += current_size;
122 * Offset from the start of BDB to the start of the
123 * block data (just past the block header).
125 static u32 block_offset(const void *bdb, enum bdb_block_id section_id)
129 block = find_raw_section(bdb, section_id);
136 /* size of the block excluding the header */
137 static u32 block_size(const void *bdb, enum bdb_block_id section_id)
141 block = find_raw_section(bdb, section_id);
145 return get_blocksize(block);
148 struct bdb_block_entry {
149 struct list_head node;
150 enum bdb_block_id section_id;
155 find_section(struct drm_i915_private *i915,
156 enum bdb_block_id section_id)
158 struct bdb_block_entry *entry;
160 list_for_each_entry(entry, &i915->vbt.bdb_blocks, node) {
161 if (entry->section_id == section_id)
162 return entry->data + 3;
168 static const struct {
169 enum bdb_block_id section_id;
172 { .section_id = BDB_GENERAL_FEATURES,
173 .min_size = sizeof(struct bdb_general_features), },
174 { .section_id = BDB_GENERAL_DEFINITIONS,
175 .min_size = sizeof(struct bdb_general_definitions), },
176 { .section_id = BDB_PSR,
177 .min_size = sizeof(struct bdb_psr), },
178 { .section_id = BDB_DRIVER_FEATURES,
179 .min_size = sizeof(struct bdb_driver_features), },
180 { .section_id = BDB_SDVO_LVDS_OPTIONS,
181 .min_size = sizeof(struct bdb_sdvo_lvds_options), },
182 { .section_id = BDB_SDVO_PANEL_DTDS,
183 .min_size = sizeof(struct bdb_sdvo_panel_dtds), },
184 { .section_id = BDB_EDP,
185 .min_size = sizeof(struct bdb_edp), },
186 { .section_id = BDB_LVDS_OPTIONS,
187 .min_size = sizeof(struct bdb_lvds_options), },
189 * BDB_LVDS_LFP_DATA depends on BDB_LVDS_LFP_DATA_PTRS,
190 * so keep the two ordered.
192 { .section_id = BDB_LVDS_LFP_DATA_PTRS,
193 .min_size = sizeof(struct bdb_lvds_lfp_data_ptrs), },
194 { .section_id = BDB_LVDS_LFP_DATA,
195 .min_size = 0, /* special case */ },
196 { .section_id = BDB_LVDS_BACKLIGHT,
197 .min_size = sizeof(struct bdb_lfp_backlight_data), },
198 { .section_id = BDB_LFP_POWER,
199 .min_size = sizeof(struct bdb_lfp_power), },
200 { .section_id = BDB_MIPI_CONFIG,
201 .min_size = sizeof(struct bdb_mipi_config), },
202 { .section_id = BDB_MIPI_SEQUENCE,
203 .min_size = sizeof(struct bdb_mipi_sequence) },
204 { .section_id = BDB_COMPRESSION_PARAMETERS,
205 .min_size = sizeof(struct bdb_compression_parameters), },
206 { .section_id = BDB_GENERIC_DTD,
207 .min_size = sizeof(struct bdb_generic_dtd), },
210 static size_t lfp_data_min_size(struct drm_i915_private *i915)
212 const struct bdb_lvds_lfp_data_ptrs *ptrs;
215 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
219 size = sizeof(struct bdb_lvds_lfp_data);
220 if (ptrs->panel_name.table_size)
221 size = max(size, ptrs->panel_name.offset +
222 sizeof(struct bdb_lvds_lfp_data_tail));
227 static bool validate_lfp_data_ptrs(const void *bdb,
228 const struct bdb_lvds_lfp_data_ptrs *ptrs)
230 int fp_timing_size, dvo_timing_size, panel_pnp_id_size, panel_name_size;
231 int data_block_size, lfp_data_size;
234 data_block_size = block_size(bdb, BDB_LVDS_LFP_DATA);
235 if (data_block_size == 0)
238 /* always 3 indicating the presence of fp_timing+dvo_timing+panel_pnp_id */
239 if (ptrs->lvds_entries != 3)
242 fp_timing_size = ptrs->ptr[0].fp_timing.table_size;
243 dvo_timing_size = ptrs->ptr[0].dvo_timing.table_size;
244 panel_pnp_id_size = ptrs->ptr[0].panel_pnp_id.table_size;
245 panel_name_size = ptrs->panel_name.table_size;
247 /* fp_timing has variable size */
248 if (fp_timing_size < 32 ||
249 dvo_timing_size != sizeof(struct lvds_dvo_timing) ||
250 panel_pnp_id_size != sizeof(struct lvds_pnp_id))
253 /* panel_name is not present in old VBTs */
254 if (panel_name_size != 0 &&
255 panel_name_size != sizeof(struct lvds_lfp_panel_name))
258 lfp_data_size = ptrs->ptr[1].fp_timing.offset - ptrs->ptr[0].fp_timing.offset;
259 if (16 * lfp_data_size > data_block_size)
263 * Except for vlv/chv machines all real VBTs seem to have 6
264 * unaccounted bytes in the fp_timing table. And it doesn't
265 * appear to be a really intentional hole as the fp_timing
266 * 0xffff terminator is always within those 6 missing bytes.
268 if (fp_timing_size + dvo_timing_size + panel_pnp_id_size != lfp_data_size &&
269 fp_timing_size + 6 + dvo_timing_size + panel_pnp_id_size != lfp_data_size)
272 if (ptrs->ptr[0].fp_timing.offset + fp_timing_size > ptrs->ptr[0].dvo_timing.offset ||
273 ptrs->ptr[0].dvo_timing.offset + dvo_timing_size != ptrs->ptr[0].panel_pnp_id.offset ||
274 ptrs->ptr[0].panel_pnp_id.offset + panel_pnp_id_size != lfp_data_size)
277 /* make sure the table entries have uniform size */
278 for (i = 1; i < 16; i++) {
279 if (ptrs->ptr[i].fp_timing.table_size != fp_timing_size ||
280 ptrs->ptr[i].dvo_timing.table_size != dvo_timing_size ||
281 ptrs->ptr[i].panel_pnp_id.table_size != panel_pnp_id_size)
284 if (ptrs->ptr[i].fp_timing.offset - ptrs->ptr[i-1].fp_timing.offset != lfp_data_size ||
285 ptrs->ptr[i].dvo_timing.offset - ptrs->ptr[i-1].dvo_timing.offset != lfp_data_size ||
286 ptrs->ptr[i].panel_pnp_id.offset - ptrs->ptr[i-1].panel_pnp_id.offset != lfp_data_size)
290 /* make sure the tables fit inside the data block */
291 for (i = 0; i < 16; i++) {
292 if (ptrs->ptr[i].fp_timing.offset + fp_timing_size > data_block_size ||
293 ptrs->ptr[i].dvo_timing.offset + dvo_timing_size > data_block_size ||
294 ptrs->ptr[i].panel_pnp_id.offset + panel_pnp_id_size > data_block_size)
298 if (ptrs->panel_name.offset + 16 * panel_name_size > data_block_size)
304 /* make the data table offsets relative to the data block */
305 static bool fixup_lfp_data_ptrs(const void *bdb, void *ptrs_block)
307 struct bdb_lvds_lfp_data_ptrs *ptrs = ptrs_block;
311 offset = block_offset(bdb, BDB_LVDS_LFP_DATA);
313 for (i = 0; i < 16; i++) {
314 if (ptrs->ptr[i].fp_timing.offset < offset ||
315 ptrs->ptr[i].dvo_timing.offset < offset ||
316 ptrs->ptr[i].panel_pnp_id.offset < offset)
319 ptrs->ptr[i].fp_timing.offset -= offset;
320 ptrs->ptr[i].dvo_timing.offset -= offset;
321 ptrs->ptr[i].panel_pnp_id.offset -= offset;
324 if (ptrs->panel_name.table_size) {
325 if (ptrs->panel_name.offset < offset)
328 ptrs->panel_name.offset -= offset;
331 return validate_lfp_data_ptrs(bdb, ptrs);
334 static const void *find_fp_timing_terminator(const u8 *data, int size)
338 for (i = 0; i < size - 1; i++) {
339 if (data[i] == 0xff && data[i+1] == 0xff)
346 static int make_lfp_data_ptr(struct lvds_lfp_data_ptr_table *table,
347 int table_size, int total_size)
349 if (total_size < table_size)
352 table->table_size = table_size;
353 table->offset = total_size - table_size;
355 return total_size - table_size;
358 static void next_lfp_data_ptr(struct lvds_lfp_data_ptr_table *next,
359 const struct lvds_lfp_data_ptr_table *prev,
362 next->table_size = prev->table_size;
363 next->offset = prev->offset + size;
366 static void *generate_lfp_data_ptrs(struct drm_i915_private *i915,
369 int i, size, table_size, block_size, offset;
370 const void *t0, *t1, *block;
371 struct bdb_lvds_lfp_data_ptrs *ptrs;
374 block = find_raw_section(bdb, BDB_LVDS_LFP_DATA);
378 drm_dbg_kms(&i915->drm, "Generating LFP data table pointers\n");
380 block_size = get_blocksize(block);
383 t0 = find_fp_timing_terminator(block, size);
387 size -= t0 - block - 2;
388 t1 = find_fp_timing_terminator(t0 + 2, size);
393 if (size * 16 > block_size)
396 ptrs_block = kzalloc(sizeof(*ptrs) + 3, GFP_KERNEL);
400 *(u8 *)(ptrs_block + 0) = BDB_LVDS_LFP_DATA_PTRS;
401 *(u16 *)(ptrs_block + 1) = sizeof(*ptrs);
402 ptrs = ptrs_block + 3;
404 table_size = sizeof(struct lvds_pnp_id);
405 size = make_lfp_data_ptr(&ptrs->ptr[0].panel_pnp_id, table_size, size);
407 table_size = sizeof(struct lvds_dvo_timing);
408 size = make_lfp_data_ptr(&ptrs->ptr[0].dvo_timing, table_size, size);
410 table_size = t0 - block + 2;
411 size = make_lfp_data_ptr(&ptrs->ptr[0].fp_timing, table_size, size);
413 if (ptrs->ptr[0].fp_timing.table_size)
414 ptrs->lvds_entries++;
415 if (ptrs->ptr[0].dvo_timing.table_size)
416 ptrs->lvds_entries++;
417 if (ptrs->ptr[0].panel_pnp_id.table_size)
418 ptrs->lvds_entries++;
420 if (size != 0 || ptrs->lvds_entries != 3) {
426 for (i = 1; i < 16; i++) {
427 next_lfp_data_ptr(&ptrs->ptr[i].fp_timing, &ptrs->ptr[i-1].fp_timing, size);
428 next_lfp_data_ptr(&ptrs->ptr[i].dvo_timing, &ptrs->ptr[i-1].dvo_timing, size);
429 next_lfp_data_ptr(&ptrs->ptr[i].panel_pnp_id, &ptrs->ptr[i-1].panel_pnp_id, size);
433 table_size = sizeof(struct lvds_lfp_panel_name);
435 if (16 * (size + table_size) <= block_size) {
436 ptrs->panel_name.table_size = table_size;
437 ptrs->panel_name.offset = size * 16;
440 offset = block - bdb;
442 for (i = 0; i < 16; i++) {
443 ptrs->ptr[i].fp_timing.offset += offset;
444 ptrs->ptr[i].dvo_timing.offset += offset;
445 ptrs->ptr[i].panel_pnp_id.offset += offset;
448 if (ptrs->panel_name.table_size)
449 ptrs->panel_name.offset += offset;
455 init_bdb_block(struct drm_i915_private *i915,
456 const void *bdb, enum bdb_block_id section_id,
459 struct bdb_block_entry *entry;
460 void *temp_block = NULL;
464 block = find_raw_section(bdb, section_id);
466 /* Modern VBTs lack the LFP data table pointers block, make one up */
467 if (!block && section_id == BDB_LVDS_LFP_DATA_PTRS) {
468 temp_block = generate_lfp_data_ptrs(i915, bdb);
470 block = temp_block + 3;
475 drm_WARN(&i915->drm, min_size == 0,
476 "Block %d min_size is zero\n", section_id);
478 block_size = get_blocksize(block);
480 entry = kzalloc(struct_size(entry, data, max(min_size, block_size) + 3),
487 entry->section_id = section_id;
488 memcpy(entry->data, block - 3, block_size + 3);
492 drm_dbg_kms(&i915->drm, "Found BDB block %d (size %zu, min size %zu)\n",
493 section_id, block_size, min_size);
495 if (section_id == BDB_LVDS_LFP_DATA_PTRS &&
496 !fixup_lfp_data_ptrs(bdb, entry->data + 3)) {
497 drm_err(&i915->drm, "VBT has malformed LFP data table pointers\n");
502 list_add_tail(&entry->node, &i915->vbt.bdb_blocks);
505 static void init_bdb_blocks(struct drm_i915_private *i915,
510 for (i = 0; i < ARRAY_SIZE(bdb_blocks); i++) {
511 enum bdb_block_id section_id = bdb_blocks[i].section_id;
512 size_t min_size = bdb_blocks[i].min_size;
514 if (section_id == BDB_LVDS_LFP_DATA)
515 min_size = lfp_data_min_size(i915);
517 init_bdb_block(i915, bdb, section_id, min_size);
522 fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
523 const struct lvds_dvo_timing *dvo_timing)
525 panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
526 dvo_timing->hactive_lo;
527 panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
528 ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
529 panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
530 ((dvo_timing->hsync_pulse_width_hi << 8) |
531 dvo_timing->hsync_pulse_width_lo);
532 panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
533 ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
535 panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
536 dvo_timing->vactive_lo;
537 panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
538 ((dvo_timing->vsync_off_hi << 4) | dvo_timing->vsync_off_lo);
539 panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
540 ((dvo_timing->vsync_pulse_width_hi << 4) |
541 dvo_timing->vsync_pulse_width_lo);
542 panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
543 ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
544 panel_fixed_mode->clock = dvo_timing->clock * 10;
545 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
547 if (dvo_timing->hsync_positive)
548 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
550 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
552 if (dvo_timing->vsync_positive)
553 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
555 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
557 panel_fixed_mode->width_mm = (dvo_timing->himage_hi << 8) |
558 dvo_timing->himage_lo;
559 panel_fixed_mode->height_mm = (dvo_timing->vimage_hi << 8) |
560 dvo_timing->vimage_lo;
562 /* Some VBTs have bogus h/vtotal values */
563 if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
564 panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
565 if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
566 panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
568 drm_mode_set_name(panel_fixed_mode);
571 static const struct lvds_dvo_timing *
572 get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *data,
573 const struct bdb_lvds_lfp_data_ptrs *ptrs,
576 return (const void *)data + ptrs->ptr[index].dvo_timing.offset;
579 static const struct lvds_fp_timing *
580 get_lvds_fp_timing(const struct bdb_lvds_lfp_data *data,
581 const struct bdb_lvds_lfp_data_ptrs *ptrs,
584 return (const void *)data + ptrs->ptr[index].fp_timing.offset;
587 static const struct bdb_lvds_lfp_data_tail *
588 get_lfp_data_tail(const struct bdb_lvds_lfp_data *data,
589 const struct bdb_lvds_lfp_data_ptrs *ptrs)
591 if (ptrs->panel_name.table_size)
592 return (const void *)data + ptrs->panel_name.offset;
597 /* Parse general panel options */
599 parse_panel_options(struct drm_i915_private *i915)
601 const struct bdb_lvds_options *lvds_options;
606 lvds_options = find_section(i915, BDB_LVDS_OPTIONS);
610 i915->vbt.lvds_dither = lvds_options->pixel_dither;
612 ret = intel_opregion_get_panel_type(i915);
614 drm_WARN_ON(&i915->drm, ret > 0xf);
616 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n",
619 if (lvds_options->panel_type > 0xf) {
620 drm_dbg_kms(&i915->drm,
621 "Invalid VBT panel type 0x%x\n",
622 lvds_options->panel_type);
625 panel_type = lvds_options->panel_type;
626 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n",
630 i915->vbt.panel_type = panel_type;
632 drrs_mode = (lvds_options->dps_panel_type_bits
633 >> (panel_type * 2)) & MODE_MASK;
635 * VBT has static DRRS = 0 and seamless DRRS = 2.
636 * The below piece of code is required to adjust vbt.drrs_type
637 * to match the enum drrs_support_type.
641 i915->vbt.drrs_type = DRRS_TYPE_STATIC;
642 drm_dbg_kms(&i915->drm, "DRRS supported mode is static\n");
645 i915->vbt.drrs_type = DRRS_TYPE_SEAMLESS;
646 drm_dbg_kms(&i915->drm,
647 "DRRS supported mode is seamless\n");
650 i915->vbt.drrs_type = DRRS_TYPE_NONE;
651 drm_dbg_kms(&i915->drm,
652 "DRRS not supported (VBT input)\n");
658 parse_lfp_panel_dtd(struct drm_i915_private *i915,
659 const struct bdb_lvds_lfp_data *lvds_lfp_data,
660 const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs)
662 const struct lvds_dvo_timing *panel_dvo_timing;
663 const struct lvds_fp_timing *fp_timing;
664 struct drm_display_mode *panel_fixed_mode;
665 int panel_type = i915->vbt.panel_type;
667 panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
671 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
672 if (!panel_fixed_mode)
675 fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
677 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
679 drm_dbg_kms(&i915->drm,
680 "Found panel mode in BIOS VBT legacy lfp table: " DRM_MODE_FMT "\n",
681 DRM_MODE_ARG(panel_fixed_mode));
683 fp_timing = get_lvds_fp_timing(lvds_lfp_data,
687 /* check the resolution, just to be sure */
688 if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
689 fp_timing->y_res == panel_fixed_mode->vdisplay) {
690 i915->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
691 drm_dbg_kms(&i915->drm,
692 "VBT initial LVDS value %x\n",
693 i915->vbt.bios_lvds_val);
698 parse_lfp_data(struct drm_i915_private *i915)
700 const struct bdb_lvds_lfp_data *data;
701 const struct bdb_lvds_lfp_data_tail *tail;
702 const struct bdb_lvds_lfp_data_ptrs *ptrs;
704 ptrs = find_section(i915, BDB_LVDS_LFP_DATA_PTRS);
708 data = find_section(i915, BDB_LVDS_LFP_DATA);
712 if (!i915->vbt.lfp_lvds_vbt_mode)
713 parse_lfp_panel_dtd(i915, data, ptrs);
715 tail = get_lfp_data_tail(data, ptrs);
723 parse_generic_dtd(struct drm_i915_private *i915)
725 const struct bdb_generic_dtd *generic_dtd;
726 const struct generic_dtd_entry *dtd;
727 struct drm_display_mode *panel_fixed_mode;
731 * Older VBTs provided DTD information for internal displays through
732 * the "LFP panel tables" block (42). As of VBT revision 229 the
733 * DTD information should be provided via a newer "generic DTD"
734 * block (58). Just to be safe, we'll try the new generic DTD block
735 * first on VBT >= 229, but still fall back to trying the old LFP
736 * block if that fails.
738 if (i915->vbt.version < 229)
741 generic_dtd = find_section(i915, BDB_GENERIC_DTD);
745 if (generic_dtd->gdtd_size < sizeof(struct generic_dtd_entry)) {
746 drm_err(&i915->drm, "GDTD size %u is too small.\n",
747 generic_dtd->gdtd_size);
749 } else if (generic_dtd->gdtd_size !=
750 sizeof(struct generic_dtd_entry)) {
751 drm_err(&i915->drm, "Unexpected GDTD size %u\n",
752 generic_dtd->gdtd_size);
753 /* DTD has unknown fields, but keep going */
756 num_dtd = (get_blocksize(generic_dtd) -
757 sizeof(struct bdb_generic_dtd)) / generic_dtd->gdtd_size;
758 if (i915->vbt.panel_type >= num_dtd) {
760 "Panel type %d not found in table of %d DTD's\n",
761 i915->vbt.panel_type, num_dtd);
765 dtd = &generic_dtd->dtd[i915->vbt.panel_type];
767 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
768 if (!panel_fixed_mode)
771 panel_fixed_mode->hdisplay = dtd->hactive;
772 panel_fixed_mode->hsync_start =
773 panel_fixed_mode->hdisplay + dtd->hfront_porch;
774 panel_fixed_mode->hsync_end =
775 panel_fixed_mode->hsync_start + dtd->hsync;
776 panel_fixed_mode->htotal =
777 panel_fixed_mode->hdisplay + dtd->hblank;
779 panel_fixed_mode->vdisplay = dtd->vactive;
780 panel_fixed_mode->vsync_start =
781 panel_fixed_mode->vdisplay + dtd->vfront_porch;
782 panel_fixed_mode->vsync_end =
783 panel_fixed_mode->vsync_start + dtd->vsync;
784 panel_fixed_mode->vtotal =
785 panel_fixed_mode->vdisplay + dtd->vblank;
787 panel_fixed_mode->clock = dtd->pixel_clock;
788 panel_fixed_mode->width_mm = dtd->width_mm;
789 panel_fixed_mode->height_mm = dtd->height_mm;
791 panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
792 drm_mode_set_name(panel_fixed_mode);
794 if (dtd->hsync_positive_polarity)
795 panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
797 panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
799 if (dtd->vsync_positive_polarity)
800 panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
802 panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
804 drm_dbg_kms(&i915->drm,
805 "Found panel mode in BIOS VBT generic dtd table: " DRM_MODE_FMT "\n",
806 DRM_MODE_ARG(panel_fixed_mode));
808 i915->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
812 parse_lfp_backlight(struct drm_i915_private *i915)
814 const struct bdb_lfp_backlight_data *backlight_data;
815 const struct lfp_backlight_data_entry *entry;
816 int panel_type = i915->vbt.panel_type;
819 backlight_data = find_section(i915, BDB_LVDS_BACKLIGHT);
823 if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
824 drm_dbg_kms(&i915->drm,
825 "Unsupported backlight data entry size %u\n",
826 backlight_data->entry_size);
830 entry = &backlight_data->data[panel_type];
832 i915->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
833 if (!i915->vbt.backlight.present) {
834 drm_dbg_kms(&i915->drm,
835 "PWM backlight not present in VBT (type %u)\n",
840 i915->vbt.backlight.type = INTEL_BACKLIGHT_DISPLAY_DDI;
841 if (i915->vbt.version >= 191) {
844 if (i915->vbt.version >= 236)
845 exp_size = sizeof(struct bdb_lfp_backlight_data);
846 else if (i915->vbt.version >= 234)
847 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_234;
849 exp_size = EXP_BDB_LFP_BL_DATA_SIZE_REV_191;
851 if (get_blocksize(backlight_data) >= exp_size) {
852 const struct lfp_backlight_control_method *method;
854 method = &backlight_data->backlight_control[panel_type];
855 i915->vbt.backlight.type = method->type;
856 i915->vbt.backlight.controller = method->controller;
860 i915->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
861 i915->vbt.backlight.active_low_pwm = entry->active_low_pwm;
863 if (i915->vbt.version >= 234) {
867 level = backlight_data->brightness_level[panel_type].level;
868 min_level = backlight_data->brightness_min_level[panel_type].level;
870 if (i915->vbt.version >= 236)
871 scale = backlight_data->brightness_precision_bits[panel_type] == 16;
876 min_level = min_level / 255;
878 if (min_level > 255) {
879 drm_warn(&i915->drm, "Brightness min level > 255\n");
882 i915->vbt.backlight.min_brightness = min_level;
884 i915->vbt.backlight.brightness_precision_bits =
885 backlight_data->brightness_precision_bits[panel_type];
887 level = backlight_data->level[panel_type];
888 i915->vbt.backlight.min_brightness = entry->min_brightness;
891 drm_dbg_kms(&i915->drm,
892 "VBT backlight PWM modulation frequency %u Hz, "
893 "active %s, min brightness %u, level %u, controller %u\n",
894 i915->vbt.backlight.pwm_freq_hz,
895 i915->vbt.backlight.active_low_pwm ? "low" : "high",
896 i915->vbt.backlight.min_brightness,
898 i915->vbt.backlight.controller);
901 /* Try to find sdvo panel data */
903 parse_sdvo_panel_data(struct drm_i915_private *i915)
905 const struct bdb_sdvo_panel_dtds *dtds;
906 struct drm_display_mode *panel_fixed_mode;
909 index = i915->params.vbt_sdvo_panel_type;
911 drm_dbg_kms(&i915->drm,
912 "Ignore SDVO panel mode from BIOS VBT tables.\n");
917 const struct bdb_sdvo_lvds_options *sdvo_lvds_options;
919 sdvo_lvds_options = find_section(i915, BDB_SDVO_LVDS_OPTIONS);
920 if (!sdvo_lvds_options)
923 index = sdvo_lvds_options->panel_type;
926 dtds = find_section(i915, BDB_SDVO_PANEL_DTDS);
930 panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
931 if (!panel_fixed_mode)
934 fill_detail_timing_data(panel_fixed_mode, &dtds->dtds[index]);
936 i915->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
938 drm_dbg_kms(&i915->drm,
939 "Found SDVO panel mode in BIOS VBT tables: " DRM_MODE_FMT "\n",
940 DRM_MODE_ARG(panel_fixed_mode));
943 static int intel_bios_ssc_frequency(struct drm_i915_private *i915,
946 switch (DISPLAY_VER(i915)) {
948 return alternate ? 66667 : 48000;
951 return alternate ? 100000 : 96000;
953 return alternate ? 100000 : 120000;
958 parse_general_features(struct drm_i915_private *i915)
960 const struct bdb_general_features *general;
962 general = find_section(i915, BDB_GENERAL_FEATURES);
966 i915->vbt.int_tv_support = general->int_tv_support;
967 /* int_crt_support can't be trusted on earlier platforms */
968 if (i915->vbt.version >= 155 &&
969 (HAS_DDI(i915) || IS_VALLEYVIEW(i915)))
970 i915->vbt.int_crt_support = general->int_crt_support;
971 i915->vbt.lvds_use_ssc = general->enable_ssc;
972 i915->vbt.lvds_ssc_freq =
973 intel_bios_ssc_frequency(i915, general->ssc_freq);
974 i915->vbt.display_clock_mode = general->display_clock_mode;
975 i915->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
976 if (i915->vbt.version >= 181) {
977 i915->vbt.orientation = general->rotate_180 ?
978 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP :
979 DRM_MODE_PANEL_ORIENTATION_NORMAL;
981 i915->vbt.orientation = DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
984 if (i915->vbt.version >= 249 && general->afc_startup_config) {
985 i915->vbt.override_afc_startup = true;
986 i915->vbt.override_afc_startup_val = general->afc_startup_config == 0x1 ? 0x0 : 0x7;
989 drm_dbg_kms(&i915->drm,
990 "BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
991 i915->vbt.int_tv_support,
992 i915->vbt.int_crt_support,
993 i915->vbt.lvds_use_ssc,
994 i915->vbt.lvds_ssc_freq,
995 i915->vbt.display_clock_mode,
996 i915->vbt.fdi_rx_polarity_inverted);
999 static const struct child_device_config *
1000 child_device_ptr(const struct bdb_general_definitions *defs, int i)
1002 return (const void *) &defs->devices[i * defs->child_dev_size];
1006 parse_sdvo_device_mapping(struct drm_i915_private *i915)
1008 struct sdvo_device_mapping *mapping;
1009 const struct intel_bios_encoder_data *devdata;
1010 const struct child_device_config *child;
1014 * Only parse SDVO mappings on gens that could have SDVO. This isn't
1015 * accurate and doesn't have to be, as long as it's not too strict.
1017 if (!IS_DISPLAY_VER(i915, 3, 7)) {
1018 drm_dbg_kms(&i915->drm, "Skipping SDVO device mapping\n");
1022 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1023 child = &devdata->child;
1025 if (child->slave_addr != SLAVE_ADDR1 &&
1026 child->slave_addr != SLAVE_ADDR2) {
1028 * If the slave address is neither 0x70 nor 0x72,
1029 * it is not a SDVO device. Skip it.
1033 if (child->dvo_port != DEVICE_PORT_DVOB &&
1034 child->dvo_port != DEVICE_PORT_DVOC) {
1035 /* skip the incorrect SDVO port */
1036 drm_dbg_kms(&i915->drm,
1037 "Incorrect SDVO port. Skip it\n");
1040 drm_dbg_kms(&i915->drm,
1041 "the SDVO device with slave addr %2x is found on"
1044 (child->dvo_port == DEVICE_PORT_DVOB) ?
1046 mapping = &i915->vbt.sdvo_mappings[child->dvo_port - 1];
1047 if (!mapping->initialized) {
1048 mapping->dvo_port = child->dvo_port;
1049 mapping->slave_addr = child->slave_addr;
1050 mapping->dvo_wiring = child->dvo_wiring;
1051 mapping->ddc_pin = child->ddc_pin;
1052 mapping->i2c_pin = child->i2c_pin;
1053 mapping->initialized = 1;
1054 drm_dbg_kms(&i915->drm,
1055 "SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
1056 mapping->dvo_port, mapping->slave_addr,
1057 mapping->dvo_wiring, mapping->ddc_pin,
1060 drm_dbg_kms(&i915->drm,
1061 "Maybe one SDVO port is shared by "
1062 "two SDVO device.\n");
1064 if (child->slave2_addr) {
1065 /* Maybe this is a SDVO device with multiple inputs */
1066 /* And the mapping info is not added */
1067 drm_dbg_kms(&i915->drm,
1068 "there exists the slave2_addr. Maybe this"
1069 " is a SDVO device with multiple inputs.\n");
1075 /* No SDVO device info is found */
1076 drm_dbg_kms(&i915->drm,
1077 "No SDVO device info is found in VBT\n");
1082 parse_driver_features(struct drm_i915_private *i915)
1084 const struct bdb_driver_features *driver;
1086 driver = find_section(i915, BDB_DRIVER_FEATURES);
1090 if (DISPLAY_VER(i915) >= 5) {
1092 * Note that we consider BDB_DRIVER_FEATURE_INT_SDVO_LVDS
1093 * to mean "eDP". The VBT spec doesn't agree with that
1094 * interpretation, but real world VBTs seem to.
1096 if (driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS)
1097 i915->vbt.int_lvds_support = 0;
1100 * FIXME it's not clear which BDB version has the LVDS config
1101 * bits defined. Revision history in the VBT spec says:
1102 * "0.92 | Add two definitions for VBT value of LVDS Active
1103 * Config (00b and 11b values defined) | 06/13/2005"
1104 * but does not the specify the BDB version.
1106 * So far version 134 (on i945gm) is the oldest VBT observed
1107 * in the wild with the bits correctly populated. Version
1108 * 108 (on i85x) does not have the bits correctly populated.
1110 if (i915->vbt.version >= 134 &&
1111 driver->lvds_config != BDB_DRIVER_FEATURE_INT_LVDS &&
1112 driver->lvds_config != BDB_DRIVER_FEATURE_INT_SDVO_LVDS)
1113 i915->vbt.int_lvds_support = 0;
1116 if (i915->vbt.version < 228) {
1117 drm_dbg_kms(&i915->drm, "DRRS State Enabled:%d\n",
1118 driver->drrs_enabled);
1120 * If DRRS is not supported, drrs_type has to be set to 0.
1121 * This is because, VBT is configured in such a way that
1122 * static DRRS is 0 and DRRS not supported is represented by
1123 * driver->drrs_enabled=false
1125 if (!driver->drrs_enabled)
1126 i915->vbt.drrs_type = DRRS_TYPE_NONE;
1128 i915->vbt.psr.enable = driver->psr_enabled;
1133 parse_power_conservation_features(struct drm_i915_private *i915)
1135 const struct bdb_lfp_power *power;
1136 u8 panel_type = i915->vbt.panel_type;
1138 if (i915->vbt.version < 228)
1141 power = find_section(i915, BDB_LFP_POWER);
1145 i915->vbt.psr.enable = power->psr & BIT(panel_type);
1148 * If DRRS is not supported, drrs_type has to be set to 0.
1149 * This is because, VBT is configured in such a way that
1150 * static DRRS is 0 and DRRS not supported is represented by
1151 * power->drrs & BIT(panel_type)=false
1153 if (!(power->drrs & BIT(panel_type)))
1154 i915->vbt.drrs_type = DRRS_TYPE_NONE;
1156 if (i915->vbt.version >= 232)
1157 i915->vbt.edp.hobl = power->hobl & BIT(panel_type);
1161 parse_edp(struct drm_i915_private *i915)
1163 const struct bdb_edp *edp;
1164 const struct edp_power_seq *edp_pps;
1165 const struct edp_fast_link_params *edp_link_params;
1166 int panel_type = i915->vbt.panel_type;
1168 edp = find_section(i915, BDB_EDP);
1172 switch ((edp->color_depth >> (panel_type * 2)) & 3) {
1174 i915->vbt.edp.bpp = 18;
1177 i915->vbt.edp.bpp = 24;
1180 i915->vbt.edp.bpp = 30;
1184 /* Get the eDP sequencing and link info */
1185 edp_pps = &edp->power_seqs[panel_type];
1186 edp_link_params = &edp->fast_link_params[panel_type];
1188 i915->vbt.edp.pps = *edp_pps;
1190 switch (edp_link_params->rate) {
1192 i915->vbt.edp.rate = DP_LINK_BW_1_62;
1195 i915->vbt.edp.rate = DP_LINK_BW_2_7;
1198 drm_dbg_kms(&i915->drm,
1199 "VBT has unknown eDP link rate value %u\n",
1200 edp_link_params->rate);
1204 switch (edp_link_params->lanes) {
1206 i915->vbt.edp.lanes = 1;
1209 i915->vbt.edp.lanes = 2;
1212 i915->vbt.edp.lanes = 4;
1215 drm_dbg_kms(&i915->drm,
1216 "VBT has unknown eDP lane count value %u\n",
1217 edp_link_params->lanes);
1221 switch (edp_link_params->preemphasis) {
1222 case EDP_PREEMPHASIS_NONE:
1223 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
1225 case EDP_PREEMPHASIS_3_5dB:
1226 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
1228 case EDP_PREEMPHASIS_6dB:
1229 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
1231 case EDP_PREEMPHASIS_9_5dB:
1232 i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
1235 drm_dbg_kms(&i915->drm,
1236 "VBT has unknown eDP pre-emphasis value %u\n",
1237 edp_link_params->preemphasis);
1241 switch (edp_link_params->vswing) {
1242 case EDP_VSWING_0_4V:
1243 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
1245 case EDP_VSWING_0_6V:
1246 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
1248 case EDP_VSWING_0_8V:
1249 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
1251 case EDP_VSWING_1_2V:
1252 i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
1255 drm_dbg_kms(&i915->drm,
1256 "VBT has unknown eDP voltage swing value %u\n",
1257 edp_link_params->vswing);
1261 if (i915->vbt.version >= 173) {
1264 /* Don't read from VBT if module parameter has valid value*/
1265 if (i915->params.edp_vswing) {
1266 i915->vbt.edp.low_vswing =
1267 i915->params.edp_vswing == 1;
1269 vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
1270 i915->vbt.edp.low_vswing = vswing == 0;
1274 i915->vbt.edp.drrs_msa_timing_delay =
1275 (edp->sdrrs_msa_timing_delay >> (panel_type * 2)) & 3;
1279 parse_psr(struct drm_i915_private *i915)
1281 const struct bdb_psr *psr;
1282 const struct psr_table *psr_table;
1283 int panel_type = i915->vbt.panel_type;
1285 psr = find_section(i915, BDB_PSR);
1287 drm_dbg_kms(&i915->drm, "No PSR BDB found.\n");
1291 psr_table = &psr->psr_table[panel_type];
1293 i915->vbt.psr.full_link = psr_table->full_link;
1294 i915->vbt.psr.require_aux_wakeup = psr_table->require_aux_to_wakeup;
1296 /* Allowed VBT values goes from 0 to 15 */
1297 i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :
1298 psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;
1301 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us
1302 * Old decimal value is wake up time in multiples of 100 us.
1304 if (i915->vbt.version >= 205 &&
1305 (DISPLAY_VER(i915) >= 9 && !IS_BROXTON(i915))) {
1306 switch (psr_table->tp1_wakeup_time) {
1308 i915->vbt.psr.tp1_wakeup_time_us = 500;
1311 i915->vbt.psr.tp1_wakeup_time_us = 100;
1314 i915->vbt.psr.tp1_wakeup_time_us = 0;
1317 drm_dbg_kms(&i915->drm,
1318 "VBT tp1 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1319 psr_table->tp1_wakeup_time);
1322 i915->vbt.psr.tp1_wakeup_time_us = 2500;
1326 switch (psr_table->tp2_tp3_wakeup_time) {
1328 i915->vbt.psr.tp2_tp3_wakeup_time_us = 500;
1331 i915->vbt.psr.tp2_tp3_wakeup_time_us = 100;
1334 i915->vbt.psr.tp2_tp3_wakeup_time_us = 0;
1337 drm_dbg_kms(&i915->drm,
1338 "VBT tp2_tp3 wakeup time value %d is outside range[0-3], defaulting to max value 2500us\n",
1339 psr_table->tp2_tp3_wakeup_time);
1342 i915->vbt.psr.tp2_tp3_wakeup_time_us = 2500;
1346 i915->vbt.psr.tp1_wakeup_time_us = psr_table->tp1_wakeup_time * 100;
1347 i915->vbt.psr.tp2_tp3_wakeup_time_us = psr_table->tp2_tp3_wakeup_time * 100;
1350 if (i915->vbt.version >= 226) {
1351 u32 wakeup_time = psr->psr2_tp2_tp3_wakeup_time;
1353 wakeup_time = (wakeup_time >> (2 * panel_type)) & 0x3;
1354 switch (wakeup_time) {
1369 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = wakeup_time;
1371 /* Reusing PSR1 wakeup time for PSR2 in older VBTs */
1372 i915->vbt.psr.psr2_tp2_tp3_wakeup_time_us = i915->vbt.psr.tp2_tp3_wakeup_time_us;
1376 static void parse_dsi_backlight_ports(struct drm_i915_private *i915,
1377 u16 version, enum port port)
1379 if (!i915->vbt.dsi.config->dual_link || version < 197) {
1380 i915->vbt.dsi.bl_ports = BIT(port);
1381 if (i915->vbt.dsi.config->cabc_supported)
1382 i915->vbt.dsi.cabc_ports = BIT(port);
1387 switch (i915->vbt.dsi.config->dl_dcs_backlight_ports) {
1389 i915->vbt.dsi.bl_ports = BIT(PORT_A);
1392 i915->vbt.dsi.bl_ports = BIT(PORT_C);
1395 case DL_DCS_PORT_A_AND_C:
1396 i915->vbt.dsi.bl_ports = BIT(PORT_A) | BIT(PORT_C);
1400 if (!i915->vbt.dsi.config->cabc_supported)
1403 switch (i915->vbt.dsi.config->dl_dcs_cabc_ports) {
1405 i915->vbt.dsi.cabc_ports = BIT(PORT_A);
1408 i915->vbt.dsi.cabc_ports = BIT(PORT_C);
1411 case DL_DCS_PORT_A_AND_C:
1412 i915->vbt.dsi.cabc_ports =
1413 BIT(PORT_A) | BIT(PORT_C);
1419 parse_mipi_config(struct drm_i915_private *i915)
1421 const struct bdb_mipi_config *start;
1422 const struct mipi_config *config;
1423 const struct mipi_pps_data *pps;
1424 int panel_type = i915->vbt.panel_type;
1427 /* parse MIPI blocks only if LFP type is MIPI */
1428 if (!intel_bios_is_dsi_present(i915, &port))
1431 /* Initialize this to undefined indicating no generic MIPI support */
1432 i915->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
1434 /* Block #40 is already parsed and panel_fixed_mode is
1435 * stored in i915->lfp_lvds_vbt_mode
1436 * resuse this when needed
1439 /* Parse #52 for panel index used from panel_type already
1442 start = find_section(i915, BDB_MIPI_CONFIG);
1444 drm_dbg_kms(&i915->drm, "No MIPI config BDB found");
1448 drm_dbg(&i915->drm, "Found MIPI Config block, panel index = %d\n",
1452 * get hold of the correct configuration block and pps data as per
1453 * the panel_type as index
1455 config = &start->config[panel_type];
1456 pps = &start->pps[panel_type];
1458 /* store as of now full data. Trim when we realise all is not needed */
1459 i915->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
1460 if (!i915->vbt.dsi.config)
1463 i915->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
1464 if (!i915->vbt.dsi.pps) {
1465 kfree(i915->vbt.dsi.config);
1469 parse_dsi_backlight_ports(i915, i915->vbt.version, port);
1471 /* FIXME is the 90 vs. 270 correct? */
1472 switch (config->rotation) {
1473 case ENABLE_ROTATION_0:
1475 * Most (all?) VBTs claim 0 degrees despite having
1476 * an upside down panel, thus we do not trust this.
1478 i915->vbt.dsi.orientation =
1479 DRM_MODE_PANEL_ORIENTATION_UNKNOWN;
1481 case ENABLE_ROTATION_90:
1482 i915->vbt.dsi.orientation =
1483 DRM_MODE_PANEL_ORIENTATION_RIGHT_UP;
1485 case ENABLE_ROTATION_180:
1486 i915->vbt.dsi.orientation =
1487 DRM_MODE_PANEL_ORIENTATION_BOTTOM_UP;
1489 case ENABLE_ROTATION_270:
1490 i915->vbt.dsi.orientation =
1491 DRM_MODE_PANEL_ORIENTATION_LEFT_UP;
1495 /* We have mandatory mipi config blocks. Initialize as generic panel */
1496 i915->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
1499 /* Find the sequence block and size for the given panel. */
1501 find_panel_sequence_block(const struct bdb_mipi_sequence *sequence,
1502 u16 panel_id, u32 *seq_size)
1504 u32 total = get_blocksize(sequence);
1505 const u8 *data = &sequence->data[0];
1508 int header_size = sequence->version >= 3 ? 5 : 3;
1512 /* skip new block size */
1513 if (sequence->version >= 3)
1516 for (i = 0; i < MAX_MIPI_CONFIGURATIONS && index < total; i++) {
1517 if (index + header_size > total) {
1518 DRM_ERROR("Invalid sequence block (header)\n");
1522 current_id = *(data + index);
1523 if (sequence->version >= 3)
1524 current_size = *((const u32 *)(data + index + 1));
1526 current_size = *((const u16 *)(data + index + 1));
1528 index += header_size;
1530 if (index + current_size > total) {
1531 DRM_ERROR("Invalid sequence block\n");
1535 if (current_id == panel_id) {
1536 *seq_size = current_size;
1537 return data + index;
1540 index += current_size;
1543 DRM_ERROR("Sequence block detected but no valid configuration\n");
1548 static int goto_next_sequence(const u8 *data, int index, int total)
1552 /* Skip Sequence Byte. */
1553 for (index = index + 1; index < total; index += len) {
1554 u8 operation_byte = *(data + index);
1557 switch (operation_byte) {
1558 case MIPI_SEQ_ELEM_END:
1560 case MIPI_SEQ_ELEM_SEND_PKT:
1561 if (index + 4 > total)
1564 len = *((const u16 *)(data + index + 2)) + 4;
1566 case MIPI_SEQ_ELEM_DELAY:
1569 case MIPI_SEQ_ELEM_GPIO:
1572 case MIPI_SEQ_ELEM_I2C:
1573 if (index + 7 > total)
1575 len = *(data + index + 6) + 7;
1578 DRM_ERROR("Unknown operation byte\n");
1586 static int goto_next_sequence_v3(const u8 *data, int index, int total)
1590 u32 size_of_sequence;
1593 * Could skip sequence based on Size of Sequence alone, but also do some
1594 * checking on the structure.
1597 DRM_ERROR("Too small sequence size\n");
1601 /* Skip Sequence Byte. */
1605 * Size of Sequence. Excludes the Sequence Byte and the size itself,
1606 * includes MIPI_SEQ_ELEM_END byte, excludes the final MIPI_SEQ_END
1609 size_of_sequence = *((const u32 *)(data + index));
1612 seq_end = index + size_of_sequence;
1613 if (seq_end > total) {
1614 DRM_ERROR("Invalid sequence size\n");
1618 for (; index < total; index += len) {
1619 u8 operation_byte = *(data + index);
1622 if (operation_byte == MIPI_SEQ_ELEM_END) {
1623 if (index != seq_end) {
1624 DRM_ERROR("Invalid element structure\n");
1630 len = *(data + index);
1634 * FIXME: Would be nice to check elements like for v1/v2 in
1635 * goto_next_sequence() above.
1637 switch (operation_byte) {
1638 case MIPI_SEQ_ELEM_SEND_PKT:
1639 case MIPI_SEQ_ELEM_DELAY:
1640 case MIPI_SEQ_ELEM_GPIO:
1641 case MIPI_SEQ_ELEM_I2C:
1642 case MIPI_SEQ_ELEM_SPI:
1643 case MIPI_SEQ_ELEM_PMIC:
1646 DRM_ERROR("Unknown operation byte %u\n",
1656 * Get len of pre-fixed deassert fragment from a v1 init OTP sequence,
1657 * skip all delay + gpio operands and stop at the first DSI packet op.
1659 static int get_init_otp_deassert_fragment_len(struct drm_i915_private *i915)
1661 const u8 *data = i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1664 if (drm_WARN_ON(&i915->drm,
1665 !data || i915->vbt.dsi.seq_version != 1))
1668 /* index = 1 to skip sequence byte */
1669 for (index = 1; data[index] != MIPI_SEQ_ELEM_END; index += len) {
1670 switch (data[index]) {
1671 case MIPI_SEQ_ELEM_SEND_PKT:
1672 return index == 1 ? 0 : index;
1673 case MIPI_SEQ_ELEM_DELAY:
1674 len = 5; /* 1 byte for operand + uint32 */
1676 case MIPI_SEQ_ELEM_GPIO:
1677 len = 3; /* 1 byte for op, 1 for gpio_nr, 1 for value */
1688 * Some v1 VBT MIPI sequences do the deassert in the init OTP sequence.
1689 * The deassert must be done before calling intel_dsi_device_ready, so for
1690 * these devices we split the init OTP sequence into a deassert sequence and
1691 * the actual init OTP part.
1693 static void fixup_mipi_sequences(struct drm_i915_private *i915)
1698 /* Limit this to VLV for now. */
1699 if (!IS_VALLEYVIEW(i915))
1702 /* Limit this to v1 vid-mode sequences */
1703 if (i915->vbt.dsi.config->is_cmd_mode ||
1704 i915->vbt.dsi.seq_version != 1)
1707 /* Only do this if there are otp and assert seqs and no deassert seq */
1708 if (!i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] ||
1709 !i915->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET] ||
1710 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET])
1713 /* The deassert-sequence ends at the first DSI packet */
1714 len = get_init_otp_deassert_fragment_len(i915);
1718 drm_dbg_kms(&i915->drm,
1719 "Using init OTP fragment to deassert reset\n");
1721 /* Copy the fragment, update seq byte and terminate it */
1722 init_otp = (u8 *)i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP];
1723 i915->vbt.dsi.deassert_seq = kmemdup(init_otp, len + 1, GFP_KERNEL);
1724 if (!i915->vbt.dsi.deassert_seq)
1726 i915->vbt.dsi.deassert_seq[0] = MIPI_SEQ_DEASSERT_RESET;
1727 i915->vbt.dsi.deassert_seq[len] = MIPI_SEQ_ELEM_END;
1728 /* Use the copy for deassert */
1729 i915->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET] =
1730 i915->vbt.dsi.deassert_seq;
1731 /* Replace the last byte of the fragment with init OTP seq byte */
1732 init_otp[len - 1] = MIPI_SEQ_INIT_OTP;
1733 /* And make MIPI_MIPI_SEQ_INIT_OTP point to it */
1734 i915->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP] = init_otp + len - 1;
1738 parse_mipi_sequence(struct drm_i915_private *i915)
1740 int panel_type = i915->vbt.panel_type;
1741 const struct bdb_mipi_sequence *sequence;
1747 /* Only our generic panel driver uses the sequence block. */
1748 if (i915->vbt.dsi.panel_id != MIPI_DSI_GENERIC_PANEL_ID)
1751 sequence = find_section(i915, BDB_MIPI_SEQUENCE);
1753 drm_dbg_kms(&i915->drm,
1754 "No MIPI Sequence found, parsing complete\n");
1758 /* Fail gracefully for forward incompatible sequence block. */
1759 if (sequence->version >= 4) {
1761 "Unable to parse MIPI Sequence Block v%u\n",
1766 drm_dbg(&i915->drm, "Found MIPI sequence block v%u\n",
1769 seq_data = find_panel_sequence_block(sequence, panel_type, &seq_size);
1773 data = kmemdup(seq_data, seq_size, GFP_KERNEL);
1777 /* Parse the sequences, store pointers to each sequence. */
1779 u8 seq_id = *(data + index);
1780 if (seq_id == MIPI_SEQ_END)
1783 if (seq_id >= MIPI_SEQ_MAX) {
1784 drm_err(&i915->drm, "Unknown sequence %u\n",
1789 /* Log about presence of sequences we won't run. */
1790 if (seq_id == MIPI_SEQ_TEAR_ON || seq_id == MIPI_SEQ_TEAR_OFF)
1791 drm_dbg_kms(&i915->drm,
1792 "Unsupported sequence %u\n", seq_id);
1794 i915->vbt.dsi.sequence[seq_id] = data + index;
1796 if (sequence->version >= 3)
1797 index = goto_next_sequence_v3(data, index, seq_size);
1799 index = goto_next_sequence(data, index, seq_size);
1801 drm_err(&i915->drm, "Invalid sequence %u\n",
1807 i915->vbt.dsi.data = data;
1808 i915->vbt.dsi.size = seq_size;
1809 i915->vbt.dsi.seq_version = sequence->version;
1811 fixup_mipi_sequences(i915);
1813 drm_dbg(&i915->drm, "MIPI related VBT parsing complete\n");
1818 memset(i915->vbt.dsi.sequence, 0, sizeof(i915->vbt.dsi.sequence));
1822 parse_compression_parameters(struct drm_i915_private *i915)
1824 const struct bdb_compression_parameters *params;
1825 struct intel_bios_encoder_data *devdata;
1826 const struct child_device_config *child;
1830 if (i915->vbt.version < 198)
1833 params = find_section(i915, BDB_COMPRESSION_PARAMETERS);
1836 if (params->entry_size != sizeof(params->data[0])) {
1837 drm_dbg_kms(&i915->drm,
1838 "VBT: unsupported compression param entry size\n");
1842 block_size = get_blocksize(params);
1843 if (block_size < sizeof(*params)) {
1844 drm_dbg_kms(&i915->drm,
1845 "VBT: expected 16 compression param entries\n");
1850 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
1851 child = &devdata->child;
1853 if (!child->compression_enable)
1857 drm_dbg_kms(&i915->drm,
1858 "VBT: compression params not available\n");
1862 if (child->compression_method_cps) {
1863 drm_dbg_kms(&i915->drm,
1864 "VBT: CPS compression not supported\n");
1868 index = child->compression_structure_index;
1870 devdata->dsc = kmemdup(¶ms->data[index],
1871 sizeof(*devdata->dsc), GFP_KERNEL);
1875 static u8 translate_iboost(u8 val)
1877 static const u8 mapping[] = { 1, 3, 7 }; /* See VBT spec */
1879 if (val >= ARRAY_SIZE(mapping)) {
1880 DRM_DEBUG_KMS("Unsupported I_boost value found in VBT (%d), display may not work properly\n", val);
1883 return mapping[val];
1886 static const u8 cnp_ddc_pin_map[] = {
1888 [DDC_BUS_DDI_B] = GMBUS_PIN_1_BXT,
1889 [DDC_BUS_DDI_C] = GMBUS_PIN_2_BXT,
1890 [DDC_BUS_DDI_D] = GMBUS_PIN_4_CNP, /* sic */
1891 [DDC_BUS_DDI_F] = GMBUS_PIN_3_BXT, /* sic */
1894 static const u8 icp_ddc_pin_map[] = {
1895 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1896 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1897 [TGL_DDC_BUS_DDI_C] = GMBUS_PIN_3_BXT,
1898 [ICL_DDC_BUS_PORT_1] = GMBUS_PIN_9_TC1_ICP,
1899 [ICL_DDC_BUS_PORT_2] = GMBUS_PIN_10_TC2_ICP,
1900 [ICL_DDC_BUS_PORT_3] = GMBUS_PIN_11_TC3_ICP,
1901 [ICL_DDC_BUS_PORT_4] = GMBUS_PIN_12_TC4_ICP,
1902 [TGL_DDC_BUS_PORT_5] = GMBUS_PIN_13_TC5_TGP,
1903 [TGL_DDC_BUS_PORT_6] = GMBUS_PIN_14_TC6_TGP,
1906 static const u8 rkl_pch_tgp_ddc_pin_map[] = {
1907 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1908 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1909 [RKL_DDC_BUS_DDI_D] = GMBUS_PIN_9_TC1_ICP,
1910 [RKL_DDC_BUS_DDI_E] = GMBUS_PIN_10_TC2_ICP,
1913 static const u8 adls_ddc_pin_map[] = {
1914 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1915 [ADLS_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1916 [ADLS_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1917 [ADLS_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1918 [ADLS_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1921 static const u8 gen9bc_tgp_ddc_pin_map[] = {
1922 [DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1923 [DDC_BUS_DDI_C] = GMBUS_PIN_9_TC1_ICP,
1924 [DDC_BUS_DDI_D] = GMBUS_PIN_10_TC2_ICP,
1927 static const u8 adlp_ddc_pin_map[] = {
1928 [ICL_DDC_BUS_DDI_A] = GMBUS_PIN_1_BXT,
1929 [ICL_DDC_BUS_DDI_B] = GMBUS_PIN_2_BXT,
1930 [ADLP_DDC_BUS_PORT_TC1] = GMBUS_PIN_9_TC1_ICP,
1931 [ADLP_DDC_BUS_PORT_TC2] = GMBUS_PIN_10_TC2_ICP,
1932 [ADLP_DDC_BUS_PORT_TC3] = GMBUS_PIN_11_TC3_ICP,
1933 [ADLP_DDC_BUS_PORT_TC4] = GMBUS_PIN_12_TC4_ICP,
1936 static u8 map_ddc_pin(struct drm_i915_private *i915, u8 vbt_pin)
1938 const u8 *ddc_pin_map;
1941 if (IS_ALDERLAKE_P(i915)) {
1942 ddc_pin_map = adlp_ddc_pin_map;
1943 n_entries = ARRAY_SIZE(adlp_ddc_pin_map);
1944 } else if (IS_ALDERLAKE_S(i915)) {
1945 ddc_pin_map = adls_ddc_pin_map;
1946 n_entries = ARRAY_SIZE(adls_ddc_pin_map);
1947 } else if (INTEL_PCH_TYPE(i915) >= PCH_DG1) {
1949 } else if (IS_ROCKETLAKE(i915) && INTEL_PCH_TYPE(i915) == PCH_TGP) {
1950 ddc_pin_map = rkl_pch_tgp_ddc_pin_map;
1951 n_entries = ARRAY_SIZE(rkl_pch_tgp_ddc_pin_map);
1952 } else if (HAS_PCH_TGP(i915) && DISPLAY_VER(i915) == 9) {
1953 ddc_pin_map = gen9bc_tgp_ddc_pin_map;
1954 n_entries = ARRAY_SIZE(gen9bc_tgp_ddc_pin_map);
1955 } else if (INTEL_PCH_TYPE(i915) >= PCH_ICP) {
1956 ddc_pin_map = icp_ddc_pin_map;
1957 n_entries = ARRAY_SIZE(icp_ddc_pin_map);
1958 } else if (HAS_PCH_CNP(i915)) {
1959 ddc_pin_map = cnp_ddc_pin_map;
1960 n_entries = ARRAY_SIZE(cnp_ddc_pin_map);
1962 /* Assuming direct map */
1966 if (vbt_pin < n_entries && ddc_pin_map[vbt_pin] != 0)
1967 return ddc_pin_map[vbt_pin];
1969 drm_dbg_kms(&i915->drm,
1970 "Ignoring alternate pin: VBT claims DDC pin %d, which is not valid for this platform\n",
1975 static enum port get_port_by_ddc_pin(struct drm_i915_private *i915, u8 ddc_pin)
1977 const struct intel_bios_encoder_data *devdata;
1983 for_each_port(port) {
1984 devdata = i915->vbt.ports[port];
1986 if (devdata && ddc_pin == devdata->child.ddc_pin)
1993 static void sanitize_ddc_pin(struct intel_bios_encoder_data *devdata,
1996 struct drm_i915_private *i915 = devdata->i915;
1997 struct child_device_config *child;
2001 if (!devdata->child.ddc_pin)
2004 mapped_ddc_pin = map_ddc_pin(i915, devdata->child.ddc_pin);
2005 if (!intel_gmbus_is_valid_pin(i915, mapped_ddc_pin)) {
2006 drm_dbg_kms(&i915->drm,
2007 "Port %c has invalid DDC pin %d, "
2008 "sticking to defaults\n",
2009 port_name(port), mapped_ddc_pin);
2010 devdata->child.ddc_pin = 0;
2014 p = get_port_by_ddc_pin(i915, devdata->child.ddc_pin);
2018 drm_dbg_kms(&i915->drm,
2019 "port %c trying to use the same DDC pin (0x%x) as port %c, "
2020 "disabling port %c DVI/HDMI support\n",
2021 port_name(port), mapped_ddc_pin,
2022 port_name(p), port_name(p));
2025 * If we have multiple ports supposedly sharing the pin, then dvi/hdmi
2026 * couldn't exist on the shared port. Otherwise they share the same ddc
2027 * pin and system couldn't communicate with them separately.
2029 * Give inverse child device order the priority, last one wins. Yes,
2030 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2031 * port A and port E with the same AUX ch and we must pick port E :(
2033 child = &i915->vbt.ports[p]->child;
2035 child->device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2036 child->device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2041 static enum port get_port_by_aux_ch(struct drm_i915_private *i915, u8 aux_ch)
2043 const struct intel_bios_encoder_data *devdata;
2049 for_each_port(port) {
2050 devdata = i915->vbt.ports[port];
2052 if (devdata && aux_ch == devdata->child.aux_channel)
2059 static void sanitize_aux_ch(struct intel_bios_encoder_data *devdata,
2062 struct drm_i915_private *i915 = devdata->i915;
2063 struct child_device_config *child;
2066 p = get_port_by_aux_ch(i915, devdata->child.aux_channel);
2070 drm_dbg_kms(&i915->drm,
2071 "port %c trying to use the same AUX CH (0x%x) as port %c, "
2072 "disabling port %c DP support\n",
2073 port_name(port), devdata->child.aux_channel,
2074 port_name(p), port_name(p));
2077 * If we have multiple ports supposedly sharing the aux channel, then DP
2078 * couldn't exist on the shared port. Otherwise they share the same aux
2079 * channel and system couldn't communicate with them separately.
2081 * Give inverse child device order the priority, last one wins. Yes,
2082 * there are real machines (eg. Asrock B250M-HDV) where VBT has both
2083 * port A and port E with the same AUX ch and we must pick port E :(
2085 child = &i915->vbt.ports[p]->child;
2087 child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2088 child->aux_channel = 0;
2091 static u8 dvo_port_type(u8 dvo_port)
2094 case DVO_PORT_HDMIA:
2095 case DVO_PORT_HDMIB:
2096 case DVO_PORT_HDMIC:
2097 case DVO_PORT_HDMID:
2098 case DVO_PORT_HDMIE:
2099 case DVO_PORT_HDMIF:
2100 case DVO_PORT_HDMIG:
2101 case DVO_PORT_HDMIH:
2102 case DVO_PORT_HDMII:
2103 return DVO_PORT_HDMIA;
2113 return DVO_PORT_DPA;
2114 case DVO_PORT_MIPIA:
2115 case DVO_PORT_MIPIB:
2116 case DVO_PORT_MIPIC:
2117 case DVO_PORT_MIPID:
2118 return DVO_PORT_MIPIA;
2124 static enum port __dvo_port_to_port(int n_ports, int n_dvo,
2125 const int port_mapping[][3], u8 dvo_port)
2130 for (port = PORT_A; port < n_ports; port++) {
2131 for (i = 0; i < n_dvo; i++) {
2132 if (port_mapping[port][i] == -1)
2135 if (dvo_port == port_mapping[port][i])
2143 static enum port dvo_port_to_port(struct drm_i915_private *i915,
2147 * Each DDI port can have more than one value on the "DVO Port" field,
2148 * so look for all the possible values for each port.
2150 static const int port_mapping[][3] = {
2151 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2152 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2153 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2154 [PORT_D] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2155 [PORT_E] = { DVO_PORT_HDMIE, DVO_PORT_DPE, DVO_PORT_CRT },
2156 [PORT_F] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2157 [PORT_G] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2158 [PORT_H] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2159 [PORT_I] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2162 * RKL VBT uses PHY based mapping. Combo PHYs A,B,C,D
2163 * map to DDI A,B,TC1,TC2 respectively.
2165 static const int rkl_port_mapping[][3] = {
2166 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2167 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2169 [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2170 [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2173 * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E,
2174 * PORT_F and PORT_G, we need to map that to correct VBT sections.
2176 static const int adls_port_mapping[][3] = {
2177 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2180 [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2181 [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2182 [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2183 [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2185 static const int xelpd_port_mapping[][3] = {
2186 [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 },
2187 [PORT_B] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 },
2188 [PORT_C] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 },
2189 [PORT_D_XELPD] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 },
2190 [PORT_E_XELPD] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 },
2191 [PORT_TC1] = { DVO_PORT_HDMIF, DVO_PORT_DPF, -1 },
2192 [PORT_TC2] = { DVO_PORT_HDMIG, DVO_PORT_DPG, -1 },
2193 [PORT_TC3] = { DVO_PORT_HDMIH, DVO_PORT_DPH, -1 },
2194 [PORT_TC4] = { DVO_PORT_HDMII, DVO_PORT_DPI, -1 },
2197 if (DISPLAY_VER(i915) == 13)
2198 return __dvo_port_to_port(ARRAY_SIZE(xelpd_port_mapping),
2199 ARRAY_SIZE(xelpd_port_mapping[0]),
2202 else if (IS_ALDERLAKE_S(i915))
2203 return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping),
2204 ARRAY_SIZE(adls_port_mapping[0]),
2207 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
2208 return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping),
2209 ARRAY_SIZE(rkl_port_mapping[0]),
2213 return __dvo_port_to_port(ARRAY_SIZE(port_mapping),
2214 ARRAY_SIZE(port_mapping[0]),
2219 static int parse_bdb_230_dp_max_link_rate(const int vbt_max_link_rate)
2221 switch (vbt_max_link_rate) {
2223 case BDB_230_VBT_DP_MAX_LINK_RATE_DEF:
2225 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR20:
2227 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR13P5:
2229 case BDB_230_VBT_DP_MAX_LINK_RATE_UHBR10:
2231 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR3:
2233 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR2:
2235 case BDB_230_VBT_DP_MAX_LINK_RATE_HBR:
2237 case BDB_230_VBT_DP_MAX_LINK_RATE_LBR:
2242 static int parse_bdb_216_dp_max_link_rate(const int vbt_max_link_rate)
2244 switch (vbt_max_link_rate) {
2246 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR3:
2248 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR2:
2250 case BDB_216_VBT_DP_MAX_LINK_RATE_HBR:
2252 case BDB_216_VBT_DP_MAX_LINK_RATE_LBR:
2257 static int _intel_bios_dp_max_link_rate(const struct intel_bios_encoder_data *devdata)
2259 if (!devdata || devdata->i915->vbt.version < 216)
2262 if (devdata->i915->vbt.version >= 230)
2263 return parse_bdb_230_dp_max_link_rate(devdata->child.dp_max_link_rate);
2265 return parse_bdb_216_dp_max_link_rate(devdata->child.dp_max_link_rate);
2268 static void sanitize_device_type(struct intel_bios_encoder_data *devdata,
2271 struct drm_i915_private *i915 = devdata->i915;
2274 if (port != PORT_A || DISPLAY_VER(i915) >= 12)
2277 if (!(devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING))
2280 is_hdmi = !(devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT);
2282 drm_dbg_kms(&i915->drm, "VBT claims port A supports DVI%s, ignoring\n",
2283 is_hdmi ? "/HDMI" : "");
2285 devdata->child.device_type &= ~DEVICE_TYPE_TMDS_DVI_SIGNALING;
2286 devdata->child.device_type |= DEVICE_TYPE_NOT_HDMI_OUTPUT;
2290 intel_bios_encoder_supports_crt(const struct intel_bios_encoder_data *devdata)
2292 return devdata->child.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
2296 intel_bios_encoder_supports_dvi(const struct intel_bios_encoder_data *devdata)
2298 return devdata->child.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
2302 intel_bios_encoder_supports_hdmi(const struct intel_bios_encoder_data *devdata)
2304 return intel_bios_encoder_supports_dvi(devdata) &&
2305 (devdata->child.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
2309 intel_bios_encoder_supports_dp(const struct intel_bios_encoder_data *devdata)
2311 return devdata->child.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2315 intel_bios_encoder_supports_edp(const struct intel_bios_encoder_data *devdata)
2317 return intel_bios_encoder_supports_dp(devdata) &&
2318 devdata->child.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR;
2321 static int _intel_bios_hdmi_level_shift(const struct intel_bios_encoder_data *devdata)
2323 if (!devdata || devdata->i915->vbt.version < 158)
2326 return devdata->child.hdmi_level_shifter_value;
2329 static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devdata)
2331 if (!devdata || devdata->i915->vbt.version < 204)
2334 switch (devdata->child.hdmi_max_data_rate) {
2336 MISSING_CASE(devdata->child.hdmi_max_data_rate);
2338 case HDMI_MAX_DATA_RATE_PLATFORM:
2340 case HDMI_MAX_DATA_RATE_594:
2342 case HDMI_MAX_DATA_RATE_340:
2344 case HDMI_MAX_DATA_RATE_300:
2346 case HDMI_MAX_DATA_RATE_297:
2348 case HDMI_MAX_DATA_RATE_165:
2353 static bool is_port_valid(struct drm_i915_private *i915, enum port port)
2356 * On some ICL SKUs port F is not present, but broken VBTs mark
2357 * the port as present. Only try to initialize port F for the
2358 * SKUs that may actually have it.
2360 if (port == PORT_F && IS_ICELAKE(i915))
2361 return IS_ICL_WITH_PORT_F(i915);
2366 static void parse_ddi_port(struct drm_i915_private *i915,
2367 struct intel_bios_encoder_data *devdata)
2369 const struct child_device_config *child = &devdata->child;
2370 bool is_dvi, is_hdmi, is_dp, is_edp, is_crt, supports_typec_usb, supports_tbt;
2371 int dp_boost_level, dp_max_link_rate, hdmi_boost_level, hdmi_level_shift, max_tmds_clock;
2374 port = dvo_port_to_port(i915, child->dvo_port);
2375 if (port == PORT_NONE)
2378 if (!is_port_valid(i915, port)) {
2379 drm_dbg_kms(&i915->drm,
2380 "VBT reports port %c as supported, but that can't be true: skipping\n",
2385 if (i915->vbt.ports[port]) {
2386 drm_dbg_kms(&i915->drm,
2387 "More than one child device for port %c in VBT, using the first.\n",
2392 sanitize_device_type(devdata, port);
2394 is_dvi = intel_bios_encoder_supports_dvi(devdata);
2395 is_dp = intel_bios_encoder_supports_dp(devdata);
2396 is_crt = intel_bios_encoder_supports_crt(devdata);
2397 is_hdmi = intel_bios_encoder_supports_hdmi(devdata);
2398 is_edp = intel_bios_encoder_supports_edp(devdata);
2400 supports_typec_usb = intel_bios_encoder_supports_typec_usb(devdata);
2401 supports_tbt = intel_bios_encoder_supports_tbt(devdata);
2403 drm_dbg_kms(&i915->drm,
2404 "Port %c VBT info: CRT:%d DVI:%d HDMI:%d DP:%d eDP:%d LSPCON:%d USB-Type-C:%d TBT:%d DSC:%d\n",
2405 port_name(port), is_crt, is_dvi, is_hdmi, is_dp, is_edp,
2406 HAS_LSPCON(i915) && child->lspcon,
2407 supports_typec_usb, supports_tbt,
2408 devdata->dsc != NULL);
2411 sanitize_ddc_pin(devdata, port);
2414 sanitize_aux_ch(devdata, port);
2416 hdmi_level_shift = _intel_bios_hdmi_level_shift(devdata);
2417 if (hdmi_level_shift >= 0) {
2418 drm_dbg_kms(&i915->drm,
2419 "Port %c VBT HDMI level shift: %d\n",
2420 port_name(port), hdmi_level_shift);
2423 max_tmds_clock = _intel_bios_max_tmds_clock(devdata);
2425 drm_dbg_kms(&i915->drm,
2426 "Port %c VBT HDMI max TMDS clock: %d kHz\n",
2427 port_name(port), max_tmds_clock);
2429 /* I_boost config for SKL and above */
2430 dp_boost_level = intel_bios_encoder_dp_boost_level(devdata);
2432 drm_dbg_kms(&i915->drm,
2433 "Port %c VBT (e)DP boost level: %d\n",
2434 port_name(port), dp_boost_level);
2436 hdmi_boost_level = intel_bios_encoder_hdmi_boost_level(devdata);
2437 if (hdmi_boost_level)
2438 drm_dbg_kms(&i915->drm,
2439 "Port %c VBT HDMI boost level: %d\n",
2440 port_name(port), hdmi_boost_level);
2442 dp_max_link_rate = _intel_bios_dp_max_link_rate(devdata);
2443 if (dp_max_link_rate)
2444 drm_dbg_kms(&i915->drm,
2445 "Port %c VBT DP max link rate: %d\n",
2446 port_name(port), dp_max_link_rate);
2448 i915->vbt.ports[port] = devdata;
2451 static bool has_ddi_port_info(struct drm_i915_private *i915)
2453 return DISPLAY_VER(i915) >= 5 || IS_G4X(i915);
2456 static void parse_ddi_ports(struct drm_i915_private *i915)
2458 struct intel_bios_encoder_data *devdata;
2460 if (!has_ddi_port_info(i915))
2463 list_for_each_entry(devdata, &i915->vbt.display_devices, node)
2464 parse_ddi_port(i915, devdata);
2468 parse_general_definitions(struct drm_i915_private *i915)
2470 const struct bdb_general_definitions *defs;
2471 struct intel_bios_encoder_data *devdata;
2472 const struct child_device_config *child;
2473 int i, child_device_num;
2478 defs = find_section(i915, BDB_GENERAL_DEFINITIONS);
2480 drm_dbg_kms(&i915->drm,
2481 "No general definition block is found, no devices defined.\n");
2485 block_size = get_blocksize(defs);
2486 if (block_size < sizeof(*defs)) {
2487 drm_dbg_kms(&i915->drm,
2488 "General definitions block too small (%u)\n",
2493 bus_pin = defs->crt_ddc_gmbus_pin;
2494 drm_dbg_kms(&i915->drm, "crt_ddc_bus_pin: %d\n", bus_pin);
2495 if (intel_gmbus_is_valid_pin(i915, bus_pin))
2496 i915->vbt.crt_ddc_pin = bus_pin;
2498 if (i915->vbt.version < 106) {
2500 } else if (i915->vbt.version < 111) {
2502 } else if (i915->vbt.version < 195) {
2503 expected_size = LEGACY_CHILD_DEVICE_CONFIG_SIZE;
2504 } else if (i915->vbt.version == 195) {
2506 } else if (i915->vbt.version <= 215) {
2508 } else if (i915->vbt.version <= 237) {
2511 expected_size = sizeof(*child);
2512 BUILD_BUG_ON(sizeof(*child) < 39);
2514 "Expected child device config size for VBT version %u not known; assuming %u\n",
2515 i915->vbt.version, expected_size);
2518 /* Flag an error for unexpected size, but continue anyway. */
2519 if (defs->child_dev_size != expected_size)
2521 "Unexpected child device config size %u (expected %u for VBT version %u)\n",
2522 defs->child_dev_size, expected_size, i915->vbt.version);
2524 /* The legacy sized child device config is the minimum we need. */
2525 if (defs->child_dev_size < LEGACY_CHILD_DEVICE_CONFIG_SIZE) {
2526 drm_dbg_kms(&i915->drm,
2527 "Child device config size %u is too small.\n",
2528 defs->child_dev_size);
2532 /* get the number of child device */
2533 child_device_num = (block_size - sizeof(*defs)) / defs->child_dev_size;
2535 for (i = 0; i < child_device_num; i++) {
2536 child = child_device_ptr(defs, i);
2537 if (!child->device_type)
2540 drm_dbg_kms(&i915->drm,
2541 "Found VBT child device with type 0x%x\n",
2542 child->device_type);
2544 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2548 devdata->i915 = i915;
2551 * Copy as much as we know (sizeof) and is available
2552 * (child_dev_size) of the child device config. Accessing the
2553 * data must depend on VBT version.
2555 memcpy(&devdata->child, child,
2556 min_t(size_t, defs->child_dev_size, sizeof(*child)));
2558 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2561 if (list_empty(&i915->vbt.display_devices))
2562 drm_dbg_kms(&i915->drm,
2563 "no child dev is parsed from VBT\n");
2566 /* Common defaults which may be overridden by VBT. */
2568 init_vbt_defaults(struct drm_i915_private *i915)
2570 i915->vbt.crt_ddc_pin = GMBUS_PIN_VGADDC;
2572 /* Default to having backlight */
2573 i915->vbt.backlight.present = true;
2575 /* LFP panel data */
2576 i915->vbt.lvds_dither = 1;
2578 /* SDVO panel data */
2579 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2581 /* general features */
2582 i915->vbt.int_tv_support = 1;
2583 i915->vbt.int_crt_support = 1;
2585 /* driver features */
2586 i915->vbt.int_lvds_support = 1;
2588 /* Default to using SSC */
2589 i915->vbt.lvds_use_ssc = 1;
2591 * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
2594 i915->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(i915,
2595 !HAS_PCH_SPLIT(i915));
2596 drm_dbg_kms(&i915->drm, "Set default to SSC at %d kHz\n",
2597 i915->vbt.lvds_ssc_freq);
2600 /* Defaults to initialize only if there is no VBT. */
2602 init_vbt_missing_defaults(struct drm_i915_private *i915)
2605 int ports = BIT(PORT_A) | BIT(PORT_B) | BIT(PORT_C) |
2606 BIT(PORT_D) | BIT(PORT_E) | BIT(PORT_F);
2608 if (!HAS_DDI(i915) && !IS_CHERRYVIEW(i915))
2611 for_each_port_masked(port, ports) {
2612 struct intel_bios_encoder_data *devdata;
2613 struct child_device_config *child;
2614 enum phy phy = intel_port_to_phy(i915, port);
2617 * VBT has the TypeC mode (native,TBT/USB) and we don't want
2620 if (intel_phy_is_tc(i915, phy))
2623 /* Create fake child device config */
2624 devdata = kzalloc(sizeof(*devdata), GFP_KERNEL);
2628 devdata->i915 = i915;
2629 child = &devdata->child;
2632 child->dvo_port = DVO_PORT_HDMIF;
2633 else if (port == PORT_E)
2634 child->dvo_port = DVO_PORT_HDMIE;
2636 child->dvo_port = DVO_PORT_HDMIA + port;
2638 if (port != PORT_A && port != PORT_E)
2639 child->device_type |= DEVICE_TYPE_TMDS_DVI_SIGNALING;
2642 child->device_type |= DEVICE_TYPE_DISPLAYPORT_OUTPUT;
2645 child->device_type |= DEVICE_TYPE_INTERNAL_CONNECTOR;
2647 list_add_tail(&devdata->node, &i915->vbt.display_devices);
2649 drm_dbg_kms(&i915->drm,
2650 "Generating default VBT child device with type 0x04%x on port %c\n",
2651 child->device_type, port_name(port));
2654 /* Bypass some minimum baseline VBT version checks */
2655 i915->vbt.version = 155;
2658 static const struct bdb_header *get_bdb_header(const struct vbt_header *vbt)
2660 const void *_vbt = vbt;
2662 return _vbt + vbt->bdb_offset;
2666 * intel_bios_is_valid_vbt - does the given buffer contain a valid VBT
2667 * @buf: pointer to a buffer to validate
2668 * @size: size of the buffer
2670 * Returns true on valid VBT.
2672 bool intel_bios_is_valid_vbt(const void *buf, size_t size)
2674 const struct vbt_header *vbt = buf;
2675 const struct bdb_header *bdb;
2680 if (sizeof(struct vbt_header) > size) {
2681 DRM_DEBUG_DRIVER("VBT header incomplete\n");
2685 if (memcmp(vbt->signature, "$VBT", 4)) {
2686 DRM_DEBUG_DRIVER("VBT invalid signature\n");
2690 if (vbt->vbt_size > size) {
2691 DRM_DEBUG_DRIVER("VBT incomplete (vbt_size overflows)\n");
2695 size = vbt->vbt_size;
2697 if (range_overflows_t(size_t,
2699 sizeof(struct bdb_header),
2701 DRM_DEBUG_DRIVER("BDB header incomplete\n");
2705 bdb = get_bdb_header(vbt);
2706 if (range_overflows_t(size_t, vbt->bdb_offset, bdb->bdb_size, size)) {
2707 DRM_DEBUG_DRIVER("BDB incomplete\n");
2714 static struct vbt_header *spi_oprom_get_vbt(struct drm_i915_private *i915)
2716 u32 count, data, found, store = 0;
2717 u32 static_region, oprom_offset;
2718 u32 oprom_size = 0x200000;
2722 static_region = intel_uncore_read(&i915->uncore, SPI_STATIC_REGIONS);
2723 static_region &= OPTIONROM_SPI_REGIONID_MASK;
2724 intel_uncore_write(&i915->uncore, PRIMARY_SPI_REGIONID, static_region);
2726 oprom_offset = intel_uncore_read(&i915->uncore, OROM_OFFSET);
2727 oprom_offset &= OROM_OFFSET_MASK;
2729 for (count = 0; count < oprom_size; count += 4) {
2730 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, oprom_offset + count);
2731 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2733 if (data == *((const u32 *)"$VBT")) {
2734 found = oprom_offset + count;
2739 if (count >= oprom_size)
2742 /* Get VBT size and allocate space for the VBT */
2743 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found +
2744 offsetof(struct vbt_header, vbt_size));
2745 vbt_size = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2748 vbt = kzalloc(round_up(vbt_size, 4), GFP_KERNEL);
2752 for (count = 0; count < vbt_size; count += 4) {
2753 intel_uncore_write(&i915->uncore, PRIMARY_SPI_ADDRESS, found + count);
2754 data = intel_uncore_read(&i915->uncore, PRIMARY_SPI_TRIGGER);
2755 *(vbt + store++) = data;
2758 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2761 drm_dbg_kms(&i915->drm, "Found valid VBT in SPI flash\n");
2763 return (struct vbt_header *)vbt;
2771 static struct vbt_header *oprom_get_vbt(struct drm_i915_private *i915)
2773 struct pci_dev *pdev = to_pci_dev(i915->drm.dev);
2774 void __iomem *p = NULL, *oprom;
2775 struct vbt_header *vbt;
2779 oprom = pci_map_rom(pdev, &size);
2783 /* Scour memory looking for the VBT signature. */
2784 for (i = 0; i + 4 < size; i += 4) {
2785 if (ioread32(oprom + i) != *((const u32 *)"$VBT"))
2794 goto err_unmap_oprom;
2796 if (sizeof(struct vbt_header) > size) {
2797 drm_dbg(&i915->drm, "VBT header incomplete\n");
2798 goto err_unmap_oprom;
2801 vbt_size = ioread16(p + offsetof(struct vbt_header, vbt_size));
2802 if (vbt_size > size) {
2804 "VBT incomplete (vbt_size overflows)\n");
2805 goto err_unmap_oprom;
2808 /* The rest will be validated by intel_bios_is_valid_vbt() */
2809 vbt = kmalloc(vbt_size, GFP_KERNEL);
2811 goto err_unmap_oprom;
2813 memcpy_fromio(vbt, p, vbt_size);
2815 if (!intel_bios_is_valid_vbt(vbt, vbt_size))
2818 pci_unmap_rom(pdev, oprom);
2820 drm_dbg_kms(&i915->drm, "Found valid VBT in PCI ROM\n");
2827 pci_unmap_rom(pdev, oprom);
2833 * intel_bios_init - find VBT and initialize settings from the BIOS
2834 * @i915: i915 device instance
2836 * Parse and initialize settings from the Video BIOS Tables (VBT). If the VBT
2837 * was not found in ACPI OpRegion, try to find it in PCI ROM first. Also
2838 * initialize some defaults if the VBT is not present at all.
2840 void intel_bios_init(struct drm_i915_private *i915)
2842 const struct vbt_header *vbt = i915->opregion.vbt;
2843 struct vbt_header *oprom_vbt = NULL;
2844 const struct bdb_header *bdb;
2846 INIT_LIST_HEAD(&i915->vbt.display_devices);
2847 INIT_LIST_HEAD(&i915->vbt.bdb_blocks);
2849 if (!HAS_DISPLAY(i915)) {
2850 drm_dbg_kms(&i915->drm,
2851 "Skipping VBT init due to disabled display.\n");
2855 init_vbt_defaults(i915);
2858 * If the OpRegion does not have VBT, look in SPI flash through MMIO or
2861 if (!vbt && IS_DGFX(i915)) {
2862 oprom_vbt = spi_oprom_get_vbt(i915);
2867 oprom_vbt = oprom_get_vbt(i915);
2874 bdb = get_bdb_header(vbt);
2875 i915->vbt.version = bdb->version;
2877 drm_dbg_kms(&i915->drm,
2878 "VBT signature \"%.*s\", BDB version %d\n",
2879 (int)sizeof(vbt->signature), vbt->signature, i915->vbt.version);
2881 init_bdb_blocks(i915, bdb);
2883 /* Grab useful general definitions */
2884 parse_general_features(i915);
2885 parse_general_definitions(i915);
2886 parse_panel_options(i915);
2887 parse_generic_dtd(i915);
2888 parse_lfp_data(i915);
2889 parse_lfp_backlight(i915);
2890 parse_sdvo_panel_data(i915);
2891 parse_driver_features(i915);
2892 parse_power_conservation_features(i915);
2895 parse_mipi_config(i915);
2896 parse_mipi_sequence(i915);
2898 /* Depends on child device list */
2899 parse_compression_parameters(i915);
2903 drm_info(&i915->drm,
2904 "Failed to find VBIOS tables (VBT)\n");
2905 init_vbt_missing_defaults(i915);
2908 /* Further processing on pre-parsed or generated child device data */
2909 parse_sdvo_device_mapping(i915);
2910 parse_ddi_ports(i915);
2916 * intel_bios_driver_remove - Free any resources allocated by intel_bios_init()
2917 * @i915: i915 device instance
2919 void intel_bios_driver_remove(struct drm_i915_private *i915)
2921 struct intel_bios_encoder_data *devdata, *nd;
2922 struct bdb_block_entry *entry, *ne;
2924 list_for_each_entry_safe(devdata, nd, &i915->vbt.display_devices, node) {
2925 list_del(&devdata->node);
2926 kfree(devdata->dsc);
2930 list_for_each_entry_safe(entry, ne, &i915->vbt.bdb_blocks, node) {
2931 list_del(&entry->node);
2935 kfree(i915->vbt.sdvo_lvds_vbt_mode);
2936 i915->vbt.sdvo_lvds_vbt_mode = NULL;
2937 kfree(i915->vbt.lfp_lvds_vbt_mode);
2938 i915->vbt.lfp_lvds_vbt_mode = NULL;
2939 kfree(i915->vbt.dsi.data);
2940 i915->vbt.dsi.data = NULL;
2941 kfree(i915->vbt.dsi.pps);
2942 i915->vbt.dsi.pps = NULL;
2943 kfree(i915->vbt.dsi.config);
2944 i915->vbt.dsi.config = NULL;
2945 kfree(i915->vbt.dsi.deassert_seq);
2946 i915->vbt.dsi.deassert_seq = NULL;
2950 * intel_bios_is_tv_present - is integrated TV present in VBT
2951 * @i915: i915 device instance
2953 * Return true if TV is present. If no child devices were parsed from VBT,
2954 * assume TV is present.
2956 bool intel_bios_is_tv_present(struct drm_i915_private *i915)
2958 const struct intel_bios_encoder_data *devdata;
2959 const struct child_device_config *child;
2961 if (!i915->vbt.int_tv_support)
2964 if (list_empty(&i915->vbt.display_devices))
2967 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
2968 child = &devdata->child;
2971 * If the device type is not TV, continue.
2973 switch (child->device_type) {
2974 case DEVICE_TYPE_INT_TV:
2975 case DEVICE_TYPE_TV:
2976 case DEVICE_TYPE_TV_SVIDEO_COMPOSITE:
2981 /* Only when the addin_offset is non-zero, it is regarded
2984 if (child->addin_offset)
2992 * intel_bios_is_lvds_present - is LVDS present in VBT
2993 * @i915: i915 device instance
2994 * @i2c_pin: i2c pin for LVDS if present
2996 * Return true if LVDS is present. If no child devices were parsed from VBT,
2997 * assume LVDS is present.
2999 bool intel_bios_is_lvds_present(struct drm_i915_private *i915, u8 *i2c_pin)
3001 const struct intel_bios_encoder_data *devdata;
3002 const struct child_device_config *child;
3004 if (list_empty(&i915->vbt.display_devices))
3007 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3008 child = &devdata->child;
3010 /* If the device type is not LFP, continue.
3011 * We have to check both the new identifiers as well as the
3012 * old for compatibility with some BIOSes.
3014 if (child->device_type != DEVICE_TYPE_INT_LFP &&
3015 child->device_type != DEVICE_TYPE_LFP)
3018 if (intel_gmbus_is_valid_pin(i915, child->i2c_pin))
3019 *i2c_pin = child->i2c_pin;
3021 /* However, we cannot trust the BIOS writers to populate
3022 * the VBT correctly. Since LVDS requires additional
3023 * information from AIM blocks, a non-zero addin offset is
3024 * a good indicator that the LVDS is actually present.
3026 if (child->addin_offset)
3029 /* But even then some BIOS writers perform some black magic
3030 * and instantiate the device without reference to any
3031 * additional data. Trust that if the VBT was written into
3032 * the OpRegion then they have validated the LVDS's existence.
3034 if (i915->opregion.vbt)
3042 * intel_bios_is_port_present - is the specified digital port present
3043 * @i915: i915 device instance
3044 * @port: port to check
3046 * Return true if the device in %port is present.
3048 bool intel_bios_is_port_present(struct drm_i915_private *i915, enum port port)
3050 if (WARN_ON(!has_ddi_port_info(i915)))
3053 return i915->vbt.ports[port];
3057 * intel_bios_is_port_edp - is the device in given port eDP
3058 * @i915: i915 device instance
3059 * @port: port to check
3061 * Return true if the device in %port is eDP.
3063 bool intel_bios_is_port_edp(struct drm_i915_private *i915, enum port port)
3065 const struct intel_bios_encoder_data *devdata =
3066 intel_bios_encoder_data_lookup(i915, port);
3068 return devdata && intel_bios_encoder_supports_edp(devdata);
3071 static bool intel_bios_encoder_supports_dp_dual_mode(const struct intel_bios_encoder_data *devdata)
3073 const struct child_device_config *child = &devdata->child;
3075 if (!intel_bios_encoder_supports_dp(devdata) ||
3076 !intel_bios_encoder_supports_hdmi(devdata))
3079 if (dvo_port_type(child->dvo_port) == DVO_PORT_DPA)
3082 /* Only accept a HDMI dvo_port as DP++ if it has an AUX channel */
3083 if (dvo_port_type(child->dvo_port) == DVO_PORT_HDMIA &&
3084 child->aux_channel != 0)
3090 bool intel_bios_is_port_dp_dual_mode(struct drm_i915_private *i915,
3093 const struct intel_bios_encoder_data *devdata =
3094 intel_bios_encoder_data_lookup(i915, port);
3096 return devdata && intel_bios_encoder_supports_dp_dual_mode(devdata);
3100 * intel_bios_is_dsi_present - is DSI present in VBT
3101 * @i915: i915 device instance
3102 * @port: port for DSI if present
3104 * Return true if DSI is present, and return the port in %port.
3106 bool intel_bios_is_dsi_present(struct drm_i915_private *i915,
3109 const struct intel_bios_encoder_data *devdata;
3110 const struct child_device_config *child;
3113 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3114 child = &devdata->child;
3116 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3119 dvo_port = child->dvo_port;
3121 if (dvo_port == DVO_PORT_MIPIA ||
3122 (dvo_port == DVO_PORT_MIPIB && DISPLAY_VER(i915) >= 11) ||
3123 (dvo_port == DVO_PORT_MIPIC && DISPLAY_VER(i915) < 11)) {
3125 *port = dvo_port - DVO_PORT_MIPIA;
3127 } else if (dvo_port == DVO_PORT_MIPIB ||
3128 dvo_port == DVO_PORT_MIPIC ||
3129 dvo_port == DVO_PORT_MIPID) {
3130 drm_dbg_kms(&i915->drm,
3131 "VBT has unsupported DSI port %c\n",
3132 port_name(dvo_port - DVO_PORT_MIPIA));
3139 static void fill_dsc(struct intel_crtc_state *crtc_state,
3140 struct dsc_compression_parameters_entry *dsc,
3143 struct drm_dsc_config *vdsc_cfg = &crtc_state->dsc.config;
3146 vdsc_cfg->dsc_version_major = dsc->version_major;
3147 vdsc_cfg->dsc_version_minor = dsc->version_minor;
3149 if (dsc->support_12bpc && dsc_max_bpc >= 12)
3151 else if (dsc->support_10bpc && dsc_max_bpc >= 10)
3153 else if (dsc->support_8bpc && dsc_max_bpc >= 8)
3156 DRM_DEBUG_KMS("VBT: Unsupported BPC %d for DCS\n",
3159 crtc_state->pipe_bpp = bpc * 3;
3161 crtc_state->dsc.compressed_bpp = min(crtc_state->pipe_bpp,
3162 VBT_DSC_MAX_BPP(dsc->max_bpp));
3165 * FIXME: This is ugly, and slice count should take DSC engine
3166 * throughput etc. into account.
3168 * Also, per spec DSI supports 1, 2, 3 or 4 horizontal slices.
3170 if (dsc->slices_per_line & BIT(2)) {
3171 crtc_state->dsc.slice_count = 4;
3172 } else if (dsc->slices_per_line & BIT(1)) {
3173 crtc_state->dsc.slice_count = 2;
3176 if (!(dsc->slices_per_line & BIT(0)))
3177 DRM_DEBUG_KMS("VBT: Unsupported DSC slice count for DSI\n");
3179 crtc_state->dsc.slice_count = 1;
3182 if (crtc_state->hw.adjusted_mode.crtc_hdisplay %
3183 crtc_state->dsc.slice_count != 0)
3184 DRM_DEBUG_KMS("VBT: DSC hdisplay %d not divisible by slice count %d\n",
3185 crtc_state->hw.adjusted_mode.crtc_hdisplay,
3186 crtc_state->dsc.slice_count);
3189 * The VBT rc_buffer_block_size and rc_buffer_size definitions
3190 * correspond to DP 1.4 DPCD offsets 0x62 and 0x63.
3192 vdsc_cfg->rc_model_size = drm_dsc_dp_rc_buffer_size(dsc->rc_buffer_block_size,
3193 dsc->rc_buffer_size);
3195 /* FIXME: DSI spec says bpc + 1 for this one */
3196 vdsc_cfg->line_buf_depth = VBT_DSC_LINE_BUFFER_DEPTH(dsc->line_buffer_depth);
3198 vdsc_cfg->block_pred_enable = dsc->block_prediction_enable;
3200 vdsc_cfg->slice_height = dsc->slice_height;
3203 /* FIXME: initially DSI specific */
3204 bool intel_bios_get_dsc_params(struct intel_encoder *encoder,
3205 struct intel_crtc_state *crtc_state,
3208 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3209 const struct intel_bios_encoder_data *devdata;
3210 const struct child_device_config *child;
3212 list_for_each_entry(devdata, &i915->vbt.display_devices, node) {
3213 child = &devdata->child;
3215 if (!(child->device_type & DEVICE_TYPE_MIPI_OUTPUT))
3218 if (child->dvo_port - DVO_PORT_MIPIA == encoder->port) {
3223 fill_dsc(crtc_state, devdata->dsc, dsc_max_bpc);
3233 * intel_bios_is_port_hpd_inverted - is HPD inverted for %port
3234 * @i915: i915 device instance
3235 * @port: port to check
3237 * Return true if HPD should be inverted for %port.
3240 intel_bios_is_port_hpd_inverted(const struct drm_i915_private *i915,
3243 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3245 if (drm_WARN_ON_ONCE(&i915->drm,
3246 !IS_GEMINILAKE(i915) && !IS_BROXTON(i915)))
3249 return devdata && devdata->child.hpd_invert;
3253 * intel_bios_is_lspcon_present - if LSPCON is attached on %port
3254 * @i915: i915 device instance
3255 * @port: port to check
3257 * Return true if LSPCON is present on this port
3260 intel_bios_is_lspcon_present(const struct drm_i915_private *i915,
3263 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3265 return HAS_LSPCON(i915) && devdata && devdata->child.lspcon;
3269 * intel_bios_is_lane_reversal_needed - if lane reversal needed on port
3270 * @i915: i915 device instance
3271 * @port: port to check
3273 * Return true if port requires lane reversal
3276 intel_bios_is_lane_reversal_needed(const struct drm_i915_private *i915,
3279 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3281 return devdata && devdata->child.lane_reversal;
3284 enum aux_ch intel_bios_port_aux_ch(struct drm_i915_private *i915,
3287 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[port];
3290 if (!devdata || !devdata->child.aux_channel) {
3291 aux_ch = (enum aux_ch)port;
3293 drm_dbg_kms(&i915->drm,
3294 "using AUX %c for port %c (platform default)\n",
3295 aux_ch_name(aux_ch), port_name(port));
3300 * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D
3301 * map to DDI A,B,TC1,TC2 respectively.
3303 * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E
3304 * map to DDI A,TC1,TC2,TC3,TC4 respectively.
3306 switch (devdata->child.aux_channel) {
3311 if (IS_ALDERLAKE_S(i915))
3312 aux_ch = AUX_CH_USBC1;
3317 if (IS_ALDERLAKE_S(i915))
3318 aux_ch = AUX_CH_USBC2;
3319 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3320 aux_ch = AUX_CH_USBC1;
3325 if (DISPLAY_VER(i915) == 13)
3326 aux_ch = AUX_CH_D_XELPD;
3327 else if (IS_ALDERLAKE_S(i915))
3328 aux_ch = AUX_CH_USBC3;
3329 else if (IS_DG1(i915) || IS_ROCKETLAKE(i915))
3330 aux_ch = AUX_CH_USBC2;
3335 if (DISPLAY_VER(i915) == 13)
3336 aux_ch = AUX_CH_E_XELPD;
3337 else if (IS_ALDERLAKE_S(i915))
3338 aux_ch = AUX_CH_USBC4;
3343 if (DISPLAY_VER(i915) == 13)
3344 aux_ch = AUX_CH_USBC1;
3349 if (DISPLAY_VER(i915) == 13)
3350 aux_ch = AUX_CH_USBC2;
3355 if (DISPLAY_VER(i915) == 13)
3356 aux_ch = AUX_CH_USBC3;
3361 if (DISPLAY_VER(i915) == 13)
3362 aux_ch = AUX_CH_USBC4;
3367 MISSING_CASE(devdata->child.aux_channel);
3372 drm_dbg_kms(&i915->drm, "using AUX %c for port %c (VBT)\n",
3373 aux_ch_name(aux_ch), port_name(port));
3378 int intel_bios_max_tmds_clock(struct intel_encoder *encoder)
3380 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3381 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3383 return _intel_bios_max_tmds_clock(devdata);
3386 /* This is an index in the HDMI/DVI DDI buffer translation table, or -1 */
3387 int intel_bios_hdmi_level_shift(struct intel_encoder *encoder)
3389 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3390 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3392 return _intel_bios_hdmi_level_shift(devdata);
3395 int intel_bios_encoder_dp_boost_level(const struct intel_bios_encoder_data *devdata)
3397 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3400 return translate_iboost(devdata->child.dp_iboost_level);
3403 int intel_bios_encoder_hdmi_boost_level(const struct intel_bios_encoder_data *devdata)
3405 if (!devdata || devdata->i915->vbt.version < 196 || !devdata->child.iboost)
3408 return translate_iboost(devdata->child.hdmi_iboost_level);
3411 int intel_bios_dp_max_link_rate(struct intel_encoder *encoder)
3413 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3414 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3416 return _intel_bios_dp_max_link_rate(devdata);
3419 int intel_bios_alternate_ddc_pin(struct intel_encoder *encoder)
3421 struct drm_i915_private *i915 = to_i915(encoder->base.dev);
3422 const struct intel_bios_encoder_data *devdata = i915->vbt.ports[encoder->port];
3424 if (!devdata || !devdata->child.ddc_pin)
3427 return map_ddc_pin(i915, devdata->child.ddc_pin);
3430 bool intel_bios_encoder_supports_typec_usb(const struct intel_bios_encoder_data *devdata)
3432 return devdata->i915->vbt.version >= 195 && devdata->child.dp_usb_type_c;
3435 bool intel_bios_encoder_supports_tbt(const struct intel_bios_encoder_data *devdata)
3437 return devdata->i915->vbt.version >= 209 && devdata->child.tbt;
3440 const struct intel_bios_encoder_data *
3441 intel_bios_encoder_data_lookup(struct drm_i915_private *i915, enum port port)
3443 return i915->vbt.ports[port];